CN102538972B - Infrared focal plane array signal simulator - Google Patents
Infrared focal plane array signal simulator Download PDFInfo
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- CN102538972B CN102538972B CN201110455999.5A CN201110455999A CN102538972B CN 102538972 B CN102538972 B CN 102538972B CN 201110455999 A CN201110455999 A CN 201110455999A CN 102538972 B CN102538972 B CN 102538972B
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Abstract
The invention discloses an infrared focal plane array signal simulator which comprises a panel button control circuit, a main control machine, a CPCI (compact peripheral component interface) bus interface circuit, a DPLL (digital phase locked loop) clock generation and programmable clock distribution circuit, a memory management circuit, a synchronous signal generation circuit, a programmable synchronous delay circuit, a DAC (digital-to-analog converter) control circuit and a low-voltage-difference high-steady-state power supply circuit, wherein the panel button control circuit is connected with the main control machine; the main control machine is connected with the CPCI bus interface circuit through a CPCI bus; the CPCI bus interface circuit is respectively connected to the DPLL clock generation and programmable clock distribution circuit, the memory management circuit, the synchronous signal generation circuit, the programmable synchronous delay circuit, a direct-current and alternating-current DAC control circuit through an internal bus, and the synchronous signal generation circuit, the programmable synchronous delay circuit and the DAC control circuit are also connected to the low-voltage-difference high-steady-state power supply circuit through the internal bus. The infrared focal plane array signal simulator provided by the invention can simulate a simulation source output by an infrared focal plane device signal according to the electric signal output characteristics of an infrared focal plane array device, thus the qualitative inspection and quantitative calibration of a data collection system can be realized.
Description
Technical field
The present invention relates to the core parts infrared focal plane array (IRFPA) of a kind of infrared acquisition and imaging system, particularly a kind of infrared focal plane array signal simulator.
Background technology
Infrared imaging is the product of multidisciplinary, multi-field technological synthesis development, and its gordian technique comprises: infrared-sensitive material, semiconductor device technology, integrated circuit (IC) design, encapsulation technology, measuring technology and vacuum technique etc.In recent years, follow the fast development of each gate technique, infrared imagery technique has also obtained developing rapidly, aspect civil and military, is widely used.Infrared focal plane array is the core devices of gazing type infra-red thermal imaging system, and its performance is directly connected to the performance evaluation of thermal infrared imager and the optimization of image processing algorithm.Different from unit infrared eye, infrared focal plane array can not only be converted into heat radiation faint electric signal, but also with sensing circuit (ROIC), the face battle array signal obtaining can be exported through certain mode.
Infrared focal plane array data acquisition system (DAS) is the key equipment in infrared focal plane array development, exploitation, application, test, it is the main source of infrared focal plane array parameter testing uncertainty, due to the uniqueness of its work, existing data acquisition system (DAS) calibration steps cannot be calibrated it.For a long time, the applying unit of infrared focal plane array data acquisition system (DAS) can only be carried out qualitative examination with infrared focal plane device, cannot quantitatively calibrate, cause it for a long time in runaway condition, the value that is having a strong impact on infrared focal plane array parameter is accurately unified.
Summary of the invention
For solving the calibration problem of infrared focal plane array data acquisition system (DAS), the object of this invention is to provide a kind of infrared focal plane array signal simulator that can simulate infrared focal plane array output.
Infrared focal plane array signal simulator of the present invention can be according to infrared focal plane array device electric signal output characteristics, and the dummy source of simulation infrared focal plane device signal output, realizes the qualitative examination of data acquisition system (DAS) and quantitatively calibration.
Accompanying drawing explanation
By the embodiment carrying out below in conjunction with accompanying drawing, the present invention is described, wherein:
Fig. 1 is the composition frame chart of infrared focal plane array simulator of the present invention;
Specific embodiment
With reference to accompanying drawing 1, infrared focal plane array signal simulator of the present invention comprises: panel button control circuit, main control computer, cpci bus interface circuit, the generation of DPLL clock and programmable clock distributor circuit, memory management circuitry, circuit for generating synchronous signals, programmable synchronous delay circuit, DAC control circuit, the high stable state power circuit of low voltage difference.Wherein, panel button control circuit is connected with main control computer, main control computer is connected with cpci bus interface circuit by cpci bus, cpci bus interface circuit is connected to by internal bus respectively that DPLL clock occurs and programmable clock distributor circuit, memory management circuitry, circuit for generating synchronous signals, programmable synchronous delay circuit, DAC control circuit, and circuit for generating synchronous signals, programmable synchronous delay circuit, DAC control circuit are also connected to the high stable state power circuit of low voltage difference by internal bus.Memory management circuitry, circuit for generating synchronous signals, programmable synchronous delay circuit, DAC control circuit are all subject to the control of a FPGA control module.
Under the ISE9.1 environment of designing and developing Shi Xilinx company of cpci bus interface circuit, carry out, with VHDL hardware description language, carry out the design of completing circuit, mainly complete decoding, register configuration, access retry, parity checking and state machine and control function.On the basis that the generation of DPLL clock and programmable clock distributor circuit are is core at NBC12429 chip, design, for generation of the reference clock signal of the high stable state of simulator, low jitter.FPGA control module, by the Spartan.IIIXC3S200 of Xilinx company, adopts VHDL language to design, and mainly completes programmable delay, the direct current of memory management, synchronizing signal generation, synchronizing signal and exchanges the functions such as DAC conversion and control.Simulation and synchronizing signal that the high stable state power circuit of low voltage difference is mainly simulator provide low voltage difference, high stable state, low noise power supply.
By (1) panel button control circuit, can edit the output voltage data of simulation pixel, also can use (2) main control computer pull-down menu Load Images, adopt image processing techniques that image is converted to Wave data fast, the Wave data of editor or conversion adopts mapping mode to be stored in storer by (4) memory management circuitry, the output voltage of the scale of analog device and simulation pixel can pass through (1) panel button control circuit or (2) main control computer editor, the highest infrared focal plane array signal output of simulating 1024 * 1024 scales, the output voltage of pixel can independent change between-2V～+ 2V.FPGA control module is controlled the generation of (5) DPLL clock and programmable clock distributor circuit produces accurate clock, by accurate clock, from storer, take out Wave data and send the output of (8) DAC control circuit, control (6) circuit for generating synchronous signals simultaneously and produce and the corresponding frame of Wave data, row, pixel and CDS synchronizing signal.
(1) can simulate the infrared focal plane array output image of random scale (the highest by 1024 * 1024), the output voltage of each simulation pixel can independent change between-2V～+ 2V, and output frame, row, pixel and CDS synchronizing signal simultaneously.
(2) editor that can realize image by editor's waveform, frame, row, pixel and CDS synchronizing signal are also done corresponding change simultaneously.
(3) can be the output of infrared focal plane array waveform by arbitrary image rapid conversion, and frame, row, pixel and CDS synchronizing signal are provided simultaneously.
Reference numeral in the bracket comprising in claim is for understanding invention, rather than limitations on claims.
According to content disclosed by the invention, other distortion is apparent to those skilled in the art.Such distortion can comprise the well-known characteristic in existing data communication, and these features can be for the feature of describing in replacement or supplementary copy invention.
Claims (4)
1. an infrared focal plane array simulator, is characterized in that this simulator comprises panel button control circuit (1), main control computer (2), cpci bus interface circuit (3), memory management circuitry (4), the generation of DPLL clock and programmable clock distributor circuit (5), circuit for generating synchronous signals (6), programmable synchronous delay circuit (7), DAC control circuit (8), the high stable state power circuit of low voltage difference (9); Wherein, panel button control circuit is connected with main control computer, main control computer is connected with cpci bus interface circuit by cpci bus, CPCL bus interface circuit is connected to by internal bus respectively that DPLL clock occurs and programmable clock distributor circuit, memory management circuitry, circuit for generating synchronous signals, programmable synchronous delay circuit, direct current with exchange DAC control circuit, and circuit for generating synchronous signals, programmable synchronous delay circuit, DAC control circuit are also connected to the high stable state power circuit of low voltage difference by internal bus; CPCL bus interface circuit has been used for decoding, register configuration, access retry, parity checking and state machine and has controlled; The generation of DPLL clock and programmable clock distributor circuit are for generation of the reference clock signal of the high stable state of simulator, low jitter; Memory management circuitry, circuit for generating synchronous signals, programmable synchronous delay circuit, DAC control circuit have been respectively used to memory management, synchronizing signal generation, the programmable delay of synchronizing signal, DAC conversion and control; The high stable state power circuit of low voltage difference is used to the simulation of simulator and synchronizing signal that low voltage difference, high stable state, low noise power supply are provided; Described memory management circuitry, circuit for generating synchronous signals, programmable synchronous delay circuit, DAC control circuit are all subject to the control of a FPGA control module; FPGA control module is controlled the generation of DPLL clock and programmable clock distributor circuit (5) produces accurate clock, by accurate clock, from storer, take out Wave data and send DAC control circuit (8) output, control circuit for generating synchronous signals (6) simultaneously and produce and the corresponding frame of Wave data, row, pixel and CDS synchronizing signal.
2. simulator as described in claim 1, wherein this simulator can be simulated infrared focal plane array output image, and the output voltage of each simulation pixel can be in independent change between-2V～+ 2V, and output frame, row, pixel and CDS synchronizing signal simultaneously.
3. simulator as described in claim 1, the editor that wherein this simulator can be realized image by editor's waveform, frame, row, pixel and CDS synchronizing signal are also done corresponding change simultaneously.
4. simulator as described in claim 1, wherein this simulator can be the output of infrared focal plane array waveform by arbitrary image rapid conversion, and frame, row, pixel and CDS synchronizing signal are provided simultaneously.
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| CN103618854A (en) * | 2013-11-19 | 2014-03-05 | 中国电子科技集团公司第四十一研究所 | Programmable simulation device and method for infrared focal plane device output signal |
| CN103618853B (en) * | 2013-11-19 | 2017-02-15 | 中国电子科技集团公司第四十一研究所 | Programmable simulation device and method for infrared focal plane device video output signal |
| CN103678196B (en) * | 2013-12-18 | 2016-10-05 | 中国电子科技集团公司第四十一研究所 | A kind of infrared image acquisition and processing system capability evaluating device and appraisal procedure |
| CN103795414B (en) * | 2014-01-27 | 2017-06-16 | 无锡艾立德智能科技有限公司 | A kind of infrared focal plane array reading circuit of branch's multiplexing |
| CN108519162A (en) * | 2018-04-26 | 2018-09-11 | 北京航天自动控制研究所 | A non-contact infrared temperature measurement system |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101118568A (en) * | 2007-09-19 | 2008-02-06 | 中国科学院上海技术物理研究所 | Device and method for simulating output signal of infrared detector |
| CN101425098A (en) * | 2007-10-31 | 2009-05-06 | 中国科学院沈阳自动化研究所 | Simulation method and device for infrared detector output |
| CN102288298A (en) * | 2011-04-28 | 2011-12-21 | 中国航空工业集团公司洛阳电光设备研究所 | Detector simulator device |
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| US8346482B2 (en) * | 2003-08-22 | 2013-01-01 | Fernandez Dennis S | Integrated biosensor and simulation system for diagnosis and therapy |
| AU2005327183B2 (en) * | 2004-07-02 | 2011-10-06 | Raytheon Company | Simulating a sensing system |
| US8655461B2 (en) * | 2010-05-25 | 2014-02-18 | Siemens Product Lifecycle Management Software Inc. | Method, system, and non-transitory computer readable storage medium for generating code for a closed-loop controller |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101118568A (en) * | 2007-09-19 | 2008-02-06 | 中国科学院上海技术物理研究所 | Device and method for simulating output signal of infrared detector |
| CN101425098A (en) * | 2007-10-31 | 2009-05-06 | 中国科学院沈阳自动化研究所 | Simulation method and device for infrared detector output |
| CN102288298A (en) * | 2011-04-28 | 2011-12-21 | 中国航空工业集团公司洛阳电光设备研究所 | Detector simulator device |
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