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CN102521538A - Physical no-cloning function structure based on multi-frequency band - Google Patents

Physical no-cloning function structure based on multi-frequency band Download PDF

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Publication number
CN102521538A
CN102521538A CN2011104027387A CN201110402738A CN102521538A CN 102521538 A CN102521538 A CN 102521538A CN 2011104027387 A CN2011104027387 A CN 2011104027387A CN 201110402738 A CN201110402738 A CN 201110402738A CN 102521538 A CN102521538 A CN 102521538A
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oscillator
input
frequency
output
terminal
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张培勇
项群良
欧阳冬生
冯忱晖
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Zhejiang University ZJU
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Zhejiang University ZJU
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Abstract

一种基于多频率段的物理不可克隆函数结构,多个可重构振荡器组成振荡器阵列,振荡器的输出端与一个N选二的多路复用器的输入端相连,振荡器与门的输入端与外围使能输入信号相连;N选二多路复用器的选择输入端与外围的输入激励相连,两个输出端分别与两个计数器的时钟信号相连;两个计数器的复位信号端与系统的复位信号相连,输出端分别与比较器的输入端相连;比较器的输出端与频率调节电路的输入端相连,复位信号端与系统的复位信号相连;频率调节电路的输出端与振荡器组中那些三态缓冲器的第二输入端相连,时钟信号输入端与系统的时钟信号相连,复位信号与系统的复位信号相连。本发明能有效避免现在最常用的数学建模攻击,提高安全性。

Figure 201110402738

A physical non-clonable function structure based on multiple frequency bands. Multiple reconfigurable oscillators form an oscillator array. The output of the oscillator is connected to the input of a multiplexer with two N selections. The oscillator and the gate The input terminal of the N-choice multiplexer is connected with the peripheral enable input signal; the selection input terminal of the N-choice multiplexer is connected with the peripheral input excitation, and the two output terminals are respectively connected with the clock signals of the two counters; the reset signal of the two counters The terminal is connected to the reset signal of the system, and the output terminal is connected to the input terminal of the comparator respectively; the output terminal of the comparator is connected to the input terminal of the frequency adjustment circuit, and the reset signal terminal is connected to the reset signal of the system; the output terminal of the frequency adjustment circuit is connected to the The second input terminals of those tri-state buffers in the oscillator group are connected, the clock signal input terminal is connected with the system clock signal, and the reset signal is connected with the system reset signal. The invention can effectively avoid the most commonly used mathematical modeling attack and improve security.

Figure 201110402738

Description

Physics based on the multi-frequency section can not be cloned function structure
Technical field
The invention belongs to the IC chip security fields, relate to a kind of physics and can not clone function structure based on the multi-frequency section.
Background technology
Physics can not be cloned function and realized through physical equipment; It utilized in the manufacturing equipment process the intrinsic randomness that must introduce, having can not clone property, can be used for producing not reproducible key; And this key only exists in chip power; Therefore strengthen its security greatly, can be widely used in security fields such as smart card, credit card.
The kind that physics can not be cloned function is a lot, and the present invention is primarily aimed at based on the physics of oscillator can not clone function.
It is as shown in Figure 1 that traditional physics based on oscillator is not cloned the structure of function.Its port comprises:
The enable signal input end (not marking among the figure) of each oscillator is used for the enable signal of reception oscillator, the Push And Release of control generator;
Excitation input end (input stimulus end): be used for receiving peripheral excitation;
Response output terminal (output terminal) is used for this response of structure output;
The clock signal and the reset signal (not marking among the figure) that also have entire circuit.
As shown in Figure 1; Traditional physics based on oscillator can not be cloned function and selected two multiplexers, two counters and a comparer to form by a plurality of oscillators, a N; The output clock of oscillator is received the data input pin that N selects two multiplexers; N selects the selection position input end of two multiplexers to link to each other with the pumping signal of periphery, and N selects two clock signals of two multiplexers output to link to each other with the input end of clock of two counters respectively, is used for flip-flop number; The count value output terminal of two counters links to each other with the data input pin of a comparer, and comparative result is as response output.
The physics of this structure can not be cloned function; Mainly be to select two oscillators that are used for comparison through input stimulus; The frequency speed of oscillator comes comparison through counter; When one of them counter reached certain value, comparer compared two count values, and comparative result is as response output.In response output time, prepare counter O reset being ready to for the oscillator of following two comparisons.
Because oscillator all is to be obtained by same hard macroelement exampleization, so identical between each oscillator, but because the uncertainty on making, the frequency between the oscillator has fine difference, and these difference are artificially uncontrollable.When count cycle during long enough, the frequency difference between two oscillators can be exaggerated, thereby is easy to obtain the result of comparison.But because result relatively is by the uncontrollability decision on making fully, therefore even given accurate manufacturing process and also be difficult to foregoing circuit is duplicated.
But; Oscillator in this structure is the ring circuit that is made up of the odd number phase inverter; Even it has also just utilized a kind of frequency wherein reconfigurable oscillator in producing response process; Therefore the oscillation frequency of this structure oscillator in the process that produces response immobilizes, and the assailant can crack it through the attack pattern of mathematical modeling.
Because the fixed-frequency of oscillator, so the order of the frequency speed between each oscillator also immobilizes.If this structure is applied suitable excitation in sequence, just can obtain the speed order between each oscillator at an easy rate, there has been this sequence list just can predict the response under all excitations.
Summary of the invention
Can not clone the relatively poor deficiency of security of function in order to overcome existing physics, the invention provides and a kind ofly can effectively avoid now the most frequently used mathematical modeling to attack, improve the physics based on the multi-frequency section of security and can not clone function structure.
For the technical scheme that solves the problems of the technologies described above proposition is:
A kind of physics based on the multi-frequency section can not be cloned function structure, comprises that reconfigurable oscillator, frequency adjustment circuit, N select two multiplexers, counter and comparer;
A plurality of restructural oscillators are formed oscillator arrays, and the output terminal of said oscillator and a N select the input end of two multiplexer to link to each other, and oscillator enables input signal with the input end of door with the periphery and links to each other;
N selects the selection input end of two multiplexers to link to each other with the input stimulus of periphery;
N selects two output terminals of two multiplexers to link to each other with the clock signal of two counters respectively;
The reset signal end of two counters links to each other with the reset signal of system, and the output terminal of two counters links to each other with the input end of comparer respectively;
The output terminal of comparer links to each other with the input end of frequency adjustment circuit, and the reset signal end of comparer links to each other with the reset signal of system;
The output terminal of frequency adjustment circuit links to each other with second input end of those three-state buffers in the oscillator group, and the clock signal input terminal of frequency adjustment circuit links to each other with the clock signal of system, and the reset signal end of frequency adjustment circuit links to each other with the reset signal of system;
Said frequency adjustment circuit is made up of linear feedback shift register, alternative multiplexer and code translator; The input end of two linear feedback shift registers all links to each other with the data output end of an alternative multiplexer; The selection position input end of alternative multiplexer links to each other with the input of periphery, and first data input pin of alternative multiplexer links to each other with the output terminal of two linear feedback shift registers respectively with second data input pin; The input end of code translator links to each other with the data output end of alternative multiplexer.
Further; Said reconfigurable oscillator is by forming with door, not gate, impact damper, three-state buffer; Link to each other with the enable signal of periphery input with the first input end of door; Second input end links to each other with the data output end of three-state buffer, links to each other with the data input pin of first not gate with the output terminal of door; The data input pin of first impact damper links to each other with the data output end of first not gate; The data output end of each impact damper all links to each other with the data input pin of corresponding three-state buffer; Except that last impact damper, the data output end of each impact damper links to each other with the data input pin of its next impact damper; The enable signal that enables the input of input end and periphery of three-state buffer links to each other, the data output end of three-state buffer link with the family status two input ends in export through second not gate;
Further; In the oscillator group pattern; All come the selection position of each three-state buffer to link to each other with the output of same frequency adjustment circuit by same hard macroelement exampleization in each oscillator, in the process that produces a response, they vibrate under same frequency.
Further again, in the process of whole generation response, oscillator can be with multiple hunting of frequency, output response of every generation, and corresponding the transfer can the control generator frequency take place in frequency adjustment circuit; All exist a frequency band under each oscillation frequency.
In the process that produces response; Have two oscillators at every turn and selected two multiplexers to select by N, they trigger a counter respectively, when the count value of one of them counter reaches setting value; Comparer compares the value of two counters, and comparative result is as a response output.
Compare with existing PUF based on oscillator, the present invention is in the process that produces response, and response of the every output of the oscillation frequency of oscillator will be shifted, each oscillation frequency corresponding a frequency band, then exist a plurality of frequency bands in the total system.Because the randomness on making, the frequency speed between each oscillator under each frequency band in proper order can be different, and the transfer relationship between each frequency band is unpredictable simultaneously, therefore adopts the modeling difficulty of attacking to increase greatly.
Beneficial effect of the present invention is: can effectively avoid now the most frequently used mathematical modeling to attack, improve security.
Description of drawings
Fig. 1 can not clone function for traditional physics based on oscillator
Fig. 2 is a kind of synoptic diagram that can not clone function structure based on the physics of multi-frequency section of the present invention
Fig. 3 is the concrete way of realization of a kind of restructural oscillator of relating among the present invention
Fig. 4 is the general way of realization of a kind of restructural oscillator of relating among the present invention
Fig. 5 is a kind of frequency adjustment circuit that relates among the present invention
Embodiment
Below in conjunction with accompanying drawing the present invention is further specified.
Yet example embodiment can be implemented with many different forms, and should not be limited to the embodiment that sets forth here.On the contrary, providing these embodiment will make the disclosure is will be complete also completely, and will make the scope of example embodiment convey to those skilled in the art person fully.
In the circuit theory diagrams shown in Figure 3, reconfigurable oscillator comprises 9 input ports and 1 output port:
With door input end (enable signal end): be used for the input of reception oscillator enable signal;
Three-state buffer enable input end (en8, en7 ..., en1): be used to receive frequency hopping code input, thereby the length that changes delay circuit changes the frequency of the clock that produces;
Inverter output (output signal end): the clock signal that is used to export generation.
Restructural oscillator inner structure shown in Figure 3 comprises one and door, two phase inverters, 8 impact dampers and 8 three-state buffers.
Link to each other with the enable signal of periphery input with the first input end (enable signal end) of door (U), second input end links to each other with the data output end of three-state buffer, links to each other with the data input pin of first not gate (U1) with the output terminal of door;
The data input pin of first impact damper (T1) links to each other with the data output end of first not gate (U1);
The data output end of each impact damper all links to each other with the data input pin of corresponding three-state buffer; Except that last impact damper (T8), the data output end of each impact damper links to each other with the data input pin of its next impact damper;
The enable signal that enables the input of input end and periphery of three-state buffer links to each other, the data output end of three-state buffer link with the family status two input ends in export through second not gate (U2).
The functional character of restructural oscillator shown in Figure 3 is; The input enable signal of 8 three-state buffers has at every turn and has only one effectively; The value that changes these enable signals just can change the length of oscillator delay circuit, thereby changes the frequency of the clock signal of oscillator generation.This reconfigurable oscillator 8 kinds of clock signals of different frequencies of can vibrating altogether.
Restructural oscillator shown in Figure 3 is a kind of concrete realization, has more generality, can on above-mentioned basis, increase or reduce the number of impact damper and three-state buffer group, thereby increases or reduce the kind number of oscillation frequency, and is as shown in Figure 4.
Yet reconfigurable oscillator of the presently claimed invention is not limited to above-mentioned oscillator, every can all meeting the demands through the oscillator that control bit is regulated oscillation frequency.
In the circuit theory diagrams shown in Figure 5, frequency adjustment circuit comprises 3 input ports and 1 output port:
Clock signal input terminal (not marking among the figure): mainly be used for controlling each operation of each module;
Reset signal input end (not marking among the figure): mainly be used for each module is resetted, make it be in original state;
Select position input end (a selection position input signal end): mainly be used for receiving and select the position to import;
Decoder output (signal output part): the frequency hopping code output that mainly decoding is obtained.
Frequency adjustment circuit shown in Figure 5, inside is made up of two linear feedback shift registers, an alternative multiplexer and a code translator.The specification of two linear feedback shift registers (LFSR1 and LFSR2) is consistent, but because generation mechanism is variant, therefore the sequence of output is also inequality; The input end of linear feedback shift register all links to each other with the data output end of alternative multiplexer; The selection position input end of alternative multiplexer (selecting position input signal end) links to each other with the input of periphery, and first data input pin of alternative multiplexer links to each other with the output terminal (lfsr1_out and lfsr2_out) of two linear feedback shift registers respectively with second data input pin; The input end of code translator links to each other with the output terminal of alternative multiplexer, and the output terminal of code translator (output signal end) is exported frequency hopping code.
Clock signal is being controlled the operation between each module, and reset signal resets each module when powering on, and makes it be in original state.
The functional character of frequency adjustment circuit shown in Figure 5 is; The selection input position of alternative multiplexer is a true random number; So the selection completely random between the output of two linear feedback shift registers, this will make that the sequence of output is longer more unpredictable.Code translator is so long as be used for the output of alternative multiplexer is deciphered, thereby generates the frequency hopping code that bit format is selected in the input that meets three-state buffer in the oscillator.
Certainly, except that code translator, sequencer before can be produced by additive method, as long as the sequence randomness that produces enough by force.
Fig. 2 schematically shows one of the present invention can not clone the structural drawing of function structure based on the physics of multi-frequency section, and it comprises with lower port:
The enable signal input end (not marking among the figure) of each oscillator is used for the enable signal of reception oscillator, the Push And Release of control generator;
Excitation input end (input stimulus end): be used for receiving peripheral excitation;
Response output terminal (output terminal) is used for this response of structure output;
The clock signal and the reset signal (not marking among the figure) that also have total system.
As shown in Figure 2; Can not clone function structure based on the physics of multi-frequency section selects two multiplexers, a frequency adjustment circuit, two counters and a comparer to form by a plurality of oscillators, a N; The output clock and the N of oscillator selects the data input pin of two multiplexers to link to each other; Pumping signal selects the selection position input end of two multiplexers to link to each other with N; N selects two clock signals of two multiplexers output to link to each other with the input end of clock of two counters respectively, is used for flip-flop number, and the count value of two counters links to each other with the data input pin of a comparer; Comparative result produces frequency hopping code as response output time through frequency adjustment circuit and feeds back in the oscillator array, and frequency hopping code is received the input end that enables of each three-state buffer in each oscillator.
Physics based on the multi-frequency section shown in Figure 2 can not be cloned function structure, and all oscillators all are by same hard macroelement exampleization, so their structure is identical, and they all link to each other with same frequency hopping code, so oscillation frequency is also identical.Be different from traditional physics based on oscillator and can not clone function, these oscillators all are reconfigurable oscillators, in the process that produces response, and response output of every generation, the oscillation frequency of oscillator just can change accordingly.We know that because the uncontrollability on making, can there be small difference in the oscillation frequency of oscillator, and these have the oscillation frequency of fine difference just to form a frequency band.In entire circuit, the oscillation frequency of oscillator has multiple, and each oscillation frequency all can have a frequency band, so exists a plurality of frequency bands in the entire circuit.Transformation between each frequency band at random.
The course of work that can not clone function based on the multi-frequency section is following:
When circuit powered on, reset signal placed original state with all modules, the whole zero clearings of counter, and oscillator all is in off state, and the frequency hopping code of frequency adjustment circuit output also has an initial value.After a period of time, the oscillator starting oscillation, pumping signal also begins orderly generation, is used for selecting two oscillators of comparison.After selecting the output of two multiplexers through N, the clock signal that is used to two oscillators output of comparison triggers two counters respectively; When one of them counter reaches certain value; Comparer compares the value of two counters; Result relatively is as a response output, and this response simultaneously produces a new frequency hopping code through frequency adjustment circuit, and frequency hopping code feeds back in the oscillator array; Thereby receive the oscillation frequency that input end changes each oscillator that enables of each three-state buffer, make that promptly frequency band shifts.In this simultaneously, counter O reset, input stimulus also changes, select two new oscillators again flip-flop number compare.So back and forth just can obtain a string output sequence at random.
The assailant is if come the present invention is attacked through the mode of modeling, and it must solve two problems:
The speed of each oscillator oscillation frequency order under 1 each frequency band
Transfer relationship between 2 each frequency bands
The assailant can not obtain the concrete implementation of frequency adjustment circuit through the mode of physical attacks, thereby because the delay circuit that all might destroy core to a little destruction of circuit structure makes its inefficacy.If still apply suitable excitation sequentially, although can obtain the speed order of frequency between one group of oscillator, but clearly, this order comes predicated response to can not get correct result with it not in any frequency band.
For for K+1 oscillator, the speed order under each frequency band all has (K+1) if adopt exhaustive method to crack the circuit of this structure! Kind, and for M frequency band, the assailant can suppose earlier that it is in certain frequency band; Total M kind possibility, produce first output after, according to frequency hopping figure; Frequency band is transferred to any in remaining (M-1) individual frequency band, but its can't know, same; Output of every afterwards generation, next frequency band still are (M-1) to plant possibility.Suppose that this PUF exports the K position altogether; The speed order of output procedure medium frequency section all has (K+1) to plant; Frequency band has M kind possibility when producing first output, and frequency band all has (M-1) to plant possibility in the time of (K-1) after producing, and the mathematical expectation of the number of times of the required trial of success attack is as shown in the table:
Table-1 cracks the comparison of the required number of times of attack of different size PUF
M K N
3 5 8.96×10 9
7 5 1.20×10 22
7 15 4.81×10 104
15 15 5.37×10 216
15 35 2.52×10 663
Can be known that by table 1 oscillation frequency of oscillator is many more among the PUF, the PUF of generation output figure place is many more, and the number of times that the assailant need attempt comparison increases with exponential, and the conclusion that obtains on this and the frequency hopping figure is consistent.For a small-scale PUF, when the M value is 7, k is 15 o'clock, and the average time that cracks this required comparison of system surpasses 4.81 * 10 104, and traditional PUF based on oscillator, after the assailant obtained the relative frequency relation between each oscillator, it is used for the success attack rate was 100%.The design of this paper has improved security greatly.

Claims (5)

1.一种基于多频率段的物理不可克隆函数结构,其特征在于:所述物理不可克隆函数包括可重构的振荡器、频率调节电路、N选二多路复用器、计数器和比较器;1. A physical non-clonable function structure based on multiple frequency bands, characterized in that: the physical non-clonable function comprises a reconfigurable oscillator, a frequency adjustment circuit, a two-by-N multiplexer, a counter and a comparator ; 多个可重构振荡器组成振荡器阵列,所述振荡器的输出端与一个N选二的多路复用器的输入端相连,振荡器与门的输入端与外围使能输入信号相连;A plurality of reconfigurable oscillators form an oscillator array, the output of the oscillator is connected to the input of an N-choice multiplexer, and the input of the oscillator and gate is connected to the peripheral enable input signal; N选二多路复用器的选择输入端与外围的输入激励相连;The selection input terminal of the N selection two multiplexer is connected with the peripheral input excitation; N选二多路复用器的两个输出端分别与两个计数器的时钟信号相连;The two output terminals of the N selection two multiplexer are respectively connected with the clock signals of the two counters; 两个计数器的复位信号端与系统的复位信号相连,输出端分别与比较器的输入端相连;The reset signal terminals of the two counters are connected to the reset signal of the system, and the output terminals are respectively connected to the input terminals of the comparator; 比较器的输出端与频率调节电路的输入端相连,比较器的复位信号端与系统的复位信号相连;The output end of the comparator is connected with the input end of the frequency adjustment circuit, and the reset signal end of the comparator is connected with the reset signal of the system; 频率调节电路的输出端与振荡器组中那些三态缓冲器的第二输入端相连,频率调节电路的时钟信号输入端与系统的时钟信号相连,频率调节电路的复位信号端与系统的复位信号相连;The output terminal of the frequency adjustment circuit is connected with the second input terminals of those three-state buffers in the oscillator group, the clock signal input terminal of the frequency adjustment circuit is connected with the clock signal of the system, and the reset signal terminal of the frequency adjustment circuit is connected with the reset signal of the system connected; 所述频率调节电路由线性反馈移位寄存器、二选一多路复用器和译码器组成;两个线性反馈移位寄存器的输入端均与一个二选一多路复用器的数据输出端相连;二选一多路复用器的选择位输入端与外围的输入相连,二选一多路复用器的第一数据输入端和第二数据输入端分别与两个线性反馈移位寄存器的输出端相连;译码器的输入端与二选一多路复用器的数据输出端相连。The frequency adjustment circuit is composed of a linear feedback shift register, a two-to-one multiplexer and a decoder; the input terminals of the two linear feedback shift registers are connected to the data output of a two-to-one multiplexer The selection bit input terminal of the two-to-one multiplexer is connected to the peripheral input, and the first data input terminal and the second data input terminal of the two-to-one multiplexer are connected to two linear feedback shifters respectively. The output end of the register is connected; the input end of the decoder is connected with the data output end of the two-to-one multiplexer. 2.如权利要求1所述的基于多频率段的的物理不可克隆函数结构,其特征在于:所述可重构的振荡器由与门、非门、缓冲器、三态缓冲器组成,与门的第一输入端与外围输入的使能信号相连,第二输入端与三态缓冲器的数据输出端相连,与门的输出端与第一个非门的数据输入端相连;第一个缓冲器的数据输入端与第一个非门的数据输出端相连;每个缓冲器的数据输出端都与相应的三态缓冲器的数据输入端相连;除最后一个缓冲器之外,每个缓冲器的数据输出端与其下一个缓冲器的数据输入端相连;三态缓冲器的使能输入端与外围输入的使能信号相连,三态缓冲器的数据输出端在连到与门第二输入端的同时经过第二个非门输出;2. The physical non-clonable function structure based on multi-frequency bands as claimed in claim 1 is characterized in that: said reconfigurable oscillator is made up of AND gate, NOT gate, buffer, tri-state buffer, and The first input terminal of the gate is connected to the enable signal of the peripheral input, the second input terminal is connected to the data output terminal of the tri-state buffer, and the output terminal of the AND gate is connected to the data input terminal of the first NOT gate; the first The data input terminal of the buffer is connected to the data output terminal of the first NOT gate; the data output terminal of each buffer is connected to the data input terminal of the corresponding tri-state buffer; except the last buffer, each The data output terminal of the buffer is connected to the data input terminal of the next buffer; the enable input terminal of the three-state buffer is connected to the enable signal of the peripheral input, and the data output terminal of the three-state buffer is connected to the second AND gate The input terminal passes through the second NOT gate output at the same time; 3.如权利要求1或2所述的基于多频率段的的物理不可克隆函数结构,其特征在于:在振荡器组阵列中,每个振荡器中都由同一个硬宏单元例化而来各个三态缓冲器的选择位与同一个频率调节电路的输出相连,在产生一位响应的过程中,它们振荡在同一个频率下。3. The physical unclonable function structure based on multi-frequency segments as claimed in claim 1 or 2, characterized in that: in the oscillator group array, each oscillator is instantiated from the same hard macrocell The selection bits of each tri-state buffer are connected to the output of the same frequency adjustment circuit, and they oscillate at the same frequency during the generation of a one-bit response. 4.如权利要求3所述的基于多频率段的的物理不可克隆函数结构,其特征在于:在整个产生响应的过程中,振荡器会以多种频率振荡,每产生一位输出响应,频率调节电路会控制振荡器频率发生相应的转移;每一种振荡频率下都存在着一个频率段。4. The physical unclonable function structure based on multi-frequency segments as claimed in claim 3, characterized in that: in the whole process of generating the response, the oscillator will oscillate with multiple frequencies, and each output response of one bit is generated, and the frequency The adjustment circuit will control the corresponding transfer of the oscillator frequency; there is a frequency band under each oscillation frequency. 5.如权利要求1或2所述的基于多频率段的的物理不可克隆函数结构,其特征在于:在产生响应的过程中,每次会有两个振荡器被N选二多路复用器选择,它们分别触发一个计数器,当其中一个计数器的计数值达到设定值时,比较器对两个计数器的值进行比较,比较结果作为一位响应输出。5. The physical unclonable function structure based on multi-frequency segments as claimed in claim 1 or 2, characterized in that: in the process of generating the response, two oscillators are multiplexed by N selection two at a time They respectively trigger a counter. When the count value of one of the counters reaches the set value, the comparator compares the values of the two counters, and the comparison result is output as a one-bit response.
CN2011104027387A 2011-12-07 2011-12-07 Physical no-cloning function structure based on multi-frequency band Pending CN102521538A (en)

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US10402171B1 (en) 2016-09-06 2019-09-03 The Arizona Board of Regents Acting for and on Behalf of Northern Arizona University Data compiler for true random number generation and related methods
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CN106874799A (en) * 2017-02-27 2017-06-20 广东顺德中山大学卡内基梅隆大学国际联合研究院 A kind of physics unclonable function generation method based on clock distributing network
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