CN102376673A - Package substrate and forming method thereof - Google Patents

Abstract

An embodiment of the present invention provides a package substrate and a method for forming the same, the package substrate including: a substrate; a first conductive pattern having a first thickness on the substrate; a second conductive pattern on the substrate and having a second thickness, the second thickness being greater than the first thickness, and the material of the first conductive pattern being the same as that of the second conductive pattern; at least one first electroplating lead which is positioned on the substrate and electrically contacts at least part of the first conductive pattern; and at least one second electroplating lead which is positioned on the substrate and electrically contacts at least part of the second conductive pattern, wherein the resistance value of the first electroplating lead is greater than that of the second electroplating lead. The embodiment of the invention provides a method for forming conductive patterns with different thicknesses on a substrate in the same electroplating process, which can greatly reduce the process time and the cost.

Description

Packaging substrate and method for forming same

technical field

The invention relates to a package substrate, in particular to a package substrate with a mold gate area.

Background technique

Gold is often used in the package to form internal conductive paths, such as pad areas on the package substrate. Wires can be bonded between the packaged chip and the package substrate to transmit electrical signals between the package substrate and the chip.

However, the price of gold is very expensive and increasingly scarce, in order to save the loss of earth resources and reduce the production cost of the package. The industry urgently needs technology to reduce the amount of gold used.

Contents of the invention

In order to overcome the defects in the prior art, an embodiment of the present invention provides a packaging substrate, comprising: a substrate; a first conductive pattern located on the substrate and having a first thickness; a second conductive pattern located on the There is a second thickness on the substrate, the second thickness is greater than the first thickness, and the material of the first conductive pattern is the same as the material of the second conductive pattern; at least one first electroplating wire is located on the substrate on and electrically contacting at least part of the first conductive pattern; and at least one second plating wire, located on the substrate and electrically contacting at least part of the second conductive pattern, wherein the resistance value of the first plating wire is greater than The resistance value of the second plated wire.

An embodiment of the present invention provides a method for forming a packaging substrate, including: providing a substrate; forming at least one first electroplating region on the substrate; forming at least one second electroplating region on the substrate; forming a first electroplating wire , electrically contacting the first electroplating area; forming a second electroplating wire, electrically contacting the second electroplating area, wherein the resistance value of the second electroplating wire is smaller than the resistance value of the first electroplating wire; placing the substrate on In an electroplating solution, the electroplating solution includes a metal ion; and a current is simultaneously applied to the first electroplating wire and the second electroplating wire through the first electroplating wire and the second electroplating wire respectively, so that the metal ions are respectively electroplating on the first electroplating area and the second electroplating area to form a first conductive pattern and a second conductive pattern on the first electroplating area and the second electroplating area respectively, wherein the second conductive pattern The thickness is greater than the thickness of the first conductive pattern.

Embodiments of the present invention provide a method for forming conductive patterns with different thicknesses on a substrate in the same electroplating process, which can greatly reduce process time and cost, especially when the material of the conductive pattern to be electroplated is noble metal The economic effect is more significant.

In order to make the above objects, features, and advantages of the present invention more comprehensible, a detailed description is given below with reference to the accompanying drawings.

Description of drawings

FIG. 1A shows a top view of a packaging substrate known to the inventors of the present application.

FIG. 1B shows a cross-sectional view of the package substrate of FIG. 1A along the line B'-B'.

FIG. 2 shows a top view of a packaging substrate according to an embodiment of the invention.

3A-3C show a series of process cross-sectional views of the package substrate of FIG. 2 along the line 3-3'.

4A-4J show top views of plated wires according to various embodiments of the present invention.

Among them, the reference signs are explained as follows;

100, 200～substrate;

102 ~ mold injection port area;

102a, 104a～patterned conductive layer;

102b, 104b～gold layer;

104～pad area;

106, 206～ area;

108, 208～chip;

110, 210～welding wire;

202, 204～conductive patterns;

202a, 204a～electroplating area;

202b, 204b～metal layer;

L1, L2～plated wire;

t1, t2, t3, t4 ~ thickness.

Detailed ways

Hereinafter, the present invention will be described in detail with the embodiments and accompanying drawings. It should be understood that the following descriptions provide many different embodiments or examples for implementing different aspects of the present invention. The specific elements and arrangements described below are only a brief description of the present invention. Of course, these are only examples rather than limitations of the present invention. Furthermore, repeated reference numerals or designations may be used in different embodiments. These repetitions are only for the purpose of simply and clearly describing the present invention, and do not necessarily represent any relationship between the different embodiments and/or structures discussed. Furthermore, when it is mentioned that a first material layer is located on or above a second material layer, it includes the situation that the first material layer is in direct contact with the second material layer or is separated by one or more other material layers. And in the accompanying drawings, the shape or thickness of the embodiments may be enlarged to simplify or facilitate labeling. Furthermore, elements not shown or described in the figures are forms known to those skilled in the art.

Before entering into the description of the implementation of the present invention, the problems discovered by the inventors of the present case will be described with reference to FIG. 1A-FIG. 1B in the accompanying drawings. FIG. 1A shows a top view of a packaging substrate known to the inventors of the present application. FIG. 1B shows a cross-sectional view of the package substrate of FIG. 1A along the line B'-B'.

As shown in FIG. 1A and FIG. 1B , the package substrate may include a substrate 100 having a plurality of regions 106 thereon. Each area 106 includes at least one pad area 104 . The area 106 can be used to set the chip 108, and can form the bonding wire 110 (see FIG. 1B ) between the electrode (not shown) on the chip 108 and the pad area 104, so that the electrical signal can be between the chip 108 and the packaging substrate. transfer. Usually, solder balls can be selectively formed on the bottom of the package substrate, and integrated with other electronic components through the solder balls.

The substrate 100 also includes an injection gate area 102, which typically includes a gold layer. After a plurality of chips 108 are respectively arranged on the corresponding regions 106 and bonding wires 110 are formed, a mold is set on the chips, the bonding pad area 104, and the bonding wires 110, and the encapsulant is injected into the mold through the injection port to form a mold. Form a protective layer. Since the bonding between the gold layer in the injection port region 102 and the encapsulant is poor, it is convenient for subsequent processes after the injection.

Please refer to FIG. 1B , generally the pad area 104 and the injection port area 102 are formed by electroplating. For example, the patterned conductive layer 102 a and the patterned conductive layer 104 a may be formed on the substrate 100 first. The patterned conductive layer 102 a and the patterned conductive layer 104 a can be electrically connected to electrodes (not shown) on the substrate 100 through plating wires formed on or in the substrate 100 , respectively. Next, the substrate 100 may be placed in an electroplating solution containing gold ions, and a current is applied to the patterned conductive layer 102a and the patterned conductive layer 104a through the electrodes. Then, through the electrochemical reaction, the gold ions in the plating solution can be deposited on the patterned conductive layer 102a and the patterned conductive layer 104a, thereby forming the gold layer 102b and the gold layer 104b, wherein the gold layer 102b and the gold layer 104b have the same thickness. The patterned conductive layer 102 a and the gold layer 102 b together form the injection port region 102 , and the patterned conductive layer 104 a and the gold layer 104 b together form the pad region 104 . Therefore, the thickness t1 of the injection port region 102 is approximately equal to the thickness t2 of the pad region 104 .

The bonding pad area 104 needs to form the bonding wire 110 electrically connected to the chip through the wire bonding process, so the gold layer 104b of the pad area 104 needs to have sufficient thickness to make the wire bonding process go smoothly. However, for the injection port area 102 , the gold layer 102 b is mainly used to provide a surface with poor bonding force with the encapsulant, and its thickness does not need to be as thick as the gold layer 104 b in the pad area 104 . However, when the injection port region 102 and the pad region 104 are formed by the above-mentioned process, the injection port region 102 which does not require a high thickness still has a gold layer as thick as the pad region 104 . Furthermore, the area occupied by the injection port area 102 is generally more than 70% of all the gold-plated areas on the substrate 100 . In this way, a relatively high content of gold ions will be consumed in the injection port area 102 where the actual demand for gold is not high, which will increase the consumption of the gold electroplating solution and greatly increase the process cost.

In order to avoid gold ions in the electroplating solution being wasted on the injection port region 102 where the actual gold demand is not high, or the part to be formed into the pad region 104 (that is, the patterned conductive layer 104a) can be formed by using a patterned dry film first. Covering to expose the patterned conductive layer 102 a , and then electroplating a thin gold layer 102 b on the patterned conductive layer 102 a to complete the fabrication of the injection port region 102 . Next, the dry film is peeled off, and another patterned dry film is formed to cover the injection port area 102 to expose the patterned conductive layer 104a. Next, a thicker gold layer 104b is electroplated on the exposed patterned conductive layer 104a to complete the fabrication of the pad region 104 . Finally, the dry film needs to be peeled off.

Although the above-mentioned method can form the injection port region 102 with a thinner gold thickness and save the amount of gold plating solution, the injection port region 102 and the pad region 104 need to be formed in stages, and require complicated patterning processes, electroplating processes, And the removal process is quite costly and time-consuming.

In order to more efficiently form conductive patterns with different thicknesses on the packaging substrate, the inventors of the present application propose another novel method for forming the packaging substrate. Hereinafter, some possible implementations of the embodiments of the present invention will be described with reference to the accompanying drawings. It should be noted that, for convenience and simplification, the following description still takes the pad area and the injection port area in the package substrate as examples. However, those of ordinary skill in the art can understand that those who need conductive patterns with different thicknesses on the substrate can use the method of the embodiment of the present invention to achieve it. Therefore, the embodiments of the present invention are not limited to forming the pad area and the injection port area in the package substrate.

FIG. 2 shows a top view of a packaging substrate according to an embodiment of the invention. In one embodiment, the packaging substrate includes a substrate 200 . The packaging substrate further includes a first conductive pattern 202 on the substrate 200 , and a second conductive pattern 204 on the substrate, for example, in the region 206 . The material of the first conductive pattern 202 is the same as that of the second conductive pattern 204 . The packaging substrate further includes at least one first plating lead L1 located on the substrate 200 and electrically contacting at least part of the first conductive pattern 202, and at least one second plating lead L2 located on the substrate 200 and electrically contacting at least part of it. The second conductive pattern 204. Wherein, the first electroplating wire L1 is specially designed so that the resistance of the first electroplating wire is greater than the resistance of the second electroplating wire. The thickness of the first conductive pattern 202 is thinner than that of the second conductive pattern 204 . Because the resistance value of the first electroplating wire L1 is relatively large, when the electroplating process is performed to form the first conductive pattern 202 and the second conductive pattern 204, the current density transmitted to the first conductive pattern 202 will be less, so it can be used in the same process. During the electroplating process, at least two conductive patterns with different thicknesses are electroplated on the substrate.

3A-3C show a series of process cross-sectional views of the package substrate of FIG. 2 along the line 3-3'. Hereinafter, the manufacturing method of the package substrate according to an embodiment of the present invention will be described with reference to the cross-sectional process diagrams of FIGS. 3A-3C .

As shown in FIG. 3A , a substrate 200 is provided, which is, for example, but not limited to, an insulating substrate. Then, for example, a conductive layer is formed on the substrate 200 by printing, coating, physical vapor deposition, chemical vapor deposition, or other suitable processes, and then patterned into the first electroplating area 202a and the second electroplating area 204a. For example, the conductive layer can be patterned using exposure, development, and etching processes. The material of the first electroplating area 202 a and the second electroplating area 204 a may include (but not limited to) copper, aluminum, tungsten, gold, other metals, other conductive materials, or combinations thereof.

In the subsequent process, the first electroplating area 202a will be plated with a conductive layer to form the first conductive pattern, and the second electroplating area 204a will be plated with the same type of conductive layer in the same electroplating process to form the second conductive pattern. The second conductive pattern can be located in the region 206 .

In one embodiment, an injection port area will be formed (but not limited to) at the first electroplating area 202a, that is, the first conductive pattern 202 will be formed (FIG. 3B). Therefore, the first electroplating area 202 a can be horizontally disposed along the edge of the substrate 202 . In one embodiment, the second electroplating region 204a will form (but not limited to) a pad region, that is, form a second conductive pattern 204 ( FIG. 3B ). In one embodiment, the area occupied by the first conductive pattern 202 is greater than the area occupied by the second conductive pattern 204 . For example, the area occupied by the first conductive pattern 202 may be approximately 1˜1000 times that of the second conductive pattern 204 . In another embodiment, the area occupied by the first conductive pattern 202 may be about 5-100 times that of the second conductive pattern 204 . In yet another embodiment, the area occupied by the first conductive pattern 202 may be about 10-50 times that of the second conductive pattern 204 . Or, in other cases, the area occupied by the first conductive pattern 202 may be smaller than the area occupied by the second conductive pattern 204 . In one embodiment, the area occupied by the first conductive pattern 202 may be about 0.05˜100 times that of the second conductive pattern 204 .

The first electroplating area 202a and the second electroplating area 204a can be in electrical contact with the first electroplating wire L1 and the second electroplating wire L2 respectively. The first electroplating wire L1 is specially designed to have a higher resistance than the second electroplating wire L2. The first electroplating wire L1 and the second electroplating wire L2 are not shown in FIG. 3A , and their locations can refer to the schematic diagram of FIG. 2 . However, it should be noted that the first electroplating wire L1 and the second electroplating wire L2 are not limited to be formed at the positions shown in FIG. 2 , and they can be formed on or in the substrate 200 . The first electroplating wire L1 and the second electroplating wire L2 may be partially or completely formed by patterning at the same time when the conductive layer is patterned to form the first electroplating region 202 a and the second electroplating region 204 a. Alternatively, the first plating wire L1 and the second plating wire L2 may include interconnection wires pre-formed in the substrate 200 .

Next, as shown in FIG. 3B , the structure shown in FIG. 3A is placed in an electroplating solution to perform an electroplating process. The electroplating solution, for example, may include noble metal ions for electroplating noble metals, wherein the noble metals include (but not limited to) gold, silver, platinum, other suitable noble metals, or combinations thereof. However, it should be noted that although the embodiments of the present invention have significant economic effects in the application of electroplating precious metals, the embodiments of the present invention are not limited thereto. In other embodiments, the electroplating solution may also include non-noble metal metal ions to electroplate other metal layers, such as (but not limited to) copper, aluminum, other suitable metals, or combinations thereof.

After the substrate 200 is put into the electroplating solution, the first electroplating region 202a and the second electroplating region 202a can be connected to the first electroplating region 202a and the second electroplating region 202a through the pre-formed electroplating electrodes (not shown) on the substrate 200, and through the first electroplating wire L1 and the second electroplating wire L2 respectively. The electroplating zone 204a applies electric current. After electrification, metal ions in the electroplating solution will be deposited on the first electroplating region 202a and the second electroplating region 204a to form metal layers 202b and 204b respectively. Since the resistance of the first electroplating wire L1 is higher than the resistance of the second electroplating wire L2 , the current density delivered to the first electroplating area 202 a will be smaller and the metal layer 202 b will be thinner. As shown in FIG. 3B , the first electroplating region 202 a and the metal layer 202 b jointly form the first conductive pattern 202 , and the second electroplating region 204 a and the metal layer 204 b jointly form the second conductive pattern 204 . The thickness t3 of the first conductive pattern 202 is smaller than the thickness t4 of the second conductive pattern 204 . In the first conductive pattern 202 and the second conductive pattern 204, the metal layer 202b and the metal layer 204b deposited by electroplating also become conductive patterns respectively. The thickness of the conductive pattern (metal layer 202b) is smaller than the thickness of the conductive pattern (metal layer 204b).

Next, as shown in FIG. 3C , in one embodiment, a chip can be disposed in the region 206 , and a bonding wire 210 can be formed between the chip and the bonding pad region 204 . Next, the injection of the encapsulant can be completed by a process well known to those skilled in the art. Although the thickness of the first conductive pattern 202 is relatively thin, when its material is, for example, gold, the bondability with the encapsulant is still not good, which is beneficial to the subsequent process.

Therefore, through the above method, conductive patterns with different thicknesses can be formed in the same electroplating process, which can greatly reduce the process time and cost. Especially, when the material to be electroplated is an expensive precious metal, the production cost can be significantly reduced and unnecessary waste can be avoided.

Hereinafter, a method for making the resistance value of the first plating lead L1 higher than the resistance value of the second plating lead L2 will be described by way of example. In one embodiment, the first plating lead L1 may include a resistance element to increase its resistance value. However, the cost of the resistive parts is high and additional processes are required. In another preferred embodiment, the resistance value of the first electroplating wire L1 is higher than the resistance value of the second electroplating wire L2 by patterning. In addition, the first electroplating wire L1 and the second electroplating wire L2 can also be patterned from the same conductive layer used to form the first electroplating region 202 a and the second electroplating region 204 a. Therefore, the first electroplating wire L1 with a higher resistance value can be formed without increasing any manufacturing cost.

4A-4J show top views of the first plating wire L1 according to various embodiments of the present invention. From the top view, it can be seen that the first electroplating wire L1 can include a hole portion, a bent portion, a sharp portion, a sawtooth portion, a bent portion, or a combination thereof through a patterning process. And its type and quantity can be adjusted according to the situation. Through the above-mentioned various patterning methods, the resistance value of the first electroplating wire L1 can be increased, so that conductive patterns with different thicknesses can be formed in the same electroplating process.

As mentioned above, the embodiments of the present invention provide a method that can form conductive patterns with different thicknesses on the substrate in the same electroplating process, which can greatly reduce the process time and cost. Especially, the material of the conductive pattern to be electroplated is The economic effect is more significant when using precious metals.

Although the present invention has disclosed the preferred embodiment as above, it is not intended to limit the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection should be determined by the scope of protection defined by the appended claims.

Claims (15)

1. base plate for packaging comprises:

One substrate;

One first conductive pattern is positioned on this substrate and has one first thickness;

One second conductive pattern is positioned on this substrate and has one second thickness, and this second thickness is greater than this first thickness, and the material of this first conductive pattern is same as the material of this second conductive pattern;

At least one first electroplated lead is positioned on this substrate and has electrical contact to this first conductive pattern of few part; And

At least one second electroplated lead is positioned on this substrate and has electrical contact to this second conductive pattern of few part, and wherein the resistance value of this first electroplated lead is greater than the resistance value of this second electroplated lead.

2. base plate for packaging as claimed in claim 1, wherein this first conductive pattern comprises a noble metal.

3. base plate for packaging as claimed in claim 2, wherein this noble metal comprises gold.

4. base plate for packaging as claimed in claim 1, wherein the shared area of this first conductive pattern is greater than the shared area of this second conductive pattern.

5. base plate for packaging as claimed in claim 1, wherein this first conductive pattern is a mould geat district.

6. base plate for packaging as claimed in claim 1, wherein this second conductive pattern is a pad area.

7. base plate for packaging as claimed in claim 1, wherein this first electroplated lead comprises hole part, a sweep, a sharp-pointed part, a serrated portion, a bending part or aforesaid combination.

8. the formation method of a base plate for packaging comprises:

One substrate is provided;

On this substrate, form at least one first electroplating region;

On this substrate, form at least one second electroplating region;

Form one first electroplated lead, electrically contact this first electroplating region;

Form one second electroplated lead, electrically contact this second electroplating region, wherein the resistance value of this second electroplated lead is less than the resistance value of this first electroplated lead;

This substrate is positioned in the electroplate liquid, and this electroplate liquid comprises a metal ion; And

Respectively through this first electroplated lead and this second electroplated lead and this first electroplated lead and this second electroplated lead are applied an electric current simultaneously; This metal ion is plated on respectively on this first electroplating region and this second electroplating region on and respectively at forming one first conductive pattern and one second conductive pattern on this first electroplating region and on this second electroplating region, wherein the thickness of this second conductive pattern is greater than the thickness of this first conductive pattern.

9. the formation method of base plate for packaging as claimed in claim 8, wherein this metal ion comprises a precious metal ion.

10. the formation method of base plate for packaging as claimed in claim 8, wherein this metal ion comprises a gold ion.

11. the formation method of base plate for packaging as claimed in claim 8, wherein the formation step of this first electroplating region and this second electroplating region comprises:

On this substrate, form a conductive layer; And

This conductive layer pattern is turned to this first electroplating region and this second electroplating region.

12. the formation method of base plate for packaging as claimed in claim 11, wherein the formation step of this first electroplated lead and this second electroplated lead comprises this conductive layer patternization to form this first electroplating region, this second electroplating region, this first electroplated lead simultaneously, to reach this second electroplated lead.

13. the formation method of base plate for packaging as claimed in claim 8, wherein this first electroplated lead comprises hole part, a sweep, a sharp-pointed part, a serrated portion, a bending part or aforesaid combination.

14. the formation method of base plate for packaging as claimed in claim 8, wherein the shared area of this first conductive pattern is greater than the shared area of this second conductive pattern.

15. the formation method of base plate for packaging as claimed in claim 8, wherein this first conductive pattern is a mould geat district, and this second conductive pattern is a pad area.

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