CN102361004B - Barrier layer and seed layer integrated - Google Patents
Barrier layer and seed layer integrated Download PDFInfo
- Publication number
- CN102361004B CN102361004B CN201110379185.8A CN201110379185A CN102361004B CN 102361004 B CN102361004 B CN 102361004B CN 201110379185 A CN201110379185 A CN 201110379185A CN 102361004 B CN102361004 B CN 102361004B
- Authority
- CN
- China
- Prior art keywords
- less
- equal
- chamber
- tantalum
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H10W20/01—
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C30/00—Coating with metallic material characterised only by the composition of the metallic material, i.e. not characterised by the coating process
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/02—Pretreatment of the material to be coated
- C23C14/024—Deposition of sublayers, e.g. to promote adhesion of the coating
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/04—Coating on selected surface areas, e.g. using masks
- C23C14/046—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/14—Metallic material, boron or silicon
- C23C14/16—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
- C23C14/165—Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon by cathodic sputtering
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/58—After-treatment
- C23C14/5806—Thermal treatment
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/04—Coating on selected surface areas, e.g. using masks
- C23C16/045—Coating cavities or hollow spaces, e.g. interior of tubes; Infiltration of porous substrates
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/34—Nitrides
-
- H10P14/432—
-
- H10P14/44—
-
- H10W20/033—
-
- H10W20/043—
-
- H10W20/0523—
-
- H10W20/0526—
-
- H10W20/425—
-
- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
- C25D7/123—Semiconductors first coated with a seed layer or a conductive layer
-
- H10W20/0425—
Landscapes
- Chemical & Material Sciences (AREA)
- Mechanical Engineering (AREA)
- Organic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Physics & Mathematics (AREA)
- Thermal Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Physical Vapour Deposition (AREA)
- Other Surface Treatments For Metallic Materials (AREA)
Abstract
本发明一般地涉及通过沉积阻挡层、在阻挡层上沉积籽层和在籽层上沉积导电层来填充特征。在一个实施方式中,籽层包括沉积在阻挡层上的铜合金籽层。例如,铜合金籽层可以包括铜和金属,如铝、镁、钛、锆、锡及其组合。在另一个实施方式中,籽层包括沉积在阻挡层上的铜合金籽层和沉积在铜合金籽层上的第二籽层。铜合金籽层可以包括铜和金属,如铝、镁、钛、锆、锡及其组合。第二籽层可以包括金属,如非掺杂铜。在仍另一个实施方式中,籽层包括第一籽层和第二籽层。第一籽层可以包括金属,如铝、镁、钛、锆、锡及其组合。第二籽层可以包括金属,如非掺杂铜。
The present invention generally relates to filling features by depositing a barrier layer, depositing a seed layer on the barrier layer, and depositing a conductive layer on the seed layer. In one embodiment, the seed layer includes a copper alloy seed layer deposited on the barrier layer. For example, a copper alloy seed layer may include copper and metals such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. In another embodiment, the seed layer includes a copper alloy seed layer deposited on the barrier layer and a second seed layer deposited on the copper alloy seed layer. The copper alloy seed layer may include copper and metals such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. The second seed layer may comprise a metal, such as undoped copper. In yet another embodiment, the seed layer includes a first seed layer and a second seed layer. The first seed layer may include metals such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. The second seed layer may comprise a metal, such as undoped copper.
Description
本发明是PCT国际申请日为2002年9月9日、申请号为02821308.4、发明名称为“阻挡层和籽层的集成”的专利申请的分案申请。The present invention is a divisional application of a patent application whose PCT international filing date is September 9, 2002, application number is 02821308.4, and the invention name is "integration of barrier layer and seed layer".
技术领域 technical field
本发明一般地涉及沉积阻挡层和阻挡层之上的籽层的装置和方法。更具体地,本发明涉及沉积阻挡层和在阻挡层之上沉积包含铜和其它金属的籽层的装置和方法。The present invention generally relates to apparatus and methods for depositing barrier layers and seed layers over the barrier layers. More particularly, the present invention relates to apparatus and methods for depositing barrier layers and depositing seed layers comprising copper and other metals over the barrier layers.
背景技术 Background technique
对于下一代半导体器件大规模集成(VLSI)和超大规模集成(ULSI),可靠地制造亚微米或更小特征是关键之一。然而,由于电路技术的条纹受限制,VLSI和ULSI技术中互连的缩小的尺寸对加工能力设置了额外的要求。这种技术核心的多层面互连需要对高长宽比特征的精确加工,例如通路和其它互连。这些互连的可靠形成对VLSI和ULSI成功以及对提高各个衬底的电路密度和质量的连续努力都非常重要。Reliable fabrication of sub-micron or smaller features is one of the keys to next-generation large-scale integration (VLSI) and ultra-large-scale integration (ULSI) of semiconductor devices. However, the shrinking dimensions of interconnects in VLSI and ULSI technologies place additional demands on process capability due to the strip-limited circuit technology. The multilevel interconnects at the heart of this technology require precise processing of high aspect ratio features such as vias and other interconnects. The reliable formation of these interconnections is very important to the success of VLSI and ULSI, as well as to the continuing effort to increase the circuit density and quality of individual substrates.
在电路密度增加时,通路、触点和其它特征,以及它们之间的介电材料的宽度减小到亚微米尺寸(例如,小于0.20微米或更小),然而介电层的厚度基本上不变,结果特征的长宽比即它们的高度除以宽度增加。许多传统的沉积工艺在填充长宽比超过4∶1的亚微米结构时有困难,特别是在长宽比超过10∶1时。因此,在形成具有高长宽比的基本上无空洞和无接缝的亚微米特征方面正在进行大量的努力。As circuit density increases, the width of vias, contacts, and other features, as well as the dielectric material between them, decreases to submicron dimensions (e.g., less than 0.20 microns or less), while the thickness of the dielectric layer is substantially less. As a result, the aspect ratio of the features, i.e. their height divided by their width, increases. Many conventional deposition processes have difficulty filling submicron structures with aspect ratios greater than 4:1, especially at aspect ratios greater than 10:1. Accordingly, substantial efforts are being made to form substantially void-free and seam-free submicron features with high aspect ratios.
目前,铜及其合金成为选择用于亚微米互连的金属,因为铜具有比铝更低的电阻率(1.7μΩ-cm,与铝的3.1μΩ-cm相比),以及更高的电流承载能力和高得多的电迁移阻力。这些性能对于支持在多层面集成时经历的更高电流密度和提高器件速度都非常重要。并且,铜具有良好的导热率并可在高纯状态获得。Currently, copper and its alloys are the metals of choice for submicron interconnects because copper has a lower resistivity than aluminum (1.7 μΩ-cm, compared to 3.1 μΩ-cm for aluminum), and higher current carrying capacity capability and much higher resistance to electromigration. These properties are important both to support the higher current densities experienced at multilevel integration and to increase device speed. Also, copper has good thermal conductivity and is available in a high purity state.
铜金属化可以通过各种技术来实现。典型的方法通常包括在特征上物理气相沉积阻挡层,在阻挡层上物理气相沉积铜籽层,然后在铜籽层上电镀铜导电材料层以填充该特征。最后,所沉积的各层和介电层被平面化,例如通过化学机械抛光(CMP),以限定导电互连特征。Copper metallization can be achieved by various techniques. A typical method generally involves physical vapor deposition of a barrier layer on the feature, physical vapor deposition of a copper seed layer on the barrier layer, and then electroplating a layer of copper conductive material on the copper seed layer to fill the feature. Finally, the deposited layers and dielectric layers are planarized, such as by chemical mechanical polishing (CMP), to define conductive interconnect features.
然而,使用铜的一个问题是铜扩散到硅、二氧化硅和其它介电材料中,可能损害器件的完整性。因此,保形阻挡层对防止铜扩散变得越来越重要。氮化钽已经被用作阻挡材料以防止铜扩散到下面的层中。然而,先前使用的氮化钽和其它阻挡层的一个问题是这些阻挡层对于在其上沉积铜是很差的浸润剂。例如,在这些阻挡层上沉积铜籽层时,铜籽层可能团聚并变得不连续,可能阻止在铜籽层上一致性地沉积铜导电材料层(例如电镀铜层)。在其它的例子中,对具有在这些阻挡层上沉积的铜层的衬底结构进行的高温下的随后处理可能导致反浸润和形成空洞。在仍另一个例子中,通过使用所述器件形成的器件中的热应力可能导致在铜层中产生空洞和器件损坏。因此,需要改善的互连结构和沉积互连结构的方法。One problem with using copper, however, is that the copper diffuses into silicon, silicon dioxide, and other dielectric materials, potentially compromising device integrity. Therefore, conformal barrier layers are becoming more and more important to prevent copper diffusion. Tantalum nitride has been used as a barrier material to prevent copper from diffusing into underlying layers. However, one problem with previously used tantalum nitride and other barrier layers is that these barrier layers are poor wetting agents for copper to be deposited thereon. For example, when depositing a copper seed layer on these barrier layers, the copper seed layer may agglomerate and become discontinuous, which may prevent consistent deposition of a layer of copper conductive material (eg, an electroplated copper layer) on the copper seed layer. In other instances, subsequent processing at elevated temperatures of substrate structures having copper layers deposited over these barrier layers may result in dewetting and voiding. In yet another example, thermal stress in a device formed using the device may result in voiding in the copper layer and damage to the device. Accordingly, there is a need for improved interconnect structures and methods of depositing interconnect structures.
发明内容 Contents of the invention
本发明一般地涉及通过沉积阻挡层、在阻挡层上沉积籽层并在籽层上沉积导电层来填充特征。在一个实施方式中,籽层包括沉积在阻挡层上的铜合金籽层。例如,铜合金籽层可以包括铜和金属,如铝、镁、钛、锆、锡及其组合。在另一个实施方式中,籽层包括沉积在阻挡层上的铜合金籽层和沉积在铜合金籽层上的第二籽层。铜合金籽层可以包括铜和金属,如铝、镁、钛、锆、锡及其组合。第二籽层可以包括金属,如非掺杂铜。在仍另一个实施方式中,籽层包括第一籽层和第二籽层。第一籽层可以包括金属,如铝、镁、钛、锆、锡及其组合。第二籽层可以包括金属,如非掺杂铜。The invention generally relates to filling features by depositing a barrier layer, depositing a seed layer on the barrier layer, and depositing a conductive layer on the seed layer. In one embodiment, the seed layer includes a copper alloy seed layer deposited on the barrier layer. For example, a copper alloy seed layer may include copper and metals such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. In another embodiment, the seed layer includes a copper alloy seed layer deposited on the barrier layer and a second seed layer deposited on the copper alloy seed layer. The copper alloy seed layer may include copper and metals such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. The second seed layer may comprise a metal, such as undoped copper. In yet another embodiment, the seed layer includes a first seed layer and a second seed layer. The first seed layer may include metals such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. The second seed layer may comprise a metal, such as undoped copper.
附图说明 Description of drawings
为了获得和详细理解上述的特征、优点和本发明的目的,可以参照在附图中示例说明的实施方式对上文中简要总结的本发明进行更具体的描述。In order that the above features, advantages and objects of the invention may be obtained and understood in detail, a more particular description of the invention briefly summarized above may be had by reference to the embodiments illustrated in the accompanying drawings.
然而,应当注意,附图仅说明了本发明的典型实施方式,因此不认为是对其范围的限制,因为本发明可以应用到其它等效的实施方式中。It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may apply to other equally effective embodiments.
图1是可以用于通过原子层沉积形成一个或多个阻挡层的处理系统的一个实施方式的示意性截面图;Figure 1 is a schematic cross-sectional view of one embodiment of a processing system that may be used to form one or more barrier layers by atomic layer deposition;
图2A是其上沉积有介电层的衬底的一个实施方式的示意性截面图。Figure 2A is a schematic cross-sectional view of one embodiment of a substrate with a dielectric layer deposited thereon.
图2B是在图2A的衬底结构上形成阻挡层的一个实施方式的示意性截面图。Figure 2B is a schematic cross-sectional view of one embodiment of forming a barrier layer on the substrate structure of Figure 2A.
图3A-C说明在阻挡层形成的阶段在衬底的一部分上交替化学吸附含钽化合物和含氮化合物的单层的一个实施方式。3A-C illustrate one embodiment of alternating chemisorbed monolayers of tantalum-containing compounds and nitrogen-containing compounds on a portion of a substrate at the stage of barrier layer formation.
图4是可以用于沉积铜合金籽层的能够化学气相沉积的处理系统的一个实施方式的示意性截面图。4 is a schematic cross-sectional view of one embodiment of a chemical vapor deposition capable processing system that can be used to deposit a copper alloy seed layer.
图5A-C是在图2B的阻挡层上沉积籽层的实施方式的示意性截面图。5A-C are schematic cross-sectional views of an embodiment of depositing a seed layer on the barrier layer of FIG. 2B.
图6是多室处理系统的一个例子的示意性顶视图。Figure 6 is a schematic top view of one example of a multi-chamber processing system.
具体实施方式 detailed description
适合于沉积阻挡层的处理室Process chamber suitable for depositing barrier layers
图1是处理系统10的一个示例性实施方式的示意性截面图,该处理系统可以用于按照本发明的方案通过原子层沉积形成一个或多个阻挡层。当然,也可以使用其它的处理系统。1 is a schematic cross-sectional view of one exemplary embodiment of a processing system 10 that may be used to form one or more barrier layers by atomic layer deposition in accordance with aspects of the present invention. Of course, other processing systems may also be used.
处理系统10通常包括处理室100、气体面板130、控制单元110、电源106和真空泵102。处理室100通常容纳支座150,该支座用于在处理室100内支撑例如半导体晶片190的衬底。Processing system 10 generally includes processing chamber 100 , gas panel 130 , control unit 110 , power supply 106 and vacuum pump 102 . The processing chamber 100 generally houses a support 150 for supporting a substrate, such as a semiconductor wafer 190 , within the processing chamber 100 .
在处理室100中,支座150可以通过嵌入的加热元件170来加热。例如,支座可以通过从AC电源向加热元件170提供电流而被电阻加热。依次,晶片190被支座150加热,并可以保持在所需的处理温度范围内,例如,取决于特定的处理,在大约20℃和大约1000℃之间的范围内。In the processing chamber 100 , the support 150 may be heated by embedded heating elements 170 . For example, the pedestal may be resistively heated by providing electrical current from an AC power source to the heating element 170 . In turn, wafer 190 is heated by support 150 and may be maintained within a desired processing temperature range, eg, in a range between about 20°C and about 1000°C, depending on the particular process.
温度传感器172如热电偶可以被嵌入到晶片支座150中以监测支座温度。例如,所测得的温度可以用于反馈回路以控制从电源106施加到加热元件170的电流,使得晶片温度可以被保持或被控制在所需的温度或对于某一处理应用合适的所需温度范围内。支座150也可以使用辐射加热(未示出)或其它加热方法来加热。A temperature sensor 172 such as a thermocouple may be embedded in the wafer support 150 to monitor the support temperature. For example, the measured temperature can be used in a feedback loop to control the current applied from the power supply 106 to the heating element 170 so that the wafer temperature can be maintained or controlled at a desired temperature or a desired temperature suitable for a certain processing application within range. The support 150 may also be heated using radiant heating (not shown) or other heating methods.
真空泵102可以被用于从处理室100抽出处理气体,并且可以用于帮助在处理室100内部维持所需的压力或压力范围内的所需压力。穿过处理室100壁的孔120被用于将处理气体导入到处理室100中。孔120的尺寸通常取决于处理室100的尺寸。A vacuum pump 102 may be used to evacuate process gases from the process chamber 100 and may be used to help maintain a desired pressure or a desired pressure within a pressure range within the process chamber 100 . Holes 120 through the walls of the processing chamber 100 are used to introduce processing gases into the processing chamber 100 . The size of the aperture 120 generally depends on the size of the processing chamber 100 .
孔120通过阀125被部分地连接到气体面板130。气体面板130可以设置成从两个或更多的气体源135、136通过孔120和阀125向处理室100接收并且然后提供最终的处理气体。气体源135、136可以存储在室温下呈液态的前体,随后,该前体在气体面板130中时被加热,从而将前体转变成蒸气态,导入到处理室100中。气体源135、136也可以适于通过使用载气提供前体。气体面板130可以进而设置成从清洗气体源138通过孔120和阀125向处理室100接收并且然后提供清洗气体。喷头160可以连接到孔120,从而向支座150上的晶片190供给处理气体、清洗气体或其它气体。The bore 120 is partially connected to a gas panel 130 through a valve 125 . A gas panel 130 may be arranged to receive and then provide final process gases from two or more gas sources 135 , 136 to the process chamber 100 through holes 120 and valves 125 . The gas sources 135 , 136 may store the precursor in a liquid state at room temperature, which is then heated while in the gas panel 130 to convert the precursor to a vapor state for introduction into the processing chamber 100 . The gas sources 135, 136 may also be adapted to provide the precursors by using a carrier gas. Gas panel 130 may in turn be configured to receive and then provide purge gas from purge gas source 138 to process chamber 100 through aperture 120 and valve 125 . Showerhead 160 may be connected to hole 120 to supply process gas, cleaning gas, or other gas to wafer 190 on support 150 .
喷头160和支座150可以用作用于提供电场而触发等离子体的分开的电极。RF电源162可以连接到喷头160,RF电源163可以连接到支座150,或者RF电源162、163可以分别连接到喷头160和支座150。匹配网络164可以连接到RF电源162、163,可以连接到控制单元110,从而控制提供给RF电源162、163的电力。The showerhead 160 and the support 150 may serve as separate electrodes for providing an electric field to trigger the plasma. RF power source 162 may be connected to showerhead 160, RF power source 163 may be connected to mount 150, or RF power sources 162, 163 may be connected to spray head 160 and mount 150, respectively. The matching network 164 may be connected to the RF power sources 162 , 163 and may be connected to the control unit 110 so as to control the power supplied to the RF power sources 162 , 163 .
控制单元110,如可编程个人计算机、工作站计算机等,也可以设置成在晶片处理程度的不同阶段中控制通过气体面板130以及阀125的不同处理气体的流动。示例性地,控制单元110包括中央处理单元(CPU)112、支持电路114和含有相关的控制软件113的存储器116。除了控制通过气体面板130的处理气体,控制单元110可以设置成负责用于晶片处理中其它行为的自动控制,如晶片输送、温度控制、处理室抽气,与其它行为一起,其中的一些将在本文的其它位置进行描述。A control unit 110, such as a programmable personal computer, workstation computer, etc., may also be configured to control the flow of different process gases through the gas panel 130 and valves 125 at different stages of the wafer processing process. Exemplarily, the control unit 110 includes a central processing unit (CPU) 112 , support circuitry 114 and a memory 116 containing associated control software 113 . In addition to controlling the process gases passing through the gas panel 130, the control unit 110 may be arranged to be responsible for automatic control of other activities in wafer processing, such as wafer transport, temperature control, chamber pumping, among other activities, some of which will be described elsewhere in this paper.
控制单元110可以是用在工业背景中的任何形式的通用计算机处理器中的一种,用于控制不同的处理室和子处理器。CPU112可以使用任何合适的存储器116,如随机存取存储器、只读存储器、软盘驱动器、硬盘,或任何其它形式的数据存储,本地的或远程的。可以将不同的支持电路连接到CPU112,用于支持系统10。所需的软件例程113可以存储在存储器116中或由位于远程(未示出)的第二计算机处理器执行。通过集合地称作信号总线118的大量数字电缆处理控制单元110和晶片处理系统10的各种其它部件之间的双向通信,其中一些如图1。The control unit 110 may be one of any form of general purpose computer processor used in an industrial setting for controlling the different process chambers and sub-processors. CPU 112 may use any suitable memory 116, such as random access memory, read only memory, floppy disk drive, hard disk, or any other form of data storage, local or remote. Various support circuits may be connected to CPU 112 for supporting system 10 . The required software routines 113 may be stored in memory 116 or executed by a remotely located (not shown) second computer processor. Bi-directional communications between control unit 110 and various other components of wafer processing system 10 are handled through a number of digital cables, collectively referred to as signal bus 118 , some of which are shown in FIG. 1 .
阻挡层形成barrier layer formation
图1所述的示例性的处理室可以用于实施如下的工艺。当然,也可以使用其它的处理室。图2A-2B说明按照本发明的一个或更多的方案用于制作互连结构的阻挡层形成的一个示例性实施方式。The exemplary processing chamber depicted in FIG. 1 can be used to perform the following processes. Of course, other processing chambers may also be used. 2A-2B illustrate an exemplary embodiment of barrier layer formation for fabricating an interconnect structure in accordance with one or more aspects of the present invention.
图2A是其上沉积有介电层202的衬底200的一个实施方式的示意性截面图。取决于处理阶段,衬底200可以是硅半导体晶片或在晶片上形成的其它材料层。介电层202可以是氧化物、氧化硅、碳硅氧化物、氟硅、多孔电介质,或其它合适的电介质,所述电介质被形成和图案化以提供延伸到衬底200的露出表面部分202T的接触孔或通路202H。为了清楚,衬底200指在其上进行薄膜处理的任何工件,衬底结构250用于表示衬底200以及在衬底200上形成的其它材料层,如介电层202。本领域的技术人员也应当理解,本发明可以用于双镶嵌工艺流程。Figure 2A is a schematic cross-sectional view of one embodiment of a substrate 200 with a dielectric layer 202 deposited thereon. Depending on the processing stage, substrate 200 may be a silicon semiconductor wafer or a layer of other material formed on the wafer. Dielectric layer 202 may be an oxide, silicon oxide, silicon carbon oxide, fluorosilicon, porous dielectric, or other suitable dielectric formed and patterned to provide a dielectric layer extending to exposed surface portion 202T of substrate 200 Contact hole or via 202H. For clarity, substrate 200 refers to any workpiece on which thin film processing is performed, and substrate structure 250 is used to represent substrate 200 and other material layers formed on substrate 200 , such as dielectric layer 202 . Those skilled in the art should also understand that the present invention can be used in a dual damascene process flow.
图2B是通过原子层沉积(ALD)在图2A的衬底结构250上形成阻挡层204的一个实施方式的示意性截面图。优选地,阻挡层包括氮化钽层。可以使用的其它阻挡层材料的例子包括钛(Ti)、氮化钛(TiN)、钛硅氮化物(TiSiN)、钽(Ta)、钽硅氮化物(TaSiN)、钨(W)、氮化钨(WN)、钨硅氮化物(WSiN),以及其组合。2B is a schematic cross-sectional view of one embodiment of forming a barrier layer 204 on the substrate structure 250 of FIG. 2A by atomic layer deposition (ALD). Preferably, the barrier layer comprises a tantalum nitride layer. Examples of other barrier layer materials that can be used include titanium (Ti), titanium nitride (TiN), titanium silicon nitride (TiSiN), tantalum (Ta), tantalum silicon nitride (TaSiN), tungsten (W), nitride Tungsten (WN), Tungsten Silicon Nitride (WSiN), and combinations thereof.
为了清楚的原因,将参照包含氮化钽阻挡层的阻挡层的一个实施方式来更详细地描述阻挡层的沉积。在一个方面,氮化钽阻挡层的原子层沉积顺序包括向处理室中提供含钽的化合物和含氮的化合物,如图1的处理室。顺序提供含钽化合物和含氮化合物可能导致在衬底结构250上交替化学吸附含钽化合物的多个单层和含氮化合物的多个单层。For reasons of clarity, the deposition of the barrier layer will be described in more detail with reference to an embodiment of a barrier layer comprising a tantalum nitride barrier layer. In one aspect, the atomic layer deposition sequence for a tantalum nitride barrier layer includes providing a tantalum-containing compound and a nitrogen-containing compound into a processing chamber, such as the processing chamber of FIG. 1 . Sequentially providing the tantalum-containing compound and the nitrogen-containing compound may result in alternating chemisorption of multiple monolayers of the tantalum-containing compound and multiple monolayers of the nitrogen-containing compound on the substrate structure 250 .
图3A-C说明在集成电路制造阶段中在衬底300的示例部分上交替化学吸附含钽化合物的多个单层和含氮化合物的多个单层,更具体地是在阻挡层形成阶段。在图3A中,通过向处理室如图1所示的处理室中导入含钽化合物305的一个脉冲,在衬底300上化学吸附含钽化合物的单层。认为用于吸附含钽化合物305的单层的化学吸附工艺是自限性的,原因在于由于衬底的表面具有有限数量的用于化学吸附含钽化合物的位置,在给定的脉冲期间仅一个单层被化学吸附到衬底300的表面上。一旦有限数量的位置被含钽化合物305占据,将阻止任何含钽化合物的进一步化学吸附。3A-C illustrate alternating chemisorption of multiple monolayers of a tantalum-containing compound and multiple monolayers of a nitrogen-containing compound on an exemplary portion of a substrate 300 during stages of integrated circuit fabrication, more particularly during barrier layer formation. In FIG. 3A, a monolayer of a tantalum-containing compound is chemisorbed on a substrate 300 by introducing a pulse of a tantalum-containing compound 305 into the processing chamber as shown in FIG. The chemisorption process for adsorbing a monolayer of tantalum-containing compound 305 is believed to be self-limiting in that since the surface of the substrate has a limited number of sites for chemisorption of tantalum-containing compound, only one during a given pulse The monolayer is chemisorbed onto the surface of the substrate 300 . Once a limited number of sites are occupied by the tantalum-containing compound 305, any further chemisorption of the tantalum-containing compound will be prevented.
含钽化合物305典型地包括带有一个或更多的活性物质315的钽原子310。在一个实施方式中,含钽化合物可以是钽基有机金属前体或其衍生物。优选地,有机金属前体是戊二甲胺钽(pentadimethylamino-tantalum)(PDMAT;Ta(NMe2)5)。PDMAT由于许多原因可以具有优点。PDMAT相对稳定。PDMAT具有适当的蒸气压,这使得供给容易。特别地,可以按低卤化物含量来制造PDMAT。PDMAT的卤化物含量可以按小于100ppm的卤化物含量来制造,并且甚至可以按小于30ppm或甚至小于5ppm的卤化物含量来制造。不希望受理论限制,相信低卤化物含量的有机金属前体是有益的,因为阻挡层中所含的卤化物(如氯)可能侵蚀其上沉积的铜层。Tantalum-containing compound 305 typically includes tantalum atoms 310 with one or more active species 315 . In one embodiment, the tantalum-containing compound may be a tantalum-based organometallic precursor or a derivative thereof. Preferably, the organometallic precursor is pentadimethylamino-tantalum (PDMAT; Ta(NMe 2 ) 5 ). PDMAT can be advantageous for many reasons. PDMAT is relatively stable. PDMAT has an appropriate vapor pressure, which makes supply easy. In particular, PDMAT can be produced with low halide content. The halide content of PDMAT can be produced with a halide content of less than 100 ppm, and can even be produced with a halide content of less than 30 ppm or even less than 5 ppm. Without wishing to be bound by theory, it is believed that a low halide content organometallic precursor is beneficial because halides, such as chlorine, contained in the barrier layer may attack the copper layer deposited thereon.
含钽化合物可以是其它的有机金属前体或其衍生物,诸如但不限于戊乙基甲胺钽(pentaethylmethylamino-tantalum)(PEMAT:Ta[N(C2H5CH3)2]5)、戊二乙胺钽(pentadiethylamino-tantalum)(PDEAT:Ta(NEt2)5),以及PEMAT、PDEAT或PDMAT的任何和所有衍生物。其它的含钽化合物包括但不限于TBTDET(Ta(NEt2)3NC4H9或C16H39N4Ta)和钽卤化物,例如TaX5,其中X是氟(F)、溴(Br)或氯(Cl),及其衍生物。The tantalum-containing compound may be other organometallic precursors or derivatives thereof, such as but not limited to pentaethylmethylamino-tantalum (PEMAT: Ta[N(C 2 H 5 CH 3 ) 2 ] 5 ), Pentadiethylamino-tantalum (PDEAT: Ta(NEt 2 ) 5 ), and any and all derivatives of PEMAT, PDEAT or PDMAT. Other tantalum-containing compounds include, but are not limited to, TBTDET (Ta(NEt 2 ) 3 NC 4 H 9 or C 16 H 39 N 4 Ta) and tantalum halides such as TaX 5 , where X is fluorine (F), bromine (Br ) or chlorine (Cl), and derivatives thereof.
含钽化合物可以作为气体来提供或者在载气的帮助下来提供。可以使用的载气包括但不限于氦(He)、氩(Ar)、氮(N2)和氢(H2)。The tantalum-containing compound can be provided as a gas or with the aid of a carrier gas. Carrier gases that may be used include, but are not limited to, helium (He), argon (Ar), nitrogen ( N2 ) and hydrogen ( H2 ).
在含钽化合物的单层被化学吸附到衬底300之后,过量的含钽化合物通过向处理室中导入一个脉冲的清洗气体从处理室中去除。可以使用的清洗气体包括但不限于氦(He)、氩(Ar)、氮(N2)、氢(H2)和其它气体。After the monolayer of tantalum-containing compound is chemisorbed to substrate 300, excess tantalum-containing compound is removed from the processing chamber by introducing a pulse of purge gas into the processing chamber. Purge gases that may be used include, but are not limited to, helium (He), argon (Ar), nitrogen (N 2 ), hydrogen (H 2 ), and others.
参照图3B,在清洗处理室之后,向处理室内导入一个脉冲的含氮化合物325。可以单独地提供含氮化合物325,或者在载气的帮助下提供。含氮化合物325可以包括带有一个或更多的活性物质335的氮原子330。含氮化合物优选地包括氨气(NH3)。其它可以使用的含氮化合物包括但不限于:x和y为整数的NxHy(例如联氨(N2H4)),二甲基联氨((CH3)2N2H2),丁基联氨(C4H9N2H3),苯基联氨(C6H5N2H3),其它的联氨衍生物,氮等离子体源(例如N2、N2/H2、NH3或N2H4等离子体),2,2’-偶氮异丁烷((CH3)6C2N2),乙基叠氮(C2H5N3),和其它合适的气体。如果需要,可以使用载气供给含氮化合物。Referring to FIG. 3B, after cleaning the processing chamber, a pulse of nitrogen-containing compound 325 is introduced into the processing chamber. The nitrogen-containing compound 325 may be provided alone, or with the aid of a carrier gas. The nitrogen-containing compound 325 may include nitrogen atoms 330 with one or more reactive species 335 . The nitrogen-containing compound preferably includes ammonia gas (NH 3 ). Other nitrogen-containing compounds that may be used include, but are not limited to: N x H y where x and y are integers (e.g. hydrazine (N 2 H 4 )), dimethyl hydrazine ((CH 3 ) 2 N 2 H 2 ) , butylhydrazine (C 4 H 9 N 2 H 3 ), phenylhydrazine (C 6 H 5 N 2 H 3 ), other hydrazine derivatives, nitrogen plasma source (eg N 2 , N 2 / H 2 , NH 3 , or N 2 H 4 plasma), 2,2'-azoisobutane ((CH 3 ) 6 C 2 N 2 ), ethyl azide (C 2 H 5 N 3 ), and other suitable gases. A carrier gas can be used to supply nitrogen-containing compounds, if desired.
含氮化合物325的单层可以化学吸附在含钽化合物305的单层上。在原子层沉积(ALD)期间表面上前体的成分和结构并未准确知道。不希望受理论限制,相信化学吸附的单层含氮化合物325与单层含钽化合物305反应以形成氮化钽层309。反应物质315、335形成可以通过真空系统从衬底表面输送的副产物340。相信含氮化合物325与含钽化合物305的反应是自限性的,因为只有一个单层的含钽化合物305化学吸附在衬底表面上。在另一理论中,前体在衬底表面上时可以处于中间状态。此外,所沉积的氮化钽层也可以含有多于钽(Ta)和氮(N)简单元素的元素;而是,氮化钽层也可以包含具有碳(C)、氢(H)和/或氧(O)的更复杂的分子。The monolayer of nitrogen-containing compound 325 may be chemisorbed on the monolayer of tantalum-containing compound 305 . The composition and structure of the precursors on the surface during atomic layer deposition (ALD) is not precisely known. Without wishing to be bound by theory, it is believed that the chemisorbed monolayer nitrogen-containing compound 325 reacts with the monolayer tantalum-containing compound 305 to form the tantalum nitride layer 309 . The reaction species 315, 335 form by-products 340 that can be transported from the substrate surface by the vacuum system. The reaction of the nitrogen-containing compound 325 with the tantalum-containing compound 305 is believed to be self-limiting because only a monolayer of the tantalum-containing compound 305 is chemisorbed on the substrate surface. In another theory, the precursor may be in an intermediate state while on the substrate surface. In addition, the deposited tantalum nitride layer may also contain elements more than the simple elements of tantalum (Ta) and nitrogen (N); instead, the tantalum nitride layer may also contain elements having carbon (C), hydrogen (H) and/or Or a more complex molecule of oxygen (O).
在含氮化合物325的单层吸附在含钽化合物的单层上之后,通过向处理室内导入另一脉冲的清洗气体去除任何过量的含氮化合物。然后,如图3C所示,如果需要,含钽化合物和含氮化合物单层的交替化学吸附的氮化钽层沉积顺序可以重复,直到达到所需的氮化钽厚度。After the monolayer of nitrogen-containing compound 325 is adsorbed on the monolayer of tantalum-containing compound, any excess nitrogen-containing compound is removed by introducing another pulse of purge gas into the process chamber. Then, as shown in Figure 3C, the sequence of alternating chemisorbed tantalum nitride layer deposition sequences of monolayers of tantalum-containing compounds and nitrogen-containing compounds can be repeated, if desired, until the desired tantalum nitride thickness is achieved.
在图3A-3C中,氮化钽层形成被描述为从在衬底上化学吸附单层的含钽化合物开始,接着是单层的含氮化合物。可选地,氮化钽层形成可以从在衬底上化学吸附单层的含氮化合物开始,接着是单层的含钽化合物。此外,在可选的实施方式中,在反应气体的脉冲之间泵抽气单独地可以用于防止反应气体的混合。In FIGS. 3A-3C , tantalum nitride layer formation is depicted starting with chemisorption of a monolayer of a tantalum-containing compound on the substrate, followed by a monolayer of a nitrogen-containing compound. Alternatively, tantalum nitride layer formation may begin with chemisorption of a monolayer of a nitrogen-containing compound on the substrate, followed by a monolayer of a tantalum-containing compound. Furthermore, in an alternative embodiment, pumping alone between pulses of reactant gas may be used to prevent mixing of reactant gases.
对于含钽化合物、含氮化合物和清洗气体的每一个脉冲,持续时间是可变的并取决于所采用的处理室的体积容量以及与之相连的真空系统。例如,(1)较低的气体压力需要较长的脉冲时间;(2)较低的气体流速需要较长的时间使室压上升和稳定,需要较长的脉冲时间;(3)大体积处理室要花费较长的时间填充,较长的时间使室压稳定,从而需要较长的脉冲时间。类似地,每个脉冲之间的时间也是可变的并取决于处理室的体积容量以及与之相连的真空系统。通常,含钽化合物或含氮化合物的一个脉冲的持续时间对于化学吸附一个单层的该化合物应当足够长。通常,清洗气体的脉冲时间足够长,以去除反应副产物和/或留在处理室中的任何残留材料。For each pulse of tantalum-containing compound, nitrogen-containing compound and purge gas, the duration is variable and depends on the volumetric capacity of the process chamber used and the vacuum system connected thereto. For example, (1) lower gas pressure requires longer pulse time; (2) lower gas flow rate requires longer time for chamber pressure to rise and stabilize, requiring longer pulse time; (3) large volume processing It takes longer for the chamber to fill, longer for the chamber pressure to stabilize, and thus longer pulse times. Similarly, the time between each pulse is also variable and depends on the volumetric capacity of the processing chamber and the vacuum system connected thereto. In general, the duration of one pulse of a tantalum-containing compound or a nitrogen-containing compound should be long enough to chemisorb a monolayer of the compound. Typically, the pulse of the purge gas is long enough to remove reaction by-products and/or any residual material left in the process chamber.
通常,对于含钽化合物大约1.0秒或更少的脉冲时间和对于含氮化合物大约1.0秒或更少的脉冲时间典型地足以在衬底上化学吸附交替的单层。对于清洗气体大约1.0秒或更少的脉冲时间典型地足以去除反应副产物以及留在处理室中的任何残留材料。当然,可以使用较长的脉冲时间以确保含钽化合物和含氮化合物的化学吸附,并确保反应副产物的去除。In general, pulse times of about 1.0 second or less for tantalum-containing compounds and about 1.0 second or less for nitrogen-containing compounds are typically sufficient to chemisorb alternating monolayers on the substrate. A pulse time of about 1.0 second or less for the purge gas is typically sufficient to remove reaction by-products as well as any residual material left in the process chamber. Of course, longer pulse times can be used to ensure chemisorption of tantalum and nitrogen-containing compounds and to ensure removal of reaction by-products.
在原子层沉积期间,衬底可以大致维持在选定的含钽化合物的热分解温度以下。对于本文中验证的含钽化合物,在小于100托优选小于50托的处理室压力下,所使用的示例性加热器温度范围大致在大约20℃和大约500℃之间。当含钽气体是PDMAT时,加热器温度优选在大约100℃和大约300℃之间,更优选在大约175℃和大约250℃之间。在其它的实施方式中,应当理解可以使用其它的温度。例如,可以使用高于热分解温度的温度。然而,该温度应当被选择使得多于50%的沉积行为通过化学吸附过程来进行。在另一个例子中,可以使用高于热分解温度的温度,其中在每一个前体沉积期间分解量受限制,使得生长模式类似于原子层沉积生长模式。During atomic layer deposition, the substrate can be maintained substantially below the thermal decomposition temperature of the selected tantalum-containing compound. For the tantalum-containing compounds demonstrated herein, an exemplary heater temperature range used is approximately between about 20°C and about 500°C at process chamber pressures of less than 100 Torr, preferably less than 50 Torr. When the tantalum-containing gas is PDMAT, the heater temperature is preferably between about 100°C and about 300°C, more preferably between about 175°C and about 250°C. In other embodiments, it should be understood that other temperatures may be used. For example, temperatures above the thermal decomposition temperature may be used. However, the temperature should be chosen such that more than 50% of the deposition takes place by chemisorption processes. In another example, a temperature above the thermal decomposition temperature can be used, wherein the amount of decomposition during each precursor deposition is limited such that the growth mode is similar to the atomic layer deposition growth mode.
在处理室中,如在图1的处理室中通过原子层沉积而沉积氮化钽层的一个示例性的工艺顺序包括在大约100sccm和大约1000sccm之间优选地在大约200sccm和大约500sccm之间的流速下提供戊二甲胺钽(PDMAT)大约1.0秒或更少的时间周期,在大约100sccm和大约1000sccm之间优选地在大约200sccm和大约500sccm之间的流速下提供氨大约1.0秒或更少的时间周期,并且在大约100sccm和大约1000sccm之间优选地在大约200sccm和大约500sccm之间的流速下提供清洗气体大约1.0秒或更少。加热器温度优选地保持在大约100℃和大约300℃之间,处理室压力在大约1.0和大约5.0托之间。这种工艺提供厚度在大约0.5埃和大约1.0埃每循环之间的厚度。可以重复交替的顺序,直到达到所需的厚度。An exemplary process sequence for depositing a tantalum nitride layer by atomic layer deposition in the processing chamber as in the processing chamber of FIG. Pentadimethylamine tantalum (PDMAT) is provided at a flow rate of about 1.0 second or less for a period of time, and ammonia is provided at a flow rate of between about 100 seem and about 1000 seem for about 1.0 second or less, preferably at a flow rate of between about 200 seem and about 500 seem and providing the purge gas for about 1.0 seconds or less at a flow rate between about 100 seem and about 1000 seem, preferably between about 200 seem and about 500 seem. The heater temperature is preferably maintained between about 100°C and about 300°C, and the process chamber pressure is between about 1.0 and about 5.0 Torr. This process provides thicknesses between about 0.5 Angstroms and about 1.0 Angstroms per cycle. Alternating sequences can be repeated until the desired thickness is achieved.
在一个实施方式中,阻挡层如氮化钽阻挡层被沉积成大约50埃或更少的侧壁覆盖度。在另一个实施方式中,阻挡层被沉积成大约20埃或更少的侧壁覆盖度。在又一个实施方式中,阻挡层被沉积成大约10埃或更少的侧壁覆盖度。厚度大约10埃或更少的阻挡层被认为是足以防止铜扩散的阻挡层。在一个方面,薄阻挡层的优点是可以用于填充具有高长宽比的亚微米或更小的特征。当然,可以使用具有大于50埃的侧壁覆盖度的阻挡层。In one embodiment, a barrier layer, such as a tantalum nitride barrier layer, is deposited with a sidewall coverage of about 50 Angstroms or less. In another embodiment, the barrier layer is deposited with a sidewall coverage of about 20 Angstroms or less. In yet another embodiment, the barrier layer is deposited with a sidewall coverage of about 10 Angstroms or less. A barrier layer with a thickness of about 10 Angstroms or less is considered to be an adequate barrier layer to prevent copper diffusion. In one aspect, thin barrier layers have the advantage that they can be used to fill submicron or smaller features with high aspect ratios. Of course, barrier layers with sidewall coverage greater than 50 Angstroms may be used.
阻挡层可以被进一步等离子体退火。在一个实施方式中,阻挡层可以用氩等离子体或氩/氢等离子体来进行等离子体退火。对于200mm直径的衬底,提供给RF电极的RF电源可以在大约100W和大约2000W、优选地在大约500W和大约1000W之间,对于300mm直径的衬底,优选在大约1000W和大约2000W之间。处理室的压力可以小于100托,优选地在0.1托和大约5托之间,更优选地在大约1托和3托之间。加热器温度可以在大约20℃和大约500℃之间。等离子体退火可以在一次循环、多次循环或在形成阻挡层之后进行。The barrier layer can be further plasma annealed. In one embodiment, the barrier layer can be plasma annealed with argon plasma or argon/hydrogen plasma. The RF power supplied to the RF electrodes may be between about 100W and about 2000W, preferably between about 500W and about 1000W for a 200mm diameter substrate, and preferably between about 1000W and about 2000W for a 300mm diameter substrate. The pressure of the processing chamber may be less than 100 Torr, preferably between 0.1 Torr and about 5 Torr, more preferably between about 1 Torr and 3 Torr. The heater temperature may be between about 20°C and about 500°C. Plasma annealing can be performed in one cycle, multiple cycles, or after barrier layer formation.
在上文中,阻挡层原子层沉积的实施方式被描述成在衬底上反应物单层的化学吸附。本发明也包括其中反应物被沉积成多于或少于一个单层的实施方式。本发明也包括其中反应物没有按自限性的方式沉积的实施方式。本发明也包括其中其中阻挡层204主要按化学气相沉积工艺沉积的实施方式,在化学气相沉积中反应物被顺序或同时供给。本发明也包括其中阻挡层204按物理气相沉积工艺沉积的实施方式,在物理气相沉积中靶包括待沉积的材料(即氮气中的钽靶,用于沉积氮化钽)。In the above, embodiments of barrier layer atomic layer deposition were described as chemisorption of a reactant monolayer on a substrate. The invention also includes embodiments in which the reactants are deposited as more or less than a monolayer. The invention also includes embodiments in which the reactants are not deposited in a self-limiting manner. The invention also includes embodiments in which the barrier layer 204 is deposited primarily in a chemical vapor deposition process in which the reactants are supplied sequentially or simultaneously. The invention also includes embodiments in which the barrier layer 204 is deposited by a physical vapor deposition process in which the target comprises the material to be deposited (ie, a tantalum target in nitrogen for deposition of tantalum nitride).
适于沉积籽层的处理室Process chamber suitable for depositing the seed layer
在一个实施方式中,籽层可通过任何合适的技术而沉积,如物理气相沉积、化学气相沉积、无电沉积或这些技术的组合。用于沉积籽层的合适的物理气相沉积技术包括高密度等离子体物理气相沉积(HDPPVD)或校准的或长行程的溅射。一种类型的HDPPVD是自离子化的等离子体物理气相沉积。能够自离子化等离子体物理气相沉积籽层的处理室的一个例子是SIPTM室,可以从AppliedMaterials,Inc.ofSantaClara,California获得。在名称为“RotatingSputterMagnetronAssembly”的美国专利6,183,614中描述了能够自离子化等离子体物理气相沉积的处理室的示例性实施方式,该专利在与本发明不矛盾的情形下通过引用结合在本文中。In one embodiment, the seed layer may be deposited by any suitable technique, such as physical vapor deposition, chemical vapor deposition, electroless deposition, or a combination of these techniques. Suitable physical vapor deposition techniques for depositing the seed layer include high density plasma physical vapor deposition (HDPPVD) or collimated or long stroke sputtering. One type of HDPPVD is self-ionized plasma physical vapor deposition. An example of a processing chamber capable of physical vapor deposition of a seed layer from an ionized plasma is a SIP™ chamber, available from Applied Materials, Inc. of Santa Clara, California. An exemplary embodiment of a processing chamber capable of physical vapor deposition from an ionizing plasma is described in US Patent 6,183,614, entitled "RotatingSputter Magnetron Assembly," which is incorporated herein by reference to the extent not inconsistent with the present invention.
图4是可以用于沉积籽层的能够物理气相沉积的处理系统410的一个实施方式的示意性截面图。当然,也可以使用其它的处理系统和其它类型的物理气相沉积。Figure 4 is a schematic cross-sectional view of one embodiment of a physical vapor deposition capable processing system 410 that may be used to deposit a seed layer. Of course, other processing systems and other types of physical vapor deposition can also be used.
处理系统410包括真空室412,密封至PVD靶414,该靶由要溅射沉积在晶片416上的材料组成,该晶片固定在加热器座418上。固定在处理室内的罩420保护处理室412的壁不受所溅射的材料的影响并提供阳极接地面。可选的DC电源422使靶414相对于罩420负偏置。The processing system 410 includes a vacuum chamber 412 sealed to a PVD target 414 consisting of material to be sputter deposited on a wafer 416 which is secured to a heater mount 418 . A shield 420 secured within the chamber protects the walls of the chamber 412 from sputtered material and provides an anode ground plane. An optional DC power supply 422 negatively biases the target 414 relative to the shield 420 .
气体源424通过质流控制器426向处理室412提供溅射工作气体,典型地是化学惰性的气体氩。真空系统428将处理室保持在低压下。基于计算机的控制器430控制包括DC电源422和质流控制器426的反应器。A gas source 424 provides a sputtering working gas, typically the chemically inert gas argon, to the process chamber 412 via a mass flow controller 426 . A vacuum system 428 maintains the processing chamber at a low pressure. A computer-based controller 430 controls the reactor including DC power supply 422 and mass flow controller 426 .
当氩被允许进入处理室时,靶414和罩420之间的DC电压将氩激发成等离子体,并且充正电的氩离子被吸引到充负电的靶414。离子以足够的能量轰击靶414,并导致靶原子或原子束从靶414处被溅射。一些靶粒子轰击晶片416,从而沉积在其上,从而形成靶材料的薄膜。When argon is admitted into the process chamber, a DC voltage between the target 414 and the shield 420 ignites the argon into a plasma, and the positively charged argon ions are attracted to the negatively charged target 414 . The ions bombard the target 414 with sufficient energy to cause target atoms or beams of atoms to be sputtered from the target 414 . Some of the target particles bombard wafer 416, thereby depositing thereon, forming a thin film of target material.
为了提供有效的溅射,在靶414的背面设置磁控管432。它具有在磁体434、436附近在处理室内产生磁场的相对的磁体434、436。磁场俘获电子,为了保持电中性,离子密度也增加,从而邻近磁控管432在处理室内形成高密度等离子体区438。磁控管432通常绕位于靶414中心处的旋转轴458旋转,从而在靶414的溅射时实现完全覆盖。In order to provide efficient sputtering, a magnetron 432 is positioned behind the target 414 . It has opposing magnets 434, 436 in the vicinity of which magnets 434, 436 generate a magnetic field within the processing chamber. The magnetic field traps electrons, and in order to maintain electrical neutrality, the ion density is also increased, thereby forming a high density plasma region 438 within the process chamber adjacent to the magnetron 432 . The magnetron 432 generally rotates about an axis of rotation 458 located at the center of the target 414 to achieve complete coverage when sputtering the target 414 .
座418产生DC自偏置,从等离子体吸引离子化的粒子穿过邻近晶片416的等离子体鞘。该效应可以由座电极418的附加DC或RF偏置来加强,以对穿过等离子鞘的离子化的粒子朝晶片416附加加速,从而控制溅射沉积的方向性。Seat 418 creates a DC self-bias that attracts ionized particles from the plasma through the plasma sheath adjacent wafer 416 . This effect can be enhanced by additional DC or RF biasing of the pedestal electrode 418 to provide additional acceleration of the ionized particles passing through the plasma sheath towards the wafer 416, thereby controlling the directionality of the sputter deposition.
籽层形成seed layer formation
图4所示的示例性处理室可以用于实施以下的工艺。当然,可以使用其它的处理室。图5A-5C是在阻挡层上沉积籽层的示例性实施方式的示意性截面图。The exemplary processing chamber shown in FIG. 4 can be used to implement the following processes. Of course, other processing chambers may be used. 5A-5C are schematic cross-sectional views of exemplary embodiments of depositing a seed layer on a barrier layer.
图5A所示的一个实施方式包括在图2B的阻挡层204上沉积铜合金籽层502,以及在籽层502上沉积铜导电材料层506,以填充特征。在本说明书中使用的术语“铜导电材料层”被限定为包括铜或铜合金的层。铜合金籽层502包括有助于其上随后的材料沉积的铜金属合金。铜合金籽层502可以包括铜和第二金属,如铝、镁、钛、锆、锡、其它金属,以及其组合。第二金属优选包括铝、镁、钛,及其组合,并且更优选包括铝。在某些实施方式中,铜合金籽层按照具有大约0.001原子百分比、大约0.01原子百分比或大约0.1原子百分比的下限和具有大约5.0原子百分比、大约2.0原子百分比或大约1.0原子百分比的上限的浓度包括第二金属。在从任何下限到任何上限的范围内的第二金属的浓度包括在本发明的范围内。铜合金籽层502中第二金属的浓度优选小于大约5.0原子百分比,以降低铜合金籽层502的电阻。在本说明书中使用的术语“层”被限定为一个或更多的层。例如,对于包括铜和浓度在大约0.001百分比和大约5.0原子百分比之间范围内的第二金属的铜合金籽层502,铜合金籽层502可以包括多个层,其中多层的总成分包括铜和浓度在大约0.001原子百分比和大约5.0原子百分比之间的第二金属。为了说明,包括多个层的铜合金籽层502,其中多层的总成分包括铜和浓度在大约0.001原子百分比和大约5.0原子百分比之间的第二金属,其例子可以包括含第二金属的第一籽层和含铜的第二籽层,可以包括含铜/第二金属合金的第一籽层和含铜/第二金属合金的第二籽层,或者可以包括含铜/第二金属合金的第一籽层和含铜的第二籽层等。One embodiment shown in FIG. 5A includes depositing a copper alloy seed layer 502 on the barrier layer 204 of FIG. 2B and depositing a copper conductive material layer 506 on the seed layer 502 to fill the features. The term "copper conductive material layer" used in this specification is defined as a layer including copper or copper alloy. Copper alloy seed layer 502 includes a copper metal alloy that facilitates subsequent material deposition thereon. The copper alloy seed layer 502 may include copper and a second metal, such as aluminum, magnesium, titanium, zirconium, tin, other metals, and combinations thereof. The second metal preferably includes aluminum, magnesium, titanium, and combinations thereof, and more preferably includes aluminum. In certain embodiments, the copper alloy seed layer comprises a concentration having a lower limit of about 0.001 atomic percent, about 0.01 atomic percent, or about 0.1 atomic percent and an upper limit of about 5.0 atomic percent, about 2.0 atomic percent, or about 1.0 atomic percent. second metal. Concentrations of the second metal ranging from any lower limit to any upper limit are within the scope of the invention. The concentration of the second metal in the copper alloy seed layer 502 is preferably less than about 5.0 atomic percent to reduce the electrical resistance of the copper alloy seed layer 502 . The term "layer" used in this specification is defined as one or more layers. For example, for a copper alloy seed layer 502 that includes copper and a second metal at a concentration ranging between about 0.001 percent and about 5.0 atomic percent, the copper alloy seed layer 502 may include multiple layers, where the total composition of the multiple layers includes copper and a second metal at a concentration between about 0.001 atomic percent and about 5.0 atomic percent. To illustrate, a copper alloy seed layer 502 comprising a plurality of layers, wherein the total composition of the layers includes copper and a second metal at a concentration between about 0.001 atomic percent and about 5.0 atomic percent, examples may include second metal-containing A first seed layer and a copper-containing second seed layer may include a copper-containing/second metal alloy first seed layer and a copper-containing/second metal alloy second seed layer, or may include a copper-containing/second metal alloy Alloyed first seed layer and copper-containing second seed layer, etc.
铜合金籽层502被沉积到对特征的侧壁的覆盖度至少大约5埃的厚度,或者被沉积到对特征的侧壁的覆盖度至少连续的厚度。在一个实施方式中,铜合金籽层502被沉积在场区域到大约10埃和大约2000埃之间的厚度,对于通过物理气相沉积而沉积的铜合金籽层502,优选在大约500埃和大约1000埃之间。The copper alloy seed layer 502 is deposited to a thickness of at least about 5 Angstroms covering the sidewalls of the features, or to a thickness of at least continuous coverage of the sidewalls of the features. In one embodiment, the copper alloy seed layer 502 is deposited in the field region to a thickness between about 10 Angstroms and about 2000 Angstroms, preferably between about 500 Angstroms and about 1000 Angstroms for copper alloy seed layers 502 deposited by physical vapor deposition. Between Angles.
图5B所示的另一实施方式包括在图2B的阻挡层204上沉积铜合金籽层512、在铜合金籽层512上沉积第二籽层514、以及在第二籽层514上沉积铜导电材料层516,以填充特征。铜合金籽层512包括有助于其上随后沉积材料的铜金属合金。铜合金籽层512可以包括铜和第二金属,如铝、镁、钛、锆、锡、其它金属及其组合。第二金属优选包括铝、镁、钛及其组合,并且更优选包括铝。在某些实施方式中,铜合金籽层按具有大约0.001原子百分比、大约0.01原子百分比或大约0.1原子百分比的下限并且具有大约5.0原子百分比、大约2.0原子百分比或大约1.0原子百分比的上限的浓度包括第二金属。第二金属从任何下限到任何上限的范围内的浓度属于本发明的范围。在一个实施方式中,第二籽层514包括非掺杂铜(即纯铜)。在一个方面,由于电阻率低于相同厚度的铜合金籽层512,并且由于较高的耐表面氧化性,使用包括非掺杂铜的第二籽层514。Another embodiment shown in FIG. 5B includes depositing a copper alloy seed layer 512 on the barrier layer 204 of FIG. 2B , depositing a second seed layer 514 on the copper alloy seed layer 512 , and depositing a copper conductive Material layer 516 to fill the feature. Copper alloy seed layer 512 includes a copper metal alloy that facilitates subsequent deposition of material thereon. The copper alloy seed layer 512 may include copper and a second metal, such as aluminum, magnesium, titanium, zirconium, tin, other metals, and combinations thereof. The second metal preferably includes aluminum, magnesium, titanium, and combinations thereof, and more preferably includes aluminum. In certain embodiments, the copper alloy seed layer comprises a concentration having a lower limit of about 0.001 atomic percent, about 0.01 atomic percent, or about 0.1 atomic percent and an upper limit of about 5.0 atomic percent, about 2.0 atomic percent, or about 1.0 atomic percent second metal. Concentrations of the second metal ranging from any lower limit to any upper limit are within the scope of the invention. In one embodiment, the second seed layer 514 includes undoped copper (ie, pure copper). In one aspect, a second seed layer 514 comprising undoped copper is used due to lower resistivity than a copper alloy seed layer 512 of the same thickness, and due to higher resistance to surface oxidation.
铜合金籽层512可以在特征的侧壁上被沉积到小于一个单层的厚度(即亚单层厚度或不连续层)。在一个实施方式中,在场区域处铜合金籽层512和第二籽层514的结合厚度在大约10埃和大约2000埃之间,对于采用物理气相沉积而沉积的铜合金籽层512和第二籽层514,优选在大约500埃和大约1000埃之间。The copper alloy seed layer 512 may be deposited to a thickness of less than one monolayer (ie, sub-monolayer thickness or discontinuous layer) on the sidewalls of the feature. In one embodiment, the combined thickness of the copper alloy seed layer 512 and the second seed layer 514 at the field region is between about 10 Angstroms and about 2000 Angstroms, for copper alloy seed layer 512 and second seed layer 512 deposited using physical vapor deposition. The seed layer 514 is preferably between about 500 Angstroms and about 1000 Angstroms.
图5C所示的另一实施方式包括在图2B的阻挡层204上沉积第一籽层523,以及在第二籽层524上沉积铜导电材料层526,以填充特征。第一籽层523包括从铝、镁、钛、锆、锡及其组合构成的组中选择的金属。优选地,第一籽层包括铝。在一个实施方式中,第二籽层514包括非掺杂铜(即纯铜)。Another embodiment shown in FIG. 5C includes depositing a first seed layer 523 on the barrier layer 204 of FIG. 2B and depositing a copper conductive material layer 526 on the second seed layer 524 to fill the features. The first seed layer 523 includes a metal selected from the group consisting of aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. Preferably, the first seed layer comprises aluminium. In one embodiment, the second seed layer 514 includes undoped copper (ie, pure copper).
第一籽层523可以在特征的侧壁上被沉积到小于一个单层的厚度(即亚单层厚度或不连续层)。在一个实施方式中第一籽层被沉积到小于大约50埃侧壁覆盖度、优选小于大约40埃侧壁覆盖度的厚度,以降低组合籽层的电阻。在场区域处第一籽层523和第二籽层524的组合厚度在大约10埃和大约2000埃之间,对于采用物理气相沉积而沉积的第一籽层523和第二籽层524,优选地在大约500埃和大约1000埃之间。The first seed layer 523 may be deposited to a thickness of less than one monolayer (ie, sub-monolayer thickness or discontinuous layer) on the sidewalls of the feature. In one embodiment the first seed layer is deposited to a thickness of less than about 50 Angstroms sidewall coverage, preferably less than about 40 Angstroms sidewall coverage, to reduce the resistance of the combined seed layer. The combined thickness of the first seed layer 523 and the second seed layer 524 at the field region is between about 10 Angstroms and about 2000 Angstroms, preferably for the first seed layer 523 and the second seed layer 524 deposited by physical vapor deposition. Between about 500 Angstroms and about 1000 Angstroms.
铜合金籽层502、512,第一籽层523或第二籽层514、524可以通过如下的技术来沉积,包括物理气相沉积、化学气相沉积、原子层沉积、无电沉积或这些技术的组合。通常,如果使用物理气相沉积技术来沉积籽层,则如图4所述的处理室412的处理室包括如靶414的靶,所述靶具有类似于希望沉积的金属或金属合金的成分。例如,为了沉积铜合金籽层502、512,靶可以包括铜和第二金属,如铝、镁、钛、锆、锡、其它金属及其组合。第二金属优选包括铝。在某些实施方式中,靶包括按具有大约0.001原子百分比、大约0.01原子百分比或大约0.1原子百分比的下限和具有大约5.0原子百分比、大约2.0原子百分比或大约1.0原子百分比的上限的浓度的第二金属。从任何下限到任何上限的范围内第二金属的浓度属于本发明的范围。在另一个例子中,为了沉积第一籽层523,靶包括从铝、镁、钛、锆、锡及其组合构成的组中选择的金属。如果籽层通过化学气相沉积或原子层沉积来沉积,则如图1所示的处理室的处理室适于供给要沉积的金属或金属合金的合适的金属前体。The copper alloy seed layer 502, 512, first seed layer 523 or second seed layer 514, 524 may be deposited by techniques including physical vapor deposition, chemical vapor deposition, atomic layer deposition, electroless deposition, or a combination of these techniques . Typically, if physical vapor deposition techniques are used to deposit the seed layer, the process chamber, such as process chamber 412 as depicted in FIG. 4 , includes a target, such as target 414 , having a composition similar to the metal or metal alloy desired to be deposited. For example, to deposit copper alloy seed layers 502, 512, the target may include copper and a second metal, such as aluminum, magnesium, titanium, zirconium, tin, other metals, and combinations thereof. The second metal preferably comprises aluminum. In certain embodiments, the target includes a second concentration at a concentration having a lower limit of about 0.001 atomic percent, about 0.01 atomic percent, or about 0.1 atomic percent and an upper limit of about 5.0 atomic percent, about 2.0 atomic percent, or about 1.0 atomic percent. Metal. Concentrations of the second metal ranging from any lower limit to any upper limit are within the scope of the invention. In another example, for depositing the first seed layer 523, the target includes a metal selected from the group consisting of aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. If the seed layer is deposited by chemical vapor deposition or atomic layer deposition, a process chamber such as that shown in Figure 1 is suitable for supplying suitable metal precursors of the metal or metal alloy to be deposited.
在如图4所示的处理室的处理室中通过物理气相沉积来沉积籽层的一个示例性工艺包括使用要沉积的材料的靶。处理室可以保持在大约0.1毫托和大约10毫托之间的压力下。靶可以在大约5千瓦和大约100千瓦之间的功率下DC偏置。座可以在大约0和大约1000瓦的功率下RF偏置。座可以不被加热(即室温)。One exemplary process for depositing a seed layer by physical vapor deposition in a process chamber such as that shown in FIG. 4 involves using a target of the material to be deposited. The processing chamber can be maintained at a pressure of between about 0.1 mTorr and about 10 mTorr. The target may be DC biased at a power of between about 5 kilowatts and about 100 kilowatts. The socket can be RF biased at a power of about 0 and about 1000 watts. The seat may not be heated (ie room temperature).
铜导电材料层506、516、526可以通过电镀、物理气相沉积、化学气相沉积、无电沉积或这些技术的组合而沉积。优选地,由于在电镀工艺中可以获得自下而上的生长,铜导电材料层506、516、526通过电镀来沉积。在2000年9月5日发布、名称为“ElectroDepositionChemistry”的美国专利6,113,771中描述了一个示例性的电镀方法,并且在不与本发明矛盾的情形下通过引用结合在本文中。The layers of copper conductive material 506, 516, 526 may be deposited by electroplating, physical vapor deposition, chemical vapor deposition, electroless deposition, or a combination of these techniques. Preferably, the layers of copper conductive material 506, 516, 526 are deposited by electroplating, since bottom-up growth can be obtained in electroplating processes. An exemplary electroplating method is described in US Patent 6,113,771, entitled "ElectroDeposition Chemistry," issued September 5, 2000, and is incorporated herein by reference to the extent not inconsistent with the present invention.
已经观察到在与阻挡层上的非掺杂铜籽层相比时,如铜-铝籽层的铜合金籽层在阻挡层上具有改善的粘附性。由于铜合金籽层在阻挡层上具有良好的粘附性,铜合金籽层对于在其上沉积的材料用作良好的浸润剂。不希望受理论限制,相信铜和铜籽层中的其它金属的浓度提供具有良好浸润性能和良好电性质的籽层。进一步相信由于铜合金籽层对于其上材料的粘附性提供了改善的界面,可以使用具有小于一个单层的总厚度的铜合金籽层,只要如非掺杂籽层的第二籽层被沉积在上面以提供至少一个组合的连续籽层。Copper alloy seed layers such as copper-aluminum seed layers have been observed to have improved adhesion on barrier layers when compared to undoped copper seed layers on barrier layers. Due to the good adhesion of the copper alloy seed layer on the barrier layer, the copper alloy seed layer acts as a good wetting agent for the material deposited thereon. Without wishing to be bound by theory, it is believed that the concentration of copper and other metals in the copper seed layer provides a seed layer with good wetting properties and good electrical properties. It is further believed that since the copper alloy seed layer provides an improved interface for the adhesion of materials thereon, a copper alloy seed layer having a total thickness of less than one monolayer can be used as long as the second seed layer, such as the undoped seed layer, is deposited thereon to provide at least one combined continuous seed layer.
类似地,已经观察到在与阻挡层上的非掺杂籽层相比时,如铝籽层的金属籽层在阻挡层上提供了改善的粘附性。因为金属籽层在阻挡层上具有良好的粘附性,金属籽层对于其上沉积的材料用作良好的浸润剂。不希望受理论限制,相信由于金属层对于其上材料的粘附提供了改善的界面,如金属层上沉积的非掺杂铜籽层,可以使用具有小于一个单层的总厚度的如铝籽层的金属籽层。Similarly, metal seed layers such as aluminum seed layers have been observed to provide improved adhesion on barrier layers when compared to non-doped seed layers on barrier layers. Because the metal seed layer has good adhesion on the barrier layer, the metal seed layer acts as a good wetting agent for the material deposited thereon. Without wishing to be bound by theory, it is believed that since the metal layer provides an improved interface for adhesion of materials thereon, such as an undoped copper seed layer deposited on the metal layer, a seed layer such as aluminum having a total thickness of less than one monolayer can be used. Layer metal seed layer.
本文中公开的籽层在阻挡层上具有改善的粘附性,并且对于其上沉积的材料具有良好的浸润性。因此,通过在铜导电材料层沉积期间、在随后的高温处理期间、以及在器件使用时的热应力下减少团聚、反浸润或铜导电材料层中空洞的形成的可能性,籽晶层改善了器件的可靠性。The seed layers disclosed herein have improved adhesion on the barrier layer and good wettability for materials deposited thereon. Thus, the seed layer improves the potential for agglomeration, dewetting, or the formation of voids in the copper conductive material layer by reducing the possibility of agglomeration, dewetting, or the formation of voids in the copper conductive material layer during subsequent high temperature processing, and under thermal stress during device use. device reliability.
在一个方面,籽层可以和任何阻挡层一起使用,并且可以和通过任何技术沉积的阻挡层一起使用。籽层可以通过任何沉积技术来沉积。并且,可以通过任何沉积技术在籽层上沉积如铜导电材料层的导电材料层。In one aspect, the seed layer can be used with any barrier layer and can be used with barrier layers deposited by any technique. The seed layer can be deposited by any deposition technique. Also, a layer of conductive material, such as a layer of copper conductive material, may be deposited on the seed layer by any deposition technique.
本发明可以填充具有小于大约0.2微米开口宽度并且具有大于大约4∶1、大约6∶1或大约10∶1的长宽比的窗口的优点。The invention can take advantage of filling windows with opening widths less than about 0.2 microns and having aspect ratios greater than about 4:1, about 6:1, or about 10:1.
本文中公开的工艺可以在独立的处理室中进行,或者在具有多个处理室的多室处理系统中进行。图6是适于进行本文中公开的工艺的多室处理系统600的一个例子的示意性顶视图。该设备是一个ENDURATM系统,并可以从AppliedMaterials,Inc.,ofSantaClara,California购得。在1993年2月16日发布、名称为“StageVacuumWaferProcessingSystemandMethod”(Tepman等人)的美国专利5,186,718中公开了类似的多室处理系统,其中在不与本公开矛盾的情形下通过引用结合在本文中。系统600的具体实施方式用来说明本发明,不应用于限制本发明的范围。The processes disclosed herein can be performed in stand-alone processing chambers, or in multi-chamber processing systems having multiple processing chambers. FIG. 6 is a schematic top view of one example of a multi-chamber processing system 600 suitable for performing the processes disclosed herein. The device is an ENDURA(TM) system and is commercially available from Applied Materials, Inc., of Santa Clara, California. A similar multi-chamber processing system is disclosed in US Patent 5,186,718, issued February 16, 1993, entitled "Stage Vacuum Wafer Processing System and Method" (Tepman et al.), which is incorporated herein by reference to the extent that it does not contradict this disclosure. The specific implementation of the system 600 is used to illustrate the present invention, and should not be used to limit the scope of the present invention.
系统600通常包括加载闸室602、604,用于把衬底传送进和传送出系统600。典型地,由于该系统600处于真空下,加载闸室602、604可以将引入系统600的衬底“抽下去”。第一机械手610可以在加载闸室602、604、处理室612、614、传送室622、624和其它的室616、618之间传送衬底。第二机械手630可以在处理室632、634、636、638和传送室622、624之间传送衬底。如果对于将由系统600进行的特定工艺没有必要,可以从系统600中去除处理室612、614、632、634、636、638。System 600 generally includes load locks 602 , 604 for transferring substrates into and out of system 600 . Typically, the load locks 602, 604 can "pump down" a substrate introduced into the system 600 since the system 600 is under vacuum. The first robot 610 may transfer substrates between load lock chambers 602 , 604 , process chambers 612 , 614 , transfer chambers 622 , 624 and other chambers 616 , 618 . The second robot 630 may transfer substrates between the processing chambers 632 , 634 , 636 , 638 and the transfer chambers 622 , 624 . Process chambers 612 , 614 , 632 , 634 , 636 , 638 may be eliminated from system 600 if not necessary for a particular process to be performed by system 600 .
在一个实施方式中,系统600被设置使得处理室634适于沉积铜合金籽层502。例如,用于沉积铜合金籽层502的处理室634可以是一个物理气相沉积室、一个化学气相沉积室或一个原子层沉积室。系统600可以进一步设置成使得处理室632适于沉积阻挡层204,其中铜合金籽层502适于被沉积在阻挡层上。例如,用于沉积阻挡层204的处理室632可以是原子层沉积室、化学气相沉积室或物理气相沉积室。在一个特定实施方式中,处理室632可以是原子层沉积室,如图1所示的处理室,而处理室634可以是物理气相沉积室,如图4所示的处理室。In one embodiment, system 600 is configured such that process chamber 634 is suitable for depositing copper alloy seed layer 502 . For example, the processing chamber 634 used to deposit the copper alloy seed layer 502 may be a physical vapor deposition chamber, a chemical vapor deposition chamber, or an atomic layer deposition chamber. The system 600 can further be configured such that the processing chamber 632 is adapted to deposit the barrier layer 204, wherein the copper alloy seed layer 502 is adapted to be deposited on the barrier layer. For example, the processing chamber 632 used to deposit the barrier layer 204 may be an atomic layer deposition chamber, a chemical vapor deposition chamber, or a physical vapor deposition chamber. In a particular embodiment, processing chamber 632 may be an atomic layer deposition chamber, such as the processing chamber shown in FIG. 1 , and processing chamber 634 may be a physical vapor deposition chamber, such as the processing chamber shown in FIG. 4 .
在另一个实施方式中,系统600被设置使得处理室634适于沉积铜合金籽层512,并且使得处理室636适于在铜合金籽层512上沉积第二籽层514。例如,用于沉积铜合金籽层512的处理室634和/或用于沉积第二籽层的处理室636可以是物理气相沉积室、化学气相沉积室或原子层沉积室。系统600可以进一步被设置使得处理室632适于沉积阻挡层204,其中铜合金籽层512被沉积在阻挡层上。例如,用于沉积阻挡层204的处理室632可以是原子层沉积室、化学气相沉积室或物理气相沉积室。在一个特定实施方式中,处理室632可以是原子层沉积室,如图1所示的处理室,而处理室634、636可以是物理气相沉积室,如图4所示的处理室。In another embodiment, the system 600 is configured such that the processing chamber 634 is adapted to deposit the copper alloy seed layer 512 and the processing chamber 636 is adapted to deposit the second seed layer 514 on the copper alloy seed layer 512 . For example, the processing chamber 634 for depositing the copper alloy seed layer 512 and/or the processing chamber 636 for depositing the second seed layer may be a physical vapor deposition chamber, a chemical vapor deposition chamber, or an atomic layer deposition chamber. System 600 may further be configured such that process chamber 632 is adapted to deposit barrier layer 204, wherein copper alloy seed layer 512 is deposited on the barrier layer. For example, the processing chamber 632 used to deposit the barrier layer 204 may be an atomic layer deposition chamber, a chemical vapor deposition chamber, or a physical vapor deposition chamber. In a particular embodiment, processing chamber 632 may be an atomic layer deposition chamber, such as the processing chamber shown in FIG. 1 , and processing chambers 634 , 636 may be physical vapor deposition chambers, such as the processing chamber shown in FIG. 4 .
在另一个实施方式,系统600被设置使得处理室634适于沉积金属籽层523,并且使得处理室636适于在金属籽层523上沉积第二籽层。例如,用于沉积金属籽层523的处理室634和/或用于沉积第二籽层524的处理室636可以是物理气相沉积室、化学气相沉积室或原子层沉积室。该系统可以进一步被设置使得处理室632适于沉积阻挡层204,其中在阻挡层上沉积金属籽层523。例如,用于沉积阻挡层204的处理室632可以是原子层沉积室、化学气相沉积室或物理气相沉积室。在一个特定实施方式中,处理室632可以是原子层沉积室,如图1所示的处理室,而处理室634、636可以是物理气相沉积室,如图4所示的处理室。In another embodiment, system 600 is configured such that process chamber 634 is adapted to deposit metal seed layer 523 and such that process chamber 636 is adapted to deposit a second seed layer on metal seed layer 523 . For example, processing chamber 634 for depositing metal seed layer 523 and/or processing chamber 636 for depositing second seed layer 524 may be a physical vapor deposition chamber, a chemical vapor deposition chamber, or an atomic layer deposition chamber. The system can further be configured such that the process chamber 632 is adapted to deposit the barrier layer 204, with the metal seed layer 523 deposited on the barrier layer. For example, the processing chamber 632 used to deposit the barrier layer 204 may be an atomic layer deposition chamber, a chemical vapor deposition chamber, or a physical vapor deposition chamber. In a particular embodiment, processing chamber 632 may be an atomic layer deposition chamber, such as the processing chamber shown in FIG. 1 , and processing chambers 634 , 636 may be physical vapor deposition chambers, such as the processing chamber shown in FIG. 4 .
在一个方面,可以在真空下的多室处理系统中进行阻挡层204和籽层(如铜合金籽层502、铜合金籽层512和第二籽层514,或金属籽层523和第二籽层524)的沉积,以防止空气或其它的杂质进入各层中,并保持阻挡层204上的籽结构。In one aspect, barrier layer 204 and seed layers (such as copper alloy seed layer 502, copper alloy seed layer 512 and second seed layer 514, or metal seed layer 523 and second seed layer 523 and second seed layer 514) can be performed in a multi-chamber processing system under vacuum layer 524) to prevent air or other impurities from entering the layers and maintain the seed structure on the barrier layer 204.
处理室600的其它实施方式属于本发明的范围。例如,在系统上特定处理室的位置可以改变。在另一个例子中,单处理室可以适于沉积两个不同的层。Other embodiments of the processing chamber 600 are within the scope of the present invention. For example, the location of a particular process chamber on the system may change. In another example, a single processing chamber can be adapted to deposit two different layers.
实例example
实例1Example 1
通过原子层沉积在衬底上沉积TaN层,达到大约20埃的厚度。在TaN层上通过物理气相沉积沉积籽层,达到大约100埃的厚度。籽层包括以下组成中的任一个:1)采用含非掺杂铜的靶沉积的非掺杂铜,2)采用含铝浓度为大约2.0原子百分比的铜-铝靶沉积的含铝浓度大约2.0原子百分比的铜合金,3)采用含锡浓度为大约2.0原子百分比的铜-锡靶沉积的含锡浓度大约2.0原子百分比的铜合金,或4)采用含锆浓度为大约2.0原子百分比的铜-锆靶沉积的含锆浓度大约2.0原子百分比的铜合金。在氮(N2)和氢(H2)的环境中,所得的衬底在大约380℃下退火大约15分钟的一段时间。A TaN layer was deposited on the substrate by atomic layer deposition to a thickness of approximately 20 Angstroms. A seed layer was deposited by physical vapor deposition on the TaN layer to a thickness of about 100 Angstroms. The seed layer comprises any of the following compositions: 1) undoped copper deposited using a target containing undoped copper, 2) an aluminum concentration of about 2.0 atomic percent deposited using a copper-aluminum target having an aluminum concentration of about 2.0 atomic percent 3) a copper alloy having a tin concentration of about 2.0 atomic percent deposited using a copper-tin target having a tin concentration of about 2.0 atomic percent, or 4) using a copper-tin target having a zirconium concentration of about 2.0 atomic percent The zirconium target deposits a copper alloy containing a zirconium concentration of about 2.0 atomic percent. The resulting substrate was annealed at about 380° C. for a period of about 15 minutes in an ambient of nitrogen (N 2 ) and hydrogen (H 2 ).
扫描电子显微照片表现出在退火后非掺杂铜层的团聚。铜-锆合金表现出少于非掺杂铜的团聚。铜-锡合金表现出少于铜-锆合金的团聚。铜-铝合金表现出不明显的团聚。Scanning electron micrographs show agglomeration of the undoped copper layer after annealing. Copper-zirconium alloys exhibit less agglomeration than non-doped copper. Copper-tin alloys exhibit less agglomeration than copper-zirconium alloys. Copper-aluminum alloys show insignificant agglomeration.
实例2Example 2
采用含铝浓度大约2.0原子百分比的铜-铝靶,通过物理气相沉积将含大约2.0原子百分比的铝的铜-铝合金膜沉积在不同的衬底上。所得的衬底包括1)在ALDTaN层上沉积的厚度大约50埃的铜-铝层,2)在大约100埃的Ta层上沉积到大约50埃厚度的铜-铝层,3)在ALDTaN层上沉积到大约100埃厚度的铜-铝层,4)在氮化硅(SiN)层上沉积到大约100埃的厚度的铜-铝层,和5)在氧化硅层上沉积到大约100埃厚度的铜-铝层。在氮(N2)和氢(H2)的环境中,所得的衬底在大约380℃下退火大约15分钟的一段时间。扫描电子显微照片表现出在各种衬底上的铜-铝合金没有明显的团聚。Copper-aluminum alloy films containing about 2.0 atomic percent aluminum were deposited on different substrates by physical vapor deposition using a copper-aluminum target having an aluminum concentration of about 2.0 atomic percent. The resulting substrate included 1) a copper-aluminum layer deposited to a thickness of about 50 angstroms on an ALDTaN layer, 2) a copper-aluminum layer deposited to a thickness of about 50 angstroms on a layer of about 100 angstroms of Ta, 3) a layer of 4) a copper-aluminum layer deposited to a thickness of approximately 100 angstroms on a silicon nitride (SiN) layer, and 5) a layer of copper deposited to a thickness of approximately 100 angstroms on a silicon nitride (SiN) layer thick copper-aluminum layer. The resulting substrate was annealed at about 380° C. for a period of about 15 minutes in an ambient of nitrogen (N 2 ) and hydrogen (H 2 ). Scanning electron micrographs showed no apparent agglomeration of the copper-aluminum alloys on the various substrates.
实例3Example 3
采用含铝浓度大约2.0原子百分比的铜-铝合金靶,通过物理气相沉积将含铝浓度大约2.0原子百分比的铜-铝合金膜在ALDTaN层上沉积到50埃或100埃的厚度。在氮(N2)和氢(H2)的环境中,所得的衬底在大约380℃、大约450℃或大约500℃的温度下退火大约15分钟的一段时间。扫描电子显微照片表现出对于在大约380℃或大约450℃温度下退火的衬底铜-铝合金没有明显的团聚。对于在大约500℃的温度下退火的衬底铜-铝合金表现出开始发生某些反浸润。Using a copper-aluminum alloy target with an aluminum concentration of about 2.0 atomic percent, a copper-aluminum alloy film with an aluminum concentration of about 2.0 atomic percent is deposited on the ALDTaN layer to a thickness of 50 angstroms or 100 angstroms by physical vapor deposition. The resulting substrate is annealed at a temperature of about 380°C, about 450°C, or about 500°C for a period of about 15 minutes in an ambient of nitrogen ( N2 ) and hydrogen ( H2 ). Scanning electron micrographs show no apparent agglomeration of the copper-aluminum alloy for substrates annealed at temperatures of about 380°C or about 450°C. Copper-aluminum alloys show some dewetting onset for substrates annealed at temperatures around 500°C.
实例4Example 4
采用含铝浓度大约2.0原子百分比的铜-铝合金靶,通过物理气相沉积将含铝浓度大约2.0原子百分比的铜-铝合金膜在ALDTaN层上沉积到50埃或100埃的厚度。在氮(N2)和氢(H2)的环境中,所得的衬底在大约450℃的温度下退火大约30分钟的时间。扫描电子显微照片表现出对于在大约450℃温度下退火30分钟时间的衬底铜-铝合金没有明显的团聚。Using a copper-aluminum alloy target with an aluminum concentration of about 2.0 atomic percent, a copper-aluminum alloy film with an aluminum concentration of about 2.0 atomic percent is deposited on the ALDTaN layer to a thickness of 50 angstroms or 100 angstroms by physical vapor deposition. The resulting substrate was annealed at a temperature of about 450° C. for a period of about 30 minutes in an atmosphere of nitrogen (N 2 ) and hydrogen (H 2 ). Scanning electron micrographs showed no apparent agglomeration of the copper-aluminum alloy for the substrate annealed at a temperature of about 450°C for a period of 30 minutes.
尽管前述内容涉及本发明的优选实施方式,可以想到本发明的其它和进一步的实施方式,而不背离其基本范围,本发明的范围由权利要求书来限定。While the foregoing relates to a preferred embodiment of the invention, other and further embodiments of the invention are conceivable without departing from its essential scope, which is defined by the claims.
Claims (73)
Applications Claiming Priority (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/965,373 US6936906B2 (en) | 2001-09-26 | 2001-09-26 | Integration of barrier layer and seed layer |
| US09/965,373 | 2001-09-26 | ||
| US09/965,370 | 2001-09-26 | ||
| US09/965,369 | 2001-09-26 | ||
| US09/965,369 US20030057526A1 (en) | 2001-09-26 | 2001-09-26 | Integration of barrier layer and seed layer |
| US09/965,370 US20030059538A1 (en) | 2001-09-26 | 2001-09-26 | Integration of barrier layer and seed layer |
| CNA028213084A CN1575518A (en) | 2001-09-26 | 2002-09-09 | Integration of barrier and seed layers |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA028213084A Division CN1575518A (en) | 2001-09-26 | 2002-09-09 | Integration of barrier and seed layers |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102361004A CN102361004A (en) | 2012-02-22 |
| CN102361004B true CN102361004B (en) | 2016-02-10 |
Family
ID=27420751
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201110379185.8A Expired - Fee Related CN102361004B (en) | 2001-09-26 | 2002-09-09 | Barrier layer and seed layer integrated |
| CNA028213084A Pending CN1575518A (en) | 2001-09-26 | 2002-09-09 | Integration of barrier and seed layers |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA028213084A Pending CN1575518A (en) | 2001-09-26 | 2002-09-09 | Integration of barrier and seed layers |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP1433202A2 (en) |
| JP (1) | JP2005528776A (en) |
| KR (1) | KR20040045007A (en) |
| CN (2) | CN102361004B (en) |
| WO (1) | WO2003028090A2 (en) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7049226B2 (en) | 2001-09-26 | 2006-05-23 | Applied Materials, Inc. | Integration of ALD tantalum nitride for copper metallization |
| WO2004106584A1 (en) * | 2003-05-27 | 2004-12-09 | Applied Materials, Inc. | Method and apparatus for generating a precursor for a semiconductor processing system |
| US7186385B2 (en) | 2002-07-17 | 2007-03-06 | Applied Materials, Inc. | Apparatus for providing gas to a processing chamber |
| KR100968312B1 (en) * | 2004-06-02 | 2010-07-08 | 인터내셔널 비지네스 머신즈 코포레이션 | PE-ALD in the TA diffusion barrier region on low-k materials |
| JP4896850B2 (en) * | 2006-11-28 | 2012-03-14 | 株式会社神戸製鋼所 | Cu wiring of semiconductor device and manufacturing method thereof |
| WO2009031886A2 (en) * | 2007-09-07 | 2009-03-12 | Fujifilm Manufacturing Europe B.V. | Method and apparatus for atomic layer deposition using an atmospheric pressure glow discharge plasma |
| JP5135002B2 (en) * | 2008-02-28 | 2013-01-30 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
| JP2010087094A (en) * | 2008-09-30 | 2010-04-15 | Nec Electronics Corp | Semiconductor device and method for manufacturing semiconductor device |
| CN101937864B (en) * | 2009-07-03 | 2012-03-07 | 中芯国际集成电路制造(上海)有限公司 | Filling method of contact hole |
| JP5718342B2 (en) | 2009-10-16 | 2015-05-13 | エンパイア テクノロジー ディベロップメント エルエルシー | Apparatus and method for applying a film to a semiconductor wafer and method for processing a semiconductor wafer |
| KR101139696B1 (en) * | 2010-04-20 | 2012-05-02 | 엘아이지에이디피 주식회사 | Chemical Vapor Deposition Equipment |
| JP2012060015A (en) * | 2010-09-10 | 2012-03-22 | Hitachi Cable Ltd | Cu ALLOY SPUTTERING TARGET MATERIAL FOR ELECTRONIC DEVICE WIRING, AND ELEMENT STRUCTURE |
| KR101357171B1 (en) * | 2010-11-12 | 2014-01-29 | 엘아이지에이디피 주식회사 | Chemical vapor deposition device |
| JP2012151417A (en) * | 2011-01-21 | 2012-08-09 | Japan Display Central Co Ltd | Thin-film transistor circuit substrate and method of manufacturing the same |
| CN102790009B (en) * | 2011-05-16 | 2015-04-29 | 中芯国际集成电路制造(上海)有限公司 | Method for reducing fringe effect in copper plating process and manufacturing method of copper interconnection structure |
| US8729702B1 (en) * | 2012-11-20 | 2014-05-20 | Stmicroelectronics, Inc. | Copper seed layer for an interconnect structure having a doping concentration level gradient |
| JP6013901B2 (en) * | 2012-12-20 | 2016-10-25 | 東京エレクトロン株式会社 | Method for forming Cu wiring |
| US8981564B2 (en) * | 2013-05-20 | 2015-03-17 | Invensas Corporation | Metal PVD-free conducting structures |
| CN105845620A (en) * | 2015-01-16 | 2016-08-10 | 中芯国际集成电路制造(上海)有限公司 | Method of making copper interconnection structure, semiconductor device and electronic apparatus |
| JP6527030B2 (en) | 2015-06-19 | 2019-06-05 | 東京エレクトロン株式会社 | Plating method, plating part and plating system |
| US9859157B1 (en) | 2016-07-14 | 2018-01-02 | International Business Machines Corporation | Method for forming improved liner layer and semiconductor device including the same |
| JP6771613B2 (en) * | 2019-05-09 | 2020-10-21 | 東京エレクトロン株式会社 | Plating method, plating parts, and plating system |
| CN114156229B (en) * | 2020-09-07 | 2025-08-19 | 中芯国际集成电路制造(上海)有限公司 | Semiconductor device and method of forming the same |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5913147A (en) * | 1997-01-21 | 1999-06-15 | Advanced Micro Devices, Inc. | Method for fabricating copper-aluminum metallization |
| CN1233856A (en) * | 1998-04-27 | 1999-11-03 | 国际商业机器公司 | Copper interconnection structure incorporating metal seed layer |
| US6242808B1 (en) * | 1998-04-09 | 2001-06-05 | Fujitsu Limited | Semiconductor device with copper wiring and semiconductor device manufacturing method |
| US6251759B1 (en) * | 1998-10-03 | 2001-06-26 | Applied Materials, Inc. | Method and apparatus for depositing material upon a semiconductor wafer using a transition chamber of a multiple chamber semiconductor wafer processing system |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010001543A (en) * | 1999-06-05 | 2001-01-05 | 김기범 | Method of Fabricating Semiconductor Device Employing Copper Interconnect Structure |
| US6391785B1 (en) * | 1999-08-24 | 2002-05-21 | Interuniversitair Microelektronica Centrum (Imec) | Method for bottomless deposition of barrier layers in integrated circuit metallization schemes |
| JP4817210B2 (en) * | 2000-01-06 | 2011-11-16 | 東京エレクトロン株式会社 | Film forming apparatus and film forming method |
-
2002
- 2002-09-09 JP JP2003531517A patent/JP2005528776A/en active Pending
- 2002-09-09 KR KR10-2004-7004515A patent/KR20040045007A/en not_active Withdrawn
- 2002-09-09 CN CN201110379185.8A patent/CN102361004B/en not_active Expired - Fee Related
- 2002-09-09 EP EP02757668A patent/EP1433202A2/en not_active Withdrawn
- 2002-09-09 WO PCT/US2002/028715 patent/WO2003028090A2/en not_active Ceased
- 2002-09-09 CN CNA028213084A patent/CN1575518A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5913147A (en) * | 1997-01-21 | 1999-06-15 | Advanced Micro Devices, Inc. | Method for fabricating copper-aluminum metallization |
| US6242808B1 (en) * | 1998-04-09 | 2001-06-05 | Fujitsu Limited | Semiconductor device with copper wiring and semiconductor device manufacturing method |
| CN1233856A (en) * | 1998-04-27 | 1999-11-03 | 国际商业机器公司 | Copper interconnection structure incorporating metal seed layer |
| US6251759B1 (en) * | 1998-10-03 | 2001-06-26 | Applied Materials, Inc. | Method and apparatus for depositing material upon a semiconductor wafer using a transition chamber of a multiple chamber semiconductor wafer processing system |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1433202A2 (en) | 2004-06-30 |
| CN1575518A (en) | 2005-02-02 |
| WO2003028090A3 (en) | 2003-09-12 |
| WO2003028090A2 (en) | 2003-04-03 |
| CN102361004A (en) | 2012-02-22 |
| JP2005528776A (en) | 2005-09-22 |
| KR20040045007A (en) | 2004-05-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7352048B2 (en) | Integration of barrier layer and seed layer | |
| CN102361004B (en) | Barrier layer and seed layer integrated | |
| US20030059538A1 (en) | Integration of barrier layer and seed layer | |
| US20030057526A1 (en) | Integration of barrier layer and seed layer | |
| US7244683B2 (en) | Integration of ALD/CVD barriers with porous low k materials | |
| US7262133B2 (en) | Enhancement of copper line reliability using thin ALD tan film to cap the copper line | |
| US8324095B2 (en) | Integration of ALD tantalum nitride for copper metallization | |
| US20070099415A1 (en) | Integration process of tungsten atomic layer deposition for metallization application | |
| US8114789B2 (en) | Formation of a tantalum-nitride layer | |
| EP1094504A2 (en) | PVD-IMP tungsten and tungsten nitride as a liner, barrier, and/or seed layer | |
| US20210159118A1 (en) | Doping Control of Metal Nitride Films | |
| TWI385730B (en) | Method for manufacturing barrier layer having varying composition for copper metallization | |
| JP2005505925A (en) | Material layer deposition | |
| JP2004531053A (en) | High resistance barrier atomic thin layers in copper vias | |
| JP2005528808A (en) | Copper film deposition | |
| TWI223867B (en) | Method for forming a metal interconnect on a substrate | |
| JP2007502551A (en) | Integration of ALD tantalum nitride for copper metallization | |
| US6423201B1 (en) | Method of improving the adhesion of copper | |
| KR100504269B1 (en) | IMPROVED PECVD AND CVD PROCESSES FOR WNx DEPOSITION |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C53 | Correction of patent of invention or patent application | ||
| CB02 | Change of applicant information |
Address after: American California Applicant after: APPLIED MATERIALS, Inc. Address before: American California Applicant before: Applied Materials, Inc. |
|
| COR | Change of bibliographic data |
Free format text: CORRECT: APPLICANT; FROM: APPLIED MATERIALS, INC. TO: APPLIED MATERIALS INC. |
|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160210 Termination date: 20210909 |