CN102347695A - Series resonant converter - Google Patents

Abstract

The present invention provides a high-efficiency series resonant converter that can reduce switching losses while improving efficiency by adding an extra capacitor to the secondary winding of the transformer to quickly increase the resonant current of the primary winding of the transformer when the switching unit is turned on. The series resonant converter can satisfy the zero-voltage and zero-current switching conditions when the switching unit is turned on, and the zero-voltage switching condition when the switching unit is turned off, thereby greatly reducing switching losses. Furthermore, it is possible to improve the converter efficiency by rapidly increasing the resonant current while charging the secondary capacitor on the secondary winding.

Description

High Efficiency Series Resonant Converter

technical field

The present invention relates to series resonant converters, and more particularly to high efficiency series resonant converters that provide reduced switching losses and increased efficiency by improving the resonant current waveform.

Background technique

A DC-DC converter is an electronic circuit used to convert a direct current (DC) source from one voltage level to another. Generally, a DC-DC converter converts a DC voltage into an Alternating Current (AC) voltage, steps up or down the AC voltage through a transformer, and converts the boosted or down AC voltage into a DC voltage.

A series resonant converter (SRC) is an example of a DC-DC converter.

FIG. 1 is a circuit diagram of a conventional SRC. This SRC uses the resonance generated by the inductor Lr and the capacitor Cr, and exhibits good conversion efficiency.

Referring to FIG. 1 , the SRC includes a switching unit 20 , an LC resonance circuit 30 , a transformer TX, a bridge rectifier 40 , and a gate driver 51 . The switch unit 20 includes a plurality of switches S1-S4 to change the DC voltage from the input voltage source 10 into an AC voltage through an AC DC voltage. The LC resonance circuit 30 is connected to the switching unit 20, and includes a resonance inductor Lr and a resonance capacitor Cr connected in series to each other. The LC resonance circuit 30 changes the frequency characteristics of the AC voltage from the switching unit 20 using the resonance generated by the resonance inductor Lr and the resonance capacitor Cr. The transformer TX converts the primary voltage, that is, the AC voltage from the LC resonance circuit 30 into a secondary voltage. Bridge rectifier 40 converts the secondary AC voltage to DC voltage. The gate driver 51 controls the switching unit 20 to control the amplitude and shape of the load current.

The SRC also includes a capacitor C ₀ that filters the DC voltage from the bridge rectifier 40 and applies the filtered DC voltage to the load 60 .

SRC is a full-bridge pulse-width modulation (PWM) implemented using four semiconductor switches S1-S4, such as insulated-gate bipolar transistors (IGBTs) or metal-oxide-semiconductor field-effect transistors (MOSFETs), interconnected in a full-bridge configuration. converter. Switches S1-S4 are connected in parallel to anti-parallel diodes D1-D4, and in parallel with snubber capacitors CS1-CS4.

The switch unit 20 converts a DC voltage into an AC voltage by synchronously turning on or off a pair of switches S1 and S4 or another pair of switches S2 and S3 under the control of the gate driver 51 . The AC voltage is transmitted to the secondary winding TX2 of the transformer TX through the LC resonance circuit 30 .

The LC resonant circuit 30 includes a resonant inductor Lr and a resonant capacitor Cr connected in series to the primary winding TX1 of the transformer TX between the contact node of the switches S1 and S2 and the other contact node of the switches S3 and S4. The LC resonance circuit 30 stores energy in the resonance inductor Lr and the resonance capacitor Cr and outputs energy.

The transformer TX outputs energy from the LC resonance circuit 30 through the secondary winding TX2. The induced voltage in the secondary winding TX2 is determined by the ratio of the number of turns in the secondary winding TX2 to the number of turns in the primary winding TX1.

A bridge rectifier 40 including four rectification diodes RD1-RD4 converts the induced AC voltage output from the secondary winding TX2 into a DC voltage. This DC voltage is filtered by capacitor C ₀ and then output to load 60 .

The gate driver 51 turns the switches S1-S4 on and off during driving of the SRC and during the power conversion process. The gate driver 51 receives a pulsed voltage signal as input and generates drive signals, ie gate signals, to turn the switches S1-S4 on and off.

During switching operation of the semiconductor switches S1-S4, the voltage and current vary with predetermined delays and gradients in each switch. Thus, when the switches S1-S4 are turned on or off, there may be segments where voltage and current may be applied to the switches synchronously, ie, segments where the voltage and current partially overlap. In this section, switching loss corresponding to the product V×I of voltage and current may occur.

For example, when an IGBT is turned off, tail current can continue to flow after the voltage is fully applied across the IGBT, causing severe switching losses.

Switching losses reduce the efficiency of the converter and cause the switches to heat up. Furthermore, switching losses increase in proportion to the switching frequency of the switch, thereby limiting the maximum switching frequency of the switch.

In order to reduce switching losses, various switching mechanisms such as zero voltage switching (ZVS), zero current switching (ZCS), and zero voltage zero current (ZVZCS) have been proposed.

In order to realize ZVS, ZCS and ZVZCS to reduce switching loss, as shown in FIG. 1 , a load resonant converter is provided which uses LC resonance by connecting an inductor Lr and a capacitor Cr to the primary winding TX1 of the transformer TX. LC resonance allows the converter to generate voltage and current waveforms that satisfy the zero voltage and zero current conditions. In addition, the LC resonance circuit can allow the load voltage and load current to oscillate, thereby realizing ZVS, ZVC or ZVZCS.

Fig. 2 is a graph depicting the characteristics of the resonant current i _L depending on the switching frequency fs in the load resonant converter. The switching operation of a load resonant converter can be classified into two modes, discontinuous conduction mode (DCM) and continuous conduction mode (CCM), depending on the switching frequency. In DCM, the switching operation is performed in a section where the switching frequency fs is lower than the resonance frequency fr of the inductor and capacitor. In CCM, switching operation is performed in a section where the switching frequency fs is higher than the resonance frequency fr.

Figures 3a and 3b are graphs depicting typical voltage and current waveforms resulting from LC resonance in a conventional load resonant converter (half bridge configuration shown for convenience). Figure 3a shows the resonance waveform in DCM, while Figure 3b shows the resonance waveform in CCM. Current i _L indicates the inductor current and voltage v _C indicates the capacitor voltage.

Referring to Fig. 3a, during one period in which the switching frequency fs in DCM is lower than the resonant frequency fr, when a pair of switches of the full bridge structure is turned on to allow current to flow, current builds up in the inductor Lr. The accumulated electrical energy is transferred to the capacitor Cr, thereby increasing the capacitor voltage v _C . After the energy accumulated in the inductor Lr is completely dissipated, the polarity of the capacitor is reversed, causing the current i _L to flow in the opposite direction. Then a pair of switches are turned off. Therefore, a discontinuous section occurs in which no current flows.

In this discontinuous segment, voltage v _C and current i _L are applied in opposite directions when the other pair of switches is turned on. Accordingly, since there is a discontinuous section in which current flows discontinuously, zero-current turn-on switching can be performed.

Referring to Figure 3b, during one cycle in CCM where the switching frequency fs is higher than the resonant frequency fr, the inductor current i _L increases when a pair of switches are turned on, and then the capacitor voltage _v increases when the inductor current i _L decrease. Current no longer flows when a pair of switches is turned off. When the other pair of switches is on (ie, zero current turns on the switches), the voltage is applied in the opposite direction. As a result, current is applied in the opposite direction when the voltage starts to drop. In this way, one switching cycle is completed. That is, current flows continuously during one cycle.

In both modes, the output current is controlled by pulse frequency modulation (PFM). In DCM, higher frequencies cause an increase in output current. In CCM, a lower frequency causes an increase in the resonant current, thereby increasing the output load current after full-wave rectification.

In CCM, when the resonance current i _L increases sharply when the switch is turned on to impart a waveform close to a square wave to the resonance current under the same frequency operation condition, the resonance current may have an increased effective value. As a result, the converter can exhibit improved efficiency.

Therefore, there is a need for techniques for quickly increasing the resonant current i _L in CCM to obtain a converter with improved efficiency.

Contents of the invention

The present invention is conceived to solve the problems of the prior art described above, and an aspect of the present invention provides a high-efficiency series resonant converter capable of reducing switching loss and improving efficiency by improving the resonance current waveform in switching operation in continuous conduction mode.

According to an aspect of the present invention, a high-efficiency series resonant converter includes: a switching unit including a plurality of switches for converting a direct current (DC) voltage into an alternating current (AC) voltage by an alternating direct current voltage; an LC resonant circuit comprising a series a resonant inductor and a resonant capacitor connected, connected to the switching unit, and converting frequency characteristics of an AC voltage transmitted from the switching unit using resonance generated by the resonant inductor and the resonant capacitor; a transformer including a primary winding and a secondary winding, the The primary winding is connected to the LC resonant circuit, and the induced voltage in the secondary winding is proportional to the ratio of the number of turns in the secondary winding to the number of turns in the primary winding; the secondary capacitor, which is connected to the secondary of the transformer winding and connected in parallel with the transformer; a full-bridge rectifier including multiple rectifying diodes to convert the AC voltage induced in the secondary winding to DC voltage; and a gate driver that detects the conduction of the anti-parallel diodes connected to the switch , and output a conduction gating signal to turn on the switch when the antiparallel diode is conducting.

The secondary capacitor may have a smaller capacitance than the resonant capacitor.

The secondary capacitor may have a lower impedance than the circuit consisting of the rectifying diode and the load, and charging the secondary capacitor with the load current induced in the secondary winding may cause the resonant current of the LC resonant circuit to increase rapidly.

The gate driver may include: a first resistor connected to an input terminal to which a pulse voltage signal is input; a capacitor connected in parallel to the first resistor at the input terminal and charged with the turn-on pulse voltage applied through the input terminal; including a source , gate and drain of the semiconductor switch, the source, gate and drain are respectively connected to the input terminal, the output node of the capacitor and the gate node connected to the output terminal of the switch of the switching unit; at the drain and output of the semiconductor switch a third resistor connected between the gate node of the terminal; and a fourth resistor connected to the input terminal through the first resistor and capacitor to form a conduction path.

The second resistor may have a greater resistance than the fourth resistor.

Brief description of the drawings

The above and other aspects, features and advantages of the present invention will become apparent from the following description of exemplary embodiments given in conjunction with the accompanying drawings, in which:

Figure 1 is a circuit diagram of a conventional series resonant converter;

2 is a graph depicting a resonant current characteristic depending on a switching frequency in a load resonant converter;

Figures 3a and 3b are graphs depicting typical voltage and current waveforms caused by LC resonance in a conventional load resonant converter;

4 is a circuit diagram of a series resonant converter according to an exemplary embodiment of the present invention;

5 is a graph depicting voltage and current waveforms for continuous conduction mode in a series resonant converter according to an exemplary embodiment of the present invention;

6 is a comparative graph depicting voltage and current waveforms for continuous conduction mode in an exemplary series resonant converter and a conventional series resonant converter;

7-14 are circuit diagrams illustrating operations in various modes in a series resonant converter according to an exemplary embodiment of the present invention;

15 is a circuit diagram of a gate driver of a series resonant converter according to an exemplary embodiment of the present invention;

Fig. 16 shows the pulse voltage signal as the input signal to the gate driver shown in Fig. 15;

FIG. 17 shows a gate signal as an output signal from the gate driver shown in FIG. 15;

18 is a graph depicting resonant current and gating signal versus time for an exemplary series resonant converter; and

19-22 are circuit diagrams illustrating operations of respective modes in a gate driver according to an exemplary embodiment of the present invention.

Detailed ways

Exemplary embodiments of the invention will now be described in detail with reference to the accompanying drawings.

The present invention provides a series resonant converter capable of reducing switching loss while improving efficiency by improving the resonance current waveform. More specifically, a series resonant converter according to an exemplary embodiment of the present invention may reduce switching loss and improve efficiency by improving a resonant current waveform in switching operation in continuous conduction mode through a capacitor added to a secondary winding of a transformer.

FIG. 4 is a circuit diagram of a series resonant converter (SRC) according to an exemplary embodiment of the present invention.

Referring to FIG. 4 , the SRC includes a switching unit 20 , an LC resonance circuit 30 , a transformer TX, a capacitor C2 , a bridge rectifier 40 , and a gate driver 51 . The switching unit 20 includes a plurality of switches S1-S4 for converting a direct current (DC) voltage from an input voltage source 10 into an alternating current (AC) voltage by an alternating direct current voltage. The LC resonance circuit 30 uses LC resonance to transform the frequency characteristics of the AC voltage from the switching unit 20 . The transformer TX converts the primary voltage, that is, the AC voltage from the LC resonance circuit 30 into a secondary voltage. Capacitor C2 is connected to secondary winding TX2 of transformer TX and is connected in parallel with transformer TX. The bridge rectifier 40 converts the AC voltage induced in the secondary winding TX2 of the transformer TX into a DC voltage. The gate driver 51 controls the switching unit 20 to control the amplitude and shape of the load current.

This SRC has a structure similar to that of a conventional SRC. That is, the switching unit 20 includes four semiconductor switches S1-S4 such as IGBTs or MOSFETs connected in a full bridge structure; anti-parallel diodes D1-D4 are connected in parallel to the switches S1-S4; and snubber capacitors CS1-CS4 are connected in parallel to the diodes D1-D4.

Furthermore, the SRC is implemented in a structure similar to that of a conventional SRC. That is, a pair of switches S1 and S4 or another pair of switches S2 and S3 in the switch unit 20 are synchronously turned on or off under the drive signal (strobe signal) of the gate driver 51 to convert the DC voltage into an AC voltage, And the AC voltage is transmitted to the primary winding TX1 of the transformer TX through the LC resonant circuit 30; the LC resonant circuit 30 includes a resonant inductor Lr and a resonant capacitor Cr, at the contact node of the switches S1 and S2 and the other contact node of the switches S3 and S4 They are connected in series to the primary winding TX1 of the transformer TX to reduce the switching loss; the transformer TX converts the primary voltage into the secondary voltage across the secondary winding TX2 of the transformer TX; the bridge rectifier 40 including rectifier diodes RD1-RD4 converts the secondary The induced AC voltage across the secondary winding TX2 is converted into a DC voltage; and the rectified DC voltage is filtered by the capacitor C ₀ and then output to the load 60 .

In this embodiment, however, the SRC also comprises a further capacitor C2 connected in parallel across the secondary winding TX2 to the transformer TX. The secondary capacitor C2 allows the SRC to generate an improved resonant current waveform, thereby reducing switching losses while improving the efficiency of the SRC.

For the operation of each mode described below, the secondary capacitor C2 has a smaller capacitance than the resonance capacitor Cr. For example, the secondary capacitor C2 may have a capacitance (eg, 0.3 μF) of 1/20˜1/5 of that of the resonant capacitor Cr (eg, 3 μF).

The added secondary capacitor C2 can make the SCR have a lower impedance than the combination of rectifier diodes RD1 - RD4 and load 60 .

The operation in each mode of the SRC including the secondary capacitor C2 will be described with reference to the drawings.

5 is a graph depicting voltage Vc and current _IL waveforms in a continuous conduction mode (CCM) in an SRC according to an exemplary embodiment of the present invention. 6 is a comparative graph depicting voltage Vc and current _IL waveforms of CCM in an exemplary SRC and a conventional SRC.

Referring to Fig. 5, I _L represents the resonant inductor current, V _C represents the resonant capacitor voltage, the initial point of mode 1 indicates the moment when a pair of switches S1 and S4 in the full-bridge switches S1-S4 are turned on, and _t2 indicates the pair of switches The moment when S1 and S4 are turned off, _t4 indicates the moment when the other pair of switches S2 and S3 is turned on, and _t7 indicates the moment when the pair of switches S2 and S3 is turned off.

7-14 are circuit diagrams illustrating the operation of the SRC in various modes.

Mode 1: Switches S1 and S4 are turned on and the secondary capacitor is charged (see Figure 5 for Mode 1 and Figure 7)

When the switches S1 and S4 are turned on, the resonance current from the input voltage source 10 flows through the switch S1, the resonance inductor Lr, the primary winding TX1 of the transformer TX, the resonance capacitor Cr, and the switch S4. The resonance current, that is, the inductor current _IL flows as shown in Mode 1, while the capacitor voltage _Vc rises. The load current on the secondary winding TX2 induced from the primary winding TX1 charges a secondary capacitor C2 of low capacitance connected in parallel to the transformer TX. The addition of capacitor C2 makes the SRC have a lower impedance than the combination of rectifier diodes RD1 - RD4 and load 60 . In addition, the secondary capacitor C2 makes the resonant current, that is, the induced current _IL , increase rapidly, as shown in FIG. 5 and FIG. 6 .

Mode 2: Apply current to the load (refer to Mode 2 in Figure 5 and Figure 8)

When the secondary capacitor C2 is fully charged with the load current on the secondary winding TX2 in mode 1 and becomes equal to the voltage across the secondary winding TX2, the load current flows to the load 60 through the rectifier diodes RD1 and RD4.

Mode 3: Switches S1 and S4 are off and the current freewheels (refer to Mode 3 and Figure 9 in Figure 5)

When switches S1 and S4 are turned off in mode 2 by removing the strobe signal, the voltage across each of switches S1 and S4 rises slowly due to snubber capacitors CS1 and CS4, and the voltage across switches S2 and S3 connected in parallel in the previous mode The charged snubber capacitors CS2 and CS3 are discharged. The snubber capacitors CS1 and CS4 are charged with the inductor current I _L flowing through the resonant inductor Lr, and at the same time freewheel the inductor current I _L . In mode 3, snubber capacitors CS2 and CS3 are discharged, and snubber capacitors CS1 and CS4 are charged at the same time. When the voltage across snubber capacitors CS1 and CS4 becomes equal to voltage source Vdc, snubber capacitors CS2 and CS3 are fully discharged, causing switches S1 and S4 to turn off. The energy accumulated in the resonant inductor Lr and resonant capacitor Cr allows the load current to continue to flow to the load 60 .

Mode 4: Conduction of anti-parallel diodes D2 and D3 (refer to Mode 4 of Figure 5 and Figure 10)

Since switches S1 and S4 are off in mode 3, the freewheeling current flowing through resonant inductor Lr flows through anti-parallel diodes D2 and D3 connected to switches S2 and S3, and thus decreases sharply through the voltage source. The voltage across switches S2 and S3 then approaches zero. Correspondingly, in the zero voltage segment in which the current freewheels through the antiparallel diodes D2 and D3, i.e. in the zero voltage segment in which the antiparallel diodes D2 and D3 are switched on or forward biased, application of the gating signal allows switches S2 and Zero voltage switching of S3.

Mode 5: On-switching with zero voltage and zero current for switches S2 and S3 (refer to the model Equation 5 and Figure 11)

In mode 3 the freewheeling current through the anti-parallel diodes D2 and D3 is drastically reduced to zero by the voltage source. The voltage source then allows current to flow in the reverse direction, and the resonant current IL flowing through the switches S2 and S3 to the resonant inductor _Lr flows in the reverse direction. The secondary capacitor C2 charged in Mode 1 and Mode 2 is rapidly discharged. The load current on the secondary winding TX2 induced by the primary current flowing through the primary winding TX1 in the opposite direction to the current in mode 1 flows through the secondary capacitor C2 in the opposite direction to the current in mode 1 . Correspondingly, the secondary capacitor C2 is recharged by the load current, causing a rapid increase in the resonant current, ie, the inductor current _IL , as shown in FIGS. 5 and 6 . That is, the conduction gating signal is applied when antiparallel diodes D2 and D3 are conducting (ie, the voltage across the switches is zero), and switches S2 and S3 are switched in a zero current state when the polarity of the current changes. As a result, zero voltage and zero current switching conditions are achieved, thereby minimizing switching losses.

Mode 6: Apply current to the load (refer to Mode 6 of Figure 5 and Figure 12)

Mode 6 is the same as Mode 2 except that the inductor current I _L flows in the opposite direction through the resonant inductor Lr and the resonant capacitor Cr when the switches S2 and S3 are turned on. When the secondary capacitor C2 is fully charged by the load current on the secondary winding TX2 and the voltage is equal to the secondary voltage on the secondary winding TX2, the load current flows to the load 60 through the rectifier diodes RD2 and RD3.

Mode 7: Switches S2 and S3 are off and the current freewheels (refer to Mode 7 and Figure 13 in Figure 5)

Mode 7 is the same as Mode 3 except that the inductor current I _L flows in the opposite direction through the resonant inductor Lr and resonant capacitor Cr and switches S2 and S3 are turned off. Specifically, in mode 7, the voltage across switches S2 and S3 is slowly increased through snubber capacitors CS2 and CS3, and snubber capacitors CS1 and CS4, which had been charged in the previous mode, are discharged. At this time, the inductor current flowing through the resonant inductor Lr charges the snubber capacitors CS2 and CS3 and is freewheeled. When the voltage across snubber capacitors CS2 and CS3 becomes equal to voltage source Vdc, snubber capacitors CS1 and CS4 are fully discharged and switches S2 and S3 are turned off. The energy accumulated in the resonant inductor Lr and resonant capacitor Cr allows the load current to continue to flow to the load 60 .

Mode 8: Conduction of anti-parallel diodes D1 and D4 (refer to Mode 8 and Figure 14 of Figure 5)

Mode 8 is the same as Mode 4 except that the inductor current I _L flows in the opposite direction through the resonant inductor Lr and resonant capacitor Cr and the anti-parallel diodes D1 and D4 connected to the switches S1 and S4 conduct.

Eight modes have been described during one switching cycle. After Mode 8, the polarity of the inductor current I _L is changed, and Mode 1 (refer to FIG. 7 ) is repeated in which switches S1 and S4 are turned on and secondary capacitor C2 is charged. After pattern 1, pattern 2 to pattern 8 are also repeated.

When mode 1 is resumed after mode 8, the turn-on gating signal is applied when anti-parallel diodes D1 and D4 are conducting (ie, when the voltage across switches S1 and S4 is zero). Switches S1 and S4 are switched in a zero current state when the polarity of the current changes. Therefore, zero voltage and zero current switching conditions are satisfied, thereby minimizing switching losses.

Thus, since the secondary capacitor C2 smaller than the capacitance of the resonance capacitor Cr in the LC resonance circuit unit 30 is added to the secondary winding TX2 of the transformer TX, current flows through the secondary capacitor C2 instead of the load 60 in the initial stage. And the resonant current I _L on the primary winding TX1 increases rapidly, thereby generating a trapezoidal current waveform, as shown in FIG. 5 . Accordingly, as shown in FIG. 6, at the same frequency, the resonant current I _L may have a larger effective value than the conventional resonant current having a sinusoidal waveform.

In other words, as shown in Figure 6, because the SRC allows the resonant current to increase faster than a conventional SRC, the effective value of the resonant current increases at the same switching frequency by the amount ('A+C-B') of the shaded area, given by This improves efficiency.

The increased inductor energy of area 'C' allows snubber capacitors CS1-CS4 to have a capacitance 10 times that of conventional capacitors, thereby achieving a zero voltage turn-off condition.

Accordingly, it is possible to improve the efficiency of the SRC since a larger effective current value is available at the same frequency. In addition, it is possible to reduce the conduction loss by reducing the maximum value of the resonance current I _L under the same load current condition.

In addition, the rapidly increasing inductor current I _L through the secondary capacitor C2 allows the energy stored in the inductor Lr to increase. Therefore, it is possible to significantly increase the capacitance of the snubber capacitors CS1-CS4 connected across the switches S1-S4, thereby reducing switching losses when the switches S1-S4 are turned off.

Accordingly, zero-voltage switching for maintaining the voltage across each of the switches S1-S4 at zero when the switches S1-S4 are turned on is performed, thereby reducing switching loss.

In a conventional SRC, since the switches S1-S4 are turned on under zero voltage and zero current conditions, and the switches S1-S4 are not turned off under zero voltage and zero current conditions, switching losses occur. However, in an exemplary SRC, switches S1-S4 are turned off and turned on under zero voltage conditions.

On the other hand, when the anti-parallel diodes D1-D4 are turned on, it is not easy to turn on the switches S1-S4 accurately so that the conditions of zero current and zero voltage of the switches S1-S4 can be satisfied.

In applications with a wide load range, it is difficult to estimate when the turn-on gating signal is applied because the period between the respective turn-off of the switches S1-S4 and the turn-on of the respective diodes D1-D4 varies depending on the load conditions.

In one embodiment, the gate driver automatically applies the turn-on gating signal when the diodes D1-D4 conduct when the voltage across the switches S1-S4 approaches zero.

The gate drivers allow zero voltage and zero current turn-on switching over a wide operating range and also provide dead time compensation for stable operation.

FIG. 15 is a circuit diagram of a gate driver in an SRC according to an exemplary embodiment of the present invention.

Referring to FIG. 15, the gate driver 51 includes a first resistor R11, a capacitor C11, a semiconductor switch, a second resistor R12, a third resistor R13, and a fourth resistor R14. The first resistor R11 is connected to the input terminal 52 to which the pulse voltage signal is input. The capacitor C11 is connected in parallel to the first resistor R11 at the input terminal 52 and is charged with the turn-on pulse voltage applied through the input terminals 52 and 53 . The semiconductor switch includes a source, a gate and a drain connected to the input terminal 51, the output node of the capacitor C11 and the gates connected to the output terminals of the switches S1-S4 of the switching unit 20, respectively. Node 55. The second resistor R12 is connected between the first resistor R11 and the collector node 54 of the output. A third resistor R13 is connected between the drain of the semiconductor switch and the gate node 55 of the output. The fourth resistor R14 is connected to the input terminal 52 through the first resistor R11 and the capacitor C11 to form a conduction path.

The gate driver 51 also includes a first diode D11, a second diode D12, and a sixth resistor R16. The first diode D11 is connected in series to the second resistor R12 between the second resistor R12 and the collector node 54 of the output. A second diode D12 is placed in the branch circuit between the input 53 and the output 56 . The sixth resistor R16 is connected to the fifth resistor R15 and the third resistor R13 to form a conductive path therebetween.

In the circuit thus configured, a pulse voltage signal having (+) and (-) polarity is applied as an input signal to the input terminals 52 and 53 to generate a gate signal. FIG. 16 shows an example of a pulse voltage signal applied through an input terminal.

Gate node 55, collector node 54, and emitter node 56 on the output of gate driver 51 are connected to the gates, collectors, and emitters of switches S1-S4, respectively.

Semiconductor switches may be implemented using Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). When the semiconductor is turned on by applying a positive turn-on pulse voltage to the inputs 52 and 53 of the gate driver 51 and by charging the capacitor C11, the turn-on gating signal is provided through the third resistor R13 and the gate node 55 at the output to turn on the switches S1-S4 of the switch unit 20 (hereinafter referred to as main switches).

On the other hand, when a negative turn-on pulse voltage is applied to the input terminals 52 and 53 of the gate driver 51, the MOSFET is turned off, wherein current flows through its built-in body diode, thereby turning off the main switches S1-S4.

The gate driver 51 detects the conduction of the anti-parallel diodes D1-D4 connected to the main switches S1-S4 (i.e., the zero-voltage state of the main switches), and provides a conduction gate signal when the anti-parallel diodes D1-D4 conduct to Turn on the main switches S1-S4. Thus, zero voltage turn-on switching of the main switches S1-S4 is achieved.

In addition, the second resistor R12 and the fourth resistor R14 are connected in series to the first resistor R11, so that the current flowing through the first resistor R11 can flow through one of the second resistor R12 and the fourth resistor R14 . The second resistor R12 may have a larger resistance than the fourth resistor R14.

As described below, when the zero voltage condition of the main switches S1-S4 is achieved before the maximum dead time set by capacitor C11 (i.e. when the anti-parallel diodes D1-D4 connected to the main switches S1-S4 conduct) , the current flowing through the fourth resistor R14 may flow through the resistor R12, thereby turning on the MOSFET.

The operation of the gate driver in each mode will be described.

Referring to FIG. 15, the input terminal of the gate driver 15 is connected through a transformer TX11 to apply a pulse voltage. When a pulsed voltage signal is applied as an input signal to the primary winding of transformer TX11 to control the main switches S1-S4, the secondary pulsed voltage signal on the secondary winding induced from the primary winding causes the gate driver 51 to generate a signal to control the main switches S1-S4. S1-S4 are turned on or off.

In each mode of operation, the inputs 52 and 53 to which the (+) and (-) voltages are applied will be referred to as Pin_1 (Pin_1) and Pin_2 (Pin_2) without reference to the transformer. _2).

FIG. 17 shows a gate signal output from the gate driver shown in FIG. 15 when the pulse voltage signal shown in FIG. 16 is used as an input signal. FIG. 18 is a graph depicting the resonant current and the gating signal of the SRC versus time. 19-22 are circuit diagrams illustrating operations of a gate driver in respective modes according to an exemplary embodiment of the present invention.

(+) Gate voltage application mode 1: Application of positive pulse voltage (refer to FIG. 19 )

When a positive gate voltage is applied to the input terminal of the gate driver 51, as shown in FIG. 16, the pin_1 52 is the positive terminal and the pin_2 53 is the negative terminal. Accordingly, current flows from the pin_152 through the capacitor C11, the first resistor R11, and the fourth resistor R14 (high resistance), and the capacitor C11 is charged. When the capacitor C11 continues to charge to the turn-on voltage of the P-channel MOSFET, the MOSFET is turned on and current flows through the MOSFET and the third resistor R13 to the sixth resistor R16, thereby turning on the main switches S1-S4 (refer to FIG. 21 ). This mode of operation is called the maximum dead time mode. The gate driver 51 is configured such that the MOSFETs are automatically turned on when the anti-parallel diodes D1-D4 connected to the main switches S1-S4 conduct before the maximum dead time described below (i.e., when the zero voltage condition of the main switches is achieved). On, thereby turning on the main switches S1-S4.

(+) Gate voltage application mode 2: Zero-voltage detection mode and zero-voltage on-off of the main switch Off (Refer to Figures 20 and 21)

When the antiparallel diodes D1-D4 conduct in Mode 1 before the maximum dead time when capacitor C11 is charged to turn on the MOSFET, and the voltage between the collector and emitter of the main switches S1-S4 approaches zero, the current Flow through capacitor C11, resistor R11 and resistor R12 (low resistance), as shown in Figure 20. At this moment, it differs from the maximum dead time mode because current flows through resistor R12 and capacitor C11 is rapidly charged, thereby turning on the MOSFET. As a result, referring to FIG. 21, as the MOSFET is turned on, current flows through the third resistor R13 and the sixth resistor R16, thereby turning on the main switches S1-S4. In other words, when the anti-parallel diodes D1-D4 conduct before the predetermined maximum dead time and the voltage across the main switches S1-S4 is equal to zero, the main switches S1-S4 are automatically turned on irrespective of the predetermined maximum dead time. Accordingly, since the gate driver 51 provides a turn-on gating signal to the switch unit 20 of the converter when the anti-parallel diodes D1-D4 are turned on, zero-voltage turn-on switching of the main switches S1-S4 is implemented in the switch unit 20 ( Refer to mode 5) of the converter. The step of generating the strobe signal at the rise of the pulse shown in FIG. 17 indicates the turn-on delay caused by the charged capacitor C11.

(-) Gate voltage application mode 1: Shutdown mode

This mode indicates switching off of the main switches S1-S4. When the negative gate voltage shown in FIG. 16 is applied to the input terminal of the gate driver 51, the pin_1 52 and the pin_2 53 are the negative terminal and the positive terminal, respectively. Correspondingly, the current from pin_253 flows without delay through the sixth resistor R16 and the body diode of the MOSFET, turning off the main switches S1-S4.

Therefore, when the voltage across the main switches S1-S4 approaches zero and the diodes D1-D4 conduct, the gate driver 51 detects the conduction of the diodes D1-D4 and automatically applies the gate-on signal. As a result, it is possible to realize zero-voltage switching of the main switches S1-S4 in the SRC shown in FIG. 4 .

In this way, since a secondary capacitor smaller than the capacitance of the resonance capacitor in the LC resonance circuit unit is added to the secondary winding of the transformer, current flows through the secondary capacitor instead of the load in the initial stage and the resonance current on the primary winding is fast increases to generate a trapezoidal current waveform. Therefore, at the same frequency, this resonant current can have a larger effective value than a conventional resonant current with a sinusoidal waveform.

Therefore, the SRC can exhibit higher efficiency than a conventional SRC due to the increased effective current at the same switching frequency. Additionally, the increased inductor energy allows the snubber capacitor to have a capacitance 10 times that of a conventional capacitor, thereby achieving a zero voltage turn-off condition.

Furthermore, the increased rms current value at the same frequency allows the SRC to exhibit increased efficiency. Under the same load current condition, the maximum resonance current can be reduced, thereby reducing conduction loss.

Additionally, the rapidly increasing current through the secondary capacitor increases the energy stored in the inductor. Therefore, it is possible to significantly increase the capacitance of the snubber capacitor connected to the switch, thereby reducing switching losses when the switch is turned off.

Accordingly, it is possible to realize zero-voltage switching that allows the voltage across each switch to remain at zero when the switches are turned off. As a result, it is possible to reduce switching loss.

In other words, in a conventional SRC, since switches S1-S4 are turned on under zero voltage and zero current conditions, and switches S1-S4 are not turned off under zero voltage and zero current conditions, switching losses occur when the switches are turned off . However, in the exemplary SRC, the switches S1-S4 perform turning off and turning on under zero voltage conditions.

In addition, the operation of the gate drive is simple. That is, to achieve the zero current and zero voltage turn-on conditions of the switch, the gate driver detects the conduction of the anti-parallel diode when the voltage across the switch approaches zero, and automatically applies the gate turn-on signal when the diode conducts.

In addition, the gate driver allows zero voltage and zero current turn-on switching over a wide operating range and also provides dead time compensation for stable operation.

Although some embodiments have been described in this disclosure, it is given by way of example only, and it will be apparent to those skilled in the art that various modifications and changes can be made without departing from the spirit and scope of the invention. . Accordingly, the scope of the invention should be limited only by the appended claims and their equivalents.

Claims (7)

1. A high-efficiency series resonant converter comprising: a switching unit comprising a plurality of switches for converting a direct current (DC) voltage into an alternating current (AC) voltage by means of an alternating direct voltage; An LC resonance circuit including a resonance inductor and a resonance capacitor connected in series, the LC resonance circuit being connected to the switching unit, and converting transmission from the switch using resonance generated by the resonance inductor and the resonance capacitor a frequency characteristic of said alternating voltage of the unit; a transformer comprising a primary winding and a secondary winding, the primary winding being connected to the LC resonant circuit, and the induced voltage in the secondary winding being related to the number of turns in the secondary winding and the primary winding proportional to the ratio of the number of turns in a secondary capacitor connected to the secondary winding of the transformer in parallel with the transformer; a bridge rectifier comprising a plurality of rectifying diodes for converting the AC voltage induced in said secondary winding into a DC voltage; and A gate driver that detects conduction of an anti-parallel diode connected to the switch and outputs a conduction gating signal to turn on the switch when the anti-parallel diode is conductive. 2. The high efficiency series resonant converter of claim 1, wherein the secondary capacitor has a smaller capacitance than the resonant capacitor. 3. The high-efficiency series resonant converter according to claim 1 or 2, wherein the secondary capacitor has a capacitance of 1/20-1/5 of the capacitance of the resonant capacitor. 4. The high-efficiency series resonant converter according to claim 1 or 2, wherein the secondary capacitor can have a lower impedance than the circuit composed of the rectifier diode and the load, and is used in the secondary The secondary capacitor charged by the load current induced in the winding causes the resonant current of the LC resonant circuit to increase rapidly. 5. The high efficiency series resonant converter of claim 1, wherein the gate driver comprises: a first resistor connected to an input terminal to which a pulse voltage signal is input; a capacitor connected in parallel to the first resistor at the input and charged with a turn-on pulse voltage applied through the input; a semiconductor switch comprising a source, a gate, and a drain respectively connected to the input terminal, the output node of the capacitor, and to the the gate node of the output of the switch; a third resistor connected between the drain of the semiconductor switch and the gate node of the output; and A fourth resistor connected to the input through the first resistor and the capacitor to form a conduction path. 6. The high efficiency series resonant converter of claim 5, wherein a second resistor and a first diode are connected in series with each other between the first resistor and the collector node of the output. 7. The high efficiency series resonant converter of claim 6, wherein the second resistor has a greater resistance than the fourth resistor.

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