CN102315177B - Processing method of high pressure resistant passivation protection diode chip - Google Patents
Processing method of high pressure resistant passivation protection diode chip Download PDFInfo
- Publication number
- CN102315177B CN102315177B CN 201110308126 CN201110308126A CN102315177B CN 102315177 B CN102315177 B CN 102315177B CN 201110308126 CN201110308126 CN 201110308126 CN 201110308126 A CN201110308126 A CN 201110308126A CN 102315177 B CN102315177 B CN 102315177B
- Authority
- CN
- China
- Prior art keywords
- passivation protection
- wafer
- protection layer
- coating
- groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Dicing (AREA)
Abstract
A high pressure resistant passivation protection diode chip and a processing method thereof are disclosed. A diode chip possessing a passivation protection structure and a processing method thereof are related. By using the provided high pressure resistant passivation protection diode chip and the processing method thereof, the chip can be reliably protected under the condition of ensuring a packaging temperature; a hidden trouble of packaging can be solved; a production technique is simple. The chip comprises: a sheet-shaped body and a passivation protection layer. A circle of chamfering is arranged on an upper part of the sheet-shaped body. In the invention, all fillers in a groove are solidified; then, a hot pressing die is used to perform pressing and molding is achieved through heating and curing. The prepared product can maintain bottom glass materials. After splintering, the passivation protection layer is ensured to cover a whole cambered surface. A glass layer thickness is large. Therefore, intensity of the passivation protection layer is corresponding large. A buffer protection layer does not need to be arranged out of the passivation protection layer (glass layer). Because the glass in a lowest part of a molded port groove, an ideal fracture surface can be formed during splintering.
Description
Technical field
What the present invention relates to is a kind of diode chip for backlight unit and processing method thereof, relates in particular to a kind of diode chip for backlight unit and processing method thereof with passivation protection structure.
Background technology
Existing GPP[Glassivation passivation parts, the Glassivation(vitrifying) the passivation(passivation) the parts(element) or parts of an apparats(device) abbreviation of phrase] the mesa diode chip is because generally adopting from the positive cutting of groove scribing, so cutting blade must directly contact with the interior glass of groove.More priorly be; glass belongs to a kind of fragile material; the stress that fragile material is subjected in the sharp-pointed place near the crack is much larger than the mean stress on whole section; to such an extent as to the associative key at most advanced and sophisticated place ruptures easily; and thisly break in the material gradually expansion, thereby cause easily hidden the splitting of chip passivation protective layer and cause reduce or ultimate failure device lifetime.
Existing GPP electrophoresis diode chip for backlight unit is after the chip back surface hemisect; make chip along the cleavage surface fracture of channel bottom silicon by mechanical sliver; reduce the stress damage that in the cutting process chip is caused; and the front channel bottom is filled up by glass fully; can play better passivation protection effect to PN junction, guarantee so that the chip quality has definitely.But the chip surface oxide film protection that the electrophoresis processing procedure is produced, scolding tin flow to the encapsulated device inefficacy that causes on glass easily in rear road welding process.
In addition; chip is in encapsulation; epoxy resin also needs through overcuring; be about to softening epoxy resin and become curdled appearance (curing temperature is about 175 ℃); a kind of this stress ratio will be larger to the intrinsic mechanical stress of diode so epoxy resin will produce, and will be easily that the passivation protection layer extruding of diode chip for backlight unit is broken; even squeeze broken diode chip for backlight unit, thereby cause component failure.
For this reason; the applicant proposes the application for a patent for invention that a key name is called " a kind of passivation protection diode chip for backlight unit and processing method thereof " at 2011.5.11. to State Intellectual Property Office; shown in Fig. 3,4; its adopt outside the passivation protection layer, set up one deck heat-resisting, insulate and have flexible buffer protection layer 6; improve the electric property of product, obtained preferably effect.But, owing to increased coating processes one, so that production technology is complicated, need increases substantially the control level and just can obtain very high rate of finished products.And this case is on the basis of existing technology, can't overcome the problem that channel bottom 41 places expose.
Summary of the invention
The object of the present invention is to provide and a kind ofly guaranteeing to protect reliably chip under the package temperature, solve encapsulation hidden danger, and the processing method of the simpler high-pressure-resistant diode chip with passivation protection of manufacture craft.
Technical scheme of the present invention is: described chip comprises sheet noumenon and passivation protection layer, the top of described sheet noumenon is provided with a circle chamfering, be the arc of indent at the hypotenuse of the above chamfering of axial cross section, the passivation protection layer covers the arcwall face of described body top edge place and chamfering; At the outer surface of described passivation protection layer silicon dioxide protection rete also.
Processing method of the present invention is take the wafer of front openings groove as raw material; It is characterized in that, then, according to the following steps processing:
1), coating; Evenly be coated with the photoresistance glass that is mixed with sensitizer of emulsion form in wafer surface, guarantee that it infiltrates described groove;
2), soft roasting; The wafer that is coated with photoresistance glass was inserted in the 90-120 ℃ of environment 0.3-0.5 hour, coating is condensed be gelatin;
3), mask; Press groove rule making mask plate on the wafer, respective grooves place printing opacity on the mask plate, remainder resistance light; Mask plate is covered on the wafer;
4), illumination curing; To the wafer that is coated with mask plate advance to condense row exposure, the figure on the mask plate is transferred to wafer surface, through the curing of coatings of illumination, be not subjected to the coating of illumination still for gelatin; Immediately, removing still is gelatin coating;
5), sinter coating; Adopt a hot-die, described hot-die is provided with burr, and described burr contour shape is identical with groove distribution shape on the described wafer, and tubaeform, its top that described burr cross section is inner concave arc surface have wedge grip; Then, the heat hot pressing mold is to 600-800 ℃, the feeding hot-die, and the wedge grip of controlling described hot-die does not contact the bottom surface of groove on the described wafer, keeps 2-4 hour, makes the coating of curing be sintered in securely wafer surface;
6), scribing: the wafer after the passivation protection is according to the scribing of figure rule;
7), sliver; Make.
The surface-coated of described hot-die has silica containing solution.
The present invention with respect to existing technique when the mask, solidify all inserts in the groove (in the prior art when preventing sliver the passivation protection layer cracked, must be with the removal of the glass in the middle of the groove); Then, the employing hot-die is suppressed, moulding is heating and curing; Make the glass material that product can keep the bottom; behind sliver; guarantee that whole cambered surface is coated with the passivation protection layer; and compared with prior art; glassy layer thickness is larger; therefore the intensity of passivation protection layer is corresponding also larger, thereby need not outside passivation protection layer (glassy layer) the buffer protection layer to be set again.Because the glass of mold pressing oral groove groove lowest part is the thinnest, when sliver, can form the desirable plane of disruption (parallel with the axis of chip).
Description of drawings
The structural representation of Fig. 1 wafer of the present invention,
The structural representation of Fig. 2 chip of the present invention,
Fig. 3 is the structural representation of wafer in the background technology of the present invention,
Fig. 4 is the structural representation of background technology chips of the present invention,
Fig. 5 is process principle figure one of the present invention,
Fig. 6 is process principle figure two of the present invention,
Fig. 7 is process principle figure three of the present invention,
Fig. 8 is process principle figure four of the present invention;
1 is wafer among the figure, the 2nd, and passivation protection layer, the 21st, photoresistance glass, the 22nd, the photoresistance glass that solidifies after the illumination, the 3rd, geosutures, the 4th, groove, the 41st, channel bottom, the 5th, silicon dioxide protection rete, the 6th, buffer protection layer, the 7th, mask, the 8th, hot-die, the 81st, wedge grip.
Embodiment
Product of the present invention as shown in Figure 2, described chip comprises sheet noumenon and passivation protection layer 2, the top of described sheet noumenon is provided with a circle chamfering, is the arc of indent at the hypotenuse of the above chamfering of axial cross section, and passivation protection layer 2 covers the arcwall face of described body top edge places and chamfering; At the outer surface of described passivation protection layer 2 silicon dioxide protection rete 5 also.5 effects of silicon dioxide protection rete are: the welding material when preventing from welding is sticking to bond on passivation protection layer 2 table damage passivation protection layer.
Processing method of the present invention is shown in Fig. 1,5-8, take the wafer 1 of front openings groove as raw material; It is characterized in that, then, according to the following steps processing:
1), coating; At the photoresistance glass 21 that is mixed with sensitizer of wafer 1 surface uniform coating emulsion form, guarantee in the groove 4 on its infiltration wafer 1; As shown in Figure 5,
2), soft roasting; The wafer 1 that is coated with photoresistance glass 21 was inserted in the 90-120 ℃ of environment 0.3-0.5 hour, coating is condensed be gelatin;
3), mask; Press groove rule making mask plate 7 on the wafer 1, respective grooves 4 place's printing opacities on the mask plate 7, remainder resistance light; Mask plate 7 is covered on the wafer 1;
4), illumination curing; To the wafer 1 that is coated with mask plate 7 exposure of condensing, the figure on the mask plate 7 is transferred to wafer 1 surface, form the photoresistance glass 22 that solidifies after the illumination through the curing of coatings of illumination, be not subjected to the coating of illumination still for gelatin; Immediately, removing still is gelatin coating; (principles of chemistry by developer dissolve the partial coating of not sensitization on aobvious stabilization machine)
5), sinter coating; Adopt a hot-die 8, described hot-die 8 is provided with burr, and described burr contour shape is identical with groove 4 distribution shapes on the described wafer 1, and tubaeform, its top that described burr cross section is inner concave arc surface have wedge grip 81; Then, 8 to 600-800 ℃ of heat hot pressing molds, feeding hot-die 8, the wedge grip 81 of controlling described hot-die 8 does not contact the bottom surface 41 of groove on the described wafer 1, keeps 2 ~ 4 hours, makes the coating of curing be sintered in securely wafer 1 surface, as schemes shown in Figure 1;
6), scribing: the wafer 1 after the passivation protection is according to the scribing of figure rule;
7), sliver; Press geosutures 3 division wafers 1, make some chips as shown in Figure 2.
The surface-coated of described hot-die 8 has silica containing solution; So that the surface of product has silicon dioxide protection rete 5.
Claims (2)
1. the processing method of a high-pressure-resistant diode chip with passivation protection, described chip comprises sheet noumenon and passivation protection layer, the top of described sheet noumenon is provided with a circle chamfering, be the arc of indent at the hypotenuse of the above chamfering of axial cross section, the passivation protection layer covers the arcwall face of described body top edge place and chamfering; At the outer surface of described passivation protection layer silicon dioxide protection rete also;
Take the wafer of front openings groove as raw material; It is characterized in that, then, according to the following steps processing:
1), coating; Evenly be coated with the photoresistance glass that is mixed with sensitizer of emulsion form in wafer surface, guarantee that it infiltrates described groove;
2), soft roasting; The wafer that is coated with photoresistance glass was inserted in the 90-120 ℃ of environment 0.3-0.5 hour, coating is condensed be gelatin;
3), mask; Press groove rule making mask plate on the wafer, respective grooves place printing opacity on the mask plate, remainder resistance light; Mask plate is covered on the wafer;
4), illumination curing; To the wafer that is coated with mask plate advance to condense row exposure, the figure on the mask plate is transferred to wafer surface, through the curing of coatings of illumination, be not subjected to the coating of illumination still for gelatin; Immediately, removing still is gelatin coating;
5), sinter coating; Adopt a hot-die, described hot-die is provided with burr, and described burr contour shape is identical with groove distribution shape on the described wafer, and tubaeform, its top that described burr cross section is inner concave arc surface have wedge grip; Then, the heat hot pressing mold is to 600-800 ℃, the feeding hot-die, and the wedge grip of controlling described hot-die does not contact the bottom surface of groove on the described wafer, keeps 2-4 hour, makes the coating of curing be sintered in securely wafer surface;
6), scribing: the wafer after the passivation protection is according to the scribing of figure rule;
7), sliver; Make.
2. the processing method of a kind of high-pressure-resistant diode chip with passivation protection according to claim 1 is characterized in that, the surface-coated of described hot-die has silica containing solution.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201110308126 CN102315177B (en) | 2011-10-12 | 2011-10-12 | Processing method of high pressure resistant passivation protection diode chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201110308126 CN102315177B (en) | 2011-10-12 | 2011-10-12 | Processing method of high pressure resistant passivation protection diode chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102315177A CN102315177A (en) | 2012-01-11 |
| CN102315177B true CN102315177B (en) | 2013-01-30 |
Family
ID=45428195
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201110308126 Active CN102315177B (en) | 2011-10-12 | 2011-10-12 | Processing method of high pressure resistant passivation protection diode chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102315177B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102881587B (en) * | 2012-10-17 | 2015-03-25 | 如皋市大昌电子有限公司 | Laminated diode manufacturing process and chip sieve tray thereof |
| CN104201102B (en) * | 2014-08-28 | 2017-12-12 | 苏州启澜功率电子有限公司 | A kind of fast recovery diode FRD chips and its manufacture craft |
| CN111725165A (en) * | 2020-06-30 | 2020-09-29 | 中国振华集团永光电子有限公司（国营第八七三厂） | A SMD-1E Cermet SMD 15KW Transient Voltage Suppression Diode |
| CN119225112B (en) * | 2024-11-28 | 2025-03-14 | 晶芯成(北京)科技有限公司 | Method for generating mask pattern, semiconductor packaging device and manufacturing method |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4375125A (en) * | 1980-03-07 | 1983-03-01 | U.S. Philips Corporation | Method of passivating pn-junction in a semiconductor device |
| CN101578023A (en) * | 2008-05-09 | 2009-11-11 | 富港电子（东莞）有限公司 | Element protection method of electronic product |
| CN201383498Y (en) * | 2009-03-03 | 2010-01-13 | 百圳君耀电子（深圳）有限公司 | Semiconductor diode chip |
| CN101645399A (en) * | 2009-08-21 | 2010-02-10 | 苏州固锝电子股份有限公司 | Voltage stabilizing diode manufacturing process |
| CN201608200U (en) * | 2009-11-06 | 2010-10-13 | 馨意科技股份有限公司 | Light-emitting diode sealing glue housing |
| CN201708145U (en) * | 2010-05-11 | 2011-01-12 | 扬州杰利半导体有限公司 | Passivation protected diode chip |
-
2011
- 2011-10-12 CN CN 201110308126 patent/CN102315177B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4375125A (en) * | 1980-03-07 | 1983-03-01 | U.S. Philips Corporation | Method of passivating pn-junction in a semiconductor device |
| CN101578023A (en) * | 2008-05-09 | 2009-11-11 | 富港电子（东莞）有限公司 | Element protection method of electronic product |
| CN201383498Y (en) * | 2009-03-03 | 2010-01-13 | 百圳君耀电子（深圳）有限公司 | Semiconductor diode chip |
| CN101645399A (en) * | 2009-08-21 | 2010-02-10 | 苏州固锝电子股份有限公司 | Voltage stabilizing diode manufacturing process |
| CN201608200U (en) * | 2009-11-06 | 2010-10-13 | 馨意科技股份有限公司 | Light-emitting diode sealing glue housing |
| CN201708145U (en) * | 2010-05-11 | 2011-01-12 | 扬州杰利半导体有限公司 | Passivation protected diode chip |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102315177A (en) | 2012-01-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102315177B (en) | Processing method of high pressure resistant passivation protection diode chip | |
| JP4443334B2 (en) | Resin sealing molding method of semiconductor element | |
| US20070205513A1 (en) | Composite board with semiconductor chips and plastic housing composition and method | |
| CN103715105B (en) | The manufacture method and semiconductor device of semiconductor device | |
| KR20120016272A (en) | LED device having a rough structure for extracting light and manufacturing method thereof | |
| CN106449945A (en) | Mold injection method for manufacturing CSP chip | |
| KR20150117653A (en) | Sealing sheet for semiconductor element, semiconductor device, and semiconductor-device production method | |
| CN106796893B (en) | The manufacturing method and semiconductor device of semiconductor device | |
| US20110201156A1 (en) | Method of manufacturing wafer level package including coating resin over the dicing lines | |
| KR920009914B1 (en) | Semiconductor chip embedding method in plastic package | |
| US20090121347A1 (en) | Semiconductor Device and Semiconductor Device Assembly | |
| CN115084320A (en) | LED packaging method, LED lamp and LED display | |
| CN104752386B (en) | High reliability SOP encapsulating leads and packaging part production method | |
| CN105895592B (en) | A kind of processing technology of frame, the diode comprising the frame and diode | |
| CN202332818U (en) | High-pressure-resistant diode chip with passivation protection | |
| CN106469778B (en) | A kind of special-shaped organic siliconresin light conversion body fitting encapsulation LED process | |
| WO2012145879A1 (en) | Mold for pre-plastic-sealing lead frames, process for pre-plastic-sealing and packaging structure | |
| WO2013130572A1 (en) | Methods for bonding material layers to one another and resulting device | |
| KR101248478B1 (en) | Insulated stamper core for injection moulding of large surface product | |
| KR20100042896A (en) | Embossing decoration and manufacturing method | |
| CN214313233U (en) | Glass lens UVCLED lamp pearl | |
| WO2019227918A1 (en) | Base-island-free frame packaging structure and process method therefor | |
| CN115411167B (en) | A UV LED packaging structure and packaging method thereof | |
| US20140374934A1 (en) | Method for strengthening semiconductor manufacturing tools | |
| JP2000031177A (en) | Resin sealing mold and resin sealing method therefor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |