CN102305911B - Scanning chain balancing method for carrying out secondary allocation by utilizing difference value - Google Patents

Abstract

A scan chain balancing method for quadratic allocation using difference. It relates to the technical field of system chip SOC testing. It is in order to shorten the test time of SOC, and then reduce the test cost. First, arrange the scan chains inside the IP core in descending order, find the largest scan chain S(max), divide the largest scan chain S(max) by the length of the adjustment coefficient adj as the reference length, and the one closest to the reference length The scan chain is set as the benchmark scan chain S(adj); then, the length of each scan chain inside the IP core is compared with the length of the benchmark scan chain S(adj), and the scan chain S(adj) that is greater than the benchmark is set It is set as long scan chain S _> , and the scan chain S(adj ₎ less than or equal to the benchmark is set as short scan chain S _≤ . Allocation; then calculate the difference di' between each long scan chain S _> and the benchmark scan chain S(adj), sort all the short scan chains S _≤ and all the differences di' from large to small, and then perform the second allocation. It is used in integrated circuits.

Description

A Scan Chain Balance Method Using Difference Values for Quadratic Allocation

technical field

The invention relates to the technical field of system chip SOC testing.

Background technique

SOC (system-on-a-chip) based on IP core multiplexing has become the mainstream technology of today's electronic equipment, which greatly shortens the time to market of products and improves the stability of the system. However, it has brought great challenges to the test, mainly in the following aspects: the ports of the IP core embedded in the SOC are much larger than the pins of the SOC, so it is impossible to directly test and access these IP cores; as the complexity of the IP core increases , the test time for SOC is also doubled, which in turn leads to a rapid increase in test cost, and is close to the manufacturing cost of SOC. The test problem has become a bottleneck restricting the development of SOC, so effective measures must be taken. Since the input and output pins of the IP core embedded in the SOC cannot all be connected to the pins of the SOC, it is impossible to directly test the IP core. Document The Core Test Wrapper Handbook: Rationale and Application of IEEE Std.1500[M].2005. Proposes the core test architecture, which includes three parts: test source/test sink, test access mechanism (Test Access Michanism, TAM ) and test wrapper (TestWrapper). The test source generates the test stimulus required by the circuit under test; the test sink collects the test response and evaluates the function normality of the test circuit. The test access mechanism provides a path for data transmission, transmits the test stimulus to the IP core, and transmits the test response from the IP core to the sink. The test package can not only realize the fast transmission channel of the test data of each IP core in the SOC, but also complete the allocation of the internal scan chain of the IP core, so that it can better adapt to the allocated TAM width.

Document Vikram Iyengar, Krishnendu Chakrabarty and Erik Jan Marinissen, Test Wrapper and Test Access Mechanism Co-Optimization for System-on-Chip (joint optimization of test package and test access mechanism for SoC) International Test Conference 2001, which proposed a Based on the BFD (Best Fit Decrease) algorithm, the BFD algorithm was originally designed to solve the bin packing problem. This method was proposed earlier, and has the advantages of high operating efficiency and simple structure, so it is widely used. The disadvantage of this method is: the BFD algorithm does not have the ability of global optimization. When using this method to add the internal scan chains of the IP core to the Wrapper scan chain one by one, only the current length of each Wrapper scan chain is considered, and there is no global guiding principle. Therefore, the BFD algorithm finally obtains a local optimal solution, and in some cases, the local optimal solution is not equal to the global optimal solution. The method introduced in this document has the advantages of simplicity and high efficiency, but it does not have the ability of global optimization.

In order to overcome the shortcoming of the above-mentioned BFD-based algorithm that does not have global optimization, the literature Niu Daoheng, WangHong, Yang ShiYuan, Cheng BenMao, Jin Yang, Re-Optimization Algorithm for SoCWrapper-Chain Balance Using Mean-Value Approximation (SoC based on average approximation Scan chain balance algorithm) Tsinghua Science and Technology 2007July P61~66 proposed a method based on the average value Wrapper scan chain balance algorithm to realize SOC testing. For a specific IP core and a given number of Wrapper scan chains, the algorithm first calculates the average length of the Wrapper scan chains, and then uses the average length of the Wrapper scan chains as a global guideline to add the internal scan chains to the Wrapper scan chains respectively. superior. Therefore, for a given IP core, according to the Wrapper scan chain balance algorithm based on the average value, the ideal result is that the length of each Wrapper scan chain is equal and equal to its average value. But in the process of actually dealing with the problem, there is very little chance that the last Wrapper scan chain is equal and equal to the average value. More realistically, the final length of the Wrapper scan chain fluctuates around its average value, and the size of the fluctuation is determined by factors such as the Wrapper scan chain balance algorithm and the internal scan chain length of the IP core.

In addition, the above-mentioned method of implementing the SOC test based on the Wrapper scan chain balance algorithm based on the average value does not always give priority to the current longest internal scan chain, which brings many disadvantages. Although this method has the ability of global optimization, it does not always give priority to the current longest internal scan chain, and its guiding principle of global optimization is not close to the actual situation.

Contents of the invention

In order to shorten the test time of the SOC and further reduce the test cost, the present invention provides a scan chain balance method for secondary distribution by using the difference.

The process of the scan chain balancing method using the difference for secondary distribution according to the present invention is:

First, arrange the scan chains inside the IP core in descending order, find the largest scan chain S(max), divide the largest scan chain S(max) by the length of the adjustment coefficient adj as the reference length, and the one closest to the reference length The scan chain is set as the reference scan chain S(adj);

Then, compare the length of each scan chain inside the IP core with the length of the reference scan chain S(adj). If the scan chain S(adj) is larger than the reference, it is set as long scan chain S>, and the scan chain is less than or equal to the reference. S(adj) is set as the short scan chain S≤, and all long scan chains S> are allocated for the first time according to the length of the reference scan chain S(adj); and then each long scan chain S> is calculated according to the reference The difference di' of the scan chain S(adj), after sorting all the short scan chains S ≤ and all the difference di' from large to small, the second distribution is performed.

In the method of the present invention, the scan chains are first allocated according to a reference length, and then the second allocation is performed according to the difference between each scan chain and the reference scan chain. This method has the advantages of simple implementation and low algorithm complexity. . According to the experimental data in the ITC'02 standard test set, this method is superior to other existing methods in terms of algorithm versatility and optimization ability.

Description of drawings

Figure 1 is a schematic diagram of the nuclear test architecture.

Detailed ways

Specific implementation mode 1: This implementation mode is described in conjunction with FIG. 1 . The process of the scan chain balancing method for secondary allocation using difference values in this implementation mode is as follows:

First, arrange the scan chains inside the IP core in descending order, find the largest scan chain S(max), divide the largest scan chain S(max) by the length of the adjustment coefficient adj as the reference length, and the one closest to the reference length The scan chain is set as the reference scan chain S(adj);

Then, compare the length of each scan chain inside the IP core with the length of the reference scan chain S(adj). If the scan chain S(adj) is larger than the reference, it is set as long scan chain S>, and the scan chain is less than or equal to the reference. S(adj) is set as the short scan chain S≤, and all long scan chains S> are allocated for the first time according to the length of the reference scan chain S(adj); and then each long scan chain S> is calculated according to the reference The difference di' of the scan chain S(adj), after sorting all the short scan chains S ≤ and all the difference di' from large to small, the second distribution is performed.

The following provides the pseudocode for implementing the method described in this embodiment (referred to as TAD(ADJ)):

Assumption: the number of internal scan chains of the IP core is n, and the number of encapsulated scan chains is N

S = sort(S, descend)

find S(adj). All those greater than S(adj) are marked as S>, and the number of S> is n>; all those not greater than S(adj) are marked as S≤

di'=S>-S(adj)

di=di’∪S≤

% first allocation

Evenly distribute n>scan chains of length S(adj) to N packaged scan chains TAM(1:N)

The number of internal scan chains contained in each TAM is recorded as No_TAM(1:N)

The sum of the internal scan chains contained in each TAM is recorded as Sum_TAM(1:N)

% second allocation

The calculation results of the method in this embodiment are shown in Table 1 (adjustment coefficient adj=2.1), it can be seen that the improved algorithm has greatly improved the calculation results when the internal scan chain lengths differ greatly. The No. 5 IP core of p22810, which contains 29 internal scan chains, the lengths are [214, 106, 106, 105, 105, 103, 102, 101, 101, 101, 100, 93, 92, 84, 84, 75, 75, 73, 73, 73, 73, 27, 27, 27, 27, 27, 27, 27, 27]. The data of the three methods of BFD, MVA, and TAD (ADJ) are shown in Table 1.

Table 1 core5 data of p22810

Embodiment 2: This embodiment is a special case of Embodiment 1, a special case of the adjustment coefficient adj>S(max)/S(min):

First, arrange the scan chains inside the IP core in descending order, find the largest scan chain S(max), divide the largest scan chain S(max) by the length of the adjustment coefficient adj less than the smallest scan chain S(min), The length less than the minimum scan chain S(min) is used as the reference length;

Then, all the scan chains are allocated for the first time according to the length of the reference scan chain S(adj); then calculate the difference di between all scan chains and the smallest scan chain S(min), and change the difference di' from large to large After the small sort, the second allocation is performed.

The following provides pseudo-codes for implementing the method described in this embodiment (denoted as TAD(MIN)):

Suppose: the number of internal scan chains of the IP core is n, and the number of encapsulated scan chains is N

S = sort(S, descend)

S(min)=S(n)

di=S-S(min)

% first allocation

Evenly distribute n scan chains of length S(min) to N packaged scan chains TAM(1:N)

The number of internal scan chains contained in each TAM is recorded as No_TAM(1:N)

The sum of the internal scan chains contained in each TAM is recorded as Sum_TAM(1:N)

% second allocation

Take the eight scan chains whose lengths are [9, 9, 8, 8, 7, 7, 6, 6] respectively, packaged into three sets of TAMs as an example, the scan chains have been arranged in order from large to small, and the smallest scan chain Length S(min)=6, difference di=[3, 3, 2, 2, 1, 1, 0, 0]. The first allocation: the eight scan chains are divided into three groups evenly according to the length of 6, so TAM (1) contains [6, 6, 6], TAM (2) contains [6, 6, 6], TAM ( 3) Contains [6, 6]; the second allocation: allocate di to the smallest Sum_TAM that can be allocated, so after this allocation, TAM(1) contains [6, 6, 6, 2, 1, 0] That is [8, 7, 6] three internal scan chains, TAM (2) contains [6, 6, 6, 2, 1, 0] that is [8, 7, 6] three internal scan chains, TAM (3) contains [6, 6, 3, 3] that is [9, 9] two internal scan chains. Therefore, the length of the three encapsulated scan chains is (21, 21, 18), which is better than the results of the BFD and MVA methods. In order to verify the effect of each method in the actual circuit, we applied BFD, MVA, TAD (MIN) three methods to the No. 6 IP core in p93791 in ITC'02, which contains 46 internal scan chains, the length Respectively [521, 521, 521, 521, 521, 521, 521, 521, 521, 520, 520, 520, 520, 520, 520, 520, 520, 520, 520, 520, 520, 520, 520, 520 , 520, 520, 520, 520, 520, 520, 520, 520, 520, 520, 520, 520, 520, 520, 520, 500, 500, 500, 500, 500, 500, 500]. Comparing the latter two methods with the BFD method respectively, the length and shortening of the longest test package scan chain under various TAM widths are calculated. The data are shown in Table 1.

Table 1 core6 data of p93791

It can be seen from the data in Table 2 that when the TAM width is 3-64, the sum of the longest scan chain lengths after encapsulation is calculated. Compared with the BFD method, the MVA is shortened by 296, and the TAD(MIN) is shortened by 356. And TAD(MIN) outperforms BFD and MVA methods at all TAM widths. Taking the case where the TAM width is equal to 3 as an example, the length of the longest test package scan chain shortened by the method in this paper is 83, but since the number of test vectors of the IP core is 218, the longest input scan chain of the IP core after packaging is Si , the longest output scan chain is So, the number of test vectors of this IP core is P, then the time (unit: test clock cycle number) T to this IP core test is: T=(1+max{Si, So})*P+min{Si, So}, the test time is shortened by 18177 (unit: number of test clock cycles). Other compositions and connection methods are the same as those in Embodiment 1.

Claims (1)

1. utilize difference to carry out the scan chain balance method of secondary distribution, it is characterized in that its process is: First, arrange the scan chains inside the IP core in descending order, find the largest scan chain S(max), divide the largest scan chain S(max) by the length of the adjustment coefficient adj as the reference length, and the one closest to the reference length The scan chain is set as the reference scan chain S(adj); Then, compare the length of each scan chain inside the IP core with the length of the reference scan chain S(adj). If the scan chain S(adj) is greater than the reference, it is set as a long scan chain S _> , and if it is less than or equal to the reference scan chain S(adj) is set as the short scan chain S _≤ , and all long scan chains S _> are allocated for the first time according to the length of the reference scan chain S(adj); and then calculate each long scan chain S _> and the reference The difference di' of the scan chain S(adj), after sorting all the short scan chains S _≤ and all the difference di' from large to small, the second distribution is performed.

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