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CN102291088B - Receiver mixer - Google Patents

Receiver mixer Download PDF

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Publication number
CN102291088B
CN102291088B CN 201110208814 CN201110208814A CN102291088B CN 102291088 B CN102291088 B CN 102291088B CN 201110208814 CN201110208814 CN 201110208814 CN 201110208814 A CN201110208814 A CN 201110208814A CN 102291088 B CN102291088 B CN 102291088B
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input
frequency
signal
output
frequency mixer
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CN102291088A (en
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栗星星
赵岩
栗晶晶
葛莉华
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Guangdong Gaohang Intellectual Property Operation Co ltd
Guangzhou Aoyuan Electronics Co ltd
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WUXI LIWAI SEMICONDUCTOR TECHNOLOGY Co Ltd
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Abstract

The invention discloses a receiver mixer, which comprises a first receiver mixer input end, a second receiver mixer input end, a receiver mixer output end, a mixing unit and a buffering unit, wherein the first receiver mixer input end is used for inputting a signal to be mixed; the second receiver mixer input end is used for inputting a local oscillation mixing signal; the receiver mixer output end is used for outputting the processed signals; the mixing unit is used for mixing the signal to be mixed and the local oscillation mixing signal and outputting the mixed signal; the buffering unit is used for buffering the signal to be mixed and outputting the buffered signal; and the mixing unit comprises the buffering unit. The receiver mixer is applied to the processing of received signals ofdifferent frequency bands, maximally shares devices, and when working in fit with a low noise amplifier, simplifies a current-voltage-voltage-current mode into a current-current mode, thereby simplifying a design and further reducing cost.

Description

A kind of receiver frequency mixer
Technical field
The present invention relates to contactless automatic identification technology field, particularly the receiver frequency mixer in the radio-frequency identification reader/writer.
Background technology
The radio-frequency (RF) identification of high integration, low cost, low-power consumption (RFID, Radio Frequency Identification) read write line has important effect to building intelligent society.If it is integrated into mobile phone and other kinds portable terminal, not only can further expands numerous applying in radio frequency identification field of progressively implementing at present, and can produce many whole new set of applications field.For example, the user can grasp interested product information easily by the connection of mobile phone the Internet, product be supervised, locate and be followed the tracks of to the mobile phone that is integrated with rfid interrogator and GPS receiving function can in seamless unoccupied place, selects the flexibility of product and the efficiency of management of product supply chain thereby improve the consumer.At present, some main cell phone manufacturers (as Nokia) have taken the lead to adopt the RFID function in its major product, and other manufacturers also will follow up.As shown in Figure 1, ABI Research prediction singly just will have more than 5,000 5 hundred ten thousand RFID mobile phone consumption figure in 2015 in Asian-Pacific market.
There are five standards systems in practical at present RFID technology:
1.ISO (International Standard Organization) standards system comprises ISO/IEC 18000, ISO/IEC 14443, ISO/IEC 15693 series standards;
2.EPC Global (Electronic Product Code) standards system;
3. come from the Ubiquitous ID standards system of Japan;
4. the 800/900MHz frequency range radio frequency discrimination RFID technology application specifies [5] of China's Ministry of Information Industry;
5. CHINAUNICOM's mobile phone 2.4G frequency N FC applied business standard and the company standard mobile-phone payment RFID-SIM of China Mobile card basic technology scheme.
Press the difference of applying frequency, the RFID technology can be divided into low frequency (LF), high frequency (HF), hyperfrequency (UHF), microwave (MW) four classes; Corresponding representative frequency is respectively: low frequency 135KHz is following, high frequency 13.56MHz, hyperfrequency 860M～960MHz, microwave 2.4GHz and 5.8GHz.
RFID has a extensive future, and is one of high-tech industry of global competition fierceness.But owing to RFID global standards, frequency range disunity, product is incompatible, and ground has hindered the popularization of types of applications, and therefore, multiband, many standards, portable rfid interrogator market are about to arise at the historic moment.At present, based on the rfid interrogator of discrete component full-scale development, but equipment is general huger, costliness and power consumption height.Nearest 2 years, the research of rfid interrogator radio-frequency front-end system integrated chip and label attracted numerous domestic and international researchers' attention, but all is confined to single frequency band and single standard basically, mainly can be divided into HF and UHF two big camps.
On the one hand, World Economics, technology just develop rapidly towards globalization, on the other hand, and country variant and local serious day by day protectionism and the technology/trade barrier of existing; The existence of these two kinds of factors, the clone that makes exploitation cope with shifting events by sticking to a fundamental principle is imperative.
Therefore, the key technology of many standards, multiple-frequency band RFID read write line need be provided, especially the multiband technology of sharing of low noise amplifier, use is beneficial to the cheap CMOS manufacturing process of large-scale promotion, the radio-frequency (RF) transceiver front end of exploitation low-power consumption is made a contribution for promoting technology of Internet of things and application and development, construction intelligent society system.
Summary of the invention
The problem that the present invention solves is to provide a kind of circuit of receiver frequency mixer, to simplify design and then the save design cost of radio-frequency identification reader/writer.
For addressing the above problem, the invention provides a kind of receiver frequency mixer, comprising: receiver frequency mixer first input end is used for input and treats mixed frequency signal; Receiver frequency mixer second input is used for input local oscillator mixed frequency signal; The receiver mixer output is used for the signal after output is handled; The mixing unit is used for described treating exported after mixed frequency signal and the mixing of described local oscillator mixed frequency signal; Buffer cell is used for the described mixed frequency signal buffering back for the treatment of is exported; Described mixing unit comprises described buffer cell.
Optionally, the described mixed frequency signal for the treatment of is differential signal.
Optionally, described local oscillator mixed frequency signal comprises pattern one and pattern two at least: described pattern one is suitable for described mixing unit and enters mode of operation; Described pattern two is suitable for described buffer cell and enters mode of operation.
Optionally, described receiver frequency mixer first input end comprises low noise amplifier first output, low noise amplifier second output.
Optionally, described receiver frequency mixer second input comprises receiver frequency mixer second input, the first sub-input and the receiver frequency mixer second input second sub-input; When described local oscillator mixed frequency signal pattern for the moment, the described receiver frequency mixer second input first sub-input input high level, the described receiver frequency mixer second input second sub-input input low level; When described local oscillator mixed frequency signal pattern two, described receiver frequency mixer second input, the first sub-input and the described receiver frequency mixer second input second sub-input are rotated input high level or low level based on the operating frequency cycle.
Optionally, described receiver mixer output comprises receiver frequency mixer first output and receiver frequency mixer second output.
Optionally, described buffer cell comprises: the 3rd group of NMOS pipe, have source electrode, and be connected with described low noise amplifier second output; Have grid, be connected with the described receiver frequency mixer second input first sub-input; Have drain electrode, be connected with described receiver frequency mixer first output; The 3rd group of the 2nd NMOS pipe has source electrode, is connected with described low noise amplifier first output; Have grid, be connected with the described receiver frequency mixer second input first sub-input; Have drain electrode, be connected with described receiver frequency mixer second output.
Optionally, described mixing unit comprises: described the 3rd group of NMOS pipe; Described the 3rd group of the 2nd NMOS pipe; The 3rd group of the 3rd NMOS pipe has source electrode, is connected with described low noise amplifier second output; Have grid, be connected with the described receiver frequency mixer second input second sub-input; Have drain electrode, be connected with described receiver frequency mixer second output; The 3rd group of the 4th NMOS pipe has source electrode, is connected with described low noise amplifier first output; Have grid, be connected with the described receiver frequency mixer second input second sub-input; Have drain electrode, be connected with described receiver frequency mixer first output.
Optionally, comprise also that mixing is load unit initiatively.Described mixing is load unit initiatively, and receiver frequency mixer the 3rd input is used for input direct current biasing signal; The 3rd group of the 5th PMOS pipe has drain electrode, is connected with described receiver frequency mixer the 3rd input K; Have grid, grid leak connects; Has source electrode; The 3rd group of the 6th PMOS pipe has drain electrode, is connected with the drain electrode of described the 3rd group of the 2nd NMOS pipe, is connected with described receiver frequency mixer first output simultaneously; Have grid, be connected with described receiver frequency mixer the 3rd input; Has source electrode; The 3rd group of the 7th PMOS pipe has drain electrode, is connected with the drain electrode of described the 3rd a group of NMOS pipe, is connected with described receiver frequency mixer second output simultaneously; Have grid, be connected with described receiver frequency mixer the 3rd input; Has source electrode; The source electrode of the source electrode of described the 3rd group of the 5th PMOS pipe, the 3rd group of the 6th PMOS pipe is connected with the source electrode of the 3rd group of the 7th PMOS pipe.
Compared with prior art, above-mentioned receiver frequency mixer is suitable for handling the reception signal of different frequency range, shares device to greatest extent.Described receiver frequency mixer and low noise amplifier cooperating, the output stage of low noise amplifier and the input stage of receiver frequency mixer have been saved, the pattern of current-voltage-voltage-to-current has been simplified to the pattern of electric current-electric current, the input stage that is low noise amplifier directly is connected with the output stage of receiver frequency mixer, thereby simplified design, and then reduced cost.
Description of drawings
Fig. 1 is the system hardware structure schematic diagram of the applied multi-frequency band radio-frequency identification of the present invention read write line;
Fig. 2 is the frequency synthesizer hardware configuration schematic diagram of the applied multi-frequency band radio-frequency identification of the present invention read write line;
Fig. 3 is the receiver hardware configuration schematic diagram of the applied multi-frequency band radio-frequency identification of the present invention read write line;
Fig. 4 is the transmitter hardware configuration schematic diagram of the applied multi-frequency band radio-frequency identification of the present invention read write line;
Fig. 5 is the system block diagram of the applied multi-frequency band radio-frequency identification of the present invention read write line;
Fig. 6 is the embodiment one of the low noise amplifier that cooperates with the present invention;
Fig. 7 is the embodiment two of the low noise amplifier that cooperates with the present invention;
Fig. 8 is the embodiment three of the low noise amplifier that cooperates with the present invention;
Fig. 9 is the embodiment four of the low noise amplifier that cooperates with the present invention;
Figure 10 is the circuit realization figure of the low noise amplifier that cooperates with the present invention;
Figure 11 is the low noise amplifier 1111-1114 equivalent circuit diagram that cooperates with the present invention;
Figure 12 is the transfer function schematic diagram of the low noise amplifier that cooperates with the present invention;
Figure 13 is the embodiment one of receiver frequency mixer of the present invention;
Figure 14 is the embodiment two of receiver frequency mixer of the present invention;
Figure 15 is the circuit realization figure of the embodiment two of receiver frequency mixer of the present invention;
Figure 16 A is the effect schematic diagram that existing receiver frequency mixer cooperates with low noise amplifier;
Figure 16 B is the effect schematic diagram that existing receiver frequency mixer cooperates with low noise amplifier.
Embodiment
Be described in detail below in conjunction with the embodiment of the drawings and specific embodiments to radio-frequency identification reader/writer of the present invention.
Please refer to Fig. 1, it has shown the system hardware structure of the applied radio frequency discrimination RFID read write line of the present invention.Described radio frequency discrimination RFID read write line is for the treatment of the radiofrequency signal that receives, and the output radiofrequency signal.It comprises radio-frequency (RF) transceiver front-end module 10, receiver 11, transmitter 12, frequency synthesizer 13, digital signal processor 14.Optionally, also comprise energy conservation device 15.
Radio-frequency (RF) transceiver front-end module 10 couples with receiver 11, transmitter 12 respectively.First end and the radio-frequency (RF) transceiver front-end module 10 of receiver 11 couple, and second end and digital signal processor 14 couple, and the 3rd end and frequency synthesizer 13 couple.First end and the radio-frequency (RF) transceiver front-end module 10 of transmitter 12 couple, and second end and digital signal processor 14 couple, and the 3rd end and frequency synthesizer 13 couple.One end and the digital signal processor 14 of frequency synthesizer 13 couple, and the other end couples with receiver 11, transmitter 12 respectively.One end and the receiver 11 of digital signal processor 14 couple, and the other end and transmitter 12 couple.Energy conservation device 15 couples with receiver 11, transmitter 12, frequency synthesizer 13, digital signal processor 14 respectively.
Described radio-frequency (RF) transceiver front-end module 10 is used for receiving and emitting radio frequency signal.It is coupling inductance or antenna.Receiving, when launching the 0.135-13.56MHz frequency signal, using coupling inductance; Receiving, using during the non-0.135-13.56MHz frequency band signals of emission antenna.
Described digital signal processor 14, for the treatment of the radiofrequency signal that digitized described radio-frequency (RF) transceiver front-end module 10 receives, the externally digital signal of emission is treated in output.
Described frequency synthesizer 13 is used for providing mixed frequency signal at least one working frequency range to described receiver 11 or transmitter 12; Described mixed frequency signal is to generate according to the frequency of the output signal correspondence of the frequency of the reception signal of described radio-frequency (RF) transceiver front-end module 10 or described digital signal processor 14.When radiofrequency signal was input to described receiver 11,13 pairs of all frequency ranges of described frequency synthesizer were searched for back locking strongest signal frequency, are defined as the work at present frequency range, and output and the corresponding mixed frequency signal of work at present frequency range.
Such as, the local oscillator mixed frequency signal of frequency synthesizer 13 correspondence when at first the output services frequency range is 13.56MHz, after, judged whether to receive by receiver 11 radiofrequency signal of 13.56MHz by digital signal processor 14, if can receive the reception signal of described corresponding frequency band, then received by the same signal of transmitter 12 output and launch communication; If digital signal processor 14 is judged the radiofrequency signal that does not have 13.56MHz, then export the local oscillator mixed frequency signal of next frequency range correspondence by frequency synthesizer 13, such as 433MHz, and judge whether to receive by receiver 11 radiofrequency signal of corresponding frequency band by digital signal processor 14, till the radiofrequency signal that can receive described corresponding frequency band.
Described receiver 11, the radiofrequency signal of the various frequency ranges that receive for the treatment of described radio-frequency (RF) transceiver front-end module 10 outputs to described digital signal processor 14 with the signal after handling.The radiofrequency signal of characteristic frequency, by the low noise amplification back of correspondence and the corresponding mixed frequency signal down-conversion mixing of described frequency synthesizer 13 outputs, filtering exports digital signal processor 14 to after removing and disturbing also digitlization.
Described transmitter 12 for the treatment of the digital signal corresponding with various frequencies of described digital signal processor 14 outputs, outputs to described radio-frequency (RF) transceiver front-end module 10 with the signal after handling.After signal from digital signal processor 14 outputs of characteristic frequency, convert analog signal filtering removal interference again to, correspond to 433MHz when transmitting and during with upper frequency, with the corresponding mixed frequency signal up-conversion mixing together of frequency synthesizer 13 outputs, the radio-frequency (RF) transceiver front-end module 10 of correspondence is amplified and outputed to power drive then; When corresponding to the 0.135-13.56MHz frequency when transmitting, change into analog signal and filtering after, Direct Power drive to be amplified back input radio frequency transceiver front-end module 10.
Optionally, described energy conservation device 15 is responsible for providing the energy to receiver 11, transmitter 12, frequency synthesizer 13, digital signal processor 14.
Described radio frequency discrimination RFID read write line operation principle is:
Receive and when handling each frequency band signals, it is by the signal of the various frequency ranges of radio-frequency (RF) transceiver front-end module 10 receptions, after the amplification of frequency low noise, corresponding mixed frequency signal down-conversion mixing with frequency synthesizer 13 outputs, filtering is subsequently eliminated and is disturbed, analog signal conversion is become digital signal, supplied with digital signal processor 14.
Handle and when launching each frequency band signals, it is by digital signal processor 14 outputs characteristic frequency digital signal to be launched, after converting analog signal to, filtering is removed and is disturbed, when transmit frequency band is 433MHz and during with super band, after the corresponding mixed frequency signal up-conversion mixing by frequency and frequency synthesizer 13 outputs, drive amplification by frequency power, output to radio-frequency (RF) transceiver front-end module 10 at last; When transmit frequency band is 0.135-13.56MHz, because the carrier waveform of modulation signal is directly synthetic by digital signal processor 14, amplify so directly carry out power drive after the analog signal filtering, output to radio-frequency (RF) transceiver front-end module 10 at last.
Optionally, different frequency signals does not receive simultaneously, launches and handles, and shares to greatest extent guaranteeing under the prerequisite of performance.
With reference to figure 2, the frequency synthesizer hardware configuration of the applied multi-frequency band radio-frequency identification of the present invention read write line.Described frequency synthesizer 13 is used for the frequency according to the output signal correspondence of the frequency of the reception signal of described radio-frequency (RF) transceiver front-end module or described digital signal processor, generate corresponding mixed frequency signal, and under a kind of reception of frequency signal, emission mode, providing mixed frequency signal to receiver 11, transmitter 12 at least, it comprises voltage controlled oscillator 132, broken number frequency division synthesizer 131, local oscillator divider 134, local oscillator receiver frequency mixer 133 and divider 135.
The output of the input of broken number frequency division synthesizer 131 and digital signal processor 14 couples, the input of the output of broken number frequency division synthesizer 131 and voltage controlled oscillator 132 couples, the output of voltage controlled oscillator 132 respectively with local oscillator receiver frequency mixer 133, the input of local oscillator divider 134 couples, the output of local oscillator divider 134 and local oscillator receiver frequency mixer 133 couple, the output of local oscillator receiver frequency mixer 133 and the input of divider 135 couple, the output of divider 135 respectively with receiver frequency mixer 112, the coupling of transmitter receiver frequency mixer 123.
Described voltage controlled oscillator 132 and broken number frequency division synthesizer 131 are used for cooperating to produce local oscillation signal.
Described local oscillator divider 134 is used for frequency division or cushions described local oscillation signal.
Described local oscillator receiver frequency mixer 133, be used for mixing or cushion described local oscillation signal and described local oscillator divider 134 frequency divisions or buffering after signal.
Described divider 135, be used for frequency division cushion 133 mixing of described local oscillator receiver frequency mixer or buffering after signal, produce the mixed frequency signal of described frequency synthesizer 13 outputs.
Describe the operation principle of each reception/emission band situation lower frequency synthesizer 13 in detail below with reference to Fig. 5:
When reception/emission band is 5800MHz, the frequency of voltage controlled oscillator 132 is set to 3867MHz.Corresponding, local oscillator divider 134 is set to 2 frequency divisions, and divider 135 is set to buffering, and local oscillator receiver frequency mixer 133 is set to mixing.Its method for generating local oscillation signal is the output of voltage controlled oscillator 132 and the 2 frequency division up-conversion mixing of oneself.
When reception/emission band is 2450MHz, the frequency of voltage controlled oscillator 132 is set to 3267MHz.Corresponding, local oscillator divider 134 is set to 2 frequency divisions, and divider 135 is set to 2 frequency divisions, and local oscillator receiver frequency mixer 133 is set to mixing.Its method for generating local oscillation signal is the output of voltage controlled oscillator 132 and 2 mixing of frequency division up-conversion, 2 frequency divisions then of oneself.
When reception/emission band is 900MHz, the frequency of voltage controlled oscillator 132 is set to 3600MHz.Corresponding, local oscillator divider 134 is set to 2 frequency divisions, and divider 135 is set to 6 frequency divisions, and local oscillator receiver frequency mixer 133 is set to mixing.Its method for generating local oscillation signal is the output of voltage controlled oscillator 132 and 2 mixing of frequency division up-conversion, 6 frequency divisions then of oneself.
When reception/emission band is 433MHz, the frequency of voltage controlled oscillator 132 is set to 3464MHz.Corresponding, local oscillator divider 134 is set to 2 frequency divisions, and divider 135 is set to 12 frequency divisions, and receiver frequency mixer 133 is set to mixing.Its method for generating local oscillation signal is the output of voltage controlled oscillator 132 and 2 mixing of frequency division up-conversion, 12 frequency divisions then of oneself.
When reception/emission band is 13.56MHz, the frequency of voltage controlled oscillator 132 is set to 3471MHz.Corresponding, local oscillator divider 134 is set to 2 frequency divisions, and the receiver frequency mixer is set to buffering, and divider is set to 128 frequency divisions.Its method for generating local oscillation signal is output 2 frequency divisions of voltage controlled oscillator 132,128 frequency divisions then.
When reception/emission band is 0.135MHz, voltage controlled oscillator 132 is not worked.
Please refer to Fig. 3, it has shown the receiver hardware configuration of the applied multi-frequency band radio-frequency identification of the present invention read write line.Described receiver 11 connects the radiofrequency signal of the 10 various frequency ranges of receiving for the treatment of described radio-frequency (RF) transceiver front-end module, and the signal after handling is outputed to described digital signal processor 14.It comprises low noise amplifier 111, receiver frequency mixer 112, filter for receiver 113, analog to digital converter 114.
The output of the input of low noise amplifier 111 and radio-frequency (RF) transceiver front-end module 10 couples, the output of low noise amplifier 111 and receiver frequency mixer 112 inputs couple, the output of receiver frequency mixer 112 another inputs and frequency synthesizer 13 couples, the input of receiver frequency mixer 112 outputs and filter for receiver 113 couples, the input of the output of filter for receiver 113 and analog to digital converter 114 couples, and the input of the output of analog to digital converter 114 and digital signal processor 14 couples.
Described low noise amplifier 111 be used for to amplify the radiofrequency signal of each frequency range that described radio-frequency (RF) transceiver front-end module 10 receives.Low noise amplifier generally is positioned at the input that amplifies link, at given gain requirement, introduces as far as possible little internal noise, and obtains the signal to noise ratio of maximum possible at output.The radiofrequency signal of different frequency range is by outputing to receiver receiver frequency mixer 112 after the low noise amplifier amplification separately.
With reference to the accompanying drawings 5, in the present embodiment, described low noise amplifier 111 comprises, first low noise amplifier 1115, second low noise amplifier, 1114, the three low noise amplifiers 1113, the 4th low noise amplifier 1112, the 5th low noise amplifier 1111.
Input and the coupling inductance of first low noise amplifier 1115 couple, second low noise amplifier 1114, input and the antennal interface of the 3rd low noise amplifier 1113, the 4th low noise amplifier 1112, the 5th low noise amplifier 1111 couple, more than the output of each low noise amplifier all couple with the input of filter for receiver.
Described first low noise amplifier 1115 is used for amplifying the reception signal of 0.135-13.56MHz frequency range.
Described second low noise amplifier 1114 is used for amplifying the reception signal of 433MHz frequency range.
Described the 3rd low noise amplifier 1113 is used for amplifying the reception signal of 900MHz frequency range.
Described the 4th low noise amplifier 1112 is used for amplifying the reception signal of 2450MHz frequency range.
Described the 5th low noise amplifier 1111 is used for amplifying the reception signal of 5800MHz frequency range.
Select 5 low noise amplifiers in the present embodiment for use, in other embodiments, can count the number that demand is adjusted low noise amplifier according to the frequency range of reality.
Described receiver frequency mixer 112, the radiofrequency signal after the local oscillator mixed frequency signal mixing that the radiofrequency signal after being used for amplifying and described frequency synthesizer 13 generate or buffering are amplified.
Described filter for receiver 113 is used for the signal after the mixing is removed interference.Receive the difference of frequency range, be used for obtaining the characteristic frequency identical with specific reception frequency range and other frequency of filtering, receive signal and further amplified and filtering interfering, and owing to also can be suppressed output orthogonal signal I and Q from obstruction, self-mixing and the asymmetric direct current biasing that causes.
Described analog to digital converter 114 is used for removing signal digitalized after the interference, and the signal after the digitlization is outputed to described digital signal processor.
The operation principle of described receiver is, the signal after low noise amplifier 111 will amplify output to receiver frequency mixer 112.Receiver frequency mixer 112 arranges pattern according to the frequency of frequency synthesizer locking, and when the signal that receives was 0.135MHz, receiver frequency mixer 112 was set to buffer mode, the direct output signal of not mixing; When the signal that receives was non-0.135MHz, receiver frequency mixer 112 converted input signal to low frequency signal output after exporting the mixed frequency signal mixing according to frequency range and corresponding frequency synthesizer 13.Signal after receiver frequency mixer 112 will be handled outputs to filter for receiver 113.The parameter of filter for receiver is according to the frequency setting of frequency synthesizer 13 lockings.Through behind the low pass filter, signal is further amplified and filtering interfering simultaneously, and owing to also can be suppressed from obstruction, self-mixing and the asymmetric direct current biasing that causes.Filter for receiver 113 output orthogonal signal I and Q change 114 via analog to digital converter and send to digital signal processor 14 after changing digital signal into.The parameter of analog to digital converter 114 is according to the frequency setting of frequency synthesizer 13 lockings.
Please refer to Fig. 4, is the transmitter hardware configuration of the applied multi-frequency band radio-frequency identification of the present invention read write line.Described transmitter is for the treatment of the signal from digital signal processor 14, and provides input signal to radio-frequency (RF) transceiver front-end module 10.It comprises digital to analog converter 121, transmitter filter 122, transmitter receiver frequency mixer 123 and driving power amplifier 124.
The output of the input of digital to analog converter 121 and digital signal processor 14 couples, the output of digital to analog converter 121 and transmitter filter 122 inputs couple, transmitter filter 122 another inputs and frequency synthesizer 13 couple, transmitter filter 122 outputs and transmitter receiver frequency mixer 123 inputs couple, and the input of transmitter receiver frequency mixer 123 outputs and transmitting power driving amplifier 124 couples.The output of transmitting power driving amplifier 125 and radio-frequency (RF) transceiver front-end module 10 couple.
Described transmitter power driver 124 be used for armed signal is amplified to the corresponding performance number of exporting with described digital signal processor of digital signal content, and the signal after will amplifying outputs to described radio-frequency (RF) transceiver front-end module.When the frequency range that requires to transmit is 0.135-13.56MHz, receive the signal of directly exporting from transmitter filter 122; When the frequency range that requires to transmit is the 433MHz frequency range, receive from the signal of the 4th transmitter receiver frequency mixer 1234 outputs; When the frequency range that requires to transmit is the 900MHz frequency range, receive from the signal of the 3rd transmitter receiver frequency mixer 1233 outputs; When the frequency range that requires to transmit is the 2450MHz frequency range, receive from the signal of the second transmitter receiver frequency mixer, 1232 outputs; When the frequency range that requires to transmit is the 5800MHz frequency range, receive from the signal of the first transmitter receiver frequency mixer, 1231 outputs.
Described transmitter receiver frequency mixer 123 is used for the mixed frequency signal mixing with the signal after the filtering elimination interference and 13 generations of described frequency synthesizer, and the signal after the mixing is outputed to described power driving amplifier.Be used for the frequency range command request according to tranmitting frequency, after the corresponding frequency mixing with the output frequency of transmitter filter 122 and frequency synthesizer 13 outputs, export these signals to transmitting power driving amplifier 124.
Described transmitter filter 122, the analog signal that is used for after logarithmic mode is changed is eliminated interference, and to emitter receiver frequency mixer 123 these signals of output, or directly to transmitting power driving amplifier 124 these signals of output.When the frequency range of tranmitting frequency is 0.135-13.56MHz, directly to transmitting power driving amplifier 124 these signals of output; When the frequency range of tranmitting frequency is 433MHz and when above, to emitter receiver frequency mixer 123 these signals of output.
Described analog-to-digital conversion device 121 is used for the digital signal of described digital signal processor 14 outputs is changed into analog signal, and outputs to described transmitter filter 122.
With reference to figure 5, in an application of the invention, described transmitter receiver frequency mixer 123, comprise the first transmitter receiver frequency mixer 1231, the second transmitter receiver frequency mixer, 1232, the three transmitter receiver frequency mixers, 1233, the four transmitter receiver frequency mixers 1234.
The input of above-mentioned transmitter receiver frequency mixer all couples with transmitter filter 122, and output and transmitter power driver 124 couple.
The described first transmitter receiver frequency mixer 1231 is used for the transmit mixing of frequency range of 5800MHz.
The described second transmitter receiver frequency mixer 1232 is used for the transmit mixing of frequency range of 2450MHz.
Described the 3rd transmitter receiver frequency mixer 1233 is used for the transmit mixing of frequency range of 900MHz.
Described the 4th transmitter receiver frequency mixer 1234 is used for the transmit mixing of frequency range of 433MHz.
In the present embodiment, select 4 transmitter receiver frequency mixers for use, in other embodiments, can adjust the number of transmitter receiver frequency mixer according to the requirement of frequency range number.
The operation principle of described transmitter is, treat the externally digital signal of emission, from outputed to described digital to analog converter 121 by digital signal processor 14, the corresponding analog signal that this digital signal is converted to outputs to transmitter filter 122, at this frequency range filtering, eliminate and disturb.When transmit frequency band is 433MHz and when above, after the mixed frequency signal up-conversion mixing of transmitter receiver frequency mixer 123 with the corresponding band of the output signal of transmitter filter 122 and frequency synthesizer output, by power driving amplifier 124 signal power of this frequency range is amplified, and transmitting to this frequency range of output of radio-frequency (RF) transceiver front-end module 10; When transmit frequency band requires to 0.135-13.56MHz, because the carrier waveform of modulation signal is directly synthetic by digital signal processor 14, so the signal after transmitter filter 122 will be handled directly outputs to power driving amplifier 124.Signal after power drive is amplified outputs to radio-frequency (RF) transceiver front-end module 10.
Fig. 6 is the embodiment one of low noise amplifier of the present invention.
Described low noise amplifier comprises first input end A, the first input selecting side female end A1, the first output B; Also comprise the first low pass current mirror, 1, the first amplifying circuit 2 and select circuit 3.
Described first input end A can be used for importing the direct current biasing signal; The described first input selecting side female end A1 can be used for the input radio frequency signal; The described first output B is used for the signal after output is handled.
The described first low pass current mirror 1 is for the treatment of the direct current biasing signal of first input end A input; Its first end is described first input end A, the second end ground connection.
Described first amplifying circuit 2 is used for cooperating with the described first low pass current mirror 1, amplifies the radiofrequency signal of the described first input selecting side female end A1 input; Its first end and the described first low pass current mirror the 3rd end, and with described first the input selecting side female end A1 be connected, its second end is the first output B.
Described first amplifying circuit 2 comprises the first sub-amplifying circuit and the second sub-amplifying circuit at least, first end of the described first sub-amplifying circuit and the second sub-amplifying circuit is connected and is connected with the described first input selecting side female end A1, and second end connects and is connected with the first output B.
Described selection circuit 3 is used for that described sub-amplifying circuit is suitable for and handles the radiofrequency signal that the described first input selecting side female end A1 imports; Its first end is connected the second end ground connection with described first amplifying circuit 2;
Described selection circuit 3 and first end that described first amplifying circuit 2 is connected comprise at least two son ends, and described son end is connected separately with the 3rd end of the described first sub-amplifying circuit and the second sub-amplifying circuit respectively.
Among the embodiment one, described low noise amplifier can be used for amplifying above each the frequency range single-ended radio frequency signal of 13.56MHz.First input end A input direct current biasing signal, the first input selecting side female end A1 input radio frequency signal.First amplifying circuit 20 comprises the first sub-amplifying circuit and the second sub-amplifying circuit at least, the described first sub-amplifying circuit and the second sub-amplifying circuit are suitable for respectively cooperating the radiofrequency signal of amplifying two kinds of different frequency ranges with the first low pass current mirror 10, determine the frequency range that it is suitable for by the parameter of selecting circuit 30.And then make low noise amplifier be suitable for amplifying the multi-frequency band radio-frequency signal.
Fig. 7 is the embodiment two of low noise amplifier of the present invention.
Described low noise amplifier comprises first input end A, the first input selecting side female end A1, the first output B; Also comprise the first low pass current mirror, 1, the first amplifying circuit 2 and select circuit 3; Also comprise first low-frequency amplifier circuit 4.
Described first input end A can be used for importing the direct current biasing signal, also can be used for importing low frequency signal; The described first input selecting side female end A1 can be used for the input radio frequency signal; The described first output B is used for the signal after output is handled.
The described first low pass current mirror 1 is for the treatment of the direct current biasing signal of first input end A input; Its first end is described first input end A, the second end ground connection.
Described first amplifying circuit 2 is used for cooperating with the described first low pass current mirror 1, amplifies the radiofrequency signal of the described first input selecting side female end A1 input; Its first end and the described first low pass current mirror the 3rd end, and with described first the input selecting side female end A1 be connected, its second end is the first output B.
Described first amplifying circuit 2 comprises the first sub-amplifying circuit and the second sub-amplifying circuit at least, first end of the described first sub-amplifying circuit and the second sub-amplifying circuit is connected and is connected with the described first input selecting side female end A1, and second end connects and is connected with the first output B.
Described selection circuit 3 is used for that described sub-amplifying circuit is suitable for and handles the radiofrequency signal that the described first input selecting side female end A1 imports; Its first end is connected the second end ground connection with described first amplifying circuit 2;
Described selection circuit 3 and first end that described first amplifying circuit 2 is connected comprise at least two son ends, and described son end is connected separately with the 3rd end of the described first sub-amplifying circuit and the second sub-amplifying circuit respectively.
Described first low-frequency amplifier circuit 4 is used for cooperating with the described first low pass current mirror 1, amplifies the radiofrequency signal of described first input end A input; Its first end is connected with the described first low pass current mirror 1, the second end ground connection, and the 3rd end is the described first output B.
Among the embodiment two, described low noise amplifier not only can be used for amplifying above each the frequency range single-ended radio frequency signal of 13.56MHz, also can be used for amplifying 13.56MHz and following frequency range single-ended radio frequency signal.
When radiofrequency signal is 13.56MHz during with super band, first input end A input direct current biasing signal, the first input selecting side female end A1 input radio frequency signal.First amplifying circuit 20 comprises the first sub-amplifying circuit and the second sub-amplifying circuit at least, the described first sub-amplifying circuit and the second sub-amplifying circuit are suitable for respectively cooperating the radiofrequency signal of amplifying two kinds of different frequency ranges with the first low pass current mirror 10, determine the frequency range that it is suitable for by the parameter of selecting circuit 30.And then make low noise amplifier be suitable for amplifying the multi-frequency band radio-frequency signal.
When radiofrequency signal is 13.56MHz and following frequency range, first input end A input direct current biasing signal and radiofrequency signal.Select the parameter of circuit 30 to determine first amplifying circuit 20 not handle the signal of 13.56MHz and following frequency range.At this moment, first low-frequency amplifier circuit 4 cooperates with the first low pass current mirror 1, amplifies 13.56MHz and the following frequency range radiofrequency signal of described first input end A input.
Fig. 8 is the embodiment three of low noise amplifier of the present invention.
Low noise amplifier among the embodiment three comprises first input end A by difference symmetry structural design, the first input selecting side female end A1, the first output B; Also comprise the first low pass current mirror, 1, the first amplifying circuit 2 and select circuit 3.
The difference symmetry, also comprise the second input D, the second input selecting side female end D1, the second output E; The second low pass current mirror 5 and second amplifying circuit 6.
Described first input end A can be used for importing the direct current biasing signal; The described first input selecting side female end A1 can be used for the input radio frequency signal; The described first output B is used for the signal after output is handled.
The described first low pass current mirror 1 is for the treatment of the direct current biasing signal of first input end A input; Its first end is described first input end A, the second end ground connection.
Described first amplifying circuit 2 is used for cooperating with the described first low pass current mirror 1, amplifies the radiofrequency signal of the described first input selecting side female end A1 input; Its first end and the described first low pass current mirror the 3rd end, and with described first the input selecting side female end A1 be connected, its second end is the first output B.
Described first amplifying circuit 2 comprises the first sub-amplifying circuit and the second sub-amplifying circuit at least, first end of the described first sub-amplifying circuit and the second sub-amplifying circuit is connected and is connected with the described first input selecting side female end A1, and second end connects and is connected with the first output B.
Described selection circuit 3 is used for that described sub-amplifying circuit is suitable for and handles the radiofrequency signal that the described first input selecting side female end A1 imports; Its first end is connected the second end ground connection with described first amplifying circuit 2;
Described selection circuit 3 and first end that described first amplifying circuit 2 is connected comprise at least two son ends, and described son end is connected separately with the 3rd end of the described first sub-amplifying circuit and the second sub-amplifying circuit respectively.
The described second input D can be used for input and the corresponding direct current biasing signal of described first input end A; The described second input selecting side female end D1 can be used for importing the radiofrequency signal that equates with the opposite numerical value of the described first input selecting side female end A1 polarity; The described second output E is used for the signal after output is handled.
The described second low pass current mirror 5 is for the treatment of the direct current biasing signal; Its first end is the described second input D, the second end ground connection.
Described second amplifying circuit 6 is used for cooperating with the described second low pass current mirror 5, by described first amplifying circuit, 2 corresponding multiples, amplifies the radiofrequency signal of the described first input selecting side female end D1 input; Its first end is connected with the described second low pass current mirror 5 the 3rd end, and is connected with the described second input selecting side female end D1, and its second end is the second output E.
Described second amplifying circuit 6 comprises the 3rd sub-amplifying circuit and the 4th sub-amplifying circuit at least, first end of the described the 3rd sub-amplifying circuit and the 4th sub-amplifying circuit is in parallel and is connected with the described second input selecting side female end D1, and the parallel connection of second end also is connected with the first output E.
The 3rd end of described selection circuit 3 is connected with the 3rd end of described second amplifying circuit 6, and the 3rd end of described selection circuit 3 comprises at least two son ends, and described son end is connected separately with the 3rd end of the described the 3rd sub-amplifying circuit and the 4th sub-amplifying circuit respectively.
Among the embodiment three, described low noise amplifier can be used for amplifying above each the frequency range fully differential radiofrequency signal of 13.56MHz.First input end A input direct current biasing signal, the first input selecting side female end A1 imports anodal radiofrequency signal.First amplifying circuit 20 comprises the first sub-amplifying circuit and the second sub-amplifying circuit at least, the described first sub-amplifying circuit and the second sub-amplifying circuit are suitable for respectively cooperating the anodal radiofrequency signal of amplifying two kinds of different frequency ranges with the first low pass current mirror 10, determine the frequency range that it is suitable for by the parameter of selecting circuit 30.And then make low noise amplifier be suitable for amplifying the multi-frequency band radio-frequency signal.
The difference symmetry, second input D input direct current biasing signal, the second input selecting side female end D1 input negative pole radiofrequency signal.Second amplifying circuit 6 comprises that at least the 3rd sub-amplifying circuit and the 4th sub-amplifying circuit the described the 3rd sub-amplifying circuit and the 4th sub-amplifying circuit are suitable for respectively cooperating the negative pole radiofrequency signal of amplifying two kinds of different frequency ranges with the first low pass current mirror 10, determines the frequency range that it is suitable for by the parameter of selecting circuit 30.Make that second output E output is opposite with the first output B polarity, the signal that numerical value equates.And then make low noise amplifier be suitable for amplifying multiband fully differential radiofrequency signal, suppress noise and the interference of common mode.
Fig. 9 is the embodiment four of low noise amplifier of the present invention.
Low noise amplifier among the embodiment four comprises first input end A by difference symmetry structural design, the first input selecting side female end A1, the first output B; Also comprise the first low pass current mirror, 1, the first amplifying circuit 2 and select circuit 3.
The difference symmetry, also comprise the second input D, the second input selecting side female end D1, the second output E; The second low pass current mirror 5 and second amplifying circuit 6.
Also comprise first low-frequency amplifier circuit 4 and with second low-frequency amplifier circuit 5 of described first low-frequency amplifier circuit, 4 difference symmetries.
The low noise amplifier of embodiment four not only can be used for amplifying above each the frequency range fully differential radiofrequency signal of 13.56MHz, also can be used for amplifying 13.56MHz and following frequency range fully differential radiofrequency signal.
When radiofrequency signal is 13.56MHz during with super band, first input end A input direct current biasing signal, the first input selecting side female end A1 imports anodal radiofrequency signal.First amplifying circuit 20 comprises the first sub-amplifying circuit and the second sub-amplifying circuit at least, the described first sub-amplifying circuit and the second sub-amplifying circuit are suitable for respectively cooperating the radiofrequency signal of amplifying two kinds of different frequency ranges with the first low pass current mirror 10, determine the frequency range that it is suitable for by the parameter of selecting circuit 30.And then make low noise amplifier be suitable for amplifying the multi-frequency band radio-frequency signal.
The difference symmetry, second input D input direct current biasing signal, the second input selecting side female end D1 input negative pole radiofrequency signal.Second amplifying circuit 6 comprises that at least the 3rd sub-amplifying circuit and the 4th sub-amplifying circuit the described the 3rd sub-amplifying circuit and the 4th sub-amplifying circuit are suitable for respectively cooperating the negative pole radiofrequency signal of amplifying two kinds of different frequency ranges with the first low pass current mirror 10, determines the frequency range that it is suitable for by the parameter of selecting circuit 30.Make that second output E output is opposite with the first output B polarity, the signal that numerical value equates.And then make low noise amplifier be suitable for amplifying multiband fully differential radiofrequency signal, suppress noise and the interference of common mode.
When radiofrequency signal is 13.56MHz and following frequency range, first input end A input direct current biasing signal and anodal radiofrequency signal.Select the parameter of circuit 30 to determine first amplifying circuit 20 not handle the signal of 13.56MHz and following frequency range.At this moment, first low-frequency amplifier circuit 4 cooperates with the first low pass current mirror 1, amplifies 13.56MHz and the following frequency range radiofrequency signal of described first input end A input.
The difference symmetry, second input D input direct current biasing signal and negative pole radiofrequency signal.Select the parameter of circuit 30 to determine second amplifying circuit 60 not handle the signal of 13.56MHz and following frequency range.At this moment, second low-frequency amplifier circuit 7 cooperates with the second low pass current mirror 5, amplifies 13.56MHz and the following frequency range negative pole radiofrequency signal of described second input D input.And then make that second output E output is opposite with the first output B polarity, the signal that numerical value equates.And then make low noise amplifier be suitable for amplifying multiband fully differential radiofrequency signal, suppress noise and the interference of common mode.
Figure 10 is the circuit realization figure of the low noise amplifier of the embodiment of the invention four.
In order to stablize quiescent point effectively, suppress common-mode signal to amplify difference mode signal, described low noise amplifier is designed to the fully differential symmetrical structure.
Comprise first input end A, the first input selecting side female end A1, the first output B; Also comprise the first low pass current mirror, 1, the first amplifying circuit 2 and select circuit 3; Also comprise first low-frequency amplifier circuit 4.
The difference symmetry, also comprise the second input D, the second input selecting side female end D1, the second output E; The second low pass current mirror 5 and second amplifying circuit 6 and second low-frequency amplifier circuit 5.
Described first input end A can be used for importing the direct current biasing signal, also can be used for importing low frequency signal; The described first input selecting side female end A1 can be used for the input radio frequency signal; The described first output B is used for the signal after output is handled.
The described first low pass current mirror 1 is for the treatment of the direct current biasing signal of first input end A input; Its first end is described first input end A, the second end ground connection.
The described first low pass current mirror 1 comprises first group of the one NMOS pipe N1, first resistance R 1 and first capacitor C 1.
Described first amplifying circuit 2 is used for cooperating with the described first low pass current mirror 1, amplifies the radiofrequency signal of the described first input selecting side female end A1 input; Its first end and the described first low pass current mirror the 3rd end, and with described first the input selecting side female end A1 be connected, its second end is the first output B.
Described first amplifying circuit 2 comprises the first sub-amplifying circuit and the second sub-amplifying circuit at least, first end of the described first sub-amplifying circuit and the second sub-amplifying circuit is connected and is connected with the described first input selecting side female end A1, and second end connects and is connected with the first output B.
First amplifying circuit 2 among Figure 10 comprises the first sub-amplifying circuit, the second sub-amplifying circuit, the 5th sub-amplifying circuit and the 6th sub-amplifying circuit.
The described first sub-amplifying circuit comprises the first input selecting side, the second son end A12 and first group of the 3rd NMOS pipe N3.
The described second sub-amplifying circuit comprises the first input selecting side the 3rd son end A13 and first group of the 4th NMOS pipe N4.
The described the 5th sub-amplifying circuit comprises the first input selecting side the 4th son end A14 and first group of the 5th NMOS pipe N5.
The described the 6th sub-amplifying circuit comprises the first input selecting side the 5th son end A15 and first group of the 6th NMOS pipe N6.
Described first low-frequency amplifier circuit 4 is used for cooperating with the described first low pass current mirror 1, amplifies the radiofrequency signal of described first input end A input; Its first end is connected with the described first low pass current mirror 1, the second end ground connection, and the 3rd end is the described first output B.
Described first low-frequency amplifier circuit 4 comprises the first input selecting side, the first son end A1 and first group of the one NMOS pipe N1.
The described second input D can be used for input and the corresponding direct current biasing signal of described first input end A; The described second input selecting side female end D1 can be used for importing the radiofrequency signal that equates with the opposite numerical value of the described first input selecting side female end A1 polarity; The described second output E is used for the signal after output is handled.
The described second low pass current mirror 5 is for the treatment of the direct current biasing signal; Its first end is the described second input D, the second end ground connection.
The described second low pass current mirror 5 comprises second group of the one NMOS pipe N11, second resistance R, 11, the second capacitor C 11.
Described second amplifying circuit 6 is used for cooperating with the described second low pass current mirror 5, by described first amplifying circuit, 2 corresponding multiples, amplifies the radiofrequency signal of the described first input selecting side female end D1 input; Its first end is connected with the described second low pass current mirror 5 the 3rd end, and is connected with the described second input selecting side female end D1, and its second end is the second output E.
Described second amplifying circuit 6 comprises the 3rd sub-amplifying circuit and the 4th sub-amplifying circuit at least, first end of the described the 3rd sub-amplifying circuit and the 4th sub-amplifying circuit is in parallel and is connected with the described second input selecting side female end D1, and the parallel connection of second end also is connected with the first output E.
Second amplifying circuit 6 shown in Figure 10 comprises the 3rd sub-amplifying circuit, the 4th sub-amplifying circuit, the 6th sub-amplifying circuit and the 7th sub-amplifying circuit.
The described the 3rd sub-amplifying circuit comprises the second input selecting side, the second son end D12 and second group of the 3rd NMOS pipe N33.
The described the 4th sub-amplifying circuit comprises the second input selecting side the 3rd son end D13 and second group of the 4th NMOS pipe N34.
The described the 6th sub-amplifying circuit comprises the second input selecting side the 4th son end D14 and second group of the 5th NMOS pipe N35.
The described the 7th sub-amplifying circuit comprises the second input selecting side the 5th son end D15 and second group of the 6th NMOS pipe N36.
The 3rd end of described selection circuit 3 is connected with the 3rd end of described second amplifying circuit 6, and the 3rd end of described selection circuit 3 comprises at least two son ends, and described son end is connected separately with the 3rd end of the described the 3rd sub-amplifying circuit and the 4th sub-amplifying circuit respectively.
Described second low-frequency amplifier circuit 7 is used for cooperating with the described second low pass current mirror 5, amplifies the radiofrequency signal that the described second input D imports by described first; Its first end is connected with the described second low pass current mirror 5, the second end ground connection, and the 3rd end is the described second output E.
Described second low-frequency amplifier circuit 7 comprises the second input selecting side, the first son end D11, second group of the 2nd NMOS pipe N12.
Described selection circuit 3 is used for that described sub-amplifying circuit is suitable for and handles the radiofrequency signal that the described first input selecting side female end A1 and second imports selecting side female end D1 input; Its first end is connected with described first amplifying circuit 2, the second end ground connection, and the 3rd end is connected with described second amplifying circuit 6;
Described selection circuit 3 and first end that described first amplifying circuit 2 is connected comprise at least two son ends, and described son end is connected separately with the 3rd end of the described first sub-amplifying circuit and the second sub-amplifying circuit respectively.
Described selection circuit 3 is 9 end difference symmetry inductance H.Described 9 end difference symmetry inductance H comprises first end, second end, the 3rd end.
Described first end comprises 4 son ends, is respectively first end, the first son end H1, first end, the second son end H2, first end the 3rd son end H3, first end the 4th son end H4.
Described, first end, the first son end H1 is connected with the source electrode of first group of the 3rd NMOS pipe N3; First end, the second son end H2 is connected with the source electrode of first group of the 4th NMOS pipe N4; First end the 3rd son end H3 is connected with the source electrode of first group of the 5th NMOS pipe N5; First end the 4th son end H4 is connected with the source electrode of first group of the 6th NMOS pipe N6.
The described second end H20, ground connection.
Described the 3rd end comprises 4 son ends, is respectively the 3rd end first son end H31, the 3rd end second son end H32, the 3rd end the 3rd son end H33, the 3rd end the 4th son end H34.
Described the 3rd end first son end H31 is connected with the source electrode of second group of the 3rd NMOS pipe N13; The 3rd end second son end H32 is connected with the source electrode of second group of the 4th NMOS pipe N14, and the 3rd end the 3rd son end H33 is connected with the source electrode of second group of the 5th NMOS pipe N15, and the 3rd end the 4th son end H34 is connected with the source electrode of second group of the 6th NMOS pipe N16.
Described 9 end difference symmetry inductance H, each son end of its first end and the 3rd end and the relation between second end can equivalence be 8 independent inductance.Because the working frequency range of receiver 10 can only lock a frequency at every turn, thus be 9 end symmetric difference inductance with 8 independent inductor design, to save the chip physical area.
The drain electrode of described first group of the one NMOS pipe N1 is first input end A, source ground, and grid is connected with first resistance R 1.
The grid of described first group of the 2nd NMOS pipe N2 is the first input selecting side, the first son end A11, source ground, and drain electrode is the first output B.
The grid of described first group of the 3rd NMOS pipe N3 is the first input selecting side, the second son end A12, and source electrode is connected with the H1 end of 9 end difference symmetry inductance H, and drain electrode is the first output B.
The grid of described first group of the 4th NMOS pipe N4 is the first input selecting side the 3rd son end A13, and source electrode is connected with the H2 end of 9 end difference symmetry inductance H, and drain electrode is the first output B.
The grid of described first group of the 5th NMOS pipe N5 is the first input selecting side the 4th son end A14, and source electrode is connected with the H3 end of 9 end difference symmetry inductance H, and drain electrode is the first output B.
The grid of described first group of the 6th NMOS pipe N6 is the first input selecting side the 5th son end A15, and source electrode is connected with the H4 end of 9 end difference symmetry inductance H, and drain electrode is the first output B.
The drain electrode of described second group of the one NMOS pipe N11 is the second input D, source ground, and grid is connected with second resistance R 2.
The grid of described second group of the 2nd NMOS pipe N12 is the second input selecting side, the first son end D11, source ground, and drain electrode is the second output E.
The grid of described second group of the 3rd NMOS pipe N13 is the second input selecting side, the second son end D12, and source electrode is connected with the H31 end of 9 end difference symmetry inductance H, and drain electrode is the second output E.
The grid of described second group of the 4th NMOS pipe N14 is the second input selecting side the 3rd son end D13, and source electrode is connected with the H32 end of 9 end difference symmetry inductance H, and drain electrode is the second output E.
The grid of described second group of the 5th NMOS pipe N15 is the second input selecting side the 4th son end D14, and source electrode is connected with the H33 end of 9 end difference symmetry inductance H, and drain electrode is the second output E.
The grid of described second group of the 6th NMOS pipe N16 is the second input selecting side the 5th son end D15, and source electrode is connected with the H34 end of 9 end difference symmetry inductance H, and drain electrode is the second output E.
One end of described first resistance R 1 is connected with the grid of first group of the one NMOS pipe N1, and the other end is connected with first capacitor C 1, also is simultaneously the first input selecting side female end A1.
One end of described second resistance R 11 is connected with the grid of second group of the one NMOS pipe N11, and the other end is connected with second capacitor C 11, also is simultaneously the second input selecting side female end A2.
Described first capacitor C 1 is in parallel with the source electrode of described first resistance R 1 and described first group of the one NMOS pipe N1.
Described second capacitor C 11 is in parallel with the source electrode of described second resistance R 11 and described second group of the one NMOS pipe N11.
When the signal of radio-frequency (RF) transceiver 10 output at 13.56MHz and when following, the first input end A of described low noise amplifier 111 and second input D input fully differential radiofrequency signal, import the direct current biasing signal simultaneously, port B and the treated fully differential signal of port E output.By adjusting the capacitance of first capacitor C 1, make described low noise amplifier 111 be suitable for amplifying each frequency of 13.56MHz and following frequency range.
When the signal of radio-frequency (RF) transceiver 10 output when 13.56MHz is above, the first input selecting side female end A1 and the second input selecting side female end D1 input fully differential radiofrequency signal, first input end A and the second input D input direct current biasing signal, the first output B and the treated fully differential signal of second output E output.13.56MHz the signal with the different frequency in the super band is imported by the distinct interface of 9 end differential inductances, realizes the Signal Processing of corresponding frequencies.
With reference to figure 5, the first low noise amplifiers 1115, be used for amplifying 13.56MHz and the following frequency range radiofrequency signal of described radio-frequency (RF) transceiver 10 outputs.With reference to Figure 10, described first low noise amplifier 1115 comprises, first low pass current mirror 1, the first low-frequency amplifier circuit, 4, the second low pass current mirrors 5 and second low-frequency amplifier circuit 7.
Import first low noise amplifier 1115 13.56MHz reach the anodal radiofrequency signal of following frequency range and direct current biasing signal by first input end A, the signal after the processing is by first output B output.The capacitance of described first capacitor C 1 can make first low noise amplifier 1115 be suitable for receiving 13.56MHz and the anodal radiofrequency signal of following frequency range according to the frequency range adjustment.By selecting the mutual conductance coefficient (Gm) of described first group of the one NMOS pipe N1 and first group of the 2nd NMOS pipe N2, make first low noise amplifier 1115 be suitable for amplifying 13.56MHz and the anodal radiofrequency signal of following frequency range and assurance noiseproof feature.
The difference symmetry, 13.56MHz and following frequency range negative pole radiofrequency signal and direct current biasing signal are imported first low noise amplifier 1115 by the second input D, and the signal after the processing is by second output E output.The capacitance of described second capacitor C 11 can make first low noise amplifier 1115 be suitable for receiving and the symmetrical radiofrequency signal of the fully differential of described first input end A input according to the frequency range adjustment.By selecting the mutual conductance coefficient (Gm) of described second group of the one NMOS pipe N11 and second group of the 2nd NMOS pipe N12, make first low noise amplifier 1115 be suitable for amplifying second input D input, with the fully differential symmetry radiofrequency signal of described first input end A input and guarantee noiseproof feature.
With reference to figure 5, the described second low noise amplifier 1111-1114 is used for amplifying the above frequency band signals of 13.56MHz of described radio-frequency (RF) transceiver 10 outputs.It comprises the first low pass current mirror, 1, the first amplifying circuit 2, the second low pass current mirrors, 5, the second amplifying circuits 6 and selects circuit 3.
Described low noise amplifier 1111-1114 operation principle is identical, below is example when being working frequency range with described low noise amplifier 1114 with 433MHz frequency range radiofrequency signal.
Described low noise amplifier 1114 is from the anodal radiofrequency signal of the first input selecting side female end A1 input 433MHz, from first input end A input direct current biasing signal, and the signal after handling from first input end B output.9 end differential inductances, first end the 4th end H4 mouth is to can equivalence being an independently sheet internal inductance (L between the second end H20 s), make described low noise amplifier be suitable for handling the anodal radiofrequency signal of 433MHz.Described low noise amplifier 114 is to the multiplication factor (G of the radiofrequency signal of the 433MHz of described radio-frequency (RF) transceiver 10 inputs Meff) and noiseproof feature (NF), by the parameter g of first group of the one NMOS pipe N1 and second group of the 6th NMOS pipe N6 is set mAnd C GsRealize.
The difference symmetry, described low noise amplifier 1114 is imported the direct current biasing signal from the female D1 input in second input selecting side 433MHz negative pole radiofrequency signal from the second input D, and from second signal of exporting after E output is handled.9 end differential inductances the 3rd end the 4th son end H34 mouth can equivalence be an independently sheet internal inductance to the second end H20 mouth, and inductance value holds the H4 mouth to the identical (L of inductance value between the second end H20 mouth with first end the 4th son s), make described low noise amplifier be suitable for handling 433MHz negative pole radiofrequency signal.Multiplication factor (the G of 1114 pairs of 433MHz negative poles of described low noise amplifier radiofrequency signal Meff) and noiseproof feature (NF), by the parameter g of second group of the one NMOS pipe N11 and second group of the 6th NMOS pipe N16 is set mAnd C GsRealize.
The formula of multiplication factor is,
G meff = I out V s = 1 sC gs ( g m s ( L s + L g ) + 1 sC gs + g m C gs L s + R s )
The formula of noiseproof feature is,
NF = 1 + γ 1 R s 1 g m 1 Q in 2
Figure 11 is the equivalent circuit diagram of one of described low noise amplifier 1111-1114.Be example with low noise amplifier 1114.Equivalent inductance (L S) be that first end the 4th son holds H4 to the second end H20 in the 9 end symmetric difference inductance in the described low noise amplifier 1114, or the 3rd end the 4th son end H34 is to the equivalent inductance of the second end H20.9 end symmetric difference inductance are encapsulated in the chip.
Inductance (L g) be the chip external component.Inductance (L g) end and equivalent N metal-oxide-semiconductor N couple the other end and equivalent resistance R SCouple.
Equivalence metal-oxide-semiconductor N is equivalent to first group of the 6th NMOS pipe N6 in described low noise amplifier 1114, or second group of the 6th NMOS pipe N16.
Equivalent resistance R SEquivalent resistance for the outer transceiver front-end antenna of sheet or coupling inductance.
Described equivalent inductance (L S) and sheet external inductance (L g) cooperate, make described low noise amplifier 1111-1114 impedance matching be suitable for handling the radiofrequency signal of described radio-frequency (RF) transceiver 10 inputs.Wherein formula is,
g m L s C gs = R s
C gs = 1 L s + L g
Figure 12 is the transfer function schematic diagram of low noise amplifier 111 when receiving each frequency band signals.Wherein, F1 is that frequency range is the output waveform of working frequency range B end E end when being 0.135MHz; F2 is the output waveform of working frequency range B end E end when being 13.56MHz; F3 is the output waveform of working frequency range B end E end when being 433MHz; F4 is the output waveform of working frequency range B end E end when being 900MHz; F5 is the output waveform of working frequency range B end E end when being 2450MHz; F6 is the output waveform of working frequency range B end E end when being 5800MHz.
Figure 13 is the embodiment one of receiver frequency mixer of the present invention.Described receiver frequency mixer, be used for the needs according to working frequency range, optionally realize the output of described low noise amplifier is treated the local oscillator mixed frequency signal realization Frequency mixing processing of mixed frequency signal and frequency synthesizer output, or realize the mixed frequency signal buffered is treated in the output of described low noise amplifier, and the signal after the output processing.
Described receiver frequency mixer comprises: receiver frequency mixer first input end BE, the receiver frequency mixer second input GH, receiver mixer output IJ, mixing unit 1121, buffer cell 1122.
Described receiver frequency mixer first input end BE is used for input and treats mixed frequency signal.It comprises: the low noise amplifier first output B and the low noise amplifier second output E.
The described receiver frequency mixer second input GH is used for input local oscillator mixed frequency signal.It comprises, receiver frequency mixer second input, the first son end G and the receiver frequency mixer second input second son end H.
Described receiver mixer output IJ is used for the signal after output is handled.
Described mixing unit 1121 is used for described treating exported after mixed frequency signal and the mixing of described local oscillator mixed frequency signal.
Described buffer cell 1122 is used for the described mixed frequency signal buffering back for the treatment of is exported.
Described mixing unit 1121 comprises described buffer cell 1122.
When the working frequency range for the treatment of the mixed frequency signal correspondence is when (not containing 13.56MHz) below the 13.56MHz, the buffering for the treatment of mixed frequency signal that described buffer cell 1122 is realized from described receiver frequency mixer first input end BE, and by the described mixed frequency signal for the treatment of of described receiver mixer output IJ output.
When the working frequency range for the treatment of the mixed frequency signal correspondence is 13.56MHz and above (containing 13.56MHz), described mixing unit 1121 realize from described receiver frequency mixer first input end BE treat mixed frequency signal and the local oscillator mixed frequency signal mixing corresponding with this working frequency range from the described receiver frequency mixer second input GH, and by the signal after the described receiver mixer output IJ output processing.
Figure 14 is the embodiment two of receiver frequency mixer of the present invention.Described receiver frequency mixer, be used for the needs according to working frequency range, selectivity realizes the output of described low noise amplifier is treated the local oscillator mixed frequency signal realization Frequency mixing processing of mixed frequency signal and frequency synthesizer output, or realize the mixed frequency signal buffered is treated in the output of described low noise amplifier, and the signal after the output processing.In addition, introduce a direct current biasing signal, in order to improve the linearity of Frequency mixing processing.
Described receiver frequency mixer comprises: receiver frequency mixer first input end BE, and the receiver frequency mixer second input GH, receiver mixer output IJ, mixing unit 1121, buffer cell 1122, mixing is load unit 1123 initiatively.
Described receiver frequency mixer first input end BE is used for input and treats mixed frequency signal.It comprises: the low noise amplifier first output B and the low noise amplifier second output E.
The described receiver frequency mixer second input GH is used for input local oscillator mixed frequency signal.It comprises, receiver frequency mixer second input, the first son end G and the receiver frequency mixer second input second son end H.
Described receiver mixer output IJ is used for the signal after output is handled.
Described mixing unit 1121 is used for described treating exported after mixed frequency signal and the mixing of described local oscillator mixed frequency signal.
Described buffer cell 1122 is used for the described mixed frequency signal buffering back for the treatment of is exported.
Described mixing unit 1121 comprises described buffer cell 1122.
Described mixing is load unit 1123 initiatively, is used for improving the linear properties of described mixing unit 1121.Itself and described mixing unit 1121 couple.Described mixing is load unit 1123 initiatively, comprises receiver frequency mixer the 3rd input K, is used for input direct current biasing signal.
When the working frequency range for the treatment of the mixed frequency signal correspondence is 13.56Mhz and when following, the buffering for the treatment of mixed frequency signal that described buffer cell 1122 is realized from described receiver frequency mixer first input end BE, and by the described mixed frequency signal for the treatment of of described receiver mixer output IJ output.
When the working frequency range for the treatment of the mixed frequency signal correspondence is that 13.56Mhz is when above, described mixing unit 1121 realize from described receiver frequency mixer first input end BE treat mixed frequency signal and the local oscillator mixed frequency signal mixing corresponding with this working frequency range from the described receiver frequency mixer second input GH, and by the signal after the described receiver mixer output IJ output processing.
Described mixing is load unit 1123 initiatively, and it improves the linearity of Frequency mixing processing by adjusting described receiver frequency mixer the 3rd input K input direct current biasing signal.
Figure 15 is the circuit realization figure of receiver frequency mixer embodiment two of the present invention.Specify below in conjunction with described circuit realization figure.
Described receiver frequency mixer comprises: receiver frequency mixer first input end BE, and the receiver frequency mixer second input GH, receiver mixer output IJ, mixing unit 1121, buffer cell 1122, mixing is load unit 1123 initiatively.
Described receiver frequency mixer first input end BE is used for input and treats mixed frequency signal.It comprises: the low noise amplifier first output B and the low noise amplifier second output E.
The described receiver frequency mixer second input GH is used for input local oscillator mixed frequency signal.It comprises, receiver frequency mixer second input, the first son end G and the receiver frequency mixer second input second son end H.
Described receiver mixer output IJ is used for the signal after output is handled.Comprise the receiver frequency mixer first output I, the receiver frequency mixer second output J.
Described mixing unit 1121 is used for described treating exported after mixed frequency signal and the mixing of described local oscillator mixed frequency signal.It comprises: the 3rd group of NMOS pipe M1, the 3rd group of the 2nd NMOS pipe M2, the 3rd group of the 3rd NMOS pipe M3, the 3rd group of the 4th NMOS pipe M4.
Described the 3rd group of NMOS pipe M1 has source electrode, is connected with the described low noise amplifier second output E; Have grid, be connected with the described receiver frequency mixer second input first sub-input G; Have drain electrode, be connected with the described receiver frequency mixer first output I;
Described the 3rd group of the 2nd NMOS pipe M2 has source electrode, is connected with the described low noise amplifier first output B; Have grid, be connected with the described receiver frequency mixer second input first sub-input G; Have drain electrode, be connected with the described receiver frequency mixer second output J.
The 3rd group of the 3rd NMOS pipe M3 has source electrode, is connected with the described low noise amplifier second output E; Have grid, be connected with the described receiver frequency mixer second input second sub-input H; Have drain electrode, be connected with the described receiver frequency mixer second output J.
The 3rd group of the 4th NMOS pipe M4 has source electrode, is connected with the described low noise amplifier first output B; Have grid, be connected with the described receiver frequency mixer second input second sub-input H; Have drain electrode, be connected with the described receiver frequency mixer first output I.
When the working frequency range for the treatment of the mixed frequency signal correspondence is that 13.56Mhz is when above, described receiver frequency mixer second input, the first sub-input G and the described receiver frequency mixer second input second sub-input H periodically rotate input high level and low level based on working frequency range.Described mixing unit 1121 realize from described receiver frequency mixer first input end BE treat mixed frequency signal and the local oscillator mixed frequency signal mixing corresponding with this working frequency range from the described receiver frequency mixer second input GH, and by the signal after the described receiver mixer output IJ output processing.
When the described receiver frequency mixer second input first sub-input G input high level, during the sub-input H input low level of described receiver frequency mixer second input second, described the 3rd group of the 3rd NMOS pipe M3, described the 3rd group of the 4th NMOS pipe M4 turn-offs.
Described the 3rd group of NMOS pipe M1 realizes the buffering for the treatment of mixed frequency signal from the described low noise amplifier first output B, and by the described mixed frequency signal for the treatment of of described receiver frequency mixer first output I output.
Described the 3rd group of the 2nd NMOS pipe M2 realizes the buffering from the signal of the described low noise amplifier second output E, and by the described mixed frequency signal for the treatment of of described receiver frequency mixer second output J output.
Signal frequency (the f of described receiver mixer output IJ IJ) with the signal frequency (f of described receiver frequency mixer first input end BE BE) relation can following equation expression.
f IJ＝f BE
At this moment, described receiver frequency mixer 112 is in buffer mode, becomes described buffer cell 1122.Described buffer cell 1122 comprises described the 3rd group of NMOS pipe M1 and described the 3rd group of the 2nd NMOS pipe M2.
When the described receiver frequency mixer second input first sub-input G input low level, during the sub-input H input high level of described receiver frequency mixer second input second, described the 3rd group of the 3rd NMOS pipe M3, described the 3rd group of the 4th NMOS pipe M4 conducting.
Described the 3rd group of NMOS pipe M1 and described the 3rd group of the 3rd NMOS pipe M3 cooperate realization, the mixing of the local oscillator mixed frequency signal for the treatment of mixed frequency signal and the described receiver frequency mixer second input first sub-input G of the described low noise amplifier first output B is by the signal after the described receiver frequency mixer first output I output processing.
Described the 3rd group of the 2nd NMOS pipe M2 and described the 3rd group of the 4th NMOS pipe M4 cooperate realization, the mixing of the local oscillator mixed frequency signal for the treatment of mixed frequency signal and the described receiver frequency mixer second input first sub-input H of the described low noise amplifier first output E is by the signal after the described receiver frequency mixer second output J output processing.
Signal frequency (the f of described receiver mixer output IJ IJ) with the signal frequency (f of described receiver frequency mixer first input end BE BE), the signal frequency f of the described receiver frequency mixer second input GH GHRelation can following equation expression.
f IJ＝f BE-f GH
Described receiver frequency mixer second input, the first sub-input G and the described receiver frequency mixer second input second sub-input H, when periodically rotating input high level and low level based on working frequency range, described the 3rd group of the 3rd NMOS pipe M3 is with the periodic turn-on and turn-off of described the 3rd group of the 4th NMOS pipe M4.Described the 3rd group of the 3rd NMOS pipe M1 periodically turn-offs and conducting with described the 3rd group of the 4th NMOS pipe M2.
At this moment, described receiver frequency mixer 112 is in mixed-mode, by the signal after the described receiver mixer output IJ output Frequency mixing processing.
Described mixing is load unit 1123 initiatively, couples with described mixing unit 1121, is used for improving the linear properties of described mixing unit 1121.Described mixing is load unit 1123 initiatively, comprising: receiver frequency mixer the 3rd input K, the 3rd group of the 5th PMOS pipe M5, the 3rd group of the 6th PMOS pipe M6, the 3rd group of the 7th PMOS pipe M7.
Described receiver frequency mixer the 3rd input K is used for adjusting input direct current biasing signal;
Described the 3rd group of the 5th PMOS pipe M5 is used for and states the 3rd group of the 6th PMOS pipe M6, and described the 3rd group of the 7th PMOS pipe M7 cooperates and improves the mixing linearity.It has drain electrode, is connected with described receiver frequency mixer the 3rd input K; Have grid, grid leak connects; Has source electrode;
Described the 3rd group of the 6th PMOS pipe M6 is used for described the 3rd group of the 2nd PMOS pipe M2 and cooperates, and improves the mixing linearity of the receiver frequency mixer second output second sub-output J.Its with have a drain electrode, is connected with the drain electrode of described the 3rd group of the 2nd NMOS pipe M2, the while is connected with the described receiver frequency mixer first output I; Have grid, be connected with described receiver frequency mixer the 3rd input K; Has source electrode;
Described the 3rd group of the 7th PMOS pipe M7 is used for described the 3rd group of PMOS pipe M1 and cooperates, and improves the mixing linearity of the receiver frequency mixer second output first sub-output I.It has drain electrode, is connected with the drain electrode of described the 3rd group of NMOS pipe M2, is connected with the described receiver frequency mixer second output J simultaneously; Have grid, be connected with described receiver frequency mixer the 3rd input K; Has source electrode.
The source electrode of the source electrode of described the 3rd group of the 5th PMOS pipe M5, the 3rd group of the 6th PMOS pipe M6 is connected with the source electrode of the 3rd group of the 7th PMOS pipe M7.
Receiver mixer linearity degree index is proportional to size of current, therefore can adjust the linearity by adjusting the direct current biasing signal.By regulating the direct current biasing signal of receiver frequency mixer the 3rd end K, the optimization of the linearity of the receipts that achieve a butt joint machine frequency mixer.
The frequency read/write of present embodiment technical scheme provides the technical scheme of multiband compatibility in reception, emission and frequency synthesis technique, compared with prior art, above-mentioned receiver frequency mixer is suitable for handling the reception signal of different frequency range, shares device to greatest extent.Figure 16 A is the effect schematic diagram that existing receiver frequency mixer cooperates with low noise amplifier, Figure 16 B is the effect schematic diagram that receiver frequency mixer of the present invention cooperates with low noise amplifier, as seen receiver frequency mixer of the present invention will with the low noise amplifier cooperating, the output stage of low noise amplifier and the input stage of receiver frequency mixer have been saved, the pattern of current-voltage-voltage-to-current has been simplified to the pattern of electric current-electric current, and the input stage of low noise amplifier directly is connected with the output stage of receiver frequency mixer, thereby simplified design, and then reduced cost.
More than disclose many aspects of the present invention and execution mode, it will be understood by those skilled in the art that other side of the present invention and execution mode.Disclosed many aspects and execution mode just are used for illustrating among the present invention, are not to be limitation of the invention, and real protection range of the present invention and spirit should be as the criterion with claims.

Claims (7)

1. receiver frequency mixer comprises:
Receiver frequency mixer first input end (BE) is used for input and treats to comprise mixed frequency signal: low noise amplifier first output (B), low noise amplifier second output (E);
Receiver frequency mixer second input (GH) is used for input local oscillator mixed frequency signal;
Receiver mixer output (IJ) is used for the signal after output is handled;
Mixing unit (1121) comprising: buffer cell (1122), the 3rd group of the 3rd NMOS pipe (M3) and the 3rd group of the 4th NMOS pipe (M4);
Described buffer cell (1122), comprise: the 3rd group of NMOS pipe (M1), has source electrode, be connected with described low noise amplifier second output (E), has grid, be connected with the described receiver frequency mixer second input first sub-input (G), have drain electrode, be connected with described receiver frequency mixer first output (I); The 3rd group of the 2nd NMOS pipe (M2) has source electrode, is connected with described low noise amplifier first output (B), has grid, be connected with the described receiver frequency mixer second input first sub-input (G), have drain electrode, be connected with described receiver frequency mixer second output (J);
Described the 3rd group of the 3rd NMOS pipe (M3) has source electrode, is connected with described low noise amplifier second output (E); Have grid, be connected with the described receiver frequency mixer second input second sub-input (H); Have drain electrode, be connected with described receiver frequency mixer second output (J);
Described the 3rd group of the 4th NMOS pipe (M4) has source electrode, is connected with described low noise amplifier first output (B); Have grid, be connected with the described receiver frequency mixer second input second sub-input (H); Have drain electrode, be connected with described receiver frequency mixer first output (I).
2. receiver frequency mixer as claimed in claim 1 is characterized in that, the described mixed frequency signal for the treatment of is differential signal.
3. receiver frequency mixer as claimed in claim 1, it is characterized in that, the described mixed frequency signal for the treatment of comprises pattern one and pattern two at least: described pattern one is suitable for described mixing unit (1121) and realizes exporting after mixed frequency signal and the mixing of described local oscillator mixed frequency signal from described treating; Described pattern two is suitable for described buffer cell (1122) and realizes the described mixed frequency signal buffering back for the treatment of is exported.
4. receiver frequency mixer as claimed in claim 3 is characterized in that, described receiver frequency mixer second input comprises receiver frequency mixer second input, the first sub-input (G) and the receiver frequency mixer second input second sub-input (H);
Treat the mixed frequency signal pattern for the moment, described receiver frequency mixer second input first sub-input (G) input high level, described receiver frequency mixer second input second sub-input (H) input low level when described;
When described when treating mixed frequency signal pattern two, described receiver frequency mixer second input, the first sub-input (G) and the described receiver frequency mixer second input second sub-input (H) are rotated input high level or low level based on the operating frequency cycle.
5. receiver frequency mixer as claimed in claim 1 is characterized in that, described receiver mixer output (IJ) comprises receiver frequency mixer first output (I) and receiver frequency mixer second output (J).
6. receiver frequency mixer as claimed in claim 1 is characterized in that, also comprises, mixing is load unit (1123) initiatively, is used for improving the linear properties of described mixing unit.
7. receiver frequency mixer as claimed in claim 6 is characterized in that, described mixing is load unit (1123) initiatively, comprising:
Receiver frequency mixer the 3rd input (K) is used for input direct current biasing signal;
The 3rd group of the 5th PMOS pipe (M5) has drain electrode, is connected with described receiver frequency mixer the 3rd input K; Have grid, grid leak connects; Has source electrode;
The 3rd group of the 6th PMOS pipe (M6) has drain electrode, is connected with the drain electrode of described the 3rd group of the 2nd NMOS pipe (M2), is connected with described receiver frequency mixer first output (I) simultaneously; Have grid, be connected with described receiver frequency mixer the 3rd input (K); Has source electrode;
The 3rd group of the 7th PMOS pipe (M7) has drain electrode, is connected with the drain electrode of described the 3rd group of NMOS pipe (M2), is connected with described receiver frequency mixer second output (J) simultaneously; Have grid, be connected with described receiver frequency mixer the 3rd input (K); Has source electrode;
The source electrode of the source electrode of described the 3rd group of the 5th PMOS pipe (M5), the 3rd group of the 6th PMOS pipe (M6) is connected with the source electrode of the 3rd group of the 7th PMOS pipe (M7).
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