CN102222896A - Electronic device - Google Patents

Abstract

The invention provides an electronic device, which comprises an electrostatic discharge protection circuit, an abnormal voltage detection circuit, an internal circuit and a blocking circuit. The electrostatic discharge protection circuit receives a plurality of input signals, is used for reducing abnormal high voltage generated on a path for transmitting the input signals due to electrostatic discharge, and correspondingly outputs a plurality of input signals after voltage reduction. The input signal includes a control signal group and a data signal group. The abnormal voltage detection circuit is connected with the electrostatic discharge protection circuit. The abnormal voltage detection circuit receives the input signal after voltage reduction and generates a blocking control signal according to the voltage level of the input signal after voltage reduction. The blocking circuit is connected in series between the abnormal voltage detection circuit and the internal circuit and used for receiving the blocking control signal and transmitting the blocking control signal group to the internal circuit according to the blocking control signal.

Description

electronic device

technical field

The invention relates to an electronic device, and in particular to an electrostatic discharge protection device for the electronic device.

Background technique

Electronic products may often be impacted by electrostatic discharge (ESD) in the actual use environment. Generally speaking, the electrostatic discharge voltage is much higher than the power supply voltage generally provided. Generally, according to the different voltage levels generated by electrostatic discharge, it can be divided into human-body model (Human-Body Model, HBM), mechanical discharge model (Machine Model) , MM) and charging component mode (Charge-Device Model, CDM). However, no matter what the ESD mode is, it is very likely that the components will be burned when the ESD occurs. Therefore, some ESD protection measures must be taken in the circuit to effectively isolate the ESD current and prevent the components from being damaged.

Contents of the invention

The invention provides an electronic device, which is used to effectively block abnormal data from being written into the internal circuit of the electronic device when electrostatic discharge occurs, so as to prevent the electronic device from malfunctioning.

The invention provides an electronic device, which includes an electrostatic discharge protection circuit, an abnormal voltage detection circuit, an internal circuit and a blocking circuit. The electrostatic discharge protection circuit receives a plurality of input signals to reduce the abnormally high voltage generated by electrostatic discharge phenomenon on the path of transmitting the input signals, and correspondingly outputs a plurality of reduced voltage input signals. The input signal includes a control signal group and a data signal group. The abnormal voltage detection circuit is connected to the electrostatic discharge protection circuit. The abnormal voltage detection circuit receives the reduced voltage input signal, and generates a blocking control signal according to the voltage level of the reduced voltage input signal. The isolation circuit is serially connected between the abnormal voltage detection circuit and the internal circuit, and is used for receiving the isolation control signal and transmitting the isolation control signal group to the internal circuit according to the isolation control signal.

In an embodiment of the present invention, the above-mentioned abnormal voltage detection circuit compares the voltage level of the input signal after voltage reduction with the threshold voltage, and generates a blocking control signal accordingly.

In an embodiment of the present invention, when the above-mentioned abnormal voltage detection circuit compares and finds that the voltage level of at least one of the input signals after voltage reduction is greater than the threshold voltage, the blocking control signal is enabled. In one embodiment, the blocking circuit transmits the blocking control signal group to the internal circuit when the blocking control signal is enabled.

In an embodiment of the present invention, when the abnormal voltage detection circuit compares and finds that the voltage levels of all the reduced input signals are less than or equal to the threshold voltage, the blocking control signal is disabled. In one embodiment, the blocking circuit transmits the control signal group to the internal circuit when the blocking control signal is disabled.

In an embodiment of the present invention, the above-mentioned blocking circuit includes at least one switch. The switch is connected in series between the terminal of the abnormal voltage detection circuit corresponding to the transmission control signal group and the internal circuit, and is used for closing according to the blocking control signal to block the transmission of the control signal group to the internal circuit.

In an embodiment of the present invention, the above-mentioned control signal group is used to control the writing of the data signal group into the internal circuit.

In an embodiment of the present invention, the above-mentioned ESD protection circuit includes a plurality of ESD protection units and a power clamp circuit. Each electrostatic discharge protection unit includes a first diode and a second diode. The anode of the first diode is connected to the system voltage, and its cathode receives one of the input signals. The anode of the second diode is connected to the cathode of the first diode, and its cathode is connected to ground voltage. The voltage clamping circuit is connected in series between the system voltage and the ground voltage.

In an embodiment of the present invention, the above-mentioned internal circuit includes at least one of a register set and a memory.

In an embodiment of the present invention, the above-mentioned electrostatic discharge protection circuit, abnormal voltage detection circuit, blocking circuit and internal circuit are all constructed on the same chip.

In an embodiment of the present invention, the above-mentioned electrostatic discharge protection circuit, abnormal voltage detection circuit and blocking circuit are constructed on the first chip. And the internal circuit is constructed on a second chip outside the first chip.

Based on the above, the present invention adds an abnormal voltage detection circuit behind the existing electrostatic discharge protection circuit to detect whether the voltage level of the input signal after stepping down through the electrostatic discharge protection circuit is abnormal, and according to the detection The result of the test is used to block or pass the input signal to the internal circuit. It effectively prevents the input signal from writing incorrect data into the internal circuit due to electrostatic discharge, thereby ensuring that the electronic device will not malfunction and improving the overall performance of the electronic device.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail with reference to the accompanying drawings.

Description of drawings

FIG. 1 is a schematic block diagram of an electronic device according to an embodiment of the present invention;

FIG. 2 is a schematic block diagram of an ESD protection circuit according to an embodiment of the present invention.

Explanation of main component symbols in the attached drawings:

100-electronic device; 110-electrostatic discharge protection circuit;

112-electrostatic discharge protection unit; 114-voltage clamping circuit;

120-abnormal voltage detection circuit; 130-blocking circuit;

140-internal circuit; 142-register set;

144 - memory;

CS, WR, DATA1, DATA2, DATA3-input signal;

CS _low , WR _low , DATA1 _low , DATA2 _low , DATA3 _low - input signal after step-down;

D1, D2 - diodes; SIG _control - control signal group;

SIG _data - data signal group; SIG _block - block control signal;

SW-switch; V1-system voltage;

V2 - ground voltage.

Detailed ways

FIG. 1 is a schematic block diagram of an electronic device according to an embodiment of the present invention. Referring to FIG. 1 , the electronic device 100 of this embodiment includes an electrostatic discharge protection circuit 110 , an abnormal voltage detection circuit 120 , a blocking circuit 130 and an internal circuit 140 . The abnormal voltage detection circuit 120 is connected to the ESD protection circuit 110 , and the blocking circuit 130 is connected in series between the abnormal voltage detection circuit 120 and the internal circuit 140 . Actually, the internal circuit 140 may be constituted by at least one of a register set 142 and a memory 144 .

The electrostatic discharge protection circuit 110 of this embodiment receives a plurality of input signals CS, WR, DATA1, DATA2, DATA3, ..., wherein these input signals CS, WR, DATA1, DATA2, DATA3, ... can be divided into a control There are two signal groups: a signal group SIG _control and a data signal group SIG _data . In this embodiment, the control signal group SIG _control is composed of input signals CS, WR, and the data signal group SIG _data is composed of input signals DATA1, DATA2, DATA3, ..., wherein the control signal group SIG _control can be used to control The data signal group SIG _data is written into the internal circuit 140 .

In this embodiment, after receiving the input signals CS, WR, DATA1, DATA2, DATA3, ..., a plurality of reduced input signals CS _low , WR _low , DATA1 _low , DATA2 _low , DATA3 _low , .... In this way, the ESD protection circuit 110 can be used to reduce abnormally high voltages generated by electrostatic discharge (ESD) phenomena on the paths transmitting the input signals CS, WR, DATA1, DATA2, DATA3, . . . .

It is worth mentioning that the ESD protection circuit 110 of this embodiment may be composed of a plurality of ESD protection units 112 and a voltage clamping circuit 114. FIG. 2 is a schematic block diagram of an ESD protection circuit according to an embodiment of the present invention. , as shown in FIG. 2 , but the present invention is not limited thereto. The voltage clamping circuit 114 is connected in series between a system voltage V1 and a ground voltage V2, and each ESD protection unit 112 includes a diode D1 and a diode D2. The anode of the diode D1 is connected to the system voltage V1, and the cathode receives one of the input signals CS, WR, DATA1, DATA2, DATA3, . . . The anode of the diode D2 is connected to the cathode of the diode D1, and the cathode is connected to the ground voltage V2.

In this embodiment, the abnormal voltage detection circuit 120 receives the reduced voltage _input signals _{CS low} , WR _low , DATA1 _low , DATA2 _low , DATA3 _low , . . . , DATA1 _low , DATA2 _low , DATA3 _low , . . . to generate a blocking control signal SIG _block . For example, the abnormal voltage detection circuit 120 of this embodiment can compare the voltage levels of the input signals CS _low , WR _low , DATA1 _low , DATA2 _low , DATA3 _low , . . . with a threshold voltage after voltage reduction, to further generate the blocking control signal SIG _block .

In this embodiment, the blocking circuit 130 is used for receiving the blocking control signal SIG _block , and the blocking circuit 130 can block the transmission of the control signal group SIG _control to the internal circuit 140 according to the blocking control signal SIG _block . Actually, the blocking circuit 130 can be composed of at least one switch SW, wherein the switch SW is connected in series between the terminal of the abnormal voltage detection circuit 120 corresponding to the transmission control signal group SIG _control and the internal circuit 140 .

Based on the above, when the abnormal voltage detection circuit 120 compares that the voltage level of at least one of the reduced input signals CS _low , WR _low , DATA1 _low , DATA2 _low , DATA3 _low , . . . is greater than the critical voltage, then Enable block control signal SIG _block . In this embodiment, when the blocking control signal SIG _block is enabled, the blocking circuit 130 closes the switch SW to block the transmission of the control signal group SIG _control to the internal circuit 140 .

Conversely, when the abnormal voltage detection circuit 120 finds that the voltage levels of all the input signals CS _low , WR _low , DATA1 _low , DATA2 _low , DATA3 _low , . Block control signal SIG _block . In this embodiment, the blocking circuit 130 turns on the switch SW to transmit the control signal group SIG _control to the internal circuit 140 when the blocking control signal SIG _block is disabled.

It can be clearly seen from the above that the present embodiment can detect the reduced input signals CS _low , WR _low , DATA1 low , DATA2 _low , and _{DATA3 low output} by the electrostatic discharge protection circuit 110 through the setting of the abnormal voltage detection circuit 120 , ... voltage levels, and further block or release input signals CS, WR, DATA1, DATA2, DATA3, ... to be transmitted into the internal circuit according to the detection results, so that the input signals can be effectively avoided due to electrostatic discharge Incorrect data is written to the internal circuit 140 due to a phenomenon.

Finally, in the application of actual products, the electrostatic discharge protection circuit 110, the abnormal voltage detection circuit 120 and the blocking circuit 130 can be constructed on one chip, and the internal circuit 140 can be constructed on another chip; for example The internal circuit 140 is disposed on a certain chip on the display panel (not shown), and the electrostatic discharge protection circuit 110, the abnormal voltage detection circuit 120 and the blocking circuit 130 are disposed outside the display panel. Alternatively, the electrostatic discharge protection circuit 110, the abnormal voltage detection circuit 120, the blocking circuit 130 and the internal circuit 140 are all constructed on the same chip, such as the electrostatic discharge protection circuit 110, the abnormal voltage detection circuit 120, the blocking circuit 130 and the internal circuit 140 are all arranged on a certain chip on the display panel.

To sum up, an abnormal voltage detection circuit is added to the electronic device of the present invention to detect whether the voltage level of the reduced input signal after being reduced by the electrostatic discharge protection circuit is abnormal. Not only that, the abnormal voltage detection circuit can also block or release the input signal from the internal circuit according to the detection result, which can solve the problem that the input signal writes incorrect data to the internal circuit due to electrostatic discharge. . In this way, the malfunction of the electronic device of the present invention due to electrostatic discharge can be avoided, and thus the overall quality is improved accordingly.

Although the present invention has been disclosed above with the embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some modifications and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the appended claims.

Claims (10)

1. electronic installation comprises:

One electrostatic storage deflection (ESD) protection circuit, receive most input signals, in order to be reduced in the abnormally high-voltage that produces because of the static discharge phenomenon on the path of transmitting described input signal, and input signal after most step-downs of corresponding output, described input signal comprises a control signal group and a data signal group;

One abnormal voltage circuit for detecting connects this electrostatic storage deflection (ESD) protection circuit, receives input signal after the described step-down, and produces one according to the voltage level of input signal after the described step-down and intercept control signal;

One internal circuit; And

One intercepts circuit, is serially connected between this abnormal voltage circuit for detecting and this internal circuit, in order to receiving this obstruct control signal, and transfers to this internal circuit according to this obstruct control signal to intercept this control signal group.

2. electronic installation according to claim 1, wherein this abnormal voltage circuit for detecting at described step-down after the voltage level and a critical voltage of input signal compare, and produce this obstruct control signal with this.

3. electronic installation according to claim 2, when wherein one of them the voltage level at least of input signal is greater than this critical voltage after this abnormal voltage circuit for detecting compares described step-down, activation should intercept control signal, and this obstruct circuit intercepts this control signal group and transfers to this internal circuit when this obstruct control signal activation the time.

4. electronic installation according to claim 2, when wherein the voltage level of input signal all is less than or equal to this critical voltage after this abnormal voltage circuit for detecting compares all described step-downs, forbidden energy should intercept control signal, and this obstruct circuit transmits this control signal group to this internal circuit when this obstruct control signal forbidden energy the time.

5. electronic installation according to claim 1, wherein this obstruct circuit comprises:

At least one switch is serially connected between the end points and this internal circuit of this control signal group of the corresponding transmission of this abnormal voltage circuit for detecting, transfers to this internal circuit in order to close according to this obstruct control signal to intercept this control signal group.

6. electronic installation according to claim 1, wherein this control signal group writes in this internal circuit in order to control this data signal group.

7. electronic installation according to claim 1, wherein this electrostatic storage deflection (ESD) protection circuit comprises:

A most electrostatic discharge protective unit, respectively this electrostatic discharge protective unit comprises:

One first diode, its anode connects a system voltage, and its negative electrode receives one of them of described input signal; And

One second diode, its anode connects the negative electrode of this first diode, and its negative electrode connects an earthed voltage; And

One voltage clamping circuit is serially connected between this system voltage and this earthed voltage.

8. electronic installation according to claim 1, wherein this internal circuit comprise a registers group and a memory at least one of them.

9. electronic installation according to claim 1, wherein this electrostatic storage deflection (ESD) protection circuit, this abnormal voltage circuit for detecting, this obstruct circuit and this internal circuit all are built on the same chip.

10. electronic installation according to claim 1, wherein this electrostatic storage deflection (ESD) protection circuit, this abnormal voltage circuit for detecting and this obstruct circuit are built on one first chip, and this internal circuit is built on the one second outer chip of this first chip.

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