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CN102214622B - 功率半导体模块 - Google Patents

功率半导体模块 Download PDF

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Publication number
CN102214622B
CN102214622B CN2011100736492A CN201110073649A CN102214622B CN 102214622 B CN102214622 B CN 102214622B CN 2011100736492 A CN2011100736492 A CN 2011100736492A CN 201110073649 A CN201110073649 A CN 201110073649A CN 102214622 B CN102214622 B CN 102214622B
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Prior art keywords
surface electrode
power semiconductor
low dielectric
semiconductor chip
insulated substrate
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CN102214622A (zh
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川口安人
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

本发明提供一种能够降低绝缘不良的功率半导体模块。功率半导体电路基板(3)具有上表面电极(14)和下表面电极(15)。功率半导体电路(3)的下表面电极(15)经由焊料(16)接合在散热板(1)上。在功率半导体电路基板(3)的上表面电极(14)上经由焊料(17)接合有半导体芯片(18)。低介电常数膜(19)覆盖焊料(16)和下表面电极(15)的侧面。低介电常数膜(20)覆盖焊料(17)和半导体芯片(18)的侧面。壳体(9)设置在散热板(1)上,并且,包围功率半导体电路基板(3)以及半导体芯片(18)。填充在壳体(9)内的硅胶(11)覆盖功率半导体电路基板(3)、半导体芯片(18)以及低介电常数膜(19、20)。

Description

功率半导体模块
技术领域
本发明涉及具有双面带电极的绝缘基板的功率半导体模块,特别涉及能够降低绝缘不良的功率半导体模块。
背景技术
近年来,在对马达等电气设备进行控制的功率变换装置等中采用功率半导体模块。在功率半导体模块中,在散热板上利用焊料接合有双面带电极的绝缘基板,在绝缘基板上利用焊料接合有半导体芯片。并且,壳体中包含绝缘基板以及半导体芯片,并且,在壳体内填充有硅胶 (例如,参照专利文献1)。
专利文献1:日本特开2002-76190号公报。
由于模块周边或通电时的温度变化,存在从焊料向硅胶中产生气泡的情况。存在由于该气泡而产生绝缘不良的情况。特别是,双面带电极的绝缘基板的周边的气泡直接关系到绝缘不良。
发明内容
本发明是为了解决上述问题而提出的,其目的在于得到能够降低绝缘不良的功率半导体模块。
本发明提供一种功率半导体模块,其特征在于,具有:散热板;绝缘基板,具有上表面电极和下表面电极,并且,所述下表面电极经由第一焊料接合到所述散热板上;半导体芯片,经由第二焊料接合到所述上表面电极上;第一低介电常数膜,覆盖所述第一焊料和所述下表面电极的侧面;第二低介电常数膜,覆盖所述第二焊料和所述半导体芯片的侧面;壳体,设置在所述散热板上,并且,包围所述绝缘基板以及所述半导体芯片;柔软绝缘物,填充在所述壳体内,并且,覆盖所述绝缘基板、所述半导体芯片、所述第一以及第二低介电常数膜。
根据本发明,能够降低绝缘不良。
附图说明
图1是表示实施方式1的功率半导体模块的剖面图。
图2是表示实施方式1的功率半导体模块的俯视图。
图3是图2所示的功率半导体模块的一个电路块(circuit block)的等效电路。
图4是表示实施方式1的功率半导体模块的放大剖面图。
图5是表示实施方式2的功率半导体模块的放大剖面图。
图6是表示实施方式3的功率半导体模块的放大剖面图。
图7是表示实施方式4的功率半导体模块的放大剖面图。
图8是表示实施方式5的功率半导体模块的放大剖面图。
附图标记说明如下:
1 散热板
8 Al导线(导线)
9 壳体
11 硅胶(绝缘物)
13 绝缘基板
14 上表面电极
15 下表面电极
16 焊料(第一焊料)
17 焊料(第二焊料)
18 半导体芯片
19 低介电常数膜(第一低介电常数膜)
20 低介电常数膜(第二低介电常数膜)
21 凸部
22 分隔部
23 接合部。
具体实施方式
参照附图对本发明的实施方式的功率半导体模块进行说明。对相同的构成要素标注相同的附图标记,并且,存在省略重复说明的情况。
实施方式1
图1是表示实施方式1的功率半导体模块的剖面图,图2是图1的俯视图。该功率半导体模块内置有多个电路块,所述电路块以如下方式构成:将多个绝缘栅型双极晶体管(IGBT)并联连接,并且,具有共用的集电极端子、发射极端子、栅极端子,由此,得到高耐圧和大电流特性。图3是图2示出的功率半导体模块的一个电路块的等效电路。
在金属制的散热板1上安装有驱动电路基板2、功率半导体电路基板3以及中继电路基板4。对于这些电路基板来说,在陶瓷等绝缘基板的两面设置有由铜或者铝等构成的导电图案。在功率半导体电路基板3上接合有IGBT5以及续流二极管6。在驱动电路基板2上接合有片式电阻(chip resistor)7。
IGBT5的发射极以及续流二极管6的阳极利用Al导线8连接在中继电路基板的导电图案上。IGBT5的栅极利用Al导线8连接在驱动电路基板2的导电图案上。IGBT5的集电极和续流二极管6的阴极经由功率半导体电路基板3的导电图案而彼此连接在一起。
以包围驱动电路基板2、功率半导体电路基板3以及中继电路基板4的方式在散热板1上设置有树脂性的壳体9,在壳体9的上部配置有盖子10。为了保持气密性和绝缘,在壳体9内填充有硅胶11。各电路基板具有电极端子接合区域12。虽然没有图示,但是,在该电极端子接合区域12安装有用于实现与装置外部的电连接的电极端子。此处,将功率半导体电路基板3和中继电路基板4分离为不同的绝缘基板,但是,也可以在同一个绝缘基板上划分导电图案的形成区域来构成这两者。
图4是表示实施方式1的功率半导体模块的放大剖面图。绝缘基板13具有上表面电极14和下表面电极15。绝缘基板13的下表面电极15经由焊料16接合在散热板1上。在绝缘基板13的上表面电极14上经由焊料17接合有Si制的半导体芯片18。在半导体芯片18上焊接(bonding)有Al导线8。此外,绝缘基板13相当于图1至图3的功率半导体电路基板3,半导体芯片18相当于图1至图3的IGBT5或者续流二极管6。
低介电常数膜19覆盖焊料16和下表面电极15的侧面。低介电常数膜20覆盖焊料17和半导体芯片18的侧面。低介电常数膜19、20是硅橡胶、聚酰亚胺以及环氧树脂中的任一种。特别是,作为低介电常数膜19、20,如果使用硅橡胶,则装配变得容易,如果使用聚酰亚胺,则耐热性提高,如果使用环氧树脂,则热循环性提高。填充在壳体9内的硅胶11(柔软绝缘物)覆盖绝缘基板13、半导体芯片18以及低介电常数膜19、20。
如以上说明那样,在本实施方式中,低介电常数膜19覆盖焊料16和下表面电极15的侧面,低介电常数膜20覆盖焊料17和半导体芯片18的侧面。由此,能够抑制从焊料17产生气泡。因此,能够降低绝缘不良,能够使产品长寿命化。
实施方式2
图5是表示实施方式2的功率半导体模块的放大剖面图。低介电常数膜19在绝缘基板13的下侧覆盖散热板1的整个上表面。其他结构与实施方式1相同。由此,与实施方式1相比,能够可靠地抑制从焊料16产生气泡。
实施方式3
图6是表示实施方式3的功率半导体模块的放大剖面图。没有设置低介电常数膜19,但是,绝缘基板13还具有从下表面的外周部向下方突出的凸部21。其他结构与实施方式1相同。由此,从焊料16产生的气泡由于凸部21而停留在绝缘基板13的下表面侧。因而,能够降低绝缘不良。
实施方式4
图7是表示实施方式4的功率半导体模块的放大剖面图。在壳体9的内壁设置有分隔部22。该分隔部22配置在散热板1与壳体9的接合部23和绝缘基板13的上表面之间。其他结构与实施方式1相同。
从接合部23产生的气泡由于分隔部22而停留在壳体9侧,不移动到绝缘基板13的上表面。因此,能够进一步降低绝缘不良。
从接合部23到绝缘基板13的上表面的距离比从焊料16、17到绝缘基板13的上表面的距离长。因此,从接合部23产生的气泡导致绝缘不良的可能性低。但是,在要求更高的可靠性的情况下,本实施方式是有效的。
此外,实施方式4的结构不仅能够应用于实施方式1,也能够应用于实施方式2或实施方式3。
实施方式5
图8是表示实施方式5的功率半导体模块的放大剖面图。在实施方式1~4中,硅胶11完全覆盖Al导线8。相对于此,在实施方式5中,使硅胶11的高度为从半导体芯片18的上表面高几毫米(mm)左右。由此,Al导线8的一部分从硅胶11露出。其他结构与实施方式1相同。
即使由于低介电常数膜19、20的形成不良等而从焊料16、17产生气泡,该气泡也能够容易到达硅胶11的上表面,释放到空气中。因此,能够进一步降低绝缘不良。
此外,实施方式5的结构不仅能够应用于实施方式1,也能够应用于实施方式2~4。

Claims (5)

1.一种功率半导体模块,其特征在于,具有:
散热板;
绝缘基板,具有上表面电极和下表面电极,并且,所述下表面电极经由第一焊料接合到所述散热板上;
半导体芯片,经由第二焊料接合到所述上表面电极上;
第一低介电常数膜,覆盖所述第一焊料和所述下表面电极的侧面;
第二低介电常数膜,覆盖所述第二焊料和所述半导体芯片的侧面;
壳体,设置在所述散热板上,并且,包围所述绝缘基板以及所述半导体芯片;以及
硅胶,填充在所述壳体内,并且,覆盖所述绝缘基板、所述半导体芯片以及所述第一和第二低介电常数膜,
所述绝缘基板具有从下表面的外周部向下方突出的凸部。
2.一种功率半导体模块,其特征在于,具有:
散热板;
绝缘基板,具有上表面电极和下表面电极,并且,所述下表面电极经由第一焊料接合到所述散热板上;
半导体芯片,经由第二焊料接合到所述上表面电极上;
第一低介电常数膜,覆盖所述第一焊料和所述下表面电极的侧面;
第二低介电常数膜,覆盖所述第二焊料和所述半导体芯片的侧面;
壳体,设置在所述散热板上,并且,包围所述绝缘基板以及所述半导体芯片;
硅胶,填充在所述壳体内,并且,覆盖所述绝缘基板、所述半导体芯片以及所述第一和第二低介电常数膜;以及
分隔部,配置在所述散热板与所述壳体的接合部和所述绝缘基板的上表面之间。
3.如权利要求1或2所述的功率半导体模块,其特征在于,
所述低介电常数膜是硅橡胶、聚酰亚胺以及环氧树脂中的任一种。
4.如权利要求1或2所述的功率半导体模块,其特征在于,
所述第一低介电常数膜在所述绝缘基板的下侧覆盖所述散热板的整个上表面。
5.如权利要求1或2所述的功率半导体模块,其特征在于,
还具有焊接在所述半导体芯片上的导线,
所述导线的一部分从所述硅胶露出。
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DE102011005690A1 (de) 2011-10-13
JP2011222805A (ja) 2011-11-04

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