CN102208964A

CN102208964A - System and method for realizing log likelihood ratio in digital system

Info

Publication number: CN102208964A
Application number: CN2011101373231A
Authority: CN
Inventors: 姜奇渊; 翟春华; 卢海涛
Original assignee: ZTE Corp
Current assignee: Sanechips Technology Co Ltd
Priority date: 2011-05-25
Filing date: 2011-05-25
Publication date: 2011-10-05

Abstract

The invention discloses a system for realizing the logarithmic likelihood ratio in a digital system. The LLR core processing unit in the system is used to obtain the corresponding LLR under different modulation modes according to Z _N and the calculation formula of the LLR intermediate value under different modulation modes. The intermediate value is output to the noise normalization unit; the noise normalization unit is used to obtain the final LLR value according to the LLR intermediate value. The invention also discloses a method for realizing the logarithmic likelihood ratio in a digital system. The method includes: the LLR core processing unit obtains the corresponding LLR under different modulation modes according to Z _N and the calculation formula of the LLR intermediate value under different modulation modes. The intermediate value is output to the noise normalization unit; the noise normalization unit obtains the final LLR value according to the LLR intermediate value. By adopting the system and method of the present invention, not only can the bit error rate of signal reception and demodulation be reduced, but also both problems of LLR calculation complexity and demodulation performance can be taken into consideration.

Description

System and method for realizing logarithmic likelihood ratio in digital system

技术领域technical field

本发明主要应用于数字通信领域，尤其涉及一种数字系统中对z＝Ax+N_o信号求对数似然比(LLR)的实现系统及方法。The invention is mainly applied in the field of digital communication, and in particular relates to a system and method for realizing logarithmic likelihood ratio (LLR) for z=Ax+N _o signals in a digital system.

背景技术Background technique

无线数字通信正在向宽带化、高速化发展，基本的低阶调制方式已不能满足需要。为了提高频谱效率，满足高系统容量和高数据速率的业务需求，越来越多的通信系统采用高阶调制方式。但是阶数越高，对于接收机的接收性能要求越高，误码率也就越高。Wireless digital communication is developing towards broadband and high speed, and the basic low-order modulation methods can no longer meet the needs. In order to improve spectrum efficiency and meet the service requirements of high system capacity and high data rate, more and more communication systems adopt high-order modulation. However, the higher the order, the higher the requirements for the receiving performance of the receiver, and the higher the bit error rate.

由于信道环境的影响，会使接收星座点相对于标准星座点有一定的相位旋转和扩展；噪声的影响会使接收星座点的位置不确定。假设接收信号为y＝h·x+n_o，则接收系统一般都会先根据下面公式z＝h^*·y＝h^*·h·x+h^*·n_o＝Ax+N_o消除相位的旋转的影响，其中，y表示接收到的信号，h表示信道冲击响应，x表示发送的数据，n_o表示发送数据过程中引入的噪声，h^*表示h的共轭转置，A表示h^*和h的乘积，本文后续公式中出现的A也是这里的含义，N_o表示h^*和n_o的乘积；然后再进行LLR值的计算，以降低信号接收解调的误码率。然而该方案虽然能一定程度地降低信号接收解调的误码率，却并不能兼顾LLR计算复杂度和解调性能两方面的问题。Due to the influence of the channel environment, the receiving constellation point will have a certain phase rotation and expansion relative to the standard constellation point; the influence of noise will make the position of the receiving constellation point uncertain. Assuming that the received signal is y=h·x+n _o , the receiving system will generally eliminate the phase rotation according to the following formula z=h ^* ·y=h ^* ·h·x+h ^* ·n _o =Ax+N _o , where y represents the received signal, h represents the channel impulse response, x represents the transmitted data, n _o represents the noise introduced in the process of transmitting data, h ^* represents the conjugate transpose of h, A represents h ^* and The product of h, A that appears in the follow-up formula of this article is also the meaning here, N _o means the product of h ^* and n _o ; and then calculate the LLR value to reduce the bit error rate of signal reception and demodulation. However, although this solution can reduce the bit error rate of signal reception and demodulation to a certain extent, it cannot take into account both the computational complexity of LLR and the performance of demodulation.

发明内容Contents of the invention

有鉴于此，本发明的主要目的在于提供一种数字系统中对数似然比的实现系统及方法，不仅能降低信号接收解调的误码率，而且能兼顾LLR计算复杂度和解调性能两方面的问题。In view of this, the main purpose of the present invention is to provide a system and method for realizing the logarithmic likelihood ratio in a digital system, which can not only reduce the bit error rate of signal reception demodulation, but also take into account the complexity of LLR calculation and demodulation performance Two problems.

为达到上述目的，本发明的技术方案是这样实现的：In order to achieve the above object, technical solution of the present invention is achieved in that way:

一种数字系统中对数似然比的实现系统，该系统包括：LLR预处理单元、LLR核心处理单元和噪声归一化处理单元；其中，A realization system of log likelihood ratio in a digital system, the system includes: LLR preprocessing unit, LLR core processing unit and noise normalization processing unit; wherein,

所述LLR预处理单元，用于对输入的Z信号进行预处理后获得Z_N，采用的公式为z_N＝cz＝c(Re{z}+Im{z})；其中，z＝Ax+N_o，Re{z}表示复数Z的实部，Im{z}表示复数Z的虚部，c是不同调制模式的星座点的归一化系数；The LLR preprocessing unit is used to preprocess the input Z signal to obtain Z _N , and the adopted formula is z _N =cz=c(Re{z}+Im{z}); wherein, z=Ax+ N _o , Re{z} represents the real part of the complex number Z, Im{z} represents the imaginary part of the complex number Z, and c is the normalization coefficient of the constellation points of different modulation modes;

所述LLR核心处理单元，用于根据Z_N和不同调制模式下LLR中间值的计算公式，获得不同调制模式下对应的LLR中间值并输出给噪声归一化单元，所述LLR中间值为LLR(Re，i)或者LLR(Im，i)；The LLR core processing unit is used to obtain the corresponding LLR intermediate value under different modulation modes according to Z _N and the calculation formula of the LLR intermediate value under different modulation modes and output it to the noise normalization unit, and the LLR intermediate value is LLR (Re, i) or LLR(Im, i);

所述噪声归一化单元，用于根据LLR中间值获得最终的LLR值，最终的LLR值的计算公式为LLR＝S×LLR(Re，i)或者LLR＝S×LLR(Im，i)。The noise normalization unit is used to obtain the final LLR value according to the LLR intermediate value, and the calculation formula of the final LLR value is LLR=S×LLR(Re,i) or LLR=S×LLR(Im,i).

其中，所述LLR预处理单元，进一步用于对输入的Z信号的实部和虚部采用并串转换电路得到Z中间值，对于Z中间值根据不同调制模式对应选择平方根数值后，采用移位等效电路将Z中间值与对应选择的平方根数值相乘后输出Z_N给LLR核心处理单元。Wherein, the LLR preprocessing unit is further used to use a parallel-serial conversion circuit to obtain the Z intermediate value for the real part and the imaginary part of the input Z signal. The equivalent circuit multiplies the intermediate value of Z by the corresponding selected square root value and outputs Z _N to the LLR core processing unit.

其中，所述LLR核心处理单元，进一步用于采用移位等效电路实现乘法操作，采用加法/减法电路实现比较操作，根据不同调制模式下LLR中间值的计算公式对应选择相应的数据进行输出，得到LLR中间值。Wherein, the LLR core processing unit is further used to implement a multiplication operation by using a shift equivalent circuit, and implement a comparison operation by using an addition/subtraction circuit, and select corresponding data for output according to the calculation formula of the LLR intermediate value under different modulation modes, Get the median LLR value.

其中，所述LLR预处理单元，进一步用于对应选择的平方根数值具体为：

和

其中，Wherein, the LLR preprocessing unit is further used to correspond to the selected square root value specifically as follows:

and

in,

$\sqrt{22} = = 22^{00} + + 22^{- - 22} + + 22^{- - 33} + + 22^{- - 55};;$

$\sqrt{1010} = = 22^{11} + + 22^{00} + + 22^{- - 33} + + 22^{- - 55};;$

$\sqrt{4242} = = 22^{22} + + 22^{11} + + 22^{- - 11} + + 22^{- - 55} . .$

其中，所述LLR核心处理单元，进一步用于在不同调制模式下LLR中间值的计算公式包括：Wherein, the LLR core processing unit is further used to calculate the LLR intermediate value in different modulation modes including:

令z_N＝c·z＝c·(Re{z}+Im{z})，则：Let z _N =c·z=c·(Re{z}+Im{z}), then:

a、对于BPSK调制模式：a. For BPSK modulation mode:

令z′＝Re{z_N}，则LLR(Re，0)＝S·z′；Let z'=Re{z _N }, then LLR(Re, 0)=S z';

b、对于QPSK调制模式：b. For QPSK modulation mode:

令z′＝Re{z_N}，则有LLR(Re，0)＝S·z′；Let z'=Re{z _N }, then LLR(Re, 0)=S·z';

令z′＝Im{z_N}，则有LLR(Im，0)＝z′；Let z'=Im{z _N }, then LLR(Im, 0)=z';

c、对于16QAM调制模式：c. For 16QAM modulation mode:

若令z′＝Re{z_N}，则有：If z′=Re{z _N }, then:

$LLR LLR ((Re Re,, 00)) = = \{\begin{matrix} S S \cdot \cdot {z z}^{' '} & | | {z z}^{' '} | | \leq \leq 22 A A \\ S S \cdot \cdot sign sign (({z z}^{' '})) 22 ((| | {z z}^{' '} | | - - A A)) & | | {z z}^{' '} | | > > 22 A A \end{matrix};;$

LLR(Re，1)＝S·(2A-|z′|)；LLR(Re,1)=S·(2A-|z'|);

若令z′Im{z_N}，则有：If let z′Im{z _N }, then:

$LLR LLR ((Im Im,, 00)) = = \{\begin{matrix} S S \cdot \cdot {z z}^{' '} & | | {z z}^{' '} | | \leq \leq 22 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 22 ((| | {z z}^{' '} | | - - A A)) & | | {z z}^{' '} | | > > 22 A A \end{matrix};;$

LLR(Im，1)＝S·(2A-|z′|)；LLR(Im, 1)=S·(2A-|z'|);

d、对于64QAM调制模式：d. For 64QAM modulation mode:

若令z′＝Re{z_N}，则有If let z′=Re{z _N }, then we have

$LLR LLR ((Re Re,, 00)) = = \{\begin{matrix} S S \cdot &Center Dot; sign sign (({z z}^{' '})) | | {z z}^{' '} | | & | | {z z}^{' '} | | < < 22 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 22 ((| | {z z}^{' '} | | - - A A)) & 22 A A < < | | {z z}^{' '} | | < < 44 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 33 ((| | {z z}^{' '} | | - - 22 A A)) & 44 A A < < | | {z z}^{' '} | | < < 66 A A \\ S S \cdot \cdot sign sign (({z z}^{' '})) 44 ((| | {z z}^{' '} | | - - 33 A A)) & | | {z z}^{' '} | | > > 66 A A \end{matrix};;$

若令z″＝4A-|z′|，则有：If z″=4A-|z′|, then:

$LLR LLR ((Re Re,, 11)) = = \{\begin{matrix} S S \cdot \cdot {z z}^{' '' '} & | | {z z}^{' '' '} | | \leq \leq 22 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '' '})) 22 ((| | {z z}^{' '' '} | | - - A A)) & | | {z z}^{' '' '} | | > > 22 A A \end{matrix};;$

LLR(Re，2)＝S·(2A-|z″|)；LLR(Re,2)=S·(2A-|z"|);

若令z′＝Im{z_N}，则有If z′=Im{z _N }, then

$LLR LLR ((Im Im,, 00)) = = \{\begin{matrix} S S \cdot &Center Dot; sign sign (({z z}^{' '})) | | {z z}^{' '} | | & | | {z z}^{' '} | | < < 22 A A \\ S S \cdot \cdot sign sign (({z z}^{' '})) 22 ((| | {z z}^{' '} | | - - A A)) & 22 A A < < | | {z z}^{' '} | | < < 44 A A \\ S S \cdot \cdot sign sign (({z z}^{' '})) 33 ((| | {z z}^{' '} | | - - 22 A A)) & 44 A A < < | | {z z}^{' '} | | < < 66 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 44 ((| | {z z}^{' '} | | - - 33 A A)) & | | {z z}^{' '} | | > > 66 A A \end{matrix};;$

令z″＝4A-|z′|，则有：Let z″=4A-|z′|, then:

$LLR LLR ((Im Im,, 11)) = = \{\begin{matrix} S S \cdot &Center Dot; {z z}^{' '' '} & | | {z z}^{' '' '} | | \leq \leq 22 A A \\ S S \cdot &Center Dot; Φ Φ (({z z}^{' '' '})) 22 ((| | {z z}^{' '' '} | | - - A A)) & | | {z z}^{' '' '} | | > > 22 A A \end{matrix};;$

LLR(Im，2)＝S·(2A-|z″|)。LLR(Im,2)=S·(2A-|z"|).

一种数字系统中对数似然比的实现方法，该方法包括：A method for realizing the logarithmic likelihood ratio in a digital system, the method comprising:

LLR预处理单元对输入的Z信号进行预处理后获得Z_N，采用的公式为z_N＝cz＝c(Re{z}+Im{z})，将Z_N输出给LLR核心处理单元；所述z＝Ax+N_o，所述Re{z}表示复数Z的实部，所述Im{z}表示复数Z的虚部，所述c是不同调制模式的星座点的归一化系数；The LLR preprocessing unit preprocesses the input Z signal to obtain Z _N , the adopted formula is z _N =cz=c(Re{z}+Im{z}), and Z _N is output to the LLR core processing unit; z=Ax+N _o , the Re{z} represents the real part of the complex number Z, the Im{z} represents the imaginary part of the complex number Z, and the c is the normalization coefficient of the constellation points of different modulation modes;

LLR核心处理单元根据Z_N和不同调制模式下LLR中间值的计算公式，获得不同调制模式下对应的LLR中间值并输出给噪声归一化单元，所述LLR中间值为LLR(Re，i)或者LLR(Im，i)；The LLR core processing unit obtains the corresponding LLR intermediate value under different modulation modes according to Z _N and the calculation formula of the LLR intermediate value under different modulation modes and outputs it to the noise normalization unit, and the LLR intermediate value is LLR(Re, i) or LLR(Im, i);

噪声归一化单元根据LLR中间值获得最终的LLR值，最终的LLR值的计算公式为LLR＝S×LLR(Re，i)或者LLR＝S×LLR(Im，i)。The noise normalization unit obtains the final LLR value according to the LLR intermediate value, and the calculation formula of the final LLR value is LLR=S×LLR(Re,i) or LLR=S×LLR(Im,i).

其中，所述对输入的Z信号进行预处理后获得Z_N具体包括：对输入的Z信号的实部和虚部采用并串转换电路得到Z中间值，对于Z中间值根据不同调制模式对应选择平方根数值后，采用移位等效电路将Z中间值与对应选择的平方根数值相乘后输出Z_N。Wherein, the preprocessing of the input Z signal to obtain Z _N specifically includes: using a parallel-serial conversion circuit to obtain the Z intermediate value for the real part and the imaginary part of the input Z signal, and correspondingly selecting the Z intermediate value according to different modulation modes After the square root value is obtained, the Z intermediate value is multiplied by the corresponding selected square root value by using a shift equivalent circuit to output Z _N .

其中，对应选择的平方根数值具体为：

和其中，Among them, the square root value corresponding to the selection is specifically:

and in,

$\sqrt{22} = = 22^{00} + + 22^{- - 22} + + 22^{- - 33} + + 22^{- - 55};;$

$\sqrt{1010} = = 22^{11} + + 22^{00} + + 22^{- - 33} + + 22^{- - 55};;$

$\sqrt{4242} = = 22^{22} + + 22^{11} + + 22^{- - 11} + + 22^{- - 55} . .$

其中，不同调制模式下LLR中间值的计算公式包括：Among them, the calculation formula of the LLR intermediate value under different modulation modes includes:

令z_N＝c·z＝c·(Re{z}+Im{z})，则：Let z _N =c·z=c·(Re{z}+Im{z}), then:

a、对于BPSK调制模式：a. For BPSK modulation mode:

b、对于QPSK调制模式：b. For QPSK modulation mode:

c、对于16QAM调制模式：c. For 16QAM modulation mode:

若令z′＝Re{z_N}，则有：If z′=Re{z _N }, then:

$LLR LLR ((Re Re,, 00)) = = \{\begin{matrix} S S \cdot &Center Dot; {z z}^{' '} & | | {z z}^{' '} | | \leq \leq 22 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 22 ((| | {z z}^{' '} | | - - A A)) & | | {z z}^{' '} | | > > 22 A A \end{matrix};;$

LLR(Re，1)＝S·(2A-|z′|)；LLR(Re,1)=S·(2A-|z'|);

若令z′Im{z_N}，则有：If let z′Im{z _N }, then:

$LLR LLR ((Im Im,, 00)) = = \{\begin{matrix} S S \cdot &Center Dot; {z z}^{' '} & | | {z z}^{' '} | | \leq \leq 22 A A \\ S S \cdot \cdot sign sign (({z z}^{' '})) 22 ((| | {z z}^{' '} | | - - A A)) & | | {z z}^{' '} | | > > 22 A A \end{matrix};;$

LLR(Im，1)＝S·(2A-|z′|)；LLR(Im, 1)=S·(2A-|z'|);

d、对于64QAM调制模式：d. For 64QAM modulation mode:

若令z′＝Re{z_N}，则有If let z′=Re{z _N }, then we have

$LLR LLR ((Re Re,, 00)) = = \{\begin{matrix} S S \cdot \cdot sign sign (({z z}^{' '})) | | {z z}^{' '} | | & | | {z z}^{' '} | | < < 22 A A \\ S S \cdot \cdot sign sign (({z z}^{' '})) 22 ((| | {z z}^{' '} | | - - A A)) & 22 A A < < | | {z z}^{' '} | | < < 44 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 33 ((| | {z z}^{' '} | | - - 22 A A)) & 44 A A < < | | {z z}^{' '} | | < < 66 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 44 ((| | {z z}^{' '} | | - - 33 A A)) & | | {z z}^{' '} | | > > 66 A A \end{matrix};;$

若令z″＝4A-|z′|，则有：If z″=4A-|z′|, then:

$LLR LLR ((Re Re,, 11)) = = \{\begin{matrix} S S \cdot &Center Dot; {z z}^{' '' '} & | | {z z}^{' '' '} | | \leq \leq 22 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '' '})) 22 ((| | {z z}^{' '' '} | | - - A A)) & | | {z z}^{' '' '} | | > > 22 A A \end{matrix};;$

LLR(Re，2)＝S·(2A-|z″|)；LLR(Re,2)=S·(2A-|z"|);

若令z′＝Im{z_N}，则有If z′=Im{z _N }, then

$LLR LLR ((Im Im,, 00)) = = \{\begin{matrix} S S \cdot &Center Dot; sign sign (({z z}^{' '})) | | {z z}^{' '} | | & | | {z z}^{' '} | | < < 22 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 22 ((| | {z z}^{' '} | | - - A A)) & 22 A A < < | | {z z}^{' '} | | < < 44 A A \\ S S \cdot \cdot sign sign (({z z}^{' '})) 33 ((| | {z z}^{' '} | | - - 22 A A)) & 44 A A < < | | {z z}^{' '} | | < < 66 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 44 ((| | {z z}^{' '} | | - - 33 A A)) & | | {z z}^{' '} | | > > 66 A A \end{matrix};;$

令z″＝4A-|z′|，则有：Let z″=4A-|z′|, then:

$LLR LLR ((Im Im,, 11)) = = \{\begin{matrix} S S \cdot \cdot {z z}^{' '' '} & | | {z z}^{' '' '} | | \leq \leq 22 A A \\ S S \cdot &Center Dot; Φ Φ (({z z}^{' '' '})) 22 ((| | {z z}^{' '' '} | | - - A A)) & | | {z z}^{' '' '} | | > > 22 A A \end{matrix};;$

LLR(Im，2)＝S·(2A-|z″|)。LLR(Im,2)=S·(2A-|z"|).

本发明的LLR预处理单元用于对输入的Z信号进行预处理后获得Z_N，采用的公式为z_N＝cz＝c(Re{z}+Im{z})；其中，z＝Ax+N_o，Re{z}表示复数Z的实部，Im{z}表示复数Z的虚部，c是不同调制模式的星座点的归一化系数；LLR核心处理单元用于根据Z_N和不同调制模式下LLR中间值的计算公式，获得不同调制模式下对应的LLR中间值并输出给噪声归一化单元，所述LLR中间值为LLR(Re，i)或者LLR(Im，i)；噪声归一化单元用于根据LLR中间值获得最终的LLR值，最终的LLR值的计算公式为LLR＝S×LLR(Re，i)或者LLR＝S×LLR(Im，i)。The LLR preprocessing unit of the present invention is used to obtain Z _N after preprocessing the input Z signal, and the adopted formula is z _N =cz=c(Re{z}+Im{z}); wherein, z=Ax+ N _o , Re{z} represents the real part of the complex number Z, Im _{ z} represents the imaginary part of the complex number Z, c is the normalization coefficient of the constellation points of different modulation modes; the LLR core processing unit is used to The calculation formula of the LLR intermediate value under the modulation mode obtains the corresponding LLR intermediate value under different modulation modes and outputs it to the noise normalization unit, and the LLR intermediate value is LLR (Re, i) or LLR (Im, i); noise The normalization unit is used to obtain the final LLR value according to the LLR intermediate value, and the calculation formula of the final LLR value is LLR=S×LLR(Re,i) or LLR=S×LLR(Im,i).

采用本发明的对z＝Ax+N_o信号求LLR值的方案，简化了LLR值的计算，且适用于多种调制模式BPSK/QPSK/16QAM/64QAM的通信系统，不仅能降低信号接收解调的误码率，而且能兼顾LLR计算复杂度和解调性能两方面的问题，也就是说，不仅降低了数字通信中数据接收解调的误码率，而且在简化LLR值复杂度计算基础上提高了系统的解调性能。Adopt the scheme that z=Ax+N _o signal of the present invention asks LLR value, has simplified the calculation of LLR value, and is applicable to the communication system of multiple modulation mode BPSK/QPSK/16QAM/64QAM, can not only reduce signal reception demodulation BER, and can take into account both LLR calculation complexity and demodulation performance, that is, not only reduces the BER of data receiving and demodulation in digital communication, but also simplifies the calculation of LLR value complexity The demodulation performance of the system is improved.

附图说明Description of drawings

图1为本发明LLR实现系统的系统结构示意图；Fig. 1 is a schematic diagram of the system structure of the LLR implementation system of the present invention;

图2为本发明LLR实现系统的LLR预处理单元一实例的电路结构示意图；Fig. 2 is the schematic diagram of the circuit structure of an example of the LLR preprocessing unit of the LLR realization system of the present invention;

图3为本发明LLR实现系统的LLR核心处理单元一实例的电路结构示意图。FIG. 3 is a schematic diagram of the circuit structure of an example of the LLR core processing unit of the LLR implementation system of the present invention.

具体实施方式Detailed ways

本发明的基本思想是：LLR预处理单元用于对输入的Z信号进行预处理后获得Z_N，采用的公式为z_N＝cz＝c(Re{z}+Im{z})；其中，z＝Ax+N_o，Re{z}表示复数Z的实部，Im{z}表示复数Z的虚部，c是不同调制模式的星座点的归一化系数；LLR核心处理单元用于根据Z_N和不同调制模式下LLR中间值的计算公式，获得不同调制模式下对应的LLR中间值并输出给噪声归一化单元，所述LLR中间值为LLR(Re，i)或者LLR(Im，i)；噪声归一化单元用于根据LLR中间值获得最终的LLR值，最终的LLR值的计算公式为LLR＝S×LLR(Re，i)或者LLR＝S×LLR(Im，i)。The basic idea of the present invention is: the LLR preprocessing unit is used to obtain Z _N after preprocessing the input Z signal, and the adopted formula is z _N =cz=c(Re{z}+Im{z}); wherein, z=Ax+N _o , Re{z} represents the real part of the complex number Z, Im{z} represents the imaginary part of the complex number Z, c is the normalization coefficient of the constellation points of different modulation modes; the LLR core processing unit is used to Z _N and the calculation formula of the LLR intermediate value under different modulation modes, obtain the corresponding LLR intermediate value under different modulation modes and output to the noise normalization unit, and the LLR intermediate value is LLR (Re, i) or LLR (Im, i); the noise normalization unit is used to obtain the final LLR value according to the LLR intermediate value, and the calculation formula of the final LLR value is LLR=S×LLR(Re, i) or LLR=S×LLR(Im, i).

下面结合附图对技术方案的实施作进一步的详细描述。The implementation of the technical solution will be further described in detail below in conjunction with the accompanying drawings.

一种数字系统中对数似然比的实现系统，主要包括以下内容：A realization system of the logarithmic likelihood ratio in a digital system, mainly including the following contents:

如图1所示，该系统包括：LLR预处理单元、LLR核心处理单元和噪声归一化处理单元。其中，LLR预处理单元，用于对输入的Z信号进行预处理后获得Z_N，采用的公式为z_N＝cz＝c(Re{z}+Im{z})；其中，z＝Ax+N_o，Re{z}表示复数Z的实部，Im{z}表示复数Z的虚部，c是不同调制模式的星座点的归一化系数。这里，文中的Re都是指实部，文中的Im都是指虚部，针对实部和虚部与复数Z的关系举例，比如复数z＝a+bi，Re(z)＝a，Im(z)＝b。As shown in Figure 1, the system includes: LLR preprocessing unit, LLR core processing unit and noise normalization processing unit. Wherein, the LLR preprocessing unit is used for preprocessing the input Z signal to obtain Z _N , and the adopted formula is z _N =cz=c(Re{z}+Im{z}); wherein, z=Ax+ N _o , Re{z} represents the real part of the complex number Z, Im{z} represents the imaginary part of the complex number Z, and c is the normalization coefficient of the constellation points of different modulation modes. Here, Re in the text all refers to the real part, and Im in the text refers to the imaginary part. For the relationship between the real part and the imaginary part and the complex number Z, for example, the complex number z=a+bi, Re(z)=a, Im( z) = b.

LLR核心处理单元，用于根据Z_N和不同调制模式下LLR中间值的计算公式，获得不同调制模式下对应的LLR中间值并输出给噪声归一化单元，这里，LLR中间值LLRi_temp为LLR(Re，i)或者LLR(Im，i)，i＝0，1，2，3，4，5。The LLR core processing unit is used to obtain the corresponding LLR intermediate value under different modulation modes according to Z _N and the calculation formula of the LLR intermediate value under different modulation modes and output it to the noise normalization unit. Here, the LLR intermediate value LLRi_temp is LLR( Re, i) or LLR(Im, i), i=0,1,2,3,4,5.

噪声归一化单元，用于根据LLR中间值获得最终的LLR值，最终的LLR值的计算公式为LLR＝S×LLR(Re，i)或者LLR＝S×LLR(Im，i)。The noise normalization unit is used to obtain the final LLR value according to the LLR intermediate value, and the calculation formula of the final LLR value is LLR=S×LLR(Re,i) or LLR=S×LLR(Im,i).

进一步的，LLR预处理单元，用于对输入的Z信号的实部和虚部采用并串转换电路得到Z中间值，对于Z中间值根据不同调制模式对应选择平方根数值后，采用移位等效电路将Z中间值与对应选择的平方根数值相乘后输出Z_N给LLR核心处理单元。Further, the LLR preprocessing unit is used to obtain the Z intermediate value by using a parallel-to-serial conversion circuit for the real part and the imaginary part of the input Z signal. After selecting the square root value for the Z intermediate value according to different modulation modes, the shift equivalent The circuit outputs Z _N to the LLR core processing unit after multiplying the Z intermediate value by the corresponding selected square root value.

这里需要指出的是：现有技术对输入数据的归一化操作均为定系数的运算，而本发明为了简化运算逻辑，均将输入数据转化为数据的移位操作。It should be pointed out here that: in the prior art, normalization operations on input data are operations with fixed coefficients, but in the present invention, in order to simplify the operation logic, all input data are converted into data shift operations.

进一步的，LLR核心处理单元，用于先采用移位等效电路实现乘法操作，然后采用加法/减法电路实现比较操作，最后根据不同调制模式对应选择相应的数据进行输出，得到LLR中间值。Further, the LLR core processing unit is used to implement the multiplication operation by using the shift equivalent circuit first, then implement the comparison operation by using the addition/subtraction circuit, and finally select corresponding data according to different modulation modes for output to obtain the LLR intermediate value.

一种数字系统中对数似然比的实现方法，该方法主要包括以下内容：A method for realizing the logarithmic likelihood ratio in a digital system, the method mainly includes the following contents:

LLR预处理单元对输入的Z信号进行预处理后获得Z_N，采用的公式为z_N＝cz＝c(Re{z}+Im{z})；其中，z＝Ax+N_o，Re{z}表示复数Z的实部，Im{z}表示复数Z的虚部，c是不同调制模式的星座点的归一化系数；The LLR preprocessing unit preprocesses the input Z signal to obtain Z _N , and the adopted formula is z _N =cz=c(Re{z}+Im{z}); where, z=Ax+N _o , Re{ z} represents the real part of the complex number Z, Im{z} represents the imaginary part of the complex number Z, and c is the normalization coefficient of the constellation points of different modulation modes;

LLR核心处理单元根据Z_N和不同调制模式下LLR中间值的计算公式，获得不同调制模式下对应的LLR中间值并输出给噪声归一化单元，这里，LLR中间值LLR_temp为LLR(Re，i)或者LLR(Im，i)，i＝0，1，2，3，4，5；The LLR core processing unit obtains the corresponding LLR intermediate value under different modulation modes according to Z _N and the calculation formula of the LLR intermediate value under different modulation modes and outputs it to the noise normalization unit. Here, the LLR intermediate value LLR_temp is LLR(Re, i ) or LLR(Im, i), i=0, 1, 2, 3, 4, 5;

综上所述，采用本发明，这种对z＝Ax+N_o信号求LLR值的方案，降低了数字通信中数据接收解调的误码率，提高了解调性能节；通过对LLR计算公式的变化，使适用于多种调制模式BPSK/QPSK/16QAM/64QAM的LLR实现系统的硬件实现结构更加统一。In sum, adopt the present invention, this scheme that z=Ax+N _o signal asks LLR value has reduced the bit error rate of data reception demodulation in the digital communication, improves demodulation performance section; By to LLR calculation formula The change of the method makes the hardware implementation structure of the LLR implementation system suitable for multiple modulation modes BPSK/QPSK/16QAM/64QAM more unified.

以下对本发明进行举例阐述。The present invention is described with examples below.

图2为本发明LLR实现系统的LLR预处理单元一实例的电路结构示意图，LLR预处理单元首先对z的实部和虚部采用并串转换电路得到Z中间值z_temp值，以进行资源复用；然后对z_temp值分别乘上

和

其中乘法操作采用移位等效电路来实现；最后根据调制模式选择其中一路进行输出，得到z_N＝c·z输出给LLR核心处理单元。其中，

和

的量化如以下表1所示。Fig. 2 is the schematic diagram of the circuit structure of an example of the LLR preprocessing unit of the LLR implementation system of the present invention. The LLR preprocessing unit first adopts a parallel-to-serial conversion circuit for the real part and the imaginary part of z to obtain the Z intermediate value z_temp value for resource multiplexing ; Then multiply the z_temp value by

and

The multiplication operation is realized by using a shift equivalent circuit; finally, one of them is selected for output according to the modulation mode, and z _N =c·z is obtained and output to the LLR core processing unit. in,

and

The quantification of is shown in Table 1 below.

表1Table 1

图3为本发明LLR实现系统的LLR核心处理单元一实例的电路结构示意图，LLR核心处理单元首先采用移位等效电路实现乘法操作，然后加法/减法电路实现比较操作，最后根据调制方式的不同选择相应的数据进行输出，得到LLR不同调制模式下的中间值LLRi_temp值。不同调制模式下的中间值的计算公式如下所示：Fig. 3 is the schematic diagram of the circuit structure of an example of the LLR core processing unit of the LLR implementation system of the present invention, the LLR core processing unit first adopts the shift equivalent circuit to realize the multiplication operation, then the addition/subtraction circuit realizes the comparison operation, and finally according to the difference of the modulation mode Select the corresponding data to output, and obtain the intermediate value LLRi_temp value of LLR under different modulation modes. The calculation formula of the intermediate value under different modulation modes is as follows:

令z_N＝c·z＝c·(Re{z}+Im{z})，则：Let z _N =c·z=c·(Re{z}+Im{z}), then:

1、对于BPSK调制模式：1. For BPSK modulation mode:

2、对于QPSK调制模式：2. For QPSK modulation mode:

3、对于16QAM调制模式：3. For 16QAM modulation mode:

若令z′＝Re{z_N}，则有：If z′=Re{z _N }, then:

LLR(Re，1)＝S·(2A-|z′|)；LLR(Re,1)=S·(2A-|z'|);

若令z′＝Im{z_N}，则有：If z′=Im{z _N }, then:

$LLR LLR ((Im Im,, 00)) = = \{\begin{matrix} S S \cdot &Center Dot; {z z}^{' '} & | | {z z}^{' '} | | \leq \leq 22 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 22 ((| | {z z}^{' '} | | - - A A)) & | | {z z}^{' '} | | > > 22 A A \end{matrix};;$

LLR(Im，1)＝S·(2A-|z′|)；LLR(Im, 1)=S·(2A-|z'|);

4、对于64QAM调制模式：4. For 64QAM modulation mode:

若令z′＝Re{z_N}，则有If let z′=Re{z _N }, then we have

$LLR LLR ((Re Re,, 00)) = = \{\begin{matrix} S S \cdot &Center Dot; sign sign (({z z}^{' '})) | | {z z}^{' '} | | & | | {z z}^{' '} | | < < 22 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 22 ((| | {z z}^{' '} | | - - A A)) & 22 A A < < | | {z z}^{' '} | | < < 44 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 33 ((| | {z z}^{' '} | | - - 22 A A)) & 44 A A < < | | {z z}^{' '} | | < < 66 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 44 ((| | {z z}^{' '} | | - - 33 A A)) & | | {z z}^{' '} | | > > 66 A A \end{matrix};;$

若令z″＝4A-|z′|，则有：If z″=4A-|z′|, then:

$LLR LLR ((Re Re,, 11)) = = \{\begin{matrix} S S \cdot \cdot {z z}^{' '' '} & | | {z z}^{' '' '} | | \leq \leq 22 A A \\ S S \cdot \cdot sign sign (({z z}^{' '' '})) 22 ((| | {z z}^{' '' '} | | - - A A)) & | | {z z}^{' '' '} | | > > 22 A A \end{matrix};;$

LLR(Re，2)＝S·(2A-|z″|)；LLR(Re,2)=S·(2A-|z"|);

若令z′＝Im{z_N}，则有If z′=Im{z _N }, then

$LLR LLR ((Im Im,, 00)) = = \{\begin{matrix} S S \cdot \cdot sign sign (({z z}^{' '})) | | {z z}^{' '} | | & | | {z z}^{' '} | | < < 22 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 22 ((| | {z z}^{' '} | | - - A A)) & 22 A A < < | | {z z}^{' '} | | < < 44 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 33 ((| | {z z}^{' '} | | - - 22 A A)) & 44 A A < < | | {z z}^{' '} | | < < 66 A A \\ S S \cdot &Center Dot; sign sign (({z z}^{' '})) 44 ((| | {z z}^{' '} | | - - 33 A A)) & | | {z z}^{' '} | | > > 66 A A \end{matrix};;$

令z″＝4A-|z′|，则有：Let z″=4A-|z′|, then:

$LLR LLR ((Im Im,, 11)) = = \{\begin{matrix} S S \cdot &Center Dot; {z z}^{' '' '} & | | {z z}^{' '' '} | | \leq \leq 22 A A \\ S S \cdot \cdot Φ Φ (({z z}^{' '' '})) 22 ((| | {z z}^{' '' '} | | - - A A)) & | | {z z}^{' '' '} | | > > 22 A A \end{matrix};;$

LLR(Im，2)＝S·(2A-|z″|)。LLR(Im,2)=S·(2A-|z"|).

图3中，LLR0_temp、LLR1_temp和LLR2_temp在不同调制模式下对应的含义如以下表2所示：In Figure 3, the corresponding meanings of LLR0_temp, LLR1_temp and LLR2_temp in different modulation modes are shown in Table 2 below:

在LLR核心处理单元还需计算：

S是计算过程中定义的一个变量，噪声归一化处理单元中采用的S指的就是这里的S。In the LLR core processing unit also need to calculate:

S is a variable defined in the calculation process, and the S used in the noise normalization processing unit refers to S here.

若LLR预处理单元、LLR核心处理单元分别采用上述如图2、图3所示的具体实现，则对应的噪声归一化处理单元主要采用除法电路实现以下功能：If the LLR preprocessing unit and the LLR core processing unit respectively adopt the specific implementations shown in Fig. 2 and Fig. 3 above, the corresponding noise normalization processing unit mainly uses a division circuit to realize the following functions:

LLR(0)＝S×LLR(Re，0)LLR(0)=S×LLR(Re,0)

LLR(1)＝S×LLR(Im，0)LLR(1)=S×LLR(Im,0)

LLR(2)＝S×LLR(Re，1)LLR(2)=S×LLR(Re,1)

LLR(3)＝S×LLR(Im，1)LLR(3)=S×LLR(Im, 1)

LLR(4)＝S×LLR(Re，2)LLR(4)=S×LLR(Re, 2)

LLR(5)＝S×LLR(Im，2)LLR(5)=S×LLR(Im, 2)

其中 $S = \frac{4}{c^{2} N_{o}} .$ in $S = \frac{4}{c^{2} N_{o}} .$

这里需要指出的是：对于z＝Ax+N_o信号，也通过下面的公式得到其中一个比特b_k的LLR值：What needs to be pointed out here is: for the z=Ax+N _o signal, the LLR value of one of the bits b _k is also obtained by the following formula:

${LLR LLR}_{k k} = = ln ln \frac{P P (({b b}_{k k} = = 11 | | z z))}{P P (({b b}_{k k} = = 00 | | z z))}$

$= = ln ln \frac{P P (({b b}_{k k} = = 11)) P P ((z z | | {b b}_{k k} = = 11))}{P P (({b b}_{k k} = = 00)) P P ((z z | | {b b}_{k k} = = 00))}$

$= = ln ln \frac{P P ((z z | | {b b}_{k k} = = 11))}{P P ((z z | | {b b}_{k k} = = 00))}$

$= = ln ln \frac{\underset{x x &Element; &Element; {\overset{&OverBar; &OverBar;}{C C}}_{k k}^{11}}{Σ Σ} P P ((z z | | x x))}{\underset{x x &Element; &Element; {\overset{&OverBar; &OverBar;}{C C}}_{k k}^{00}}{Σ Σ} P P ((z z | | x x))}$

$= = ln ln \underset{x x &Element; &Element; {\overset{&OverBar; &OverBar;}{C C}}_{k k}^{11}}{Σ Σ} P P ((z z | | x x)) - - ln ln \underset{x x &Element; &Element; {\overset{&OverBar; &OverBar;}{C C}}_{k k}^{00}}{Σ Σ} P P ((z z | | x x))$

$\approx \approx ln ln \underset{x x &Element; &Element; {\overset{&OverBar; &OverBar;}{C C}}_{k k}^{11}}{max max} {{P P ((z z | | x x))}} - - ln ln \underset{x x &Element; &Element; {\overset{&OverBar; &OverBar;}{C C}}_{k k}^{00}}{max max} {{P P ((z z | | x x))}}$

$\approx \approx \frac{11}{{N N}_{00}} \underset{x x &Element; &Element; {\overset{&OverBar; &OverBar;}{C C}}_{k k}^{00}}{min min} {((z z - - x x))}^{22} - - \frac{11}{{N N}_{00}} \underset{x x &Element; &Element; {\overset{&OverBar; &OverBar;}{C C}}_{k k}^{11}}{min min} {((z z - - x x))}^{22}$

其中

是所有第k位为0的星座点的集合；是所有第k位为1的星座点的集合。x(代表发送的数据)分布在整数格点上，可以根据z(代表接收到的数据)的输入，决定各个区间LLR值的表达式。本发明上述提到的一系列公式是这里公式的等效结果，不做赘述。in

is the set of all constellation points whose kth bit is 0; is the set of all constellation points whose k-th bit is 1. x (representing the sent data) is distributed on the integer grid points, and the expression of the LLR value of each interval can be determined according to the input of z (representing the received data). The series of formulas mentioned above in the present invention are the equivalent results of the formulas here, and will not be described in detail.

以上所述，仅为本发明的较佳实施例而已，并非用于限定本发明的保护范围。The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the protection scope of the present invention.

Claims

1. A system for implementing log-likelihood ratios in a digital system, the system comprising: the device comprises an LLR preprocessing unit, an LLR core processing unit and a noise normalization processing unit; wherein,

the LLR preprocessing unit is used for preprocessing an input Z signal to obtain Z_NThe formula adopted is z_NC (Re { z } + Im { z }); wherein, z is Ax + N_oRe { Z } represents the real part of the complex number Z, Im { Z } represents the imaginary part of the complex number Z, c is the normalized coefficient of the constellation points for the different modulation modes;

the LLR core processing unit is used for processing the data according to Z_NAnd a calculation formula of LLR intermediate values under different modulation modes is used for obtaining corresponding LLR intermediate values under different modulation modes and outputting the LLR intermediate values to the noise normalization unit, wherein the LLR intermediate values are LLR (Re, i) or LLR (Im, i);

and the noise normalization unit is used for obtaining a final LLR value according to the LLR intermediate value, and the calculation formula of the final LLR value is LLR (LLR) × LLR (Re, i) or LLR (LLR) × LLR (Im, i).

2. The system of claim 1, wherein the LLR preprocessing unit is further configured to obtain Z intermediate values by using a parallel-to-serial conversion circuit for real and imaginary parts of the input Z signal, and to output Z intermediate values by multiplying the Z intermediate values by square root values selected correspondingly according to different modulation modes after selecting the square root values correspondingly for the Z intermediate values, and using a shift equivalent circuit for multiplying the Z intermediate values by the square root values selected correspondingly_NTo the LLR core processing unit.

3. The system of claim 1, wherein the LLR core processing unit is further configured to implement multiplication by using a shift equivalent circuit, implement comparison by using an addition/subtraction circuit, and correspondingly select corresponding data for output according to a calculation formula of LLR intermediate values in different modulation modes to obtain LLR intermediate values.

4. The system of claim 2, wherein the LLR preprocessing unit is further configured to select the square root values as:

and

wherein,

\sqrt{2} = 2^{0} + 2^{- 2} + 2^{- 3} + 2^{- 5};

\sqrt{10} = 2^{1} + 2^{0} + 2^{- 3} + 2^{- 5};

\sqrt{42} = 2^{2} + 2^{1} + 2^{- 1} + 2^{- 5} .

5. the system of claim 3, wherein the LLR core processing unit is further configured to calculate LLR intermediate values in different modulation modes according to a formula comprising:

let z_NC · z ═ c · (Re { z } + Im { z }), then:

a. for BPSK modulation mode:

let z ═ Re { z_NR, then LLR (Re, 0) ═ S · z';

b. for QPSK modulation mode:

let z ═ Re { z_NR, then LLR (Re, 0) ═ S · z';

let z ═ Im { z_NF, if the LLR (Im, 0) is equal to z';

c. for the 16QAM modulation mode:

if z' is Re { z_NAnd then, there are:

LLR(Re，1)＝S·(2A-|z′|)；

if let z' Im { z_NAnd then, there are:

LLR(Im，1)＝S·(2A-|z′|)；

d. for a 64QAM modulation mode:

if z' is Re { z_N}, then there are

If z ″, 4A | -z' |, there are:

LLR(Re，2)＝S·(2A-|z″|)；

if z' is Im { z_N}, then there are

Let z ″, 4A-z' |, then there are:

LLR(Im，2)＝S·(2A-|z″|)。

6. a method for implementing log-likelihood ratios in a digital system, the method comprising:

the LLR preprocessing unit preprocesses the input Z signal to obtain Z_NThe formula adopted is z_NC (Re { Z } + Im { Z }), and Z is added to the mixture_NOutputting the result to an LLR core processing unit; z is Ax + N_oRe { Z } represents the real part of complex Z, Im { Z } represents the imaginary part of complex Z, c is the normalized coefficient of the constellation point for the different modulation modes;

LLR core processing unit according to Z_NAnd a calculation formula of LLR intermediate values under different modulation modes is used for obtaining corresponding LLR intermediate values under different modulation modes and outputting the LLR intermediate values to the noise normalization unit, wherein the LLR intermediate values are LLR (Re, i) or LLR (Im, i);

the noise normalization unit obtains a final LLR value from the LLR intermediate value, and the calculation formula of the final LLR value is LLR (LLR) is S-LLR (Re, i) or LLR (LLR) is S-LLR (Im, i).

7. The method of claim 6, wherein the preprocessing the input Z signal to obtain Z_NThe method specifically comprises the following steps: adopting a parallel-serial conversion circuit to obtain a Z intermediate value for the real part and the imaginary part of an input Z signal, correspondingly selecting a square root value for the Z intermediate value according to different modulation modes, adopting a shift equivalent circuit to multiply the Z intermediate value with the correspondingly selected square root value, and outputting Z_N。

8. The method of claim 7, wherein the corresponding selected square root values are specifically:

and

wherein,

\sqrt{2} = 2^{0} + 2^{- 2} + 2^{- 3} + 2^{- 5};

\sqrt{10} = 2^{1} + 2^{0} + 2^{- 3} + 2^{- 5};

\sqrt{42} = 2^{2} + 2^{1} + 2^{- 1} + 2^{- 5} .

9. the method of any of claims 6 to 8, wherein the calculation formula of the LLR intermediate values in different modulation modes comprises:

let z_NC · z ═ c · (Re { z } + Im { z }), then:

a. for BPSK modulation mode:

let z ═ Re { z_NR, then LLR (Re, 0) ═ S · z';

b. for QPSK modulation mode:

let z ═ Re { z_NR, then LLR (Re, 0) ═ S · z';

let z ═ Im { z_NF, if the LLR (Im, 0) is equal to z';

c. for the 16QAM modulation mode:

if z' is Re { z_NAnd then, there are:

LLR(Re，1)＝S·(2A-|z′|)；

if let z' Im { z_NAnd then, there are:

LLR(Im，1)＝S·(2A-|z′|)；

d. for a 64QAM modulation mode:

if z' is Re { z_N}, then there are

If z ″, 4A | -z' |, there are:

LLR(Re，2)＝S·(2A-|z″|)；

if z' is Im { z_N}, then there are

Let z ″, 4A-z' |, then there are:

LLR(Im，2)＝S·(2A-|z″|)。