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CN102170242A - Unipolar sinusoidal pulse width modulation (SPWM) inverter - Google Patents

Unipolar sinusoidal pulse width modulation (SPWM) inverter Download PDF

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CN102170242A
CN102170242A CN2011101028439A CN201110102843A CN102170242A CN 102170242 A CN102170242 A CN 102170242A CN 2011101028439 A CN2011101028439 A CN 2011101028439A CN 201110102843 A CN201110102843 A CN 201110102843A CN 102170242 A CN102170242 A CN 102170242A
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spwm
resistance
circuit
voltage
inverter
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CN102170242B (en
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王振存
江燕兴
张先谋
许洪华
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BEIJING CORONA PHOTOELECTRIC SCIENCE & TECHNOLOGY CO.,LTD.
JIANGSU KENUO WEIYE PHOTOELECTRIC TECHNOLOGY Co.,Ltd.
Beijing Corona Science and Technology Co Ltd
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Abstract

The invention provides a unipolar sinusoidal pulse width modulation (SPWM) inverter, comprising a unipolar SPWM modulator circuit(120), used for generating a SPWM driving pulse to drive a power conversion circuit(130); a power conversion circuit(130), used for, under the driven of the unipolar SPWM modulator circuit(120), inverting direct current input power into alternating current, and outputting the alternating current; and a resistance voltage dividing sampling circuit(110), used for gathering the alternating voltage outputted by the power conversion circuit(130). The inverter uses Y topology connection of voltage sampling resistance, so as to eliminate hidden trouble of busbar bridge short circuit caused by the sampling circuit. Therefore, while sampling on the inverter alternating output voltage is accurately carried out, electrical isolation components such as a sampling transformer, an optical coupler or a Hall voltage sensor which are needed by a conventional sampling circuit are omitted, so as to increase precision of sampling voltage and reduce cost.

Description

One pole sinusoid pulse width modulation modulation (SPWM) inverter
Technical field
The present invention relates to a kind of inverter and alternating voltage sample circuit thereof, more specifically relate to a kind of alternating voltage sample circuit that is used for one pole SPWM modulated inverter.
Background technology
At present, in existing technology, the ac output voltage sample circuit of inverter, many with sampling transformer or linear optical coupling or isolated amplifier, equal control circuit and output are isolated, with the straight-through danger that prevents to sample and brought.But such cost is the cost that has improved sample circuit, and can cause the error of precision.
File 1: " voltage isolation sampling apparatus " (CN200520135499.3, Tianwei Group Co., Ltd., Baoding) disclosed a kind of sample circuit that adopts isolating transformer.This sample circuit is made up of sampling transformer isolation plus signal modulate circuit, the electrical schematic diagram of this class sample circuit as shown in Figure 1, it also is inverter one of the maximum sample circuits of sampling, Q1, Q2, Q3, Q4 and L3, C1 form the main circuit sine wave output voltage of inverter among the figure, sine wave output voltage is through sampling transformer T1 isolated buck, the secondary of sampling transformer meets rectifier bridge D1, and the steamed bun ripple of rectifier bridge D1 output obtains sampled voltage after resistance R 1, R2 dividing potential drop.This sample circuit is the employed main flow structure of present industry, and it has advantage of high precision, can be applicable to most of application scenarios, but volume is big, cost is high, and owing to exists rectifier bridge in the low pressure sampling is used certain limitation to be arranged.
Document 2: " a kind of sample circuit to the 220V alternating voltage " (CN03222949.6 (South China Science ﹠ Engineering University) discloses a kind of sample circuit of light-coupled isolation type, this sample circuit is by optocoupler, voltage-stabiliser tube, electric capacity is formed, the electrical schematic diagram of this class sample circuit as shown in Figure 2, the same, Q1 among the figure, Q2, Q3, Q4 and L3, C1 forms the main circuit sine wave output voltage of inverter, sine wave output voltage, sine wave output voltage is through rectifier D2 rectification, voltage after the rectification is connected to by R1, R2, R3, R4, C2, optocoupler V1, voltage-stabiliser tube ZD1 (TL431) forms signal conditioning circuit, R3 wherein, C2 forms pi regulator with ZD1, R1, the benchmark 2.5V that R2 forms output voltage bleeder circuit and ZD1 compares, and output voltage raises, and limit, optocoupler source electric current increases, output voltage reduces, and limit, optocoupler source electric current reduces.The electric current that is in proportion of optical coupling secondary edges and output voltage is transformed into sampled voltage through R5 like this, this sample circuit is by need high-voltage rectifying bridge, compositions such as optocoupler, voltage-stabiliser tube, resistance, electric capacity, only can the sample amplitude of alternating voltage of this circuit, and information such as phase place, harmonic wave are all lost, precision is not high, and cost is high slightly.
Document 3: (electronic devices and components are used " application of LEM closed-loop sensors in signal sampling ", Vo1.9NO.10, in October, 2007, Guangdong University of Technology) provided the example that utilizes the Hall element sampling, sample circuit is made of Hall element, the electrical schematic diagram of this class sample circuit as shown in Figure 3, Q1 among the figure, Q2, Q3, Q4 and L3, C1 forms the main circuit sine wave output voltage of inverter, sine wave output Hall voltage transducer isolated buck, the secondary of Hall voltage transducer meets rectifier bridge D1, and the steamed bun ripple of rectifier bridge D1 output is through resistance R 1, obtain sampled voltage after the R2 dividing potential drop.Compare above-mentioned two kinds of sample circuits, this circuit precision is the highest, but Hall element need add accessory power supply, complex structure, and cost also is the highest simultaneously.
Summary of the invention
The objective of the invention is to overcome existing alternating voltage sample circuit complex structure, be difficult to further reduce volume and weight, and expensive, shortcoming such as trueness error is big, and a kind of one pole SPWM modulated inverter and sample circuit thereof of being applicable to proposed, this sample circuit has been removed the isolation link of routine sampling circuit, adopt the sampling of simple electric resistance partial pressure, and have precision height, advantage that cost is low.
The objective of the invention is to overcome expensive, the shortcoming that trueness error is big of existing alternating voltage sample circuit, the present invention proposes a kind of voltage sampling circuit that is applicable to one pole SPWM modulated inverter, this sample circuit has been removed the isolation link of routine sampling circuit, adopt the sampling of simple electric resistance partial pressure, and have precision height, advantage that cost is low.
In view of this, the technical solution adopted for the present invention to solve the technical problems provides a kind of one pole sinusoid pulse width modulation modulation (SPWM) inverter, comprise: one pole SPWM modulation circuit (120) is used to produce the SPWM driving pulse, with driving power translation circuit (130); Power conversion circuit (130) is used under the driving of described one pole SPWM modulation circuit (120), and direct-current input power supplying is reverse into alternating current output; And electric resistance partial pressure sample circuit (110), be used for gathering the alternating voltage of described power conversion circuit (130) output,, use with the proportional voltage signal of ac output voltage of output by electric resistance partial pressure for the user with described power conversion circuit (130).
According to a preferred embodiment of the invention, the alternating current of SPWM driving pulse driving power translation circuit (130) output of described one pole SPWM modulation circuit (120) generation is simple alternating current output.
According to a preferred embodiment of the invention, the SPWM driving pulse that described one pole SPWM modulation circuit (120) generates drives first inverter bridge leg (Q1, Q3) and second inverter bridge leg (Q2, Q4) respectively, after described SPWM driving pulse is amplified by first inverter bridge leg (Q1, Q3) and second inverter bridge leg (Q2, Q4), (L3 C1) produces simple alternating current and exports to described resistance sampling circuit (110) after the filtering through filter circuit then.
According to a preferred embodiment of the invention, described electric resistance partial pressure sample circuit (110) is a Y type electric resistance partial pressure sample circuit, and three branch roads that connected by the Y type constitute.
According to a preferred embodiment of the invention, described electric resistance partial pressure sample circuit (110) is a Y type circuit structure, three branch roads are respectively high pressure branch road 1,2 and low pressure branch road 3, one end on the road 2 of described high pressure branch road 1 and high pressure links to each other with the positive and negative end of described one pole SPWM inverter output respectively, the other end is received together and is linked to each other with the upper end of described low pressure branch road 3, this tie point constitutes the Y type node (samp) of three branch roads, and the lower end of described low pressure branch road 3 links to each other with dc bus ground.
According to a preferred embodiment of the invention, resistance R 5 one termination dc bus ground, the other end are connected in series " resistance R 2 string R1 " and " resistance R 4 string R3 " both parallel resistances simultaneously, thereby constitute described Y type electric resistance partial pressure sample circuit (110).
According to a preferred embodiment of the invention, described resistance R 1, R2 series connection constitute high pressure branch road 1, and R1 connects and exchanges output A end, and R2 is via Y type node (SAMP) connecting resistance R5; Resistance R 3, R4 series connection constitute high pressure branch road 2, and R3 connects and exchanges output B end, and R4 is via Y type node (SAMP) connecting resistance R5; R5 constitutes the road of low pressure separately, and two ends connect Y type node (SAMP) and dc bus ground respectively.
According to a preferred embodiment of the invention, resistance R wherein 1=R 2=R 3=R 4
According to a preferred embodiment of the invention, according to the output voltage values of inverter, the sample voltage value of electric resistance partial pressure sample circuit (110), power consumption and withstand voltage, and sampling precision is chosen resistance R 5.
According to a preferred embodiment of the invention, when the SPWM driving pulse is in the positive half period signal, power conversion circuit (130) exchanges the output positive voltage, through resistance branch R1 string R2,5 in parallel with resistance R " resistance R 3 string R4 " equivalent resistance form the loop, on R5, obtain the ac voltage signal (Vsamp) of positive half period; When the SPWM driving pulse is in the negative half-cycle signal, power conversion circuit (130) exchanges the output negative voltage, through resistance branch R3 string R4, form the loop with the equivalent resistance of resistance R 5 " resistance R 1 string R2 " in parallel, on R5, obtain the ac voltage signal (Vsamp) of negative half-cycle; Thereby resistance R 5 has just obtained the ac voltage signal (Vsamp) in whole cycle.
Adopt technique scheme, the present invention utilizes the Y type topology of voltage sample resistance to connect, and has eliminated the hidden danger of the bus brachium pontis short circuit that is caused by sample circuit, so can remove the necessary electrical isolation element of conventional inverter sample circuit.When the present invention can sample to the inverter ac output voltage accurately, eliminated required sampling transformer, optocoupler or the Hall voltage transducer of routine sampling circuit, made the sampled voltage precision higher, cost is lower.
Though will describe the present invention in conjunction with some exemplary enforcements and using method hereinafter, and it will be appreciated by those skilled in the art that and be not intended to the present invention is limited to these embodiment.Otherwise, be intended to cover all substitutes, correction and the equivalent that are included in defined spirit of the present invention of appending claims and the scope.
Other advantages of the present invention, target and feature will be set forth to a certain extent in the following description, and to a certain extent, based on being conspicuous to those skilled in the art, perhaps can obtain instruction from the practice of the present invention to investigating hereinafter.Target of the present invention and other advantages can be passed through following specification, claims, and the specifically noted structure realizes and obtains in the accompanying drawing.
Description of drawings
In order to make the purpose, technical solutions and advantages of the present invention clearer, the present invention is described in further detail below in conjunction with accompanying drawing, wherein:
Fig. 1 is inverter and the sample circuit schematic diagram thereof that adopts buffer circuit in the routine techniques;
Fig. 2 a adopts the inverter of transformer isolation and the schematic diagram of sample circuit thereof;
Fig. 2 b adopts the inverter of light-coupled isolation and the schematic diagram of sample circuit thereof;
Fig. 2 c adopts the inverter of Hall voltage transducer isolation and the schematic diagram of sample circuit thereof;
Fig. 3 is the schematic diagram according to one pole sinusoid pulse width modulation modulation (SPWM) inverter of the present invention and voltage sampling circuit thereof.
Fig. 4 is a sampled voltage signal timing diagram according to one pole sinusoid pulse width modulation modulation (SPWM) inverter of the present invention and voltage sampling circuit thereof.
Embodiment
Below in conjunction with accompanying drawing the specific embodiment of the present invention is described in further detail.It should be noted that the execution mode of modulating (SPWM) inverter and alternating voltage sample circuit thereof according to one pole sinusoid pulse width modulation of the present invention as just example, but the invention is not restricted to this embodiment.
The objective of the invention is to overcome expensive, the shortcoming that trueness error is big of existing alternating voltage sample circuit, the present invention proposes a kind of sample circuit that is applicable to one pole SPWM modulated inverter, this sample circuit has been removed the isolation link of routine sampling circuit, adopt the sampling of simple electric resistance partial pressure, and have precision height, advantage that cost is low.
One pole sinusoid pulse width modulation modulation (SPWM) inverter according to the present invention comprises: one pole SPWM modulation circuit (120) is used to produce the SPWM driving pulse, with driving power translation circuit (130); Power conversion circuit (130) is used under the driving of described one pole SPWM modulation circuit (120), and direct-current input power supplying is reverse into alternating current output; Electric resistance partial pressure sample circuit (110) is used for gathering the alternating voltage of described power conversion circuit (130) output,, uses for the user with the proportional voltage signal of ac output voltage of output with described power conversion circuit (130) by electric resistance partial pressure.
The alternating current of SPWM driving pulse driving power translation circuit (130) output that above-mentioned one pole SPWM modulation circuit (120) produces is simple alternating current output.The SPWM driving pulse that described one pole SPWM modulation circuit (120) generates drives first inverter bridge leg (Q1, Q3) and second inverter bridge leg (Q2, Q4) respectively, after described SPWM driving pulse is amplified by first inverter bridge leg (Q1, Q3) and second inverter bridge leg (Q2, Q4), (L3 C1) produces simple alternating current and exports to described resistance sampling circuit (110) after the filtering through filter circuit then.
In a preferred embodiment, electric resistance partial pressure sample circuit (110) is a Y type electric resistance partial pressure sample circuit, and three branch roads that connected by the Y type constitute.Electric resistance partial pressure sample circuit (110) is a Y type circuit structure, three branch roads are respectively high pressure branch road 1,2 and low pressure branch road 3, one end on the road 2 of described high pressure branch road 1 and high pressure links to each other with the positive and negative end of described one pole SPWM inverter output respectively, the other end is received together and is linked to each other with the upper end of described low pressure branch road 3, this tie point constitutes the Y type node (samp) of three branch roads, and the lower end of described low pressure branch road 3 links to each other with dc bus ground.
In other words, resistance R 5 one termination dc bus ground, the other end are connected in series " resistance R 2 string R1 " and " resistance R 4 string R3 " both parallel resistances simultaneously, thereby constitute described Y type electric resistance partial pressure sample circuit (110).More specifically, described resistance R 1, R2 series connection constitute high pressure branch road 1, and R1 connects and exchanges output A end, and R2 is via Y type node (SAMP) connecting resistance R5; Resistance R 3, R4 series connection constitute high pressure branch road 2, and R3 connects and exchanges output B end, and R4 is via Y type node (SAMP) connecting resistance R5; R5 constitutes the road of low pressure separately, and two ends connect Y type node (SAMP) and dc bus ground respectively.
Fig. 3 shows the preferred implementation of voltage sampling circuit of the present invention respectively.Compare with the routine sampling circuit, form power conversion circuit (130) the sine wave output voltage (being sinusoidal power signal) of inverter equally by Q1, Q2, Q3, Q4 and L3, C1.But the routine sampling circuit is the magnitude of voltage of adopting between output terminals A, the B end, because the brachium pontis short circuit that one of A, B end and bus short circuit all can cause Q1, Q2, Q3, Q4 to form, so the sample mode of must sampling isolating.We analyze, in Fig. 3 when inverter takes one pole SPWM to modulate,
The output A end of inverter ("+" end) is output as dc bus:
V O + = V d * M sin ωt . . . ( 2 nπ ≤ ωt ≤ 2 nπ + π ) V O + = 0 . . . . . . . . . . . . . . . ( 2 nπ + π ≤ ωt ≤ 2 ( n + 1 ) π ) . . . . . . ( 1 )
Wherein:
V O+... ... ... exchange output A end (just exchanging) to the dc bus ground voltage
V d... ... ... DC bus-bar voltage
The M..................SPWM modulation ratio
ω ... ... ... the ac output voltage angular frequency
The output B end of inverter ("-" end) is output as dc bus:
V O - = 0 . . . . . . . . . . . . . . . . . . ( 2 nπ ≤ ωt ≤ 2 nπ + π ) V O - = V d * M sin ωt . . . ( 2 nπ + π ≤ ωt ≤ 2 ( n + 1 ) π ) . . . . . . ( 2 )
Wherein:
V O-... ... ... exchange output B end (exchanging negative) to the dc bus ground voltage
V d... ... ... DC bus-bar voltage
The M..................SPWM modulation ratio
ω ... ... ... the ac output voltage angular frequency
And the inverter ac output voltage is:
V out=V d*M?sinωt......(3)
Wherein:
V Out... ... ... the inverter ac output voltage
V d... ... ... DC bus-bar voltage
The M..................SPWM modulation ratio
ω ... ... ... the ac output voltage angular frequency
Also be that inverter output A, B hold having reflected the enough information of output voltage between the dc bus ground, we have also just gathered output voltage by gathering A, B end to the voltage of dc bus like this.
Therefore, we have designed Y type electric resistance partial pressure sample circuit.Inverter according to the present invention is taked one pole SPWM modulation, and one pole SPWM modulation circuit 120 is total to ground structure with dc bus simultaneously, and adopts Y type circuit structure to constitute the electric resistance partial pressure sample circuit.This inverter is made of electric resistance partial pressure sample circuit 110, one pole SPWM modulation circuit 120 and power conversion circuit 130, three branch roads of electric resistance partial pressure sample circuit 110 are respectively high pressure branch road 1,2, low pressure branch road 3, one end of two high pressure branch roads is exported positive and negative end with inverter respectively and is linked to each other, the other end is received together and is linked to each other with the upper end of low pressure branch road, and the lower end of low pressure branch road links to each other with dc bus ground.
Resistance R 5 one termination dc bus ground, the other end links to each other with resistance R 2, R4 simultaneously.Wherein resistance R 1, R2 series connection, R1 connects and exchanges output A end, R2 connecting resistance R5; Resistance R 3, R4 series connection, R3 connects and exchanges output B end, R4 connecting resistance R5.Resistance R 1=R 2=R 2=R 4=R M
In the present invention, utilize the Y type topology of voltage sample resistance to connect, eliminated the hidden danger of the bus brachium pontis short circuit that causes by sample circuit, so can remove the necessary electrical isolation element of conventional inverter sample circuit.
Referring to Fig. 3 and Fig. 4, at the positive half period and the negative half-cycle that exchange output, sampled voltage can be got by ohm theorem:
Figure BDA0000057001250000101
Wherein:
V Samp... ... ... .... the inverter sampled voltage
V Out... ... ... inverter output voltage
R is arranged again 1=R 2=R 3=R 4=R MSo formula 4 can be transformed to:
Figure BDA0000057001250000102
By last analysis as can be known, by selecting suitable resistance R 1, R2, R3, R4, R5 just can obtain the sampled value of output voltage.Because output voltage is generally 220V and exchanges, R1, R2 have therefore been adopted, the mode of R3, the series connection of R4 resistance.The current value that flows through sample circuit is:
Figure BDA0000057001250000111
The selection of resistance can be flow through the current value of sampling resistor so that whether the power consumption and the withstand voltage of definite resistance are complementary with the control circuit level according to formula 5 calculating sampling magnitudes of voltage according to formula 6 calculating.
When the present invention can sample to the inverter ac output voltage accurately, eliminated required sampling transformer, optocoupler or the Hall voltage transducer of routine sampling circuit, made the sampled voltage precision higher, cost is lower.
Fig. 3 shows the schematic diagram of voltage sampling circuit of the present invention.Alternating voltage sample circuit of the present invention is by electric resistance partial pressure sample circuit 110, and one pole SPWM modulation circuit 120 and power conversion circuit 130 constitute.One pole SPWM modulation circuit 120 is made of conventional one pole SPWM modulation circuit, generate SPWM modulating wave (also being the SPWM driving pulse) and drive Q1, Q3 brachium pontis and Q2, Q4 brachium pontis respectively, after the SPWM modulating wave is amplified by Q1, Q3 brachium pontis and Q2, Q4 brachium pontis after filtration wave circuit forms simple alternating current and exports.When SPWM modulating wave (driving pulse) is in the positive half period signal, power conversion circuit (130) exchanges the output positive voltage, through resistance branch R1, R2, with form the loop by resistance R 5 and R3, R4 equivalent resistance in parallel, on R5, obtain the positive half period voltage signal (in other words, through resistance branch R1 string R2,5 in parallel with resistance R " resistance R 3 string R4 " and equivalent resistance form the loop, on R5, obtain the ac voltage signal Vsamp of positive half period).When SPWM modulating wave (driving pulse) is in the negative half-cycle signal, power conversion circuit (130) exchanges the output negative voltage, through resistance branch R3, R4, with form the loop by resistance R 5 and R1, R2 equivalent resistance in parallel, the ac voltage signal that obtains negative half-cycle on R5 (in other words, through resistance branch R3 string R4, form the loop with the equivalent resistance of resistance R 5 " resistance R 1 string R2 " in parallel, on R5, obtain the ac voltage signal Vsamp of negative half-cycle).Resistance R 5 has just obtained the voltage signal (Vsamp) in whole cycle like this.Electric resistance partial pressure sample circuit 110 is a Y type circuit structure, three branch roads are respectively high pressure branch road 1,2, low pressure branch road 3 is formed, one end on the road 2 of high pressure branch road 1 and high pressure links to each other with the positive and negative end of inverter output respectively, the other end is received together link to each other with the upper end of low pressure branch road (the Y type node of three branch roads is sampled point SMAP), and the lower end of low pressure branch road links to each other with dc bus ground.
As shown in Figure 3, resistance R 5 one termination dc bus ground, the other end " resistance R 2 is gone here and there mutually with R1 " and " resistance R 4 with R3 go here and there mutually " both parallel circuitss of connecting simultaneously, thus constitute Y type electric resistance partial pressure sample circuit 110.Wherein resistance R 1, R2 series connection constitute high pressure branch road 1, and R1 connects and exchanges output A end, and R2 is via Y type node samp connecting resistance R5; Resistance R 3, R4 series connection constitute high pressure branch road 2, and R3 connects and exchanges output B end, and R4 is via Y type node SAMP connecting resistance R5; R5 constitutes the road of low pressure separately, and two ends connect Y type node SAMP and dc bus ground respectively.Resistance R wherein 1=R 2=R 3=R 4=R MResistance R 5 is according to the output voltage values of inverter, the sample voltage value of electric resistance partial pressure sample circuit (110), power consumption and withstand voltage, and sampling precision is chosen.
It should be noted that at last, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not breaking away from the spirit and scope of technical solution of the present invention, it all should be encompassed in the middle of the claim scope of the present invention.

Claims (10)

1. an one pole sinusoid pulse width modulation is modulated (SPWM) inverter, it is characterized in that comprising:
One pole SPWM modulation circuit (120) is used to produce the SPWM driving pulse, with driving power translation circuit (130);
Power conversion circuit (130) is used under the driving of described one pole SPWM modulation circuit (120), and direct-current input power supplying is reverse into alternating current output; And
Electric resistance partial pressure sample circuit (110) is used for gathering the alternating voltage of described power conversion circuit (130) output,, uses for the user with the proportional voltage signal of ac output voltage of output with described power conversion circuit (130) by electric resistance partial pressure.
2. one pole SPWM inverter according to claim 1, the alternating current that it is characterized in that SPWM driving pulse driving power translation circuit (130) output that described one pole SPWM modulation circuit (120) produces is simple alternating current output.
3. one pole SPWM inverter according to claim 2, it is characterized in that the SPWM driving pulse that described one pole SPWM modulation circuit (120) generates drives first inverter bridge leg (Q1, Q3) and second inverter bridge leg (Q2, Q4) respectively, after described SPWM driving pulse is amplified by first inverter bridge leg (Q1, Q3) and second inverter bridge leg (Q2, Q4), (L3 C1) produces simple alternating current and exports to described resistance sampling circuit (110) after the filtering through filter circuit then.
4. one pole SPWM inverter according to claim 1 is characterized in that described electric resistance partial pressure sample circuit (110) is a Y type electric resistance partial pressure sample circuit, and three branch roads that connected by the Y type constitute.
5. one pole SPWM inverter according to claim 4 is characterized in that:
Described electric resistance partial pressure sample circuit (110) is a Y type circuit structure, three branch roads are respectively high pressure branch road 1,2 and low pressure branch road 3, one end on the road 2 of described high pressure branch road 1 and high pressure links to each other with the positive and negative end of described one pole SPWM inverter output respectively, the other end is received together and is linked to each other with the upper end of described low pressure branch road 3, this tie point constitutes the Y type node (SAMP) of three branch roads, and the lower end of described low pressure branch road 3 links to each other with dc bus ground.
6. one pole SPWM inverter according to claim 4 is characterized in that:
Resistance R 5 one termination dc bus ground, the other end are connected in series " resistance R 2 string R1 " and " resistance R 4 string R3 " both parallel resistances simultaneously, thereby constitute described Y type electric resistance partial pressure sample circuit (110).
7. one pole SPWM inverter according to claim 6 is characterized in that:
Described resistance R 1, R2 series connection constitute high pressure branch road 1, and R1 connects and exchanges output A end, and R2 is via Y type node (SAMP) connecting resistance R5; Resistance R 3, R4 series connection constitute high pressure branch road 2, and R3 connects and exchanges output B end, and R4 is via Y type node (SAMP) connecting resistance R5; R5 constitutes the road of low pressure separately, and two ends connect Y type node (SAMP) and dc bus ground respectively.
8. according to claim 6 or 7 described one pole SPWM inverters, it is characterized in that wherein resistance R 1=R 2=R 3=R 4
9. according to claim 6 or 7 described one pole SPWM inverters, it is characterized in that output voltage values according to inverter, the sample voltage value of electric resistance partial pressure sample circuit (110), power consumption and withstand voltage, and sampling precision is chosen resistance R 5.
10. according to each described one pole SPWM inverter of claim 1-7, it is characterized in that:
When the SPWM driving pulse is in the positive half period signal, power conversion circuit (130) exchanges the output positive voltage, through resistance branch R1 string R2,5 in parallel with resistance R " resistance R 3 string R4 " and equivalent resistance form the loop, on R5, obtain the ac voltage signal (Vsamp) of positive half period;
When the SPWM driving pulse is in the negative half-cycle signal, power conversion circuit (130) exchanges the output negative voltage, through resistance branch R3 string R4, form the loop with the equivalent resistance of resistance R 5 " resistance R 1 string R2 " in parallel, on R5, obtain the ac voltage signal (Vsamp) of negative half-cycle;
Thereby resistance R 5 has just obtained the ac voltage signal (Vsamp) in whole cycle.
CN 201110102843 2011-04-22 2011-04-22 Unipolar sinusoidal pulse width modulation (SPWM) inverter Active CN102170242B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108802462A (en) * 2012-11-08 2018-11-13 亚德诺半导体无限责任公司 voltage measurement

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Publication number Priority date Publication date Assignee Title
JPH09304447A (en) * 1996-05-10 1997-11-28 Denso Corp Current-detecting apparatus
CN101509694A (en) * 2009-03-16 2009-08-19 宁波德斯科电子科技有限公司 DC frequency converting air-conditioner compressor intelligent controller and control method thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09304447A (en) * 1996-05-10 1997-11-28 Denso Corp Current-detecting apparatus
CN101509694A (en) * 2009-03-16 2009-08-19 宁波德斯科电子科技有限公司 DC frequency converting air-conditioner compressor intelligent controller and control method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108802462A (en) * 2012-11-08 2018-11-13 亚德诺半导体无限责任公司 voltage measurement
CN108802462B (en) * 2012-11-08 2021-12-14 亚德诺半导体无限责任公司 Voltage measurement

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