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CN102169919B - Detector and manufacture method thereof - Google Patents

Detector and manufacture method thereof Download PDF

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Publication number
CN102169919B
CN102169919B CN201110064206.7A CN201110064206A CN102169919B CN 102169919 B CN102169919 B CN 102169919B CN 201110064206 A CN201110064206 A CN 201110064206A CN 102169919 B CN102169919 B CN 102169919B
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layer
metal
detector
silicon
top layer
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CN102169919A (en
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康晓旭
李铭
周炜捷
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Shanghai IC R&D Center Co Ltd
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Shanghai Integrated Circuit Research and Development Center Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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Abstract

A kind of detector and manufacture method thereof, described detector includes: silicon substrate;The top layer metallic layer being positioned on silicon substrate;The top layer via layer being positioned on top layer metallic layer;It is positioned at the metal function layer in top layer via layer;The sacrifice layer being positioned in metal function layer;It is positioned at release guard layer and the sensitive material of sacrificial layer surface;It is positioned at contact hole and the metal electrode on sensitive material surface;It is positioned at the release guard layer of surface of metal electrode;And the PAD image being positioned in top layer metallic layer;Wherein, described PAD image is not covered by top layer via layer, metal function layer and sacrifice layer, and, by controlling the thickness of metal function layer to realize the control to silicon chip surface figure flatness.Standard CMOS process is introduced in detector technique by the present invention, it is achieved that CMOS technology and the compatibility of MEMS technology, and effectively improves the flatness of detector, greatly reduces cost, improves the performance of detector, yield rate and reliability.

Description

Detector and manufacture method thereof
Technical field
The present invention relates to semiconductor technology, particularly detector and manufacture method thereof.
Background technology
Microelectromechanical systems (MEMS) technology because of have small, intelligent, can perform, can integrated, technique hold concurrently The plurality of advantages such as capacitive is good, low cost, have started to be widely used in and include the many of infrared detection technique field Field.Infrared Detectors is to apply a kind of MEMS product widely in infrared detection technique field, it Sensitive material detecting layer (usually non-crystalline silicon or vanadium oxide) is utilized to absorb infrared ray infrared by absorbed Line changes into the signal of telecommunication, and to realize thermal imaging function, this thermal imaging function makes Infrared Detectors can be applicable to The places such as the detection of the safety detection of electric power networks, the detection of forest fire alarm and human body temperature.
Detector technique based on micro-bridge structure is the most poor with CMOS technology compatibility, so the most very Difficult realization produces on a large scale.Gradually expand due to the market demand of MEMS product in recent years, The concept of CMOS-MEMS is gradually proposed by people.CMOS-MEMS is to utilize outside CMOS technology making Enclose reading and signal processing circuit, on cmos circuit, then make sensor and and micro mechanical system Structure, and process compatible sex chromosome mosaicism all the time be puzzlement CMOS-MEMS technology key.With non-refrigeration type As a example by Infrared Detectors, metallic reflection Rotating fields in its cellular construction, is widely used, is using CMOS technology After preparing reading circuit, by depositing metal and etching formation metallic reflection layer pattern;But, tradition work Skill uses common metal reflecting layer to realize resonator cavity function and PAD function, thus this metallic reflection layer thickness is past Toward meeting thicker (generally higher than 6000 angstroms), after forming metallic reflection layer pattern, due to its surface Unevennessization problem can run up to subsequent technique, thus brings a lot of problem to subsequent technique, such as photolithographic exposure The degree of depth etc.;Meanwhile, this metallic reflector, due to the needs of resonator cavity, only uses metallic aluminium, but metal The reflection of aluminum is very strong, influences whether that the thickness of subsequent film cannot be measured, cause cannot on-line monitoring follow-up Film-forming process, and finally affect its properties of product, reliability and yield rate.
Therefore, how to provide a kind of detector and manufacture method thereof, improve holding concurrently of CMOS and MEMS technology Appearance problem, and increase substantially finished product rate and reliability, it has also become the technical problem that industry is urgently to be resolved hurrily.
Summary of the invention
A kind of detector of offer and manufacture method thereof are provided, solve in CMOS-MEMS technology, The especially planarization problem at MEMS technology initial stage, thus improve the performance of detector, yield rate and reliable Property.
For achieving the above object, the invention provides a kind of detector, including: silicon substrate;It is positioned at described silicon Top layer metallic layer on substrate;The top layer via layer being positioned on described top layer metallic layer;It is positioned at described top layer to lead to Metal function layer in aperture layer;It is positioned at the sacrifice layer in described metal function layer and the supported hole on sacrifice layer; It is positioned at release guard layer and the sensitive material of described sacrificial layer surface;It is positioned at described sensitive material surface Contact hole and metal electrode;It is positioned at the release guard layer of described surface of metal electrode;And it is positioned at described top PAD image in layer metal level;Wherein, described PAD image not by top layer via layer, metal function layer with And sacrifice layer covers, and, owing to using top layer metallic layer to realize PAD image, thus can be by controlling The thickness of described metal function layer be 500 angstroms to 4000 angstroms to realize control to silicon chip surface figure flatness System.
Optionally, each through hole of described top layer via layer is filled tungsten.
Optionally, the top-level metallic pattern of described top layer metallic layer or the top layer through hole figure of described top layer via layer Use Filled Dielectrics between case, be used for isolating.
Optionally, described Filled Dielectrics uses silicon dioxide, silicon oxynitride, silicon nitride and carborundum or its group Close, or doped with boron, phosphorus, carbon, the silicon dioxide of fluorine element, silicon oxynitride, silicon nitride and carborundum or A combination thereof.
Optionally, described metal function layer and the described top layer metallic layer each through hole by described top layer via layer It is connected.
Optionally, the thickness of described metal function layer is 500 angstroms to 4000 angstroms.
Optionally, described metal function layer is one or a combination set of titanium and titanium nitride and aluminum, aluminum bronze, aluminum copper silicon Deng one of metal or the combination of alloy.
Optionally, described metal function layer has titanium, the first titanium nitride, aluminum, the film of the second titanium nitride successively Layer, typical thickness is respectively 100 angstroms, 300 angstroms, 1000 angstroms, 300 angstroms.
Optionally, described sacrifice layer includes chemical vapor deposited silicon or polyimides Organic substance.
Optionally, when use chemical vapor deposited silicon as described sacrifice layer time, use silicon dioxide or mixed with The silicon oxide of impurity and non-stoichiometric is to form described release guard layer;When using polyimides Organic substance During as described sacrifice layer, use silicon oxide, silicon or the silicon-based dielectric material such as silicon oxynitride, silicon nitride with shape Become described release guard layer.
Optionally, between described sacrifice layer and described metal function layer, also include adhesion layer based on silicon dioxide, For preventing the short circuit between metal function layer and enhancing adhesion.
Optionally, described sensitive material uses non-crystalline silicon or vanadium oxide, or mixed with impurity and non-stoichiometry The above-mentioned material of ratio.
Optionally, described metal electrode uses Ti electrode, tantalum electrode, the titanium nitride of stacked on top of one another and Ti electrode And the one in the tantalum of stacked on top of one another and tantalum nitride electrode or combination.
Optionally, described metal electrode is positioned at the part of described contact hole and contacts connection with described metal function layer.
Additionally, present invention also offers a kind of detector manufacture method, including: form top layer gold on a silicon substrate Belong to layer, and it is graphical to realize top layer metallic layer;Described top layer metallic layer is formed top layer via layer, it is achieved Top layer is Via patterning, and conductive metal deposition realize the table of top layer via layer in described top layer through hole Face planarizes;Described top layer via layer is formed metal function layer and realizes the figure of described metal function layer Changing, the thickness of described metal function layer can be regulated to realize silicon chip between 500 angstroms to 4000 angstroms The control of surfacial pattern flatness;Described metal function layer is formed sacrifice layer, and in described sacrifice layer Realize supported hole graphical;The first release guard layer, sensitive material is sequentially formed in described sacrificial layer surface And contact hole;Deposit metal electrodes to realize it graphical;Again form the second release guard layer and realize picture Element pattern;Realize PAD image conversion, thus in described top layer metallic layer, obtain PAD image.
Optionally, described conducting metal includes tungsten.
Optionally, also include: use CMOS standard technology, at the top-level metallic figure of described top layer metallic layer Between the top layer through-hole pattern of case or top layer via layer, form the Filled Dielectrics for isolation.
Optionally, described formation metal function layer includes: by titanium deposition, titanium nitride, aluminum, aluminum bronze, aluminum One of metals such as copper silicon or the combination of alloy, form the metal function layer that thickness is 500 angstroms to 4000 angstroms.
Optionally, described formation metal function layer includes: be sequentially depositing titanium layer, the first titanium nitride layer, aluminium lamination, Second titanium nitride layer;Etch described second titanium nitride layer until on described aluminium lamination, only retaining and need on-line testing The graphics field of subsequent film thickness, it is achieved the second titanium nitride layer graphical;Etch described metal function layer, Realize the graphical of described metal function layer.
Optionally, described titanium layer, the first titanium nitride layer, aluminium lamination, the thickness of the second titanium nitride layer are respectively 100 Angstrom, 300 angstroms, 1000 angstroms, 300 angstroms.
Optionally, the described PAD of realization image includes: be lithographically formed PAD image;Removed by etching technics Film layer more than PAD image-region top layer metallic layer, forms PAD image.
Compared with prior art, detector of the present invention and manufacture method thereof realize PAD by top layer metallic layer Image, and realize the control to silicon chip surface figure flatness, no by controlling metal function layer thickness Only simplify technique, and provide enough process window for subsequent technique;Meanwhile, by standard CMOS mark Quasi-postchannel process introduces in metal detector functional layer technique, it is achieved that CMOS technology and MEMS technology The most compatible, and efficiently avoid the short circuit between metal function layer, greatly reduce the system of detector Cause this, improve the performance of detector, yield rate and reliability.
Accompanying drawing explanation
Detector and the manufacture method thereof of the present invention are given by below example and accompanying drawing:
Fig. 1 is the generalized section of a kind of embodiment of detector of the present invention;
Fig. 2 is the generalized section of a kind of embodiment of detector manufacture method of the present invention;
Fig. 3 is the generalized section being formed top layer metallic layer shown in Fig. 2 by step S1;
Fig. 4 is the schematic flow sheet of step S2 shown in Fig. 2;
Fig. 5 is the generalized section being formed top layer via layer shown in Fig. 2 by step S2;
Fig. 6 is the generalized section being formed metal function layer shown in Fig. 2 by step S3;
Fig. 7 is the generalized section of a step S3 detailed description of the invention shown in Fig. 2;
Fig. 8 is to form sacrifice layer and the generalized section of supported hole structure by step S4 shown in Fig. 2;
Fig. 9 be based on structure shown in Fig. 8 formed between sacrifice layer and metal function layer adhesion layer section Schematic diagram;
Figure 10 is the generalized section being formed release guard layer shown in Fig. 2 by step S5;
Figure 11 is the generalized section being formed sensitive material shown in Fig. 2 by step S5;
Figure 12 is the section signal being formed contact hole graph and metal electrode shown in Fig. 2 by step S6 Figure;
Figure 13 is the generalized section being formed the second release guard layer shown in Fig. 2 by step S7;
Figure 14 is the generalized section being formed PAD image shown in Fig. 2 by step S8.
Detailed description of the invention
Hereinafter detector of the present invention and manufacture method thereof will be described in further detail.
See Fig. 1, the invention provides the embodiment of a kind of detector, including:
Silicon substrate 101;
The top layer metallic layer 102 being positioned on silicon substrate 101;
The top layer via layer 103 being positioned on top layer metallic layer 102;
The metal function layer 104 being positioned in top layer via layer 103;
The sacrifice layer 105 being positioned in metal function layer 104;
It is positioned at release guard layer 106 and the sensitive material 107 on sacrifice layer 105 surface;
It is positioned at contact hole and the metal electrode 108 on sensitive material 107 surface;
It is positioned at the release guard layer 106 on metal electrode 108 surface;
And the PAD image 109 being positioned in top layer metallic layer 102;
Wherein, PAD image 109 is not by top layer via layer 103, metal function layer 104 and sacrifice layer 105 Cover, and, by controlling the thickness of metal function layer 102 to realize silicon chip surface figure flatness Control.
Wherein, multiple logical by top layer via layer 103 of metal function layer 104 and top layer metallic layer 102 Hole is formed and connects.
Top layer metallic layer 102 may also include be positioned at top-level metallic pattern for isolation Filled Dielectrics 110, and/ Or top layer via layer 103 may also include between top layer through-hole pattern for the Filled Dielectrics 110 isolated. This Filled Dielectrics 110 can use silicon dioxide, silicon oxynitride, silicon nitride and carborundum or a combination thereof, or mixes Miscellaneous have boron, phosphorus, carbon, the silicon dioxide of fluorine element, silicon oxynitride, silicon nitride and carborundum or a combination thereof.
Each through hole of top layer via layer 103 can fill the conducting metals such as tungsten.
The metal material of metal function layer 104 can be one or a combination set of titanium and titanium nitride and aluminum, aluminum bronze, aluminum One of metals such as copper silicon or the combination of alloy;The integral thickness of metal function layer 104 can be 500 angstroms to 4000 Angstrom, specifically, can realize silicon chip surface figure step by controlling the thickness of metal function layer 104 Control and the demand of detector specific function (reflection resonator cavity etc.).In a particular embodiment, can use Titanium layer, the first titanium nitride layer, aluminium lamination, the combinative structure of the second titanium nitride layer, the metal function layer formed The thickness of 104 is respectively 100 angstroms, 300 angstroms, 1000 angstroms, 300 angstroms.
Sacrifice layer 105 can use the Organic substances such as chemical vapor deposited silicon (CVD-Si) or polyimides.Additionally, For strengthening adhesion, can arrange based on silicon dioxide (SiO between sacrifice layer 105 and metal function layer 1042) Adhesion layer, on the one hand be possible to prevent the short circuit between metal function layer 104, on the one hand can strengthen and stick Property.In a particular embodiment, can use silicon dioxide based on tetraethyl orthosilicate as adhesion layer, its thickness It it is 1000 angstroms;And use CVD-Si as sacrifice layer 150 on this adhesion layer.
The material that release guard layer 106 is used can determine according to the material of sacrifice layer 105.Such as, when When using CVD-Si as sacrifice layer 105, silicon dioxide can be used or mixed with impurity and non-stoichiometric Silicon oxide is to form release guard layer 106;When Organic substances such as using polyimides makees sacrifice layer 105, can adopt With silicon oxide, silicon or the silicon-based dielectric material such as silicon oxynitride, silicon nitride to form release guard layer 106.At tool In body embodiment, use silicon dioxide (SiO2) to form release guard layer 106.
Sensitive material 107 can use non-crystalline silicon or vanadium oxide, or mixed with impurity and non-stoichiometric Above-mentioned material, such as, can use red non-crystalline silicon to form sensitive material 107.
Wherein, metal electrode 108 is positioned at the part of contact hole and contacts connection with metal function layer 104.Metal Electrode 108 can be Ti electrode, tantalum electrode, the titanium nitride of stacked on top of one another and Ti electrode and the tantalum of stacked on top of one another With the one in tantalum nitride electrode or combination.Such as, titanium nitride can be used as metal electrode 108.
Reference Fig. 2, a kind of detailed description of the invention of detector manufacture method of the present invention, including:
Step S1, forms top layer metallic layer on a silicon substrate, and it is graphical to realize top layer metallic layer;
Step S2, forms top layer via layer, it is achieved top layer is Via patterning on described top layer metallic layer, with And in described top layer through hole conductive metal deposition realize the surface planarisation of top layer via layer;
Step S3, forms metal function layer in described top layer via layer and realizes the figure of described metal function layer Shape, the thickness of described metal function layer can be regulated to realize the control to silicon chip surface figure flatness System;
Step S4, forms sacrifice layer in described metal function layer, and realizes supported hole in described sacrifice layer Graphically;
Step S5, sequentially forms the first release guard layer, sensitive material in described sacrificial layer surface and contacts Hole;
Step S6, deposit metal electrodes to realize it graphical;
Step S7, again forms the second release guard layer and to realize pixel graphical;
Step S8, it is achieved PAD image conversion, thus in described top layer metallic layer, realize PAD figure.
Specifically, with reference to Fig. 3, in step sl, can be formed on silicon substrate 200 by depositing operation Top layer metallic layer 210, and form the graphical of top layer metallic layer by etching technics.
With reference to Fig. 4 and Fig. 5, step S2 specifically comprises the steps that by depositing operation on top layer metallic layer 210 Form top layer via layer 220;Then, formed Via patterning in top layer via layer 220 by etching technics; Then, by chemical vapor deposition method conductive metal deposition, such as tungsten in each through hole 221, to fill Through hole 221;Then, realize top layer via layer 220 surface planarisation by chemical-mechanical planarization (CMP), To realize silicon chip surface planarization.
In step S1 and step S2, also can be respectively on top-level metallic pattern or the top of described top layer metallic layer Between the top layer through-hole pattern of layer via layer, by the metal interlayer medium/inter-level dielectric of CMOS standard technology Isolation (IMD/ILD) technique forms the Filled Dielectrics for isolation.Described Filled Dielectrics can use silicon dioxide, Silicon oxynitride, silicon nitride and carborundum or a combination thereof, or doped with boron, phosphorus, carbon, the titanium dioxide of fluorine element Silicon, silicon oxynitride, silicon nitride and carborundum or a combination thereof.
With reference to Fig. 6, performing step S3, form metal function layer, described metal function layer passes through top layer through hole Each through hole in layer 220 is formed with top layer metallic layer 210 and is connected.In step s3, described formation metal merit Ergosphere and realize its graphically comprise the steps that by one or a combination set of titanium deposition and titanium nitride and aluminum, aluminum bronze, One of metals such as aluminum copper silicon or the combination of alloy, forming thickness can be the gold of arbitrary value in 500 angstroms to 4000 angstroms Function of dominant layer 230;One or a combination set of the titanium of selective retention setting regions and titanium nitride layer, and etch this titanium With one or a combination set of titanium nitride layer until one of metals such as aluminum, aluminum bronze, aluminum copper silicon or its alloy-layer;Then, Realize the graphical of whole metal function layer 230.
The metal function layer 230 formed by above-mentioned steps, both can have been met metal layer reflection and form resonator cavity, Solving detector specific function, such as the demand of reflection resonator cavity etc., can be retained in setting by measurement again Online thickness on region carries out on-line monitoring to subsequent technique, thus by metal function layer 230 thickness The control realization control to silicon chip surface figure step.
In being embodied as, with reference to Fig. 7, first, can be sequentially depositing titanium layer the 231, first titanium nitride layer 232, Aluminium lamination the 233, second titanium nitride layer 234;Then, expose the second titanium nitride layer 234, retain needs and carry out The second titanium nitride 234 part on line (inline) thickness resolution chart, etches the second titanium nitride layer 234 straight To aluminium lamination 233, graphical to form the second titanium nitride 234;It follows that etching metal function layer 230, Realize the graphical of whole metal function layer.
Wherein, titanium layer the 231, first titanium nitride layer 232 of being retained, aluminium lamination the 233, second titanium nitride layer 234 Thickness can be 100 angstroms, 300 angstroms, 1000 angstroms, 300 angstroms respectively.
With reference to Fig. 8, in step s 4, the Organic substance such as chemical vapor deposited silicon or polyimides can be used with shape Become sacrifice layer 240;Further, sacrifice layer 240 forms supported hole structure 250.
Additionally, with reference to Fig. 9, in step s 4, for strengthening adhesion, also can be at sacrifice layer 240 and metal Between functional layer 230, increase by a layer is based on silicon dioxide sticks 300, is on the one hand possible to prevent metal function layer Between short circuit, on the one hand can strengthen adhesion.Such as, titanium dioxide based on tetraethyl orthosilicate can be used Silicon forms the adhesion layer that thickness is 1000 angstroms;Further, further on this adhesion layer, chemical gaseous phase is used Deposition silicon is to form sacrifice layer.
With reference to Figure 10, in step s 5, specifically, described formation release guard layer comprises the steps that according to sacrificial The material that domestic animal layer 240 is used determines the material of release guard layer, forms release on sacrifice layer 240 surface and protects Sheath 260.Wherein, when sacrifice layer 240 uses chemical vapor deposited silicon, release guard layer 260 can use Silicon oxide or silicon dioxide;When sacrifice layer 240 uses the Organic substances such as polyimides, release guard layer 260 Silicon oxide, silicon or silicon oxynitride, silicon nitride can be used.
With reference to Figure 11, after forming release guard layer 260, form sensitive material 270 further.Specifically For, described formation sensitive material includes: use non-crystalline silicon or vanadium oxide to form sensitive material.? In specific embodiment, sensitive material 270 can use red non-crystalline silicon.At the base forming sensitive material 270 On plinth, by etching technics, sensitive material 270 and release guard layer 260 are performed etching, formed multiple Contact hole 271, it is achieved contact hole graph.
Then, step S6 is performed.With reference to Figure 12, by depositing operation, form metal electrode 280 and realize Graphically.Wherein, the metal electrode 280 part at each contact hole 271 connects with metal function layer 230 Touch and form connection.Specifically, metal electrode can be the titanium nitride of Ti electrode, tantalum electrode, stacked on top of one another With Ti electrode and the tantalum of stacked on top of one another and the one of tantalum nitride electrode or a combination thereof.In a particular embodiment, Titanium nitride can be used as metal electrode material.
In the step s 7, with reference to Figure 13, the processing step and second forming the second release guard layer 290 is released The material putting protective layer 290 can be identical with the first release guard layer, it is possible to differs.Wherein, this area skill Art personnel will be understood that the formation patterned step of pixel can use any one scheme of the prior art, its Thinking of the present invention is not impacted by order or the omission of step.
It follows that perform step S8.Wherein, with reference to Figure 14, etching technics can be passed through, remove PAD figure All film layers on top layer metallic layer as residing for 211.In the above-described embodiments, use when metal function layer Ti TiN Al the structure of TiN time, it is achieved when PAD is graphical, also include removing the TiN layer on Al layer, To realize follow-up wire bonding and encapsulation step.
Compared with prior art, detector of the present invention and manufacture method thereof realize PAD by top layer metallic layer Image, and realize the control to silicon chip surface figure flatness, no by controlling metal function layer thickness Only simplify technique, and provide enough process window for subsequent technique;Meanwhile, by standard CMOS mark Quasi-postchannel process introduces in metal detector functional layer technique, it is achieved that CMOS technology and MEMS technology The most compatible, and efficiently avoid the short circuit between metal function layer, greatly reduce the manufacture of detector Cost, improves the performance of detector, yield rate and reliability.
Additionally, the detailed description of the invention of detector of the present invention and manufacture method thereof is selected also by metal function layer The titanium nitride layer of selecting property member-retaining portion region aluminum layer, both can meet metal layer reflection and form resonator cavity, Can realize follow-up work by the online thickness on the setting regions figure retained is measured again The on-line monitoring of skill.
Although the present invention is disclosed above with preferred embodiment, so it is not limited to the present invention.The present invention Art has usually intellectual, without departing from the spirit and scope of the present invention, each when making The change planted and retouching.Therefore, protection scope of the present invention is when being as the criterion depending on those as defined in claim.

Claims (20)

1. a detector, including: silicon substrate;It is positioned at the top layer metallic layer on described silicon substrate;It is positioned at Top layer via layer on described top layer metallic layer;It is positioned at the metal function layer in described top layer via layer; It is positioned at the sacrifice layer in described metal function layer;It is positioned at the release guard layer of described sacrificial layer surface and quick Sense material layer;It is positioned at contact hole and the metal electrode on described sensitive material surface;It is positioned at described gold Belong to the release guard layer of electrode surface;And the PAD image being positioned in described top layer metallic layer;Wherein, Described PAD image is not covered by top layer via layer, metal function layer and sacrifice layer, and, pass through Control the thickness of described metal function layer be 500 angstroms to 4000 angstroms smooth to silicon chip surface figure to realize The control of degree.
2. detector as claimed in claim 1, it is characterised in that each through hole of described top layer via layer Middle filling tungsten.
3. detector as claimed in claim 1, it is characterised in that the top layer gold of described top layer metallic layer Use Filled Dielectrics between the top layer through-hole pattern of metal patterns or described top layer via layer, be used for isolating.
4. detector as claimed in claim 3, it is characterised in that described Filled Dielectrics uses titanium dioxide Silicon, silicon oxynitride, silicon nitride and carborundum or a combination thereof, or doped with boron, phosphorus, carbon, fluorine element Silicon dioxide, silicon oxynitride, silicon nitride and carborundum or a combination thereof.
5. detector as claimed in claim 1, it is characterised in that described metal function layer and described top Layer metal level is connected by each through hole of described top layer via layer.
6. detector as claimed in claim 1, it is characterised in that described metal function layer is titanium and nitrogen Change one or a combination set of titanium and one of aluminum, aluminum bronze, aluminum copper silicon metal or the combination of alloy.
7. detector as claimed in claim 1, it is characterised in that described metal function layer has successively Titanium, the first titanium nitride, aluminum, the film layer of the second titanium nitride, thickness be respectively 100 angstroms, 300 angstroms, 1000 Angstrom, 300 angstroms.
8. detector as claimed in claim 1, it is characterised in that described sacrifice layer includes chemical gaseous phase Deposition silicon or polyimides Organic substance, this sacrifice layer will be filled between metal function layer pattern.
9. detector as claimed in claim 8, it is characterised in that make when using chemical vapor deposited silicon During for described sacrifice layer, use silicon dioxide or mixed with the silicon oxide of impurity and non-stoichiometric with shape Become described release guard layer;When using polyimides Organic substance as described sacrifice layer, use silica-based Dielectric material is to form described release guard layer.
10. detector as claimed in claim 1, it is characterised in that described sacrifice layer and described metal merit Adhesion layer based on silicon dioxide is also included, for preventing the short circuit between metal function layer between ergosphere And enhancing adhesion.
11. detectors as claimed in claim 1, it is characterised in that described sensitive material uses amorphous Silicon or vanadium oxide, or mixed with impurity and the non-crystalline silicon of non-stoichiometric or vanadium oxide.
12. detectors as claimed in claim 1, it is characterised in that described metal electrode employing Ti electrode, In tantalum electrode, the titanium nitride of stacked on top of one another and Ti electrode and the tantalum of stacked on top of one another and tantalum nitride electrode One or combination.
13. detectors as claimed in claim 1, it is characterised in that described metal electrode be positioned at described in connect The part of contact hole contacts connection with described metal function layer.
14. 1 kinds of detector manufacture methods, including:
Form top layer metallic layer on a silicon substrate, and it is graphical to realize top layer metallic layer;
Described top layer metallic layer forms top layer via layer, it is achieved top layer is Via patterning, and described Conductive metal deposition realize the surface planarisation of top layer via layer in top layer through hole;
Described top layer via layer is formed metal function layer and realizes the graphical of described metal function layer, institute The thickness stating metal function layer can be regulated to realize silicon chip table between 500 angstroms to 4000 angstroms The control of face figure flatness;
Described metal function layer is formed sacrifice layer, and it is graphical to realize supported hole in described sacrifice layer;
The first release guard layer, sensitive material and contact hole is sequentially formed in described sacrificial layer surface;
Deposit metal electrodes layer to realize it graphical;
Again form the second release guard layer and to realize pixel graphical;
Realize PAD image conversion, thus in described top layer metallic layer, obtain PAD image.
15. detector manufacture methods as claimed in claim 14, it is characterised in that described conducting metal Including tungsten.
16. detector manufacture methods as claimed in claim 14, it is characterised in that also include: use CMOS standard technology, at top-level metallic pattern or the top layer of top layer via layer of described top layer metallic layer Between through-hole pattern, form the Filled Dielectrics for isolation.
17. detector manufacture methods as claimed in claim 14, it is characterised in that described formation metal Functional layer includes: by one or a combination set of titanium deposition and titanium nitride and aluminum, aluminum bronze, aluminum copper silicon metal One of or the combination of alloy, form the metal function layer that thickness is 500 angstroms to 4000 angstroms.
18. detector manufacture methods as claimed in claim 16, it is characterised in that described formation metal Functional layer includes:
It is sequentially depositing titanium layer, the first titanium nitride layer, aluminium lamination, the second titanium nitride layer;
Etch described second titanium nitride layer until on described aluminium lamination, only retaining and need on-line testing subsequent film The graphics field of thickness, it is achieved the second titanium nitride layer graphical;
Etch described metal function layer, it is achieved described metal function layer graphical.
19. detector manufacture methods as claimed in claim 18, it is characterised in that described titanium layer, Titanium nitride layer, aluminium lamination, the thickness of the second titanium nitride layer is 100 angstroms, 300 angstroms, 1000 angstroms, 300 Angstrom.
20. detector manufacture methods as claimed in claim 14, it is characterised in that described realize PAD Image conversion technique includes: be lithographically formed PAD image;PAD image-region is removed by etching technics Film layer more than top layer metallic layer, forms PAD image.
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