CN102164024B - Serial bus data transmission method and device - Google Patents

Abstract

The invention provides a serial bus data transmission method and device. It relates to the field of communication; it solves the problem that crosstalk affects data transmission. The method includes: assigning a quadrant value and a bit offset value to each of the multiple serial channels, multiple serial channels corresponding to the same quadrant value form a quadrant, and different serial channels with the same quadrant value The bit offset value of each serial channel is different; according to the quadrant value and bit offset value of each serial channel, the bit encoding is performed to match each serial channel to the corresponding physical link, and the adjacent serial channels are matched to different Adjacent physical link; transmit data through the matched serial channel. The technical scheme provided by the invention is applicable to the data transmission process in which multiple serial channels work in parallel, and realizes data transmission with low crosstalk.

Description

Serial bus data transmission method and device

technical field

The invention relates to the communication field, in particular to a serial bus data transmission method and device.

Background technique

With the rapid development of computer science and technology, bus bandwidth has become one of the important indicators to measure system performance. According to the different forms of data transmission, the bus is divided into two types: serial bus and parallel bus. The parallel bus refers to the simultaneous transmission of data bits, which has high requirements for data synchronization and has become one of the bottlenecks restricting the bandwidth improvement of the parallel bus. After the transmission speed reaches the limit, the length of the parallel bus signal line cannot be extended, the signal synchronization is difficult to maintain, and the disadvantages of high power consumption of the signal line also appear. At this time, the serial bus is a bus form in which data is allocated to high-speed serial channels for transmission. Its advantages of high frequency, high bandwidth, and easy data synchronization begin to emerge and are widely used.

When multiple serial channels work at the same time, it inevitably brings the problem of crosstalk between channels, which leads to increased channel delay, reduced signal integrity, increased noise, etc., which affects data transmission and becomes a constraint on serial communication. A major problem in the development of row bus.

Contents of the invention

The invention provides a serial bus data transmission method and device, which solves the problem that crosstalk affects data transmission.

A serial bus data transmission method, comprising:

Assign quadrant value and bit offset value to each serial channel in multiple serial channels, multiple serial channels corresponding to the same quadrant value form a quadrant, and the bit offset of different serial channels with the same quadrant value different in magnitude;

According to the quadrant value and bit offset value of each serial channel, perform bit encoding, match each serial channel to the corresponding physical link, and match adjacent serial channels to non-adjacent physical links;

Data is transferred over the matched serial channel.

Preferably, each quadrant contains the same number of serial channels.

Preferably, when there are 20 serial channels, the 20 serial channels are divided into 4 quadrants, the quadrant values of each quadrant are respectively 0, 1, 2 and 3, and 5 serial channels in each quadrant Channels have bit offset values of 0, 1, 2, 3, and 4, respectively.

Preferably, performing bit coding and matching each serial channel to a corresponding physical link is specifically:

When the quadrant value of the serial channel is less than 2, determine the physical link number corresponding to the serial channel according to the following expression:

Physical link number N=(the maximum number of serial channels supported by the system/4)*(1+quadrant value)-bit offset value-1;

When the quadrant value of the serial channel is greater than or equal to 2, determine the corresponding physical link number of the serial channel according to the following expression:

Physical link number N=(maximum number of serial channels supported by the system/4)*(5+quadrant value)+bit offset value.

Preferably, the transmission of data through the matched serial channel is specifically:

Divide the data frame to be transmitted into data blocks, and number each data block;

The odd-numbered data block and the even-numbered data block are sent alternately, each bit of the data block is evenly distributed to each serial channel for transmission, and the number of bits of the data block is equal to the number of serial channels.

Preferably, the method also includes:

When an unrecoverable error occurs on one or more serial channels, the data block size is adjusted according to the number of serial channels that are currently working properly.

The present invention also provides a serial bus data transmission device, comprising:

The quadrant division module is used to assign quadrant values and bit offset values for each serial channel in multiple serial channels. Multiple serial channels corresponding to the same quadrant value form a quadrant, and different serial channels with the same quadrant value The bit offset values of the row channels are different;

The physical link matching module is used to perform bit encoding according to the quadrant value and the bit offset value of each serial channel, and match each serial channel to the corresponding physical link, and match adjacent serial channels to different adjacent physical links;

The data transmission module is used for transmitting data through the matched serial channel.

Preferably, the data transmission module includes:

The data block dividing unit is used for dividing the data frame to be transmitted into data blocks, and numbering each data block;

The data block sending unit is used to cross-send odd-numbered data blocks and even-numbered data blocks, and evenly distribute each bit of the data block to each serial channel for transmission, and the number of bits of the data block is equal to that of the serial channel. number of row channels.

Preferably, the data block dividing unit is further configured to adjust the size of the data block according to the number of currently working serial channels when an unrecoverable error occurs in one or more serial channels.

The invention provides a serial bus data transmission method and device, which allocates quadrant values and bit offset values for each serial channel in multiple serial channels, and a plurality of serial channels corresponding to the same quadrant value constitute Quadrant, the bit offset value of different serial channels with the same quadrant value is different, according to the quadrant value and bit offset value of each serial channel, bit encoding is performed to match each serial channel to the corresponding physical link , adjacent serial channels are matched to non-adjacent physical links, data is transmitted through the matched serial channels, and adjacent serial channels are matched to different physical links, reducing crosstalk between adjacent physical links , to solve the problem of crosstalk affecting data transmission.

Description of drawings

Fig. 1 is a flow chart of a serial bus data transmission method provided by Embodiment 1 of the present invention;

FIG. 2 is a schematic diagram of a bit mixing mode used in Embodiment 3 of the present invention;

FIG. 3 is a schematic diagram of a matching relationship between a serial channel and a physical channel;

Fig. 4 is a schematic diagram of the odd-even crossover selection strategy;

5 is a schematic structural diagram of a serial bus data transmission device provided by Embodiment 4 of the present invention;

FIG. 6 is a schematic structural diagram of the data transmission module 503 in FIG. 5 .

Detailed ways

When multiple serial channels work at the same time, the problem of crosstalk between channels will inevitably be brought, which will lead to increased channel delay, reduced signal integrity, increased noise, etc., which has become a problem that restricts the development of serial buses. big problem. Furthermore, since the serial channel uses high-speed signals to transmit data, it is necessary to adopt a verification method to detect and correct the data transmitted on the high-speed serial channel. However, each verification method has a maximum range of data that can be detected, and errors on the channel cannot be detected beyond this range. Therefore, when a channel on the serial bus has a sudden error whose length exceeds the maximum range of the verification, the data verification can do nothing.

To solve the above problems, in addition to considering the PCB board-level circuit design, if a method can be adopted from the source of the high-speed serial interconnection bus, that is, the parallel-to-serial conversion stage of chip design, to reduce the degree of crosstalk between high-speed serial channels , reducing the risk of continuous burst errors on the channel will greatly improve the work efficiency and fault tolerance of the serial bus, thereby bringing about an increase in data transmission bandwidth and system performance.

In order to solve the above problems, embodiments of the present invention provide a serial bus data transmission method and device, and the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined arbitrarily with each other.

First, Embodiment 1 of the present invention will be described with reference to the accompanying drawings.

Embodiment 1 of the present invention provides a serial bus data transmission method, using this method to complete the data transmission process as shown in Figure 1, including:

Step 101, assign a quadrant value and a bit offset value to each serial channel in the plurality of serial channels, multiple serial channels corresponding to the same quadrant value form a quadrant, and different serial channels with the same quadrant value The bit offset values are different;

Wherein, the serial channel is a logic channel.

Step 102, perform bit encoding according to the quadrant value and bit offset value of each serial channel, match each serial channel to a corresponding physical link, and match adjacent serial channels to non-adjacent physical links ;

Step 103, transmit data through the matched serial channel.

Next, Embodiment 2 of the present invention will be described.

The embodiment of the present invention provides a serial bus data transmission method, which mainly considers the impact of high-speed serial channel crosstalk on the serial bus transmission quality, and abandons the traditional one-to-one matching design of serial channels and physical links. Through the mathematical model of the board-level routing delay, the optimal bit mixing mode from the serial channel to the physical link is calculated, thereby reducing the degree of crosstalk. The core of calculating the delay model is to analyze and calculate the arrival and transition time of any point of capacitive coupling in the interconnection. This process can be calculated by using simulation tools such as HSpice. In the calculation process of the delay model, the calculation of the delay amount and the conversion point is an iterative process. The process starts with the arrival time and conversion time of the first input as the benchmark, and the delay and conversion time of the interconnection are iteratively calculated by time, etc. Updates are performed in units of segments, and the process is repeated until the sum of the delays of all channels changes below 5% between two iterations. The optimal bit mixing mode needs to satisfy the following characteristics: (1) All possible adjacencies are double. In bit mixed mode, each group of differential signals has the same length as other signals. (2) The distance between any two groups of adjacent physical links is the same.

The 8-bit cyclic redundancy check method adopted by the traditional high-speed interconnection bus has the following characteristics: (1) It can detect any error of 3 bits or less. (2) It is possible to detect errors in which the number of arbitrary errors is an odd number. (3) Any bursty continuous error with a length of 8 bits or less. (4) When the length of the continuous error is 9 bits, there is a probability of 1/128 that the error is undetectable. (5) When the length of the continuous error is greater than 9 bits, there is a probability of 1/256 that the error is undetectable. Therefore, when a continuous unrecoverable error occurs on a high-speed serial channel of the bus, that is, when the length of a burst continuous error is greater than or equal to 9 bits, the cyclic redundancy check has a risk of failure, causing the error message to be transmitted to the application layer , bringing more serious system errors. In order to prevent this situation, the embodiment of the present invention adopts a parity block crossover selection strategy, divides the data frame into smaller blocks, and distributes the crossover evenly to each high-speed serial channel. After receiving the data, the receiver combines the data blocks into a data frame format according to the strategy, and performs a cyclic redundancy check. When an irreparable continuity error occurs on a channel, this strategy has reassembled the data on the channel and interleaved with the data on other channels, ensuring that the error form of the data frame in the verification phase is intermittent and measurable errors, rather than consecutive errors of more than 8 bits with an unmeasurable risk. After using the above strategy to successfully verify the unrepairable errors on the channel, the bus will re-negotiate the transmission width, that is, discard the unavailable high-speed serial channels, and transmit with the number of high-speed serial channels re-negotiated by the sending and receiving parties. At this time The parity block crossover strategy changes according to the bus width (the number of channels) to ensure the testability of data frame errors.

The serial bus data transmission method provided by the embodiment of the present invention improves the quality of high-speed signal transmission, mainly refers to the bit mixing method used in the chip design stage to correspond the serial channel to the physical link according to the best mixing mode, reducing the number of channels Interconnection delay and noise due to crosstalk, improve signal integrity; enhance the fault tolerance of the system, mainly refers to the application of the parity block cross selection strategy, the unpredictable risk of errors caused by errors on the serial channel reduced to a minimum. Under the premise of measurable errors, the transmission width is negotiated according to the transmission conditions of the channels. Even if some channels have physical failures, there are corresponding countermeasures, that is, to re-allocate each data block according to the number of channels, and the bus can still continue to work normally.

Embodiment 3 of the present invention will be described below with reference to the accompanying drawings.

Embodiments of the present invention respectively describe the implementation process of bit mix-matching physical link and parity block cross selection for data transmission.

In the embodiment of the present invention, according to the optimal bit mixing mode calculated by the delay model and the simulation tool, as shown in Figure 2, the data on the serial channel is corresponding to the physical link, and the data format on the serial channel is at the same time The data frame is continuous, bit-encoded by quadrant and offset. Taking 20 serial channels as an example, the high-speed interconnection bus is divided into 4 quadrants, each quadrant occupies a 5-bit offset, and the physical link directly corresponds to the connection port between chips on the printed circuit board. Traces. Bit Mix Mode matches serial lanes to physical links through a direct correspondence, requiring no additional logic. Each bit of the serial channel is described in the form of <quadrant, offset>, and the physical link is described in the order of 1-20. Among them, the matching rule derived from the optimal bit mixing mode is as follows:

When the quadrant value of the serial channel is less than 2, determine the physical link number corresponding to the serial channel according to the following expression:

Physical link number N=(the maximum number of serial channels supported by the system/4)*(1+quadrant value)-bit offset value-1;

When the quadrant value of the serial channel is greater than or equal to 2, determine the corresponding physical link number of the serial channel according to the following expression:

Physical link number N=(maximum number of serial channels supported by the system/4)*(5+quadrant value)+bit offset value.

As shown in FIG. 3 , the sender calculates the arrangement order of the physical links according to the above rules, and maps the serial channels to the physical channels. At the same time, the receiver deduces the sequence of the serial channels according to the above rules, and maps the physical link to the serial channel.

As shown in Figure 4, take the parallel data frame data length of 80 bits as an example to describe the parity cross selection strategy of the high-speed interconnection bus: the data frame is divided into 4 data blocks equally by segment, the size is 20 bits, and the numbers are 0, 1, 2, 3, where 0, 2 are even blocks, 1, 3 are odd blocks, and the adjacent bits in each data block are also adjacent in the data frame. When the total number of serial channels supported by the system is 20, the length of the data block is equal to the length of the serial channel, the odd block and the even block occupy the serial channel alternately, and a data block is sent every clock cycle, sending a complete A data frame takes 4 clock cycles. The data blocks correspond to the channels according to the bit mixing mode, and the adjacent bits in the data blocks are allocated to different physical channels, thus avoiding the unmeasurable data frame error caused by continuous errors on a single physical channel. When an unrecoverable error occurs on one or more channels, the two parties renegotiate the transmission width. When the total number of serial channels supported by the system is 10, the data length that can be transmitted in one clock cycle is half of the data block length. At this time, the odd-even crossover strategy is changed to adjacent data blocks, and the adjacent bits in each data block are also cross-transmitted. For example, the odd-numbered bits of the odd-numbered block are sent in the first cycle, and the odd-numbered bits of the even-numbered block are sent in the second cycle. Bits, the even bits of the odd blocks are sent in the third cycle, and the even bits of the even blocks are sent in the fourth cycle, until all the data blocks are sent, and then the cross selection of the next data frame is performed. When the total number of serial channels supported by the system is 5, the data length that can be transmitted in one clock cycle is 1/4 of the data block length. At this time, the odd-even crossover strategy makes corresponding changes again, adjacent data blocks are cross-transmitted, and the data bits within every 4 bits of each data block are also cross-transmitted, such as sending the 0th and 4th bits of the odd-numbered block in the first cycle , 8, 12, and 16 bits, the second cycle sends the 0, 4, 8, 12, and 16 bits of the even block, and the third cycle sends the 1, 5, 9, 13, and 17 bits of the odd block, and the process continues Until all the data blocks are sent, the cross selection of the next data frame is performed.

Embodiment 5 of the present invention will be described below with reference to the accompanying drawings.

An embodiment of the present invention provides a serial bus data transmission device, the structure of which is shown in Figure 5, including:

Quadrant division module 501, is used for distributing quadrant value and bit offset value for each serial channel in a plurality of serial channels, multiple serial channels corresponding to the same quadrant value form a quadrant, the same quadrant value is different The bit offset values of the serial channels are different;

The physical link matching module 502 is used to perform bit encoding according to the quadrant value and the bit offset value of each serial channel, to match each serial channel to a corresponding physical link, and to match adjacent serial channels to different Adjacent physical links;

The data transmission module 503 is configured to transmit data through the matched serial channel.

Preferably, the structure of the data transmission module 503 is as shown in Figure 6, including:

A data block division unit 5031, configured to divide the data frame to be transmitted into data blocks, and number each data block;

The data block sending unit 5032 is used to cross-send odd-numbered data blocks and even-numbered data blocks, and evenly distribute each bit of the data block to each serial channel for transmission, and the number of bits of the data block is equal to Number of serial channels.

Preferably, the data block division unit 5031 is further configured to adjust the size of the data block according to the number of currently working serial channels when an unrecoverable error occurs in one or more serial channels.

A serial bus data transmission device provided by an embodiment of the present invention can be combined with a serial bus data transmission method provided by an embodiment of the present invention to assign quadrants to each serial channel among multiple serial channels value and bit offset value, multiple serial channels corresponding to the same quadrant value form a quadrant, different serial channels with the same quadrant value have different bit offset values, according to the quadrant value and bit offset value of each serial channel Offset value, bit encoding, match each serial channel to the corresponding physical link, match adjacent serial channels to non-adjacent physical links, transmit data through the matched serial channel, and adjacent serial channels The upstream channels are matched to different physical links, which reduces the crosstalk between adjacent physical links and solves the problem that crosstalk affects data transmission.

Those of ordinary skill in the art can understand that all or part of the steps of the above-mentioned embodiments can be implemented using a computer program flow, the computer program can be stored in a computer-readable storage medium, and the computer program can be run on a corresponding hardware platform (such as system, device, device, device, etc.), and when executed, includes one or a combination of the steps of the method embodiment.

Optionally, all or part of the steps in the above embodiments can also be implemented using integrated circuits, and these steps can be fabricated into individual integrated circuit modules, or multiple modules or steps among them can be fabricated into a single integrated circuit module accomplish. As such, the present invention is not limited to any specific combination of hardware and software.

The devices/functional modules/functional units in the above embodiments can be realized by general-purpose computing devices, and they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices.

When each device/functional module/functional unit in the above-mentioned embodiments is realized in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. The computer-readable storage medium mentioned above may be a read-only memory, a magnetic disk or an optical disk, and the like.

Any person familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present invention, and all should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope described in the claims.

Claims (9)

1. a serial bus data transmission method, is characterized in that, comprising:

For each serial-port in a plurality of serial-ports distributes quadrature and the biased value that moves, a plurality of serial-ports that same quadrature is corresponding form quadrant, the biased value difference of moving of the different serial-ports that quadrature is identical;

According to quadrature and the biased value that moves of each serial-port, carry out the position coding, adopt the position mixed method, according to best mixed mode, each serial-port is corresponded to physical link, adjacent serial-port is matched to non-conterminous physical link;

By the transmission of the serial-port after coupling data.

2. serial bus data transmission method according to claim 1, is characterized in that, the serial-port quantity that all quadrants comprises is identical.

3. serial bus data transmission method according to claim 1 and 2, it is characterized in that, when thering is 20 serial-ports, these 20 serial-ports are divided into to 4 quadrants, the quadrature of all quadrants is respectively 0,1,2 and 3, and the biased value that moves of 5 serial-ports in each quadrant is respectively 0,1,2,3 and 4.

4. serial bus data transmission method according to claim 3, is characterized in that, the described position coding that carries out matches corresponding physical link by each serial-port and is specially:

When the quadrature of serial-port is less than 2, according to following expression, determine the physical link numbering that this serial-port is corresponding:

The largest serial port number that physical link numbering N=(system is supported/4) * (1+ quadrature)-biased value-1 of moving;

When the quadrature of serial-port is more than or equal to 2, according to following expression, determine the physical link numbering that this serial-port is corresponding:

The largest serial port number that physical link numbering N=(system is supported/4) * (5+ quadrature)+biased value that moves.

5. serial bus data transmission method according to claim 1, is characterized in that, describedly by the serial-port transmission data after coupling, is specially:

Data frame dividing waiting for transmission is become to data block, is each data block numbering;

Intersect and send the data block that is numbered odd number and the data block that is numbered even number, everybody intersection of described data block is evenly distributed on each serial-port and transmits, the figure place of described data block equals the serial-port number.

6. serial bus data transmission method according to claim 5, is characterized in that, the method also comprises:

When the unrepairable mistake appears in one or more serial-ports, according to the serial-port quantity of current normal operation, adjust the data block size.

7. a serial bus data-transmission apparatus, is characterized in that, comprising:

Quadrant is divided module, is used to each serial-port in a plurality of serial-ports to distribute quadrature and the biased value that moves, and a plurality of serial-ports that same quadrature is corresponding form quadrant, the biased value difference of moving of the different serial-ports that quadrature is identical;

The physical link matching module, for quadrature and the biased value that moves according to each serial-port, carry out the position coding, adopt the position mixed method, according to best mixed mode, each serial-port is corresponded to physical link, adjacent serial-port is matched to non-conterminous physical link;

Data transmission module, for the transmission of the serial-port by after coupling data.

8. serial bus data-transmission apparatus according to claim 7, is characterized in that, described data transmission module comprises:

The data block division unit, for data frame dividing waiting for transmission is become to data block, is each data block numbering;

The data block transmitting element, send the data block that is numbered odd number and the data block that is numbered even number for intersecting, and everybody intersection of described data block is evenly distributed on each serial-port and transmits, and the figure place of described data block equals the serial-port number.

9. serial bus data-transmission apparatus according to claim 8, is characterized in that,

Described data block division unit, also for when the unrepairable mistake appears in one or more serial-ports, adjust the data block size according to the serial-port quantity of current normal operation.

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