CN102157660A - Semiconductor packaging structure - Google Patents
Semiconductor packaging structure Download PDFInfo
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- CN102157660A CN102157660A CN 201010121601 CN201010121601A CN102157660A CN 102157660 A CN102157660 A CN 102157660A CN 201010121601 CN201010121601 CN 201010121601 CN 201010121601 A CN201010121601 A CN 201010121601A CN 102157660 A CN102157660 A CN 102157660A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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Abstract
Description
技术领域technical field
本发明涉及封装结构,尤指一种适用于半导体元件如集成电路(Integrated Circuits;IC)或发光二极管(Light Emitting Diode;LED)的封装结构。The present invention relates to a packaging structure, especially a packaging structure suitable for semiconductor components such as integrated circuits (Integrated Circuits; IC) or light emitting diodes (Light Emitting Diode; LED).
背景技术Background technique
由于发光二极管具有寿命长、体积小、高耐震性、发热度小及耗电量低等优点,发光二极管已被广泛地应用于家电制品及各式仪器的指示灯或光源。近年来,还由于发光二极管朝向多色彩及高亮度化发展,因此其应用范围已拓展至各种携带式电子产品中,以作为小型显示器的背光源,成为兼具省电和环保概念的新照明光源。Due to the advantages of long life, small size, high shock resistance, low heat generation and low power consumption, light-emitting diodes have been widely used in indicator lights or light sources of household appliances and various instruments. In recent years, due to the development of light-emitting diodes towards multi-color and high-brightness, their application range has been expanded to various portable electronic products, as a backlight for small displays, and has become a new lighting concept that combines power saving and environmental protection. light source.
请参阅图1,其绘示一种现有发光二极管封装结构部分示意图,现有发光二极管封装结构主要包含有碗杯载体1、一发光二极管芯片2如蓝光、或红光二极管芯片、一正极接脚3、一负极接脚4、及一透镜层8。发光二极管芯片2固定于碗杯载体1所界定出的碗杯槽5中。Please refer to FIG. 1, which shows a partial schematic diagram of an existing LED packaging structure. The existing LED packaging structure mainly includes a bowl carrier 1, a LED chip 2 such as a blue or red LED chip, and an anode terminal. Pin 3 , a negative pole pin 4 , and a lens layer 8 . The LED chip 2 is fixed in the bowl groove 5 defined by the bowl carrier 1 .
发光二极管芯片2通过二电连接线7分别与正极接脚3及一负极接脚4电性连接。透镜层8覆盖住发光二极管芯片2、电连接线7、及部分正极接脚3与部分负极接脚4。The LED chip 2 is electrically connected to the anode pin 3 and a cathode pin 4 through two electrical connecting wires 7 . The lens layer 8 covers the LED chip 2 , the electrical connection wire 7 , and part of the positive pin 3 and part of the negative pin 4 .
就现有结构而言,碗杯槽5的槽壁6为一完整环状,因此操作电连接线7的打线步骤时,需使电连接线7跨过槽壁6连接发光二极管芯片2与对应的接脚。As far as the existing structure is concerned, the groove wall 6 of the bowl and cup groove 5 is a complete ring, so when operating the wiring step of the electrical connecting wire 7, it is necessary to make the electrical connecting wire 7 cross the groove wall 6 to connect the light emitting diode chip 2 and the corresponding pins.
发明内容Contents of the invention
本发明提供一种半导体封装结构,使结构中半导体元件与对外接脚间的电连接线所需长度减少以节省成本,并且电连接线在保护层形成之前可获得较佳保护。本发明所提供的半导体封装结构在保护层为LED透镜胶体材料的场合时,还有减少因胶体硬化收缩导致电连接线受损的优点。The invention provides a semiconductor packaging structure, which reduces the required length of the electrical connection wires between the semiconductor element and the external pins in the structure to save costs, and the electrical connection wires can be better protected before the protective layer is formed. The semiconductor packaging structure provided by the present invention also has the advantage of reducing damage to electrical connection wires caused by colloid hardening and shrinkage when the protective layer is an LED lens colloidal material.
本发明的半导体封装结构包括一碗杯载体、一半导体元件、及一电极接脚。上述碗杯载体界定有一容置杯槽,上述半导体元件承置于碗杯载体上、并位于容置杯槽内。The semiconductor packaging structure of the present invention includes a bowl carrier, a semiconductor element, and an electrode pin. The cup carrier defines a cup accommodating groove, and the semiconductor element is carried on the cup carrier and located in the cup accommodating groove.
上述电极接脚通过一电连接线而电性连接于半导体元件。容置杯槽的槽壁位于半导体元件与电极接脚间的部分凹设有至少一渠道,其中电连接线穿过渠道。The electrode pins are electrically connected to the semiconductor element through an electrical connection line. At least one channel is recessed in the part of the groove wall of the accommodating cup groove located between the semiconductor element and the electrode pin, wherein the electrical connection wire passes through the channel.
通过上述结构,不仅减少金线使用长度、降低金线跨过杯槽的打线难度,也使金线获得适当保护,避免于后续封装工艺中因人为或设备不慎碰撞,造成线弧压伤、扯断等情况发生。Through the above structure, not only the length of the gold wire is reduced, the difficulty of wire bonding across the cup groove is reduced, but also the gold wire is properly protected to avoid wire arc damage caused by human or equipment collisions in the subsequent packaging process , tearing off and so on.
上述碗杯载体可包括有一金属承载部、及一绝缘框体,半导体元件承置于金属承载部,绝缘框体界定出容置杯槽。The above-mentioned cup carrier may include a metal bearing part and an insulating frame, the semiconductor element is supported on the metal bearing part, and the insulating frame defines a cup accommodating groove.
上述电极接脚可自绝缘框体的一侧面突出、或不突出。金属承载部与电极接脚可为同一材质,并来自同一金属料片。金属承载部可还包括有一辅助固定孔,绝缘框体一部分填满于辅助固定孔,加强结合力。The above-mentioned electrode pins may or may not protrude from one side of the insulating frame. The metal bearing part and the electrode pins can be made of the same material and come from the same metal sheet. The metal bearing part may further include an auxiliary fixing hole, and a part of the insulating frame body fills the auxiliary fixing hole to strengthen the bonding force.
上述电极接脚可包括有一凹槽,供置放一齐纳二极管。半导体元件可为一发光二极管芯片、或一集成电路芯片。The above-mentioned electrode pin may include a groove for placing a Zener diode. The semiconductor element can be a light emitting diode chip or an integrated circuit chip.
附图说明Description of drawings
图1为现有发光二极管封装结构部分示意图;FIG. 1 is a partial schematic diagram of an existing LED package structure;
图2为本发明第一较佳实施例的半导体封装结构分解图;FIG. 2 is an exploded view of the semiconductor package structure of the first preferred embodiment of the present invention;
图3为本发明第一较佳实施例的半导体封装结构立体图;3 is a perspective view of a semiconductor package structure in a first preferred embodiment of the present invention;
图4为本发明第二较佳实施例的半导体封装结构立体图。FIG. 4 is a perspective view of a semiconductor package structure according to a second preferred embodiment of the present invention.
【主要元件符号说明】[Description of main component symbols]
碗杯载体1 发光二极管芯片2Cup carrier 1 LED chip 2
正极接脚3 负极接脚4Positive pin 3 Negative pin 4
碗杯槽5 槽壁6Bowl groove 5 groove wall 6
电连接线7 透镜层8Electrical connection wire 7 Lens layer 8
碗杯载体10 容置杯槽101,201
渠道102,103,202,203 金属承载部11Channel 102, 103, 202, 203
绝缘框体12 侧面121,122,204,205
正电极接脚13,22 打线段131,141
外引段132,142 凹槽133,143
负电极接脚14,23 半导体元件15,21
电连接线16,17 辅助固定孔18
具体实施方式Detailed ways
参考图2与3,为本发明一较佳实施例的半导体封装结构分解图、及其立体图。一半导体封装结构包括有一碗杯载体10、一正电极接脚13、一负电极接脚14、及一半导体元件15,其中碗杯载体10是由一金属承载部11、及约略呈四边形的一绝缘框体12构成。本实施例的半导体元件15为一发光二极管(LED)芯片。Referring to FIGS. 2 and 3 , it is an exploded view and a perspective view of a semiconductor package structure according to a preferred embodiment of the present invention. A semiconductor packaging structure includes a
上述金属承载部11、正电极接脚13、及负电极接脚14源自经冲制成型的同一金属料片。正电极接脚13包括一打线段131、及位于打线段131两端的二外引段132;类似地,负电极接脚14包括一打线段141、及位于打线段141两端的二外引段142。The metal bearing
绝缘框体12是以前述包括有金属承载部11、正电极接脚13、及负电极接脚14的金属料片为主体,利用射出成型方式而覆盖于金属承载部11与二电极接脚13,14上,且绝缘框体12的结构呈现出一容置杯槽101。容置杯槽101相对两侧的槽壁位于半导体元件15与电极接脚13,14间的部分各凹设有三渠道102,103。The
图3所示的封装结构中,正电极接脚13的外引段132、及负电极接脚14的外引段142分别从绝缘框体12相对的二侧面121,122突伸出。In the packaging structure shown in FIG. 3 , the lead-out
半导体元件15通过电连接线16,17(一般使用金线)分别电性连接于正电极接脚13的外引段132、及负电极接脚14的外引段142。The
以下简述此例中半导体元件封装结构的制作流程:先,在上述射出成型步骤后的固晶步骤即是将半导体元件15(LED芯片)固定于金属承载部11,并位于容置杯槽101中。然后进行以电连接线16,17电性连接半导体元件15与二电极接脚13,14的打线步骤。The following is a brief description of the manufacturing process of the semiconductor element package structure in this example: First, the die-bonding step after the above-mentioned injection molding step is to fix the semiconductor element 15 (LED chip) on the
打线完成之后,电连接线16,17皆位于渠道102,103之内,也因此发挥了保护电连接线16,17的作用,电连接线16,17在后续工艺中不易因人为或设备不慎碰撞而导致线弧压伤、扯断等状况。另外,由于电连接线16,17直接穿过渠道102,103,不似现有结构需跨过容置杯槽槽壁,明显减少金线使用长度。而且不须跨过容置杯槽槽壁的打线难度较现有者还低,因此也有良率提升的功效。After the wiring is completed, the
值得一提的是,本实施例的金属承载部11还开设有二辅助固定孔18,使得当绝缘框体12以射出成型方式覆盖于金属承载部11上时也将其辅助固定孔18填满,如此让二者之间有更佳的结合性。此外,正电极接脚13的打线段131与负电极接脚14的打线段141分别以冲击折弯出凹槽133,143,用以放置齐纳二极管(图未示)。It is worth mentioning that the
实施例的LED可适用于室内装饰照明、室内辅助照明、室外景观照明、街道照明、指示灯、广告显示灯管、显示器等各种光源。The LED of the embodiment can be applied to various light sources such as interior decorative lighting, indoor auxiliary lighting, outdoor landscape lighting, street lighting, indicator lights, advertising display lamps, and displays.
一般而言,考虑到芯片导热效果,金属承载部材料较佳采用铁、铝、或铜等导热良好金属。Generally speaking, considering the heat conduction effect of the chip, the material of the metal carrying part is preferably iron, aluminum, or copper and other metals with good heat conduction.
参考图4,为本发明第二实施例。本实施例所示为一集成电路(IC)封装结构,半导体元件21为一IC芯片,而绝缘框体的容置杯槽201的相对两侧仅各凹设单一渠道202,203。此外,正电极接脚外引段22与负电极接脚外引段23皆未自绝缘框体相对的二侧面204,205突出。Referring to FIG. 4, it is a second embodiment of the present invention. This embodiment shows an integrated circuit (IC) packaging structure, the semiconductor element 21 is an IC chip, and only a single channel 202, 203 is recessed on opposite sides of the accommodating cup groove 201 of the insulating frame. In addition, neither the positive electrode lead out section 22 nor the negative electrode lead out section 23 protrudes from the two opposite sides 204 , 205 of the insulating frame.
上述实施例仅为了方便说明而举例而已,本发明所主张的权利范围自应以申请专利范围所述为准,而非仅限于上述实施例。The above-mentioned embodiments are only examples for convenience of description, and the scope of rights claimed by the present invention should be based on the scope of the patent application, rather than limited to the above-mentioned embodiments.
Claims (9)
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Cited By (2)
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CN111710769A (en) * | 2020-06-19 | 2020-09-25 | 深圳成光兴光电技术股份有限公司 | A kind of LED wafer package structure and its manufacturing process |
WO2021114714A1 (en) * | 2019-12-13 | 2021-06-17 | 青岛海信宽带多媒体技术有限公司 | Optical module |
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CN1759492A (en) * | 2003-03-10 | 2006-04-12 | 丰田合成株式会社 | Solid element device and method for manufacture thereof |
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WO2021114714A1 (en) * | 2019-12-13 | 2021-06-17 | 青岛海信宽带多媒体技术有限公司 | Optical module |
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Application publication date: 20110817 |