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CN102142421B - Solder-free metal pillar die attach construction - Google Patents

Solder-free metal pillar die attach construction Download PDF

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Publication number
CN102142421B
CN102142421B CN2010101110424A CN201010111042A CN102142421B CN 102142421 B CN102142421 B CN 102142421B CN 2010101110424 A CN2010101110424 A CN 2010101110424A CN 201010111042 A CN201010111042 A CN 201010111042A CN 102142421 B CN102142421 B CN 102142421B
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metal
chip
solder
pads
sides
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CN102142421A (en
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徐宏欣
柯志明
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Powertech Technology Inc
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Powertech Technology Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

The invention relates to a metal column chip connection structure without solder, wherein the chip is provided with a plurality of metal columns, and each metal column is provided with a top surface and two parallel side walls. The substrate has a plurality of pads on the upper surface, each pad having a cavity bottom and two cavity sides. The chip is applied with heat, pressure and ultrasonic waves, so that the top surface of the metal column is self-welded to the bottom surface of the recess, and the parts of the two parallel side walls of the metal column are self-welded to the sides of the recess, so that a U-shaped metal bonding section without solder is formed between the metal column and the connecting pad. Therefore, the solder is not needed to be used for chip connection, and the product particularly applied to the chip connection of metal column welding can save the welding material joint cost and greatly improve the bonding strength and the electric conductivity of the welding spot.

Description

免用焊料的金属柱芯片连接构造Solder-free metal pillar die attach construction

技术领域 technical field

本发明涉及一种半导体装置,特别是涉及一种免用焊料的金属柱芯片连接构造与方法。  The invention relates to a semiconductor device, in particular to a solder-free metal post chip connection structure and method. the

背景技术 Background technique

按,覆晶封装技术(Flip-Chip)是一种先进的芯片封装技术,能缩短了芯片与基板之间的传输距离,具有更优于打线连接的电性性能而逐渐普及。特别是,IBM公司之后更发展出一种创新的覆晶封装技术,将芯片上凸块采用金属柱取代以往的焊球,另以焊料连接芯片上的金属柱与基板上的接垫,在回焊时不会有以往焊球成球的形状改变,故金属柱的间距可容许缩小的更为密集(凸块间距可达到小于50微米,例如30微米),达到更高密度或是省略RDL(重配置线路层)的凸块配置,这种技术便称之为“金属柱焊接的芯片连接”,也就是所谓的MPS-C2(Metal Post Solder-ChipConnection)技术。此一MPS-C2相关技术已可见于美国专利US 6,229,220 B1号“Bump structure,bump forming method and package connectingbody”。  Press, flip-chip packaging technology (Flip-Chip) is an advanced chip packaging technology, which can shorten the transmission distance between the chip and the substrate, and has better electrical performance than wire bonding, so it is gradually popularized. In particular, IBM later developed an innovative flip-chip packaging technology, using metal pillars on the chip to replace the previous solder balls, and using solder to connect the metal pillars on the chip and the pads on the substrate. There will be no change in the shape of the previous solder balls during soldering, so the pitch of the metal pillars can be reduced more densely (bump pitch can reach less than 50 microns, such as 30 microns), to achieve higher density or omit RDL ( Reconfiguring the bump configuration of the circuit layer), this technology is called "metal post soldering chip connection", which is the so-called MPS-C2 (Metal Post Solder-Chip Connection) technology. This MPS-C2 related technology can be found in US Patent No. 6,229,220 B1 "Bump structure, bump forming method and package connecting body". the

如图1所示,一种现有习知MPS-C2架构的金属柱芯片连接构造100主要包含一芯片110与一基板120。该芯片110设有多个金属柱112,并突出于该芯片110的一表面111。该基板120的一上表面121具有多个接垫122,并且分别对应于该些金属柱112。详细而言,该些金属柱112藉由多个焊料150焊接于该些接垫122上,另形成有一底部填充胶140,用以包覆该些金属柱112、该些接垫122与该些焊料150。而达成该芯片110与该基板120的电性连接关系是以该些焊料150作为焊接界面,在材质与熔点上皆不同于该些金属柱112与该些接垫122,易有焊点断裂与阻抗增加的风险。  As shown in FIG. 1 , a conventional MPS-C2 metal pillar chip connection structure 100 mainly includes a chip 110 and a substrate 120 . The chip 110 is provided with a plurality of metal pillars 112 protruding from a surface 111 of the chip 110 . An upper surface 121 of the substrate 120 has a plurality of pads 122 corresponding to the metal pillars 112 respectively. Specifically, the metal posts 112 are welded on the pads 122 by a plurality of solders 150 , and an underfill 140 is formed to cover the metal posts 112 , the pads 122 and the pads 122 . Solder 150. To achieve the electrical connection between the chip 110 and the substrate 120, the solder 150 is used as the soldering interface, which is different from the metal pillars 112 and the pads 122 in terms of material and melting point, and is prone to solder joint breakage and Risk of increased impedance. the

因此,传统的MPS-C2技术在该芯片110与该基板120结合会使用该些焊料150去做芯片连接。其中,该些焊料150可选用锡球(solder ball)或其它不同于凸块成份的焊接剂,故在芯片连接时又需要考虑到不同材质间的金属扩散与湿润性,常使用到镍(Ni)/金(Au)等作为凸块表面镀层,增加不少的焊接成本。此外,在后续回焊步骤中,该些焊料150在加热至回焊温度时,该些焊料150会熔化而具有流动性,当该些焊料150受到挤压或震动会发生溢流的情况,更可能造成该些金属柱112焊接到错误的接垫122,则将导致电性连接失败。  Therefore, the conventional MPS-C2 technology uses the solders 150 to connect the chip 110 to the substrate 120 . Among them, these solders 150 can be selected from solder balls (solder ball) or other solders that are different from the components of the bumps. Therefore, it is necessary to consider the metal diffusion and wettability between different materials when connecting chips. Nickel (Ni )/gold (Au) etc. as the surface coating of the bump increases a lot of soldering cost. In addition, in the subsequent reflow step, when the solder 150 is heated to the reflow temperature, the solder 150 will melt and become fluid, and overflow will occur when the solder 150 is squeezed or shaken. It may cause the metal pillars 112 to be soldered to wrong pads 122 , which will lead to electrical connection failure. the

由此可见,上述现有的芯片封装技术在结构与使用上,显然仍存在有不便与缺陷,而亟待加以进一步改进。为了解决上述存在的问题,相关厂商莫不费尽心思来谋求解决之道,但长久以来一直未见适用的设计被发展完成,而一般产品又没有适切结构能够解决上述问题,此显然是相关业者急欲解决的问题。因此如何能创设一种新型的免用焊料的金属柱芯片连接构造与方法,实属当前重要研发课题之一,亦成为当前业界极需改进的目标。  It can be seen that the above-mentioned existing chip packaging technology obviously still has inconveniences and defects in structure and use, and needs to be further improved. In order to solve the above-mentioned problems, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and the general products do not have a suitable structure to solve the above-mentioned problems. This is obviously the relevant industry. urgent problem to be solved. Therefore, how to create a new type of solder-free metal pillar chip connection structure and method is one of the current important research and development topics, and it has also become a goal that the industry needs to improve. the

有鉴于上述现有的芯片封装技术存在的缺陷,本发明人基于从事此类产品设计制造多年丰富的实务经验及专业知识,并配合学理的运用,积极加以研究创新,以期创设一种新型的免用焊料的金属柱芯片连接构造与方法,能够改进一般现有的芯片封装技术,使其更具有实用性。经过不断的研究、设计,并经过反复试作样品及改进后,终于创设出确具实用价值的本发明。  In view of the defects in the above-mentioned existing chip packaging technology, the inventor actively researches and innovates based on his rich practical experience and professional knowledge in the design and manufacture of such products for many years, and cooperates with the application of academic theories, in order to create a new type of free chip packaging technology. The metal post chip connection structure and method using solder can improve the general existing chip packaging technology and make it more practical. Through continuous research, design, and after repeated trial samples and improvements, the present invention with practical value is finally created. the

发明内容 Contents of the invention

本发明的主要目的在于,克服现有的芯片封装技术存在的缺陷,而提供一种新型的免用焊料的金属柱芯片连接构造,所要解决的技术问题是使其不需要使用以往的焊料做芯片连接,以提升焊点的导电性,特别应用于MPS-C2(金属柱焊接的芯片连接)产品能够节省使用焊料接合的成本,非常适于实用。  The main purpose of the present invention is to overcome the defects in the existing chip packaging technology, and provide a new type of solder-free metal pillar chip connection structure, the technical problem to be solved is to make it unnecessary to use the previous solder to make the chip Connect to improve the conductivity of solder joints, especially for MPS-C2 (metal pillar soldered chip connection) products, which can save the cost of using solder joints, which is very suitable for practical use. the

本发明的另一目的在于,提供一种新型的免用焊料的金属柱芯片连接方法,所要解决的技术问题是使其建立在金属柱与接垫之间无焊料的U形金属键合截面,大幅提升焊点的结合强度,从而更加适于实用。  Another object of the present invention is to provide a novel solder-free metal post chip connection method, the technical problem to be solved is to establish a U-shaped metal bonding cross-section without solder between the metal post and the pad, The bonding strength of solder joints is greatly improved, making it more suitable for practical use. the

本发明的目的及解决其技术问题是采用以下技术方案来实现的。依据本发明提出的一种免用焊料的金属柱芯片连接构造,其包括:一芯片,设有多个金属柱,突出于该芯片的一表面,每一金属柱具有一顶面与两平行侧壁;以及一基板,具有一上表面以及多个在该上表面的接垫,每一接垫具有一凹穴底面与两侧凹穴侧;其中,该芯片接合于该基板的上表面,该些金属柱的顶面自我焊接至该些凹穴底面,该些金属柱的两平行侧壁的局部自我焊接至该些两侧凹穴侧,以使该些金属柱与该些接垫之间形成为无焊料的U形金属键合截面。  The purpose of the present invention and the solution to its technical problems are achieved by adopting the following technical solutions. According to the present invention, a solder-free metal pillar chip connection structure is proposed, which includes: a chip with a plurality of metal pillars protruding from a surface of the chip, each metal pillar has a top surface and two parallel sides wall; and a substrate having an upper surface and a plurality of pads on the upper surface, each pad having a cavity bottom and two sides of the cavity; wherein the chip is bonded to the upper surface of the substrate, the The top surfaces of the metal posts are self-welded to the bottom surfaces of the cavities, and the parts of the two parallel side walls of the metal posts are self-welded to the sides of the cavities on both sides, so that the gap between the metal posts and the pads Formed into a U-shaped metal bonding section without solder. the

本发明的目的及解决其技术问题还可采用以下技术措施进一步实现。  The purpose of the present invention and its technical problems can also be further realized by adopting the following technical measures. the

前述的免用焊料的金属柱芯片连接构造,其中所述的U形金属键合截面为铜-铜界面。  In the aforementioned solder-free metal pillar chip connection structure, the U-shaped metal bonding section is a copper-copper interface. the

前述的免用焊料的金属柱芯片连接构造,其中所述的芯片的该表面为一主动面。  In the aforementioned solder-free metal pillar chip connection structure, the surface of the chip is an active surface. the

前述的免用焊料的金属柱芯片连接构造,其中所述的金属柱更贯穿该芯片。  In the foregoing solder-free metal pillar chip connection structure, the metal pillar further penetrates the chip. the

前述的免用焊料的金属柱芯片连接构造,其另包含一底部填充胶,形成于该芯片与该基板之间,以密封该些金属柱。  The aforementioned solder-free metal pillar chip connection structure further includes an underfill glue formed between the chip and the substrate to seal the metal pillars. the

前述的免用焊料的金属柱芯片连接构造,其中所述的接垫的凹穴深度不大于该些金属柱的高度的三分之一。  In the aforementioned solder-free metal pillar chip connection structure, the depth of the cavity of the contact pad is not greater than one-third of the height of the metal pillars. the

本发明的目的及解决其技术问题还采用以下技术方案来实现。依据本发明提出的一种免用焊料的金属柱芯片连接方法,其包括:提供一芯片,设有多个金属柱,突出于该芯片的一表面,每一金属柱具有一顶面与两平行侧壁;提供一基板,具有一上表面以及多个在该上表面的接垫,每一接垫具有一凹穴底面与两侧凹穴侧;以及接合该芯片于该基板的上表面,利用热、压力与超音波施加予该芯片令该些金属柱的顶面自我焊接至该些凹穴底面,该些金属柱的两平行侧壁的局部自我焊接至该些两侧凹穴侧,以使该些金属柱与该些接垫之间形成为无焊料的U形金属键合截面。  The purpose of the present invention and the solution to its technical problem also adopt the following technical solutions to achieve. A solder-free metal post chip connection method proposed by the present invention includes: providing a chip with a plurality of metal posts protruding from a surface of the chip, each metal post having a top surface and two parallel sidewall; providing a substrate with an upper surface and a plurality of pads on the upper surface, each pad having a cavity bottom and two sides of the cavity; and bonding the chip on the upper surface of the substrate, using Heat, pressure and ultrasonic waves are applied to the chip so that the top surfaces of the metal posts are self-welded to the bottom surfaces of the cavities, and the parts of the two parallel side walls of the metal posts are self-welded to the sides of the cavities on both sides, so that A solderless U-shaped metal bonding section is formed between the metal pillars and the pads. the

本发明的目的及解决其技术问题还可采用以下技术措施进一步实现。  The purpose of the present invention and its technical problems can also be further realized by adopting the following technical measures. the

前述的免用焊料的金属柱芯片连接方法,其中所述的U形金属键合截面为铜-铜界面。  In the aforementioned solder-free metal pillar chip connection method, wherein the U-shaped metal bonding section is a copper-copper interface. the

前述的免用焊料的金属柱芯片连接方法,其中所述的芯片的该表面为一主动面。  In the aforementioned solder-free metal pillar chip connection method, the surface of the chip is an active surface. the

前述的免用焊料的金属柱芯片连接方法,其中所述的金属柱更贯穿该芯片。  In the aforementioned solder-free metal pillar chip connection method, wherein the metal pillar further penetrates the chip. the

本发明与现有技术相比具有明显的优点和有益效果。由以上可知,为达到上述目的,本发明提供了一种免用焊料的金属柱芯片连接构造,主要包含一芯片以及一基板。该芯片设有多个金属柱,突出于该芯片的一表面,每一金属柱具有一顶面与两平行侧壁。该基板具有一上表面以及多个在该上表面的接垫,每一接垫具有一凹穴底面与两侧凹穴侧。其中,该芯片接合于该基板的上表面,该些金属柱的顶面自我焊接至该些凹穴底面,该些金属柱的两平行侧壁的局部自我焊接至该些两侧凹穴侧,以使该些金属柱与该些接垫之间形成为无焊料的U形金属键合截面。本发明另揭示上述免用焊料的金属柱芯片连接构造的连接方法。  Compared with the prior art, the present invention has obvious advantages and beneficial effects. From the above, in order to achieve the above purpose, the present invention provides a solder-free metal pillar chip connection structure, which mainly includes a chip and a substrate. The chip is provided with a plurality of metal columns protruding from a surface of the chip, and each metal column has a top surface and two parallel side walls. The substrate has an upper surface and a plurality of pads on the upper surface, and each pad has a cavity bottom and two sides of the cavity. Wherein, the chip is bonded to the upper surface of the substrate, the top surfaces of the metal pillars are self-welded to the bottom surfaces of the cavities, and parts of the two parallel side walls of the metal pillars are self-welded to the sides of the cavities on both sides, A solder-free U-shaped metal bonding section is formed between the metal pillars and the pads. The present invention further discloses a connection method of the solder-free metal pillar chip connection structure. the

本发明的目的及解决其技术问题还可采用以下技术措施进一步实现。  The purpose of the present invention and its technical problems can also be further realized by adopting the following technical measures. the

在前述的金属柱芯片连接构造中,该U形金属键合截面可为铜-铜界面。  In the aforementioned metal pillar chip connection structure, the U-shaped metal bonding cross section may be a copper-copper interface. the

在前述的金属柱芯片连接构造中,该芯片的该表面可为一主动面。  In the aforementioned metal pillar chip connection structure, the surface of the chip can be an active surface. the

在前述的金属柱芯片连接构造中,该些金属柱可更贯穿该芯片。  In the aforementioned metal pillar chip connection structure, the metal pillars can further penetrate the chip. the

在前述的金属柱芯片连接构造中,可另包含一底部填充胶,形成于该芯片与该基板之间,以密封该些金属柱。  In the aforementioned metal pillar chip connection structure, an underfill glue may be further included to be formed between the chip and the substrate to seal the metal pillars. the

在前述的金属柱芯片连接构造中,该些接垫的凹穴深度可不大于该些金属柱的高度的三分之一。  In the aforementioned metal pillar chip connection structure, the depth of the cavity of the pads may not be greater than one-third of the height of the metal pillars. the

借由上述技术方案,本发明免用焊料的金属柱芯片连接构造与方法至少具有下列优点及有益效果:  By virtue of the above technical solutions, the solder-free metal pillar chip connection structure and method of the present invention have at least the following advantages and beneficial effects:

由以上技术方案可以看出,本发明的免用焊料的金属柱芯片连接构造与方法,有以下优点与功效:  It can be seen from the above technical solutions that the solder-free metal pillar chip connection structure and method of the present invention have the following advantages and effects:

一、可藉由金属柱与接垫的特定组合关作为其中一技术手段,由于每一金属柱具有一顶面与两平行侧壁,而每一接垫具有一凹穴底面与两侧凹穴侧,并且金属柱的顶面自我焊接至凹穴底面,金属柱的两平行侧壁的局部自我焊接至两侧凹穴侧,以使金属柱与接垫之间形成为无焊料的U形金属键合截面。因此,不需要使用以往的焊料做芯片连接,以提升焊点的导电性,特别应用于MPS-C2(金属柱焊接的芯片连接)产品时,能够节省使用焊料接合的成本。  1. The specific combination of metal pillars and pads can be used as one of the technical means, because each metal pillar has a top surface and two parallel side walls, and each pad has a concave bottom surface and two side concave holes side, and the top surface of the metal post is self-welded to the bottom surface of the cavity, and the parts of the two parallel side walls of the metal post are self-welded to the sides of the cavity on both sides, so that a U-shaped metal post without solder is formed between the metal post and the pad. Bonding section. Therefore, there is no need to use traditional solder for chip connection to improve the conductivity of solder joints, especially when applied to MPS-C2 (metal pillar soldered chip connection) products, it can save the cost of using solder joints. the

二、可藉由金属柱与接垫的特定组合关系作为其中一技术手段,由于每一金属柱具有一顶面与两平行侧壁,而每一接垫具有一凹穴底面与两侧凹穴侧,并,利用热、压力与超音波施加予芯片以建立在金属柱与接垫之间的无焊料的U形金属键合截面。因此,可大幅提升焊点的结合强度。  2. The specific combination relationship between the metal pillar and the pad can be used as one of the technical means, because each metal pillar has a top surface and two parallel side walls, and each pad has a concave bottom surface and two side concave holes On the other hand, heat, pressure and ultrasonic waves are applied to the chip to establish a solderless U-shaped metal bonding cross section between the metal post and the pad. Therefore, the bonding strength of the solder joint can be greatly improved. the

综上所述,本发明是有关于一种免用焊料的金属柱芯片连接构造与方法,该芯片设有多个金属柱,每一金属柱具有一顶面与两平行侧壁。基板具有多个在上表面的接垫,每一接垫具有一凹穴底面与两侧凹穴侧。利用热、压力与超音波施加予芯片,令金属柱的顶面自我焊接至凹穴底面,金属柱的两平行侧壁的局部自我焊接至两侧凹穴侧,以使金属柱与接垫之间形成为无焊料的U形金属键合截面。因此,不需要使用焊料做芯片连接,特别运用于“金属柱焊接的芯片连接”产品能够节省焊料接合成本,并大幅提升焊点的结合强度与导电性。本发明在技术上有显著的进步,并具有明显的积极效果,诚为一新颖、进步、实用的新设计。  To sum up, the present invention relates to a solder-free metal pillar chip connection structure and method. The chip is provided with a plurality of metal pillars, and each metal pillar has a top surface and two parallel sidewalls. The substrate has a plurality of pads on the upper surface, and each pad has a bottom surface of a cavity and two sides of the cavity. Using heat, pressure and ultrasonic waves to apply to the chip, the top surface of the metal post is self-welded to the bottom of the cavity, and the two parallel side walls of the metal post are partially self-welded to the side of the two side cavities, so that the metal post and the pad Formed into a U-shaped metal bonding section without solder. Therefore, there is no need to use solder for chip connection, especially for "chip connection with metal pillar welding" products, which can save the cost of solder joints and greatly improve the bonding strength and conductivity of solder joints. The present invention has significant progress in technology, and has obvious positive effects, and is a novel, progressive and practical new design. the

上述说明仅是本发明技术方案的概述,为了能够更清楚了解本发明的技术手段,而可依照说明书的内容予以实施,并且为了让本发明的上述和其他目的、特征和优点能够更明显易懂,以下特举较佳实施例,并配合附图,详细说明如下。  The above description is only an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention, it can be implemented according to the contents of the description, and in order to make the above and other purposes, features and advantages of the present invention more obvious and understandable , the following preferred embodiments are specifically cited below, and are described in detail as follows in conjunction with the accompanying drawings. the

附图说明 Description of drawings

图1为现有习知的金属柱芯片连接构造的截面示意图。  FIG. 1 is a schematic cross-sectional view of a conventional metal pillar chip connection structure. the

图2是本发明的第一具体实施例的一种免用焊料的金属柱芯片连接构造的截面示意图。  2 is a schematic cross-sectional view of a solder-free metal pillar chip connection structure according to the first embodiment of the present invention. the

图3A至图3C是本发明的第一具体实施例的金属柱芯片连接构造的覆 晶接合过程中组件截面示意图。  3A to 3C are schematic cross-sectional views of components during the flip-chip bonding process of the metal pillar chip connection structure according to the first specific embodiment of the present invention. the

图4A至图4C是本发明的第一具体实施例的金属柱芯片连接构造绘示其金属柱、接垫与在覆晶接合过程中结合的示意图。  4A to 4C are schematic diagrams of the metal pillar chip connection structure of the first embodiment of the present invention depicting the metal pillars, pads and bonding in the flip-chip bonding process. the

图5A至图5C是本发明的一变化实施例的金属柱芯片连接构造绘示其金属柱、接垫与在覆晶接合过程中结合的示意图。  5A to FIG. 5C are schematic diagrams illustrating the metal pillars, pads and bonding in the flip-chip bonding process of a metal pillar chip connection structure according to a variant embodiment of the present invention. the

图6是本发明的第二具体实施例的另一种免用焊料的金属柱芯片连接构造的截面示意图。  6 is a schematic cross-sectional view of another solder-free metal pillar chip connection structure according to the second embodiment of the present invention. the

100:金属柱芯片连接构造  100: Metal pillar chip connection structure

110:芯片  110: chip

111:表面                      112:金属柱  111: Surface 112: Metal Pillar

120:基板  120: Substrate

121:上表面                    122:接垫  121: Upper surface 122: Pad

140:底部填充胶                150:焊料  140: Underfill 150: Solder

200:免用焊料的金属柱芯片连接构造  200: Solder-free metal pillar chip connection structure

210:芯片  210: chip

211:表面                      212:金属柱  211: Surface 212: Metal Pillar

213:顶面                      213a:顶面  213: top surface 213a: top surface

214:平行侧壁                  214a:平行侧壁  214: Parallel side walls 214a: Parallel side walls

220:基板  220: Substrate

221:上表面                    222:接垫  221: Upper surface 222: Pad

223:凹穴底面                  223a:凹穴底面  223: Bottom of the pocket 223a: Bottom of the pocket

224:凹穴侧                    224a:凹穴侧  224: Pocket side 224a: Pocket side

230:U形金属键合截面  230: U-shaped metal bonding section

240:底部填充胶  240: bottom filler

300:免用焊料的金属柱芯片连接构造  300: Solder-free metal pillar chip connection structure

315:贯通孔                    316:电镀层  315: Through hole 316: Plating layer

具体实施方式 Detailed ways

为更进一步阐述本发明为达成预定发明目的所采取的技术手段及功效,以下结合附图及较佳实施例,对依据本发明提出的免用焊料的金属柱芯片连接构造与方法其具体实施方式、结构、特征及其功效,详细说明如后。  In order to further explain the technical means and effects of the present invention to achieve the intended purpose of the invention, the specific implementation of the solder-free metal post chip connection structure and method proposed by the present invention will be described below in conjunction with the accompanying drawings and preferred embodiments. , structure, feature and effect thereof, detailed description is as follows. the

有关本发明的前述及其他技术内容、特点及功效,在以下配合参考图式的较佳实施例的详细说明中将可清楚的呈现。为了方便说明,在以下的实施例中,相同的元件以相同的编号表示。  The aforementioned and other technical contents, features and effects of the present invention will be clearly presented in the following detailed description of preferred embodiments with reference to the drawings. For convenience of description, in the following embodiments, the same elements are denoted by the same numbers. the

以下将配合所附图示详细说明本发明的实施例,然应注意的是,该些图示均为简化的示意图,仅以示意方法来说明本发明的基本架构或实施方 法,故仅显示与本案有关的组件与组合关系,图中所显示的组件并非以实际实施的数目、形状、尺寸做等比例绘制,某些尺寸比例与其它相关尺寸比例或已夸张或是简化处理,以提供更清楚的描述。实际实施的数目、形状及尺寸比例为一种选置性的设计,详细的组件布局可能更为复杂。  Embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, but it should be noted that these drawings are simplified schematic diagrams, and are only used to illustrate the basic structure or implementation method of the present invention, so only show Components and combinations related to this case, the components shown in the figure are not drawn in proportion to the actual number, shape, and size. Some dimensional ratios and other related dimensional ratios have been exaggerated or simplified to provide a better Clear description. The number, shape and size ratio of the actual implementation is an optional design, and the detailed component layout may be more complicated. the

依据本发明的第一具体实施例,一种免用焊料的金属柱芯片连接构造举例说明于图2的截面示意图以及图3A至图3C在覆晶接合过程中组件截面示意图。该免用焊料的金属柱芯片连接构造200主要包含一芯片210以及一基板220。  According to the first embodiment of the present invention, a solder-free metal pillar chip connection structure is illustrated in the cross-sectional schematic diagram of FIG. 2 and the cross-sectional schematic diagrams of components in the flip-chip bonding process in FIGS. 3A to 3C . The solder-free metal pillar chip connection structure 200 mainly includes a chip 210 and a substrate 220 . the

请参阅图2所示,该芯片210设有多个金属柱212,突出于该芯片210的一表面211,每一金属柱212具有一顶面213与两平行侧壁214。详细而言,该芯片210已形成有集成电路(integrated circuit,IC)组件,例如内存、逻辑组件以及特殊应用集成电路(ASIC),可由ㄧ晶圆(wafer)分割成颗粒状。在本实施例中,该芯片210的该表面211可为一主动面,即集成电路的形成表面。详细而言,在该表面211(即主动面)可另形成有多个焊垫(图中未绘出),供该些金属柱212的设置,在焊垫与金属柱之间另可设置凸块下金属层(图中未绘出),以避免金属柱内成份的金属扩散。该些金属柱212的材质可包含金、铜、铝或其合金,可利用电镀方式以形成柱状。较佳地,可利用研磨或表面平坦技术,使该顶面213为平坦并有相同的高度。  Please refer to FIG. 2 , the chip 210 has a plurality of metal pillars 212 protruding from a surface 211 of the chip 210 , and each metal pillar 212 has a top surface 213 and two parallel sidewalls 214 . Specifically, the chip 210 has been formed with integrated circuit (IC) components, such as memory, logic components and application specific integrated circuits (ASIC), which can be divided into particles by a wafer. In this embodiment, the surface 211 of the chip 210 may be an active surface, that is, a surface on which an integrated circuit is formed. In detail, a plurality of welding pads (not shown in the figure) can be formed on the surface 211 (ie, the active surface) for the setting of the metal pillars 212, and protrusions can also be arranged between the welding pads and the metal pillars. An underlying metal layer (not shown in the figure) is used to avoid metal diffusion of components in the metal pillars. The material of the metal pillars 212 may include gold, copper, aluminum or alloys thereof, and electroplating may be used to form the pillars. Preferably, the top surface 213 can be flat and have the same height by grinding or surface flattening technology. the

该基板220具有一上表面221以及多个在该上表面221的接垫222,每一接垫222具有一凹穴底面223与两侧凹穴侧224。详细而言,该基板220可为一印刷电路板(printed circuit board,PCB),作为半导体封装结构内芯片承载与电性连接的媒介物。在一较佳实施例中,每一接垫222的两凹穴侧224的距离可不大于对应的每一金属柱212的两平行侧壁214的距离,以确保在覆晶接合中该些平行侧壁214能摩擦接触该些凹穴侧224。该些接垫222的材质可包含铜,该凹穴底面223与该两侧凹穴侧224的形成可利用图案化蚀刻或图案化电镀技术达成。在一较佳实施例中,该些接垫222的凹穴深度可不大于该些金属柱212的高度的三分之一,以避免该些金属柱212过度嵌埋于该些接垫222内并保持该芯片210与该基板220之间不可摩擦接触的间隙。此外,在本实施例中,该些金属柱212与该些接垫222可具有相同的材质,例如,该些金属柱212可为铜柱(Cu post),而该些接垫222亦可为铜槽(Cu cave)。  The substrate 220 has an upper surface 221 and a plurality of pads 222 on the upper surface 221 , and each pad 222 has a cavity bottom 223 and two cavity sides 224 . In detail, the substrate 220 can be a printed circuit board (PCB), used as a medium for carrying and electrically connecting chips in the semiconductor packaging structure. In a preferred embodiment, the distance between the two cavity sides 224 of each pad 222 may not be greater than the distance between the corresponding two parallel sidewalls 214 of each metal pillar 212, so as to ensure that these parallel sides are The walls 214 are able to frictionally contact the pocket sides 224 . The material of the pads 222 may include copper, and the bottom surface 223 of the cavity and the sides 224 of the cavity on both sides may be formed by patterned etching or patterned electroplating techniques. In a preferred embodiment, the depth of the cavity of the pads 222 may not be greater than one-third of the height of the metal pillars 212, so as to prevent the metal pillars 212 from being over-embedded in the pads 222 and A non-friction contact gap between the chip 210 and the substrate 220 is maintained. In addition, in this embodiment, the metal posts 212 and the pads 222 can have the same material, for example, the metal posts 212 can be copper posts (Cu post), and the pads 222 can also be Copper groove (Cu cave). the

此外,该芯片210接合于该基板220的上表面221,该些金属柱212的顶面213自我焊接至该些凹穴底面223,该些金属柱212的两平行侧壁214的局部自我焊接至该些两侧凹穴侧224,以使该些金属柱212与该些接垫222之间形成为无焊料的U形金属键合截面230。换言之,该U形金属键合截面230包含至少三个接合界面而呈非平面,上述的“接合界面”位于该 顶面213与该凹穴底面223之间以及两平行侧壁214与对应的两凹穴侧224之间。而“自我焊接”所指为利用该些金属柱212表面的金属原子活化扩散,而与该些接垫222形成相互金属键结,不需要假借外加的焊料、凸块镀层或其它接合剂,基本上会在该U形金属键合截面230产生断续的金属晶格界面,故在自我焊接之后在该些金属柱212与该些接垫222之间的阻抗不会升高,以“无焊料的U形金属键合截面”作为焊点可达到较佳的导电性。在本实施例中,该U形金属键合截面230可为铜-铜界面或金-金界面,其中以铜-铜界面的成本较低。因此,该U形金属键合截面230不会有其它杂质、脆弱的铸造结构或介金属化合物的存在,而能形成较为平整无缝隙的接合面,不需要使用以往的焊料做芯片连接,以提升焊点的导电性。  In addition, the chip 210 is bonded to the upper surface 221 of the substrate 220, the top surfaces 213 of the metal pillars 212 are self-welded to the bottom surfaces 223 of the cavities, and the parts of the two parallel sidewalls 214 of the metal pillars 212 are self-welded to The cavity sides 224 on both sides form a solderless U-shaped metal bonding section 230 between the metal pillars 212 and the pads 222 . In other words, the U-shaped metal bonding cross-section 230 includes at least three joint interfaces and is non-planar. The above-mentioned "joint interface" is located between the top surface 213 and the cavity bottom surface 223 and the two parallel side walls 214 and the corresponding two between pocket sides 224 . And "self-soldering" refers to utilizing the activation and diffusion of metal atoms on the surface of the metal pillars 212 to form a mutual metal bond with the pads 222 without resorting to additional solder, bump coating or other bonding agent, basically A discontinuous metal lattice interface will be generated on the U-shaped metal bonding section 230, so the impedance between the metal pillars 212 and the pads 222 will not increase after self-soldering, so as to "no solder The U-shaped metal bonding section" can be used as a solder joint to achieve better conductivity. In this embodiment, the U-shaped metal bonding section 230 can be a copper-copper interface or a gold-gold interface, and the cost of the copper-copper interface is lower. Therefore, the U-shaped metal bonding cross-section 230 will not have other impurities, fragile casting structures or intermetallic compounds, and can form a relatively flat and seamless joint surface, without using conventional solder for chip connection to improve Conductivity of solder joints. the

此外,该免用焊料的金属柱芯片连接构造200可另包含一底部填充胶240(underfill material),形成于该芯片210与该基板220之间,以密封该些金属柱212。藉由该底部填充胶240在固化前的高流动性,用以避免该芯片210与该基板220之间形成空隙。在一较佳实施例中,该底部填充胶240可选用硬度较高的材料,除了能保护该些金属柱212之外,更可以补强整体的结构强度。  In addition, the solder-free metal pillar chip connection structure 200 may further include an underfill material 240 formed between the chip 210 and the substrate 220 to seal the metal pillars 212 . Due to the high fluidity of the underfill 240 before curing, a gap is avoided between the chip 210 and the substrate 220 . In a preferred embodiment, the underfill 240 can be made of a material with higher hardness, which can not only protect the metal pillars 212 but also reinforce the overall structural strength. the

因此,本发明藉由金属柱与接垫的特定组合关系作为其中一技术手段,毋须以往的焊料做芯片连接特别应用于MPS-C2(金属柱焊接的芯片连接)产品能够节省使用焊料接合的成本。这是因为每一金属柱212具有一顶面213与两平行侧壁214,并且每一接垫222具有一凹穴底面223与两侧凹穴侧224,并且该些金属柱212的顶面213自我焊接至该些凹穴底面223,该些金属柱212的两平行侧壁214的局部自我焊接至对应的两侧凹穴侧224,以使该些金属柱212与该些接垫222之间形成为无焊料的U形金属键合截面230。此外,更大幅提升焊点的结合强度与导电性,免除了传统使用焊料接合时易有焊焊点断裂与阻抗增加的风险。  Therefore, the present invention uses the specific combination relationship between metal pillars and pads as one of the technical means, without the need for solder to do chip connection in the past, especially for MPS-C2 (metal pillar soldered chip connection) products, which can save the cost of using solder joints . This is because each metal pillar 212 has a top surface 213 and two parallel sidewalls 214, and each pad 222 has a cavity bottom surface 223 and two sides cavity sides 224, and the top surfaces 213 of the metal columns 212 Self-welding to the bottom surface 223 of the cavity, and parts of the two parallel side walls 214 of the metal pillars 212 are self-welded to the corresponding sides of the cavity 224, so that between the metal pillars 212 and the pads 222 A solderless U-shaped metal bonding section 230 is formed. In addition, the bonding strength and conductivity of solder joints are greatly improved, eliminating the risk of solder joint breakage and increased impedance when traditional solder joints are used. the

本发明还揭示该免用焊料的金属柱芯片连接构造200的一种可行但非限定的制造方法,举例说明于图3A至图3C在制造中组件截面示意图,用以清楚彰显本发明的其中一功效,其详细步骤说明如下所示。  The present invention also discloses a feasible but non-limiting manufacturing method of the solder-free metal pillar chip connection structure 200, illustrated in FIGS. function, and its detailed step-by-step instructions are as follows. the

首先,请参阅图3A所示,提供该芯片210,设有多个金属柱212,突出于该芯片210的一表面211,每一金属柱212具有一顶面213与两平行侧壁214。该些顶面213不需要沾附现有习知所使用的焊料,除了毋须担心会有焊料污染问题之外,更可节省不少焊料的设置成本。  Firstly, as shown in FIG. 3A , the chip 210 is provided, and a plurality of metal pillars 212 protrude from a surface 211 of the chip 210 . Each metal pillar 212 has a top surface 213 and two parallel sidewalls 214 . The top surfaces 213 do not need to be adhered to the conventionally used solder. In addition to not worrying about solder contamination, it can save a lot of solder installation costs. the

请参阅图3B所示,提供该基板220,在该基板220的上表面221设有多个接垫222,每一接垫222具有一凹穴底面223与两侧凹穴侧224。具体而言,每一凹穴底面223与对应的两侧凹穴侧224可形成犹如U形槽的结构。  Referring to FIG. 3B , the substrate 220 is provided, and a plurality of pads 222 are disposed on the upper surface 221 of the substrate 220 , and each pad 222 has a cavity bottom 223 and two cavity sides 224 . Specifically, the bottom surface 223 of each cavity and the corresponding two sides 224 of the cavity can form a structure like a U-shaped groove. the

请参阅图3C所示,执行一覆晶接合的步骤,以接合该芯片210于该基 板220的上表面221。经由一吸附式热压合治具(图中未绘出)传送热、压力与超音波并施加予该芯片210,以使该些金属柱212的顶面213自我焊接至该些凹穴底面223,该些金属柱212的两平行侧壁214的局部自我焊接至该些两侧凹穴侧224,以使该些金属柱212与该些接垫222之间形成为无焊料的U形金属键合截面230。其中,所谓的“超音波”指振动频率不小于2万赫兹(Hz),对该芯片210及其金属柱212产生每秒2万次至4万次的高频率横向振动,使得该些金属柱212与该些接垫222的接合面因高频振动而表面熔接,诱发原子扩散以形成相互金属的原子结合,故不需要助熔剂也不需要通电流与加热到该些金属柱212的熔点。利用适当加热该芯片210但不需要到达该些金属柱212的熔点,以使连接在该芯片210的金属柱212同时受热而膨胀,同一金属柱212的两平行侧壁214的距离可略大于对应接垫222的两平行侧壁214的距离,藉以增加该些金属柱212的两平行侧壁214的局部与该些两侧凹穴侧224的摩擦接触,以达到侧边垂直向的自我焊接。利用施压予该芯片210,确保该些金属柱212的顶面213与该些凹穴底面223的摩擦接触,以达到中央水平向的自我焊接。因此,利用热、压力与超音波施加予该芯片210,能够在该些金属柱212与该些接垫222之间建立无焊料的U形金属键合截面230,可大幅提升焊点的结合强度。  Referring to FIG. 3C , a flip-chip bonding step is performed to bond the chip 210 on the upper surface 221 of the substrate 220. Heat, pressure and ultrasonic waves are transmitted to the chip 210 through an adsorption thermocompression fixture (not shown in the figure), so that the top surfaces 213 of the metal posts 212 are self-welded to the bottom surfaces 223 of the cavities Parts of the two parallel side walls 214 of the metal posts 212 are self-welded to the recess sides 224 on both sides, so that a U-shaped metal bond without solder is formed between the metal posts 212 and the pads 222 Combined section 230. Among them, the so-called "ultrasonic wave" refers to the vibration frequency not less than 20,000 hertz (Hz), which produces high-frequency lateral vibrations of 20,000 to 40,000 times per second to the chip 210 and its metal pillars 212, making these metal pillars The bonding surfaces of 212 and the pads 222 are fused due to high-frequency vibration, which induces atomic diffusion to form atomic bonding of mutual metals. Therefore, no flux, current flow and heating to the melting point of the metal pillars 212 are required. By properly heating the chip 210 but not reaching the melting point of the metal pillars 212 so that the metal pillars 212 connected to the chip 210 are heated and expanded at the same time, the distance between the two parallel side walls 214 of the same metal pillar 212 can be slightly greater than the corresponding The distance between the two parallel sidewalls 214 of the pads 222 is used to increase the frictional contact between the two parallel sidewalls 214 of the metal pillars 212 and the recess sides 224 on both sides, so as to achieve vertical self-welding of the sides. Applying pressure to the chip 210 ensures frictional contact between the top surfaces 213 of the metal pillars 212 and the bottom surfaces 223 of the cavities, so as to achieve central horizontal self-welding. Therefore, by applying heat, pressure and ultrasonic waves to the chip 210, a solderless U-shaped metal bonding section 230 can be established between the metal pillars 212 and the pads 222, which can greatly improve the bonding strength of the solder joints. . the

图4A至图4C为该金属柱芯片连接构造200绘示其金属柱、接垫与在覆晶接合过程中结合的示意图。如图4A所示,每一金属柱212的该顶面213可为矩形,而每一金属柱212除了具有上述的两平行侧壁214之外,可另具有一对平行的壁面,故使得该些金属柱212形成为长方体。此外,如图4B与图4C所示,每一接垫222的该凹穴底面223的面积可不大于对应的顶面213的面积。更具体地,当该些金属柱212接合至该些接垫222时,利用热、压力与超音波施加予该芯片210,该些顶面213与对应的凹穴底面223以及该些平行侧壁214与对应的凹穴侧224之间快速地振动摩擦,以使该些金属柱212的顶面213自我焊接至该些凹穴底面223,以及该些金属柱212的两平行侧壁214的局部自我焊接至该些两侧凹穴侧224。图4C中箭头所指方向即为利用超音波的振动方向,其平行于该些平行侧壁214与该些凹穴侧224。  4A to FIG. 4C are schematic diagrams of the metal pillar chip connection structure 200 showing its metal pillars, pads and bonding in the flip-chip bonding process. As shown in FIG. 4A, the top surface 213 of each metal column 212 can be rectangular, and each metal column 212 can have a pair of parallel wall surfaces in addition to the above-mentioned two parallel side walls 214, so that the The metal pillars 212 are formed in a rectangular parallelepiped. In addition, as shown in FIG. 4B and FIG. 4C , the area of the bottom surface 223 of each pad 222 may not be larger than the area of the corresponding top surface 213 . More specifically, when the metal pillars 212 are bonded to the pads 222, heat, pressure and ultrasonic waves are applied to the chip 210, the top surfaces 213 and the corresponding cavity bottom surfaces 223 and the parallel side walls 214 and the corresponding cavity side 224 vibrate and rub rapidly, so that the top surface 213 of the metal columns 212 is self-welded to the bottom surface 223 of the cavity, and the two parallel side walls 214 of the metal columns 212 are partially Self-welding to the two side pocket sides 224 . The direction indicated by the arrow in FIG. 4C is the vibration direction of the ultrasonic wave, which is parallel to the parallel side walls 214 and the cavity sides 224 . the

图5A至图5C为在一变化实施例中该金属柱芯片连接构造200绘示其金属柱、接垫与在覆晶接合过程中结合的示意图,用以说明不限定金属柱的顶面与接垫的凹穴底面的形状。如图5A所示,每一金属柱212的该顶面213a可为正方形,而能具有两对相互平行且相等的平行侧壁214a。并且,如图5B所示,每一接垫222凹陷而形成犹如一容置槽的形状,除了具有两侧凹穴侧224a之外,更形成有另一对平行的侧壁。更进一步地,该些接垫222的凹穴底面223a的形状可为长方形,并且该些接垫222的凹穴底面223a 的面积可大于该些金属柱212的顶面213a的面积,以利自我焊接该些金属柱212的顶面213a至该些凹穴底面223a。此外,该些凹穴底面223a的较短边(即接垫222的两凹穴侧224a的距离)不大于对应金属柱212的顶面213a的对应边长(即金属柱212的两平行侧壁214a的距离),故在该芯片210与该基板220接合时,依照图5C箭头所指的超音波振动方向,该些金属柱212的两平行侧壁214a能高频振动摩擦至对应的该些接垫222的两凹穴侧224a,以利自我焊接该些金属柱212的两平行侧壁214a至该些两侧凹穴侧224a。  5A to FIG. 5C are schematic diagrams of the metal pillar chip connection structure 200 in a variant embodiment showing its metal pillars, pads and bonding during the flip-chip bonding process, to illustrate that the top surface and contacts of the metal pillars are not limited. The shape of the pad's pocket floor. As shown in FIG. 5A , the top surface 213a of each metal post 212 can be square, and can have two pairs of parallel side walls 214a that are parallel and equal to each other. Moreover, as shown in FIG. 5B , each pad 222 is recessed to form a shape like a receiving groove. In addition to having two sides of the cavity side 224 a, another pair of parallel side walls is formed. Furthermore, the shape of the bottom surface 223a of the cavity of the pads 222 can be rectangular, and the area of the bottom surface 223a of the cavity of the pads 222 can be larger than the area of the top surface 213a of the metal pillars 212, in order to benefit oneself Weld the top surfaces 213a of the metal pillars 212 to the bottom surfaces 223a of the cavities. In addition, the shorter sides of the bottom surfaces 223a of the cavities (that is, the distance between the two cavities sides 224a of the pads 222) are not longer than the lengths of the corresponding sides of the top surfaces 213a of the corresponding metal pillars 212 (that is, the two parallel side walls of the metal pillars 212). 214a), so when the chip 210 is bonded to the substrate 220, the two parallel side walls 214a of the metal pillars 212 can vibrate to the corresponding The two cavity sides 224a of the pad 222 are used for self-welding the two parallel sidewalls 214a of the metal pillars 212 to the two cavity sides 224a. the

依据本发明的第二具体实施例,另一种免用焊料的金属柱芯片连接构造300举例说明于图6的截面示意图。其中与第一实施例相同的主要组件将以相同符号标示,不再详予赘述。  According to the second embodiment of the present invention, another solder-free metal pillar chip connection structure 300 is illustrated in the schematic cross-sectional view of FIG. 6 . The main components that are the same as those in the first embodiment will be marked with the same symbols and will not be described in detail. the

请参阅图6所示,该免用焊料的金属柱芯片连接构造300主要包含一芯片210与一基板220。该芯片210设有多个金属柱212,突出于该芯片210的一表面211,每一金属柱212具有一顶面213与两平行侧壁214。该基板220具有一上表面221以及多个在该上表面221的接垫222,每一接垫222具有一凹穴底面223与两侧凹穴侧224。其中,该芯片210接合于该基板220的上表面221,该些金属柱212的顶面213自我焊接至该些凹穴底面223,该些金属柱212的两平行侧壁214的局部自我焊接至该些两侧凹穴侧224,以使该些金属柱212与该些接垫222之间形成为无焊料的U形金属键合截面230。较佳地,该些金属柱212可更贯穿该芯片210。更进一步地,该芯片210被该些金属柱212贯穿处可形成有多个贯通孔315,并且每一贯通孔315的孔壁设置有一电镀层316。该些电镀层316可选用导电材料,例如:铜(Cu)。详细而言,该些贯通孔315也就是所谓的硅穿孔(Though Silicon Via,TSV)。藉由该些金属柱212贯穿该芯片210的结构能提供垂直电性导通与稳固该些金属柱212的作用,有助于该芯片210至该些金属柱212的超音波振动传导,以促进该U形金属键合截面230的形成。在本实施例中,该些金属柱212的突出表面211可为该芯片210的背面,故该芯片210的主动面则远离该基板220,以达到较佳散热效果。此外,该些金属柱212的外露端面可立体堆栈另一芯片。  Please refer to FIG. 6 , the solder-free metal pillar chip connection structure 300 mainly includes a chip 210 and a substrate 220 . The chip 210 has a plurality of metal pillars 212 protruding from a surface 211 of the chip 210 , and each metal pillar 212 has a top surface 213 and two parallel sidewalls 214 . The substrate 220 has an upper surface 221 and a plurality of pads 222 on the upper surface 221 , and each pad 222 has a cavity bottom 223 and two cavity sides 224 . Wherein, the chip 210 is bonded to the upper surface 221 of the substrate 220, the top surfaces 213 of the metal columns 212 are self-welded to the bottom surfaces 223 of the cavities, and the parts of the two parallel side walls 214 of the metal columns 212 are self-welded to The cavity sides 224 on both sides form a solderless U-shaped metal bonding section 230 between the metal pillars 212 and the pads 222 . Preferably, the metal pillars 212 can further penetrate the chip 210 . Furthermore, a plurality of through holes 315 may be formed where the chip 210 is penetrated by the metal pillars 212 , and a wall of each through hole 315 is provided with an electroplating layer 316 . The electroplating layers 316 can be made of conductive materials, such as copper (Cu). Specifically, the through holes 315 are also so-called through silicon vias (Though Silicon Via, TSV). The structure through which the metal pillars 212 penetrate the chip 210 can provide vertical electrical conduction and stabilize the metal pillars 212, which is helpful for the ultrasonic vibration conduction from the chip 210 to the metal pillars 212, so as to promote The U-shaped metal bonding section 230 is formed. In this embodiment, the protruding surfaces 211 of the metal pillars 212 can be the back side of the chip 210 , so the active surface of the chip 210 is far away from the substrate 220 to achieve a better heat dissipation effect. In addition, the exposed end surfaces of the metal pillars 212 can be stacked three-dimensionally with another chip. the

以上所述,仅是本发明的较佳实施例而已,并非对本发明作任何形式上的限制,虽然本发明已以较佳实施例揭露如上,然而并非用以限定本发明,任何熟悉本专业的技术人员,在不脱离本发明技术方案范围内,当可利用上述揭示的技术内容作出些许更动或修饰为等同变化的等效实施例,但凡是未脱离本发明技术方案的内容,依据本发明的技术实质对以上实施例所作的任何简单修改、等同变化与修饰,均仍属于本发明技术方案的范围内。  The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Anyone familiar with this field Those skilled in the art, without departing from the scope of the technical solution of the present invention, can use the technical content disclosed above to make some changes or modify equivalent embodiments with equivalent changes, but all the content that does not depart from the technical solution of the present invention, according to the present invention Any simple modifications, equivalent changes and modifications made to the above embodiments by the technical essence still belong to the scope of the technical solutions of the present invention. the

Claims (4)

1.一种免用焊料的金属柱芯片连接构造,其特征在于其包括:1. A solder-free metal post chip connection structure, characterized in that it comprises: 一芯片,设有多个金属柱,突出于该芯片的一表面,每一金属柱具有一顶面与两平行侧壁;A chip is provided with a plurality of metal pillars protruding from a surface of the chip, each metal pillar has a top surface and two parallel side walls; 一基板,具有一上表面以及多个设置在该上表面上的接垫,每一接垫具有一凹穴底面与两侧凹穴侧;以及A substrate having an upper surface and a plurality of pads disposed on the upper surface, each pad having a cavity bottom and two sides of the cavity; and 一底部填充胶,形成于该芯片与该基板之间,以密封该些金属柱;an underfill glue is formed between the chip and the substrate to seal the metal pillars; 其中,该芯片接合于该基板的上表面,该些金属柱的顶面自我焊接至该些凹穴底面,该些金属柱的两平行侧壁的局部自我焊接至该些两侧凹穴侧,以使该些金属柱与该些接垫之间形成为无焊料的U形金属键合截面,并且该些接垫的凹穴深度不大于该些金属柱的高度的三分之一。Wherein, the chip is bonded to the upper surface of the substrate, the top surfaces of the metal pillars are self-welded to the bottom surfaces of the cavities, and parts of the two parallel side walls of the metal pillars are self-welded to the sides of the cavities on both sides, A solder-free U-shaped metal bonding section is formed between the metal posts and the pads, and the depth of the recesses of the pads is not greater than one-third of the height of the metal posts. 2.根据权利要求1所述的免用焊料的金属柱芯片连接构造,其特征在于其中所述的U形金属键合截面为铜-铜界面。2 . The solder-free metal pillar chip connection structure according to claim 1 , wherein the U-shaped metal bonding section is a copper-copper interface. 3 . 3.根据权利要求1所述的免用焊料的金属柱芯片连接构造,其特征在于其中所述的芯片的该表面为一主动面。3 . The solder-free metal pillar chip connection structure according to claim 1 , wherein the surface of the chip is an active surface. 4 . 4.根据权利要求1所述的免用焊料的金属柱芯片连接构造,其特征在于其中所述的金属柱更贯穿该芯片。4. The solder-free metal pillar chip connection structure according to claim 1, wherein the metal pillar further penetrates the chip.
CN2010101110424A 2010-02-01 2010-02-01 Solder-free metal pillar die attach construction Expired - Fee Related CN102142421B (en)

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CN101527271A (en) * 2009-04-17 2009-09-09 中南大学 Chip packaging method using conical bonding pad for thermosonic flip-chip bonding

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