CN102136970B - Parallel multi-channel reconfigurable instrument based on LXI - Google Patents

Abstract

The invention discloses a parallel multi-channel reconfigurable instrument based on LXI, including a substrate, an instrument function board, an FPGA logic circuit, a test program set and a Web server; wherein the substrate and the instrument function board are the main components of the present invention, both Together installed in the instrument box. The former mainly realizes the software functions and hardware logic circuits of the system, and the latter mainly realizes the mutual conversion between analog signals and digital signals. The invention is designed based on the LXI standard, which is convenient for secondary development; the instrument has multi-channel parallel test capability, and each channel can flexibly change the function of the instrument; the use of the instrument does not need to install software, as long as the browser can be used to operate the instrument and perform online testing on the instrument configure.

Description

Parallel multi-channel reconfigurable instrument based on LXI

technical field

The invention relates to a parallel multi-channel reconfigurable instrument based on LXI, which belongs to the field of automatic testing, in particular to the field of general testing based on LXI bus.

Background technique

The development means of the electronic system can be divided into two kinds of methods: hardware method and software method. On the one hand, the development of hardware systems can be customized for specific target tasks, and the operating efficiency is high, but the obvious disadvantages such as long development cycle, large development cost and low flexibility (reusability) limit its development. . The software system can well solve the shortage of the hardware system, but in the high-speed system with large data throughput, the data transmission rate and calculation rate often become the bottleneck of the software system. On the other hand, the development of a software system is inseparable from the hardware system it depends on, so the functions of the software system are limited by the support provided by the hardware system. The respective advantages and disadvantages of hardware system and software system prompt people to put forward the idea of software and hardware integration, and real-time circuit reconfiguration technology is one of the most effective solutions at present.

Although the concept of reconfigurable system (Reconfigurable System) has been proposed as early as the 1970s, due to the lack of ideal reconfigurable devices and other reasons, there has been no great breakthrough in research in this area. Since the 1990s, with the rapid development of large-scale integrated circuits, in terms of hardware, FPGA, the key to the development of reconfigurable processing, has achieved greater development in terms of structure and scale. The biggest characteristic of reconfigurable system is that in the working state of the electronic system, the hardware circuit can be dynamically changed through software to adapt to different specific applications.

In automated testing, the functions of traditional instruments are designed and defined by the manufacturer, and users can only use the established instrument functions. On the one hand, it greatly reduces the flexibility of the instrument; on the other hand, different instruments have independent and complete hardware systems and software systems, which not only causes waste of resources, increases the system size, but also increases the overall cost.

Contents of the invention

The purpose of the present invention is to solve the technical problems of poor use flexibility and low design reuse of traditional instruments, and propose a parallel multi-channel reconfigurable instrument based on LXI, which integrates instrument functions such as multimeter, oscilloscope, DC power supply, and signal generator , and the present invention realizes an instrument architecture based on the LXI standard through an embedded system, and the use of the standard improves the versatility and reusability of the instrument.

The LXI-based parallel multi-channel reconfigurable instrument of the present invention includes a substrate, an instrument function board, an FPGA logic circuit, a test program set and a Web server;

The instrument function board includes an A/D conversion module, a D/A conversion module and a frequency/phase measurement module; the A/D conversion module and the frequency/phase measurement module are connected to the input conditioning circuit, and the D/A conversion module is connected to the output conditioning circuit; the test signal The analog signal quantity in the instrument is input to the input conditioning circuit of the instrument function board, and then converted into a digital quantity by the A/D conversion module and output to the substrate; the frequency signal is input to the input conditioning circuit of the instrument function board, and the frequency/phase measurement module converts it The square wave of TTL level is output to the substrate; the digital quantity output from the substrate to the instrument function board is converted into an analog signal by the D/A conversion module, and then output through the output conditioning circuit;

The instrument function board and the base board are connected through a digital I/O connector;

The substrate includes ARM9 core board, FPGA, CPLD, power management, Ethernet network interface and USB interface, and also has RS232C serial port for debugging; power management provides voltage to the The control bus is connected to the ARM9 core board, and the bottom layer is connected to the instrument function board through a digital I/O connector; after the system is powered on, the configuration module of the CPLD automatically reads the hardware circuit configuration information from the FLASH memory, and configures the logic circuit inside the FPGA; In the case of power-on, if the user needs to change the function of the instrument, send a command from the host computer to the ARM9 core board, and then the ARM9 core board will notify the CPLD to reconfigure the FPGA logic circuit in the FPGA; each I/O port on the instrument bus corresponds to The function of the instrument is redefined by the user;

The FPGA logic circuit is implemented in FPGA, and the test program set and Web server are implemented in the embedded Linux lower computer operating system based on the ARM9 core board;

The underlying instrument sequential logic circuit of the FPGA logic circuit is responsible for communicating with the A/D conversion module and D/A conversion module of the instrument function board, and the bus interface unit on the upper layer is responsible for communicating with the ARM9 core board; the function of the FPGA internal RAM is data storage and Data buffering, the function of SFR is to analyze the control commands sent by the ARM9 core board, RAM and SFR adopt a unified addressing method, which is managed by the bus interface unit of the upper layer;

The bottom layer of the test program set communicates with the FPGA logic circuit through the driver program, and its upper layer communicates with the host computer through the SOCKET protocol; the test program set mainly realizes: 1. Communication with the FPGA logic circuit at the bottom layer, and the control of the logic circuit included in the logic circuit The information of the measured signal is further analyzed and converted into the measurement value related to the function of the instrument; second, the instructions sent by the host computer are distributed to different instruments, and then the instructions are parsed into control information that can be recognized by the FPGA; third, based on the network The C/S model of communication provides a SOCKET server for interacting with the SOCKET client of the host computer;

The user accesses the web page of LXI instrument through the browser of the host computer operating system. The web page is realized through the embedded web server; the web server is realized by the open source BOA server, and the web server also has a built-in SOCKET client based on FLASH for Data communication with the SOCKET server of the test program set; and, the data format of this SOCKET is written in accordance with the program-controlled instrument command standard conforming to the LXI specification; the user downloads, replaces and configures the test program set of the instrument through the webpage to achieve online software purpose of refactoring.

The advantages of the present invention are:

(1) Based on the LXI standard design, it is convenient for secondary development;

(2) The instrument has multi-channel parallel test capability, and each channel can flexibly change the function of the instrument;

(3) The use of the instrument does not need to install software, as long as the instrument can be operated and configured online through the browser.

Description of drawings

Fig. 1 is overall design block diagram of the present invention;

Fig. 2 is a schematic diagram of the overall structure of the hardware of the present invention;

Fig. 3 is the functional block diagram of the analog signal measurement channel and the analog signal output channel of the instrument function board;

Figure 4 is a schematic block diagram of the substrate;

Fig. 5 is a schematic diagram of the software structure of the present invention;

In the picture:

1-Substrate 2-Instrument function board 3-FPGA logic circuit

4-Test assembly 5-Web server 6-Interface board

201-A/D conversion module 202-D/A conversion module 203-Frequency/phase measurement module

Detailed ways

The present invention will be further described in detail with reference to the accompanying drawings and embodiments.

The present invention is a parallel multi-channel reconfigurable instrument based on LXI. As shown in 1, the hardware part mainly includes a substrate 1 and an instrument function board 2, and the software part mainly includes an FPGA logic circuit 3, a test program set 4 and a Web server 5 .

The overall structure of the hardware of the present invention is shown in Figure 2, wherein the substrate 1 and the instrument function board 2 are the main components of the present invention, and both are installed in the instrument box together. The former mainly realizes the software functions and hardware logic circuits of the system, and the latter mainly realizes the mutual conversion between analog signals and digital signals.

For the convenience of users, the user can design the interface board 6 according to the interface requirements of the test signal. The instrument function board 2 is connected to the interface board 6 through a 68-pin chassis cable, and the test signal is input to the instrument function board 2 through the interface board 6.

As shown in Figure 2, the instrument function board 2 includes an A/D conversion module 201, a D/A conversion module 202 and a frequency/phase measurement module 203, and the A/D conversion module 201 and the frequency/phase measurement module 203 are connected to an input conditioning circuit, The D/A conversion module 202 is connected to the output conditioning circuit, and the analog signal quantity in the test signal is input to the input conditioning circuit of the instrument function board 2 through the interface board 6, and then converted into a digital quantity by the A/D conversion module 201 and output to the substrate 1, The frequency signal is input to the input conditioning circuit of the instrument function board 2 through the interface board 6, the frequency/phase measurement module 203 converts it into a TTL level square wave, and outputs it to the substrate 1, and the substrate 1 outputs to the digital quantity of the instrument function board 2 It is converted into an analog signal by the D/A conversion module 202 , and then output to the interface board 6 through the output conditioning circuit.

Specifically, the instrument function board 2 in the present invention includes 4 A/D conversion modules 201, 4 D/A conversion modules 202, 2 frequency/phase measurement modules 203, 4 A/D conversion modules 201 and input conditioning The circuit constitutes 4 analog signal measurement channels, 4 D/A conversion modules 202 and the output conditioning circuit constitute 4 analog signal output channels, 2 frequency/phase measurement modules 203 and the input conditioning circuit constitute 2 dedicated channels for frequency detection, of which The circuit principle block diagram of the analog signal measurement channel and the analog signal output channel is shown in Figure 3.

The analog signal measurement channel includes an input conditioning circuit and an A/D conversion module 201 (ADC), and the analog signal measurement range is -10V～10V. The input conditioning circuit includes over-current protection, input mode selection switch, program-controlled amplifier and low-pass filter. All the tested test signals enter the input conditioning circuit of the instrument function board 2 in differential mode, which reduces the impact of other signals in the circuit on the tested test signal. interference. When the analog signal measurement channel is used as a signal measurement or calibration function, the input analog selector switch responds to connect the positive phase terminal of the tested test signal or the calibration voltage of the DAC to the normal phase terminal of the program-controlled amplifier; on the other hand, When the analog measurement channel is selected as differential, single-ended or AISENSE measurement mode, the analog selector switch connects the inverting terminal, ground or AISENSE of the input signal to the inverting terminal of the program-controlled amplifier accordingly. The program-controlled amplifier adopts AD8250. This chip has good input and output characteristics, and can perform 1, 2, 5, and 10 times of magnification on its magnification, which can be selected by two control pins. The measured measurement signal is converted into a single-ended signal by a program-controlled amplifier, and then input to the ADC chip through a low-pass filter. The ADC adopts AD7898 with 12-bit resolution, and the highest sampling rate is 220kHz. The finally sampled data is output to the FPGA on the base board 2 through the high-speed SPI serial interface in the digital I/O connector.

The analog signal output channel includes a D/A conversion module 202 (DAC) and an output conditioning circuit. The DAC chip adopts AD5620 with 12-bit resolution, its output settling time is 8us, and an external reference source AD780 provides 2.5V standard voltage. The output range of DAC is 0~2.5V, and the output conditioning circuit includes voltage and current selection switch, switched capacitor filter, voltage amplification, calibration selection switch, V/I converter (voltage to current), and the output can be selected through the voltage and current selection analog switch voltage or output current. When outputting voltage, the output signal is filtered by a switched capacitor to smooth the signal, and finally amplified to an output range of -10V to 10V by a voltage amplifier circuit; when outputting current, the voltage is converted by a V/I converter (voltage to current) Converted to the corresponding amount of current. The switched capacitor filter adopts MAX7424 low-pass filter chip, and its filter frequency band is 1Hz ~ 30kHz, and the cut-off frequency of the filter can be controlled by the clock input pin. .

For frequency signal measurement, the instrument function board 2 uses a dedicated frequency measurement channel. In this channel, the measured signal is first amplified by the feedback amplifier circuit, then enters the comparator LM311N to shape the square wave signal, then stabilizes the square wave signal through the SN740 and converts it into a TTL level, and finally outputs it through the digital I/O connector to FPGA.

The reconfigurable hardware is mainly realized through the FPGA on the substrate 1 . The substrate 1 is shown in Fig. 2, including ARM9 core board, FPGA, CPLD, power management, Ethernet network interface and USB interface. The instrument function board 2 and the substrate 1 are connected through two 64-pin board-to-board connectors (that is, the digital I/O connector in Figure 3), which is beneficial for users to design different instrument function boards according to different test objects and performance requirements 2. There is no need to replace other instrument parts, which improves the flexibility and reusability of the system. In the hardware architecture of the substrate 1, the present invention adopts the ARM9 core board + FPGA as the core, and combines the former's high performance, low power consumption and the latter's respective advantages of parallel processing and configurable algorithms to form the carrier of the software and hardware reconfigurable system . In terms of software architecture, the embedded operating system runs on the ARM9 core board 101, which can conveniently develop and manage network communication-related functions and realize the LXI interface of the instrument. In addition, there is a power management on the substrate 1, which provides four common voltages for the substrate 1 and the instrument function board 2: +12V, -12V, 5V, 3.3V. In terms of interface design, in addition to the Ethernet network interface, the substrate 1 retains the USB interface and the RS232C serial port, which is convenient for instrument debugging and future function upgrades.

The schematic circuit diagram of substrate 1 is shown in Figure 4, where the FPGA is located at the center of the reconfigurable instrument, its upper layer is connected to the ARM9 core board through the data/address/control bus, and the bottom layer is connected to the instrument through the digital I/O connector Function board 2 is connected. For example, when the system is used as a multimeter function, the FPGA first processes the data collected by the ADC, and then ARM9 reads it through the data bus; for another example, when the system is used as a signal generator function, ARM9 will control the corresponding The FPGA outputs the control timing of the DAC, thereby controlling the DAC to output the corresponding analog value.

FPGA is a volatile device based on SRAM technology and supports real-time circuit reconfiguration. Its internal hardware circuit information will be lost after power-off, so an external storage device is required. After the system is powered on, the CPLD configuration module automatically reads the hardware circuit configuration information from the FLASH, and configures the logic circuit inside the FPGA. In the case of power-on, if the user needs to change the function of the instrument, just send a command from the host computer to ARM9, and then ARM9 will notify the CPLD to reconfigure the FPGA logic circuit 3. In addition, since the FPGA is connected to the test function board 2 through two 64-pin digital I/O connectors, the instrument function corresponding to each I/O port on the instrument bus can be redefined by the user. The reconfiguration of the FPGA logic circuit 3 and the redefinition of the digital I/O interface lead to corresponding changes in the functions of the instrument hardware, and finally realize the online reconfiguration of the instrument hardware functions.

FIG. 5 is a block diagram of the software structure of the instrument, including an FPGA logic circuit 3 , a test program set 4 and a Web server 5 . Among them, FPGA logic circuit 3 is implemented in FPGA, and test program set 4 and Web server 5 are implemented in ARM9-based embedded Linux lower-position computer operating system.

The underlying instrument sequential logic circuit of the FPGA logic circuit 3 is responsible for communicating with chips such as A/D and D/A of the instrument function board 2, and its upper bus interface unit is responsible for communicating with the ARM9 core board. In addition, the function of FPGA internal RAM is data storage and data buffering, and the function of SFR (Specific Functional Register, special function register) is to analyze the control commands sent by ARM9. RAM and SFR adopt a unified addressing method, which is managed by the bus interface unit of the upper layer.

The bottom layer of the test program set 4 communicates with the FPGA logic circuit 4 through the driver program, and its upper layer communicates with the host computer through the SOCKET (socket) protocol. The test program set 4 mainly realizes the following three functions: 1. communicate with the FPGA logic circuit at the bottom layer, further analyze the information of the signal under test contained in the logic circuit, and convert it into a measurement value related to the instrument function (such as a multimeter's Voltage value); 2. Distribute the instructions sent by the host computer to different instruments (such as multimeters, oscilloscopes, etc.), and then parse the instructions into control information that can be recognized by FPGA; 3. Based on the C/S model of network communication, Provide a SOCKET server for interacting with the SOCKET client of the host computer.

The user can access the web page of the LXI instrument through the browser of the host computer operating system, and the web page is realized through the embedded Web server 5 . The web server is implemented by the open source BOA server. BOA is a small single-task HTTP server, which is very suitable for application in embedded systems. The dynamic web page effect of the BOA server is realized through the "Common Gateway Interface" (CGI, Common Gateway Interface) technology, which provides an interface for the interaction between the dynamic information of the web page and the test program set 4. In addition to the BOA server, Web server 5 also has a built-in SOCKET client based on FLASH, which is used for data communication with the SOCKET server of test program 4. Moreover, the data format of this SOCKET is written in accordance with the LXI specification of the program-controlled instrument command standard (SCPI, Standard Command for Programmable Instrument), which is helpful for users to carry out secondary development. In addition, the user can download, replace and configure the test program set 4 of the instrument through the webpage, so as to achieve the purpose of online reconfiguration of the software.

Claims (8)

1. based on the parallel multi-channel restructural instrument of LXI, it is characterized in that, comprise substrate, instrumental function plate, fpga logic circuit, test program set and Web server;

The instrumental function plate comprises A/D modular converter, D/A modular converter and frequency/phase measurement module; The A/D modular converter is connected the input modulate circuit with the frequency/phase measurement module, the D/A modular converter connects the output modulate circuit; Analog signal amount in the test signal inputs to the input modulate circuit of instrumental function plate, then converts digital output to substrate through the A/D modular converter; Frequency signal inputs to the input modulate circuit of instrumental function plate, and the frequency/phase measurement module is converted into the square wave of Transistor-Transistor Logic level, exports substrate to; The digital quantity that substrate exports the instrumental function plate to converts analog signal to through the D/A modular converter, then by the output of output modulate circuit;

The instrumental function plate is connected digital I/O connector and connects with substrate;

Substrate comprises ARM9 core board, FPGA, CPLD, power management, ethernet network interface and USB interface, also is provided with in addition the RS232C serial ports for debugging; Power management provides voltage to substrate and instrumental function plate, and the upper strata of FPGA links to each other with the ARM9 core board by data/address/control bus, and bottom links to each other with the instrumental function plate by digital I/O connector; After system powered on, the configuration module of CPLD read the hardware circuit configuration information from the FLASH memory automatically, the logical circuit of configuration FPGA inside; Under electrifying condition, if the user need to change instrumental function, send order to the ARM9 core board from host computer, reconfigure fpga logic circuit among the FPGA by ARM9 core board notice CPLD again; The corresponding instrumental function of each I/O mouth on the instrument bus is redefined by the user;

The fpga logic circuit realizes that in FPGA test program set and Web server are to realize in the built-in Linux slave computer operating system based on the ARM9 core board;

The bottom instrument sequential logical circuit of fpga logic circuit is responsible for communicating by letter with A/D modular converter, the D/A modular converter of instrumental function plate, and the Bus Interface Unit on its upper strata is responsible for communicating by letter with the ARM9 core board; The function of FPGA internal RAM is that data are deposited and data buffering, and the function of SFR is that the control command that the ARM9 core board is sent is resolved, and RAM and SFR take the mode of unified addressing, and unified Bus Interface Unit by the upper strata manages it; SFR represents the special function register;

The bottom of test program set communicates by driver and fpga logic circuit, and its upper strata communicates by SOCKET agreement and host computer; Test program set is mainly realized: one, with the fpga logic circuit communication of bottom, the information that is included in the measured signal in the logical circuit is done further to resolve, be converted into the measured value relevant with instrumental function; The instruction of two, host computer being sent is distributed to different instruments, then instruction is resolved to the control information that can be identified by FPGA; Three, the C/S model of communication Network Based provides a SOCKET server, is used for carrying out alternately with the SOCKET client of host computer;

The user is by the webpage of the browser access LXI instrument of host computer operating system, and this webpage is realized by embedded web server; Web server adopts the BOA server increase income to realize, SOCKET client based on FLASH that Web server is also built-in, be used for and the SOCKET server of test program set between data communication; And the data format of this SOCKET is all write with the programmable instrument command standard that meets the LXI standard; The user reaches the purpose of software on-line reorganization by the test program set of page download, replacing and configure instrument.

2. the parallel multi-channel restructural instrument based on LXI according to claim 1 is characterized in that substrate and instrumental function plate are installed in the instrument container jointly.

3. the parallel multi-channel restructural instrument based on LXI according to claim 1 is characterized in that, instrumental function plate connecting interface plate, and test signal inputs to the instrumental function plate by interface board.

4. the parallel multi-channel restructural instrument based on LXI according to claim 1, it is characterized in that, the instrumental function plate comprises 4 A/D modular converters, 4 D/A modular converters, 2 frequency/phase measurement modules, 4 A/D modular converters consist of 4 tunnel analog signals with the input modulate circuit and measure passage, 4 D/A modular converters consist of 4 road analog signal output passages with the output modulate circuit, and 2 frequency/phase measurement modules consist of 2 tunnel frequency detecting designated lanes with the input modulate circuit.

5. the parallel multi-channel restructural instrument based on LXI according to claim 4 is characterized in that, analog signal is measured passage and comprised input modulate circuit and A/D modular converter, and the analog signal measuring range is-10V～10V; The input modulate circuit comprises overcurrent protection, input pattern selector switch, programmable amplifier and low-pass filtering, all tested test signals enter the input modulate circuit of instrumental function plate with difference modes, when this analog signal is measured passage as signal measurement or calibration function, input analog selector switch response, the calibration voltage of the positive terminal of tested test signal or DAC is linked into the positive terminal of programmable amplifier; On the other hand, when this analogue measurement channel selecting is difference, single-ended or AISENSE measurement pattern, analog selector switch correspondingly the end of oppisite phase of input signal, or AISENSE be linked into the backward end of programmable amplifier; Programmable amplifier adopts AD8250, and tested measuring-signal is converted to single-ended signal through programmable amplifier, is input to the ADC chip through low pass filter again; ADC adopts the AD7898 of 12 bit resolutions, and high sampling rate is 220kHz, and the data communication device that samples is at last crossed among the FPGA that the high-speed figure I/O connector outputs to substrate.

6. the parallel multi-channel restructural instrument based on LXI according to claim 4 is characterized in that, the analog signal output passage comprises D/A modular converter and output modulate circuit; The DAC chip adopts the AD5620 of 12 bit resolutions, and it exports settling time is 8us, and has outside reference source AD780 that the 2.5V normal voltage is provided; The output area of DAC is 0～2.5V, and the output modulate circuit comprises electric current and voltage selector switch, switch-capacitor filtering, voltage amplification, calibration selector switch, V/I transducer, selects analog switch can select output voltage or output current through electric current and voltage; When output voltage, output signal makes the signal cunning that flattens through switch-capacitor filtering, is amplified to-output area of 10V～10V finally by the overvoltage amplifying circuit; When output current, by the V/I transducer voltage is converted to the corresponding magnitude of current; Switch-capacitor filtering adopts the MAX7424 low-pass filter, and its filtered band is 1Hz～30kHz, and the cut-off frequency of filter can be by the control of clock input pin.

7. the parallel multi-channel restructural instrument based on LXI according to claim 4, it is characterized in that, in the frequency detecting designated lane, measured signal is at first amplified through feedback amplifier, then enter comparator LM311N shaping and obtain square-wave signal, stablize square-wave signal and convert Transistor-Transistor Logic level to by SN740 again, finally export FPGA to by digital I/O connector.

8. the parallel multi-channel restructural instrument based on LXI according to claim 1, it is characterized in that, redefining of fpga logic circuit and digital I/O connector interface makes the function of instrument hardware that corresponding change also occur, and realizes the on-line reorganization to the instrument hardware function.

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