CN102129881A - Solid-state storage disk device and system suitable for peripheral component interconnection express interface - Google Patents

Abstract

A solid-state storage disk device and system for a peripheral component interconnect express interface is disclosed. The peripheral interconnection Express is the PCI Express standard, which is commonly called as the peripheral interconnection Express, and the present application utilizes a basic input/output system (BIOS) program on a storage device to be imported into a host boot program to start a solid-state disk, and loads an operating system stored in the solid-state disk into a system memory to execute and mount device driver software, thereby completing the boot program. At the same time, in the machine body structure portion, the groove design at the PCI Express interface is utilized, an elastic body is designed outside the solid storage disk device to form a hook claw structure to be embedded into the groove body, so that the assembly of the solid storage disk and the system mainboard is more stable, the severe operation environment of industrial application is fully met, the high-speed interface characteristic of the PCI Express is utilized, the data reading and writing speed is greatly improved, and the host system can be designed to remove redundant disk interfaces such as SATA/IDE and the like, so that the design efficiency of the industrial embedded mainboard is further improved.

Description

Solid-state storage disk device and system suitable for peripheral interconnection fast interface

technical field

The present invention is a design method of a solid-state disk, which uses a software program to complete the boot action of the PCI Express interface and combines the design of the interface structure to strengthen the connection stability of the device.

Background technique

Existing modular products of solid-state disk storage devices are based on general I/O buses, such as Integrated Device Electronics (IDE), Serial Advanced Technology Attachment (SATA), universal Serial bus (Universal Serial Bus, USB) and other interface technologies. The storage data is transmitted through the system south bridge chip and the central processing unit through the I/O bus. However, if the internal high-speed bus of PCI Express is used to transmit and store data, the data transmission rate of the interface will be greatly improved, because the distance between the device and the CPU can be shortened by using the internal bus of the system, and the signal can be reduced. Compared with the traditional SATA interface, it can reduce the energy consumption of SATA embedded serial-to-parallel conversion (SerDes). In addition, in order to increase the storage capacity and interface speed, the current solid-state disk storage device based on PCI Express needs a large circuit board space to place the flash memory (Flash Memory) array, so it is difficult to reduce its size. As for the highly integrated industrial system (Embedded System), it requires a relatively short modular solid-state disk storage device, so the existing PCI Express solid-state disk storage device cannot meet the needs of industrial systems in assembly, especially the system-on-a-chip ( System On Chip (SOC) is the system architecture, which requires the design of the external storage device bus for the highly integrated electronic circuit system.

Therefore, in order to improve the above-mentioned shortcoming, the inventor pooled his wisdom, repeated research and verification, and initially invented the "solid-state storage disk device and system suitable for peripheral interconnection quick interface" of this case.

Contents of the invention

The object of the present invention is to propose a kind of solid-state storage disk device and system suitable for peripheral interconnection fast interface, to greatly improve the connection defect of the module of the solid-state flash memory block of traditional interface, and reduce the device of traditional PCI Express flash memory device size.

In order to achieve the above-mentioned purpose, the solid-state storage disk device suitable for the interconnection of peripherals proposed by the present invention includes: a host bus converter; a memory controller; a memory unit; a fixing fixture; and a printed circuit plate. The host bus converter is connected to a PCI Express interface to handle signal conversion; the memory unit provides storage media as a device; the memory controller is connected to the host bus converter and the memory unit to read data from the memory unit and write and plan and manage the memory unit; the host bus converter, the memory unit, and the memory controller are arranged on the printed circuit board, and have the necessary circuit layout; the fixing fixture provides the ability to fix the device, One end of the printed circuit board forms a gold finger (Edge Connector) structure, which provides the connection of PCI Express signals and the necessary power supply and power transmission, and can be embedded in the connection slot of standard PCI Express; the host bus converter and memory controller They are connected by a disk interface.

In order to achieve the above-mentioned purpose, a kind of solid-state storage disk system that is applicable to the interconnection of peripherals provided by another embodiment of the present invention includes: a PCI Express interface connector, a memory unit, a chip, and a printed circuit board , and a fixing fixture. The PCI Express interface connector has a slot; the memory unit provides a storage medium as a device; the chip has a host bus converter and a memory controller, wherein the host bus converter is used to handle signal conversion, and the memory controller performs signal conversion on the memory unit. Reading and writing of data and planning and management of the memory unit; the chip and the memory unit are set on the printed circuit board and have the necessary circuit layout to connect the chip and the memory unit; the fixture for fixing is to provide the ability to fix the printed circuit board ; Wherein one end of the printed circuit board forms a gold finger structure, which provides the connection of PCI Express signals and the necessary power supply power transmission, and can be embedded in the slot of the PCI Express interface connector; at the same time, the fixing fixture can be used with PCI Express The interface connector is inserted and allows the printed circuit board to be inserted and positioned so that the signals of the printed circuit board are connected to the PCI Express interface signals.

Description of drawings

For other purposes and effects of the present invention, please refer to the accompanying drawings and embodiments, which are described in detail as follows, wherein:

Figure 1 is a block diagram of the electronic circuit design of the device in this case.

Figure 2 is a schematic diagram of the standard X1 PCI Express connector.

Figure 3 is a schematic diagram of the structure of the device in this case.

Figure 4 is a schematic diagram of the embedded combination of the device in this case and the PCI Express connector.

Figure 5 is a schematic diagram of the combination of sliding sleeve principle and PCI Express connector embedded in the device of this case.

Detailed ways

The concrete content of this case invention is described as follows. First, please refer to the system block diagram in Figure 1. Fig. 1 shows the electronic circuit design block diagram of this case, wherein 110 is a host bus converter (Host Bus Adapter), in this case, take the VT6415 chip as an example, 111 is a memory controller, this case uses the flash memory controller ( Flash Memory Controller) as an example, both use common disk interfaces, such as Advanced Technology Attachment (Advanced Technology Attachment, ATA), Serial Advanced Technology Attachment (Serial Advanced Technology Attachment, SATA), Small Computer System Interface (Small Computer System Interface, SCSI) Or serial attached small computer system interface (Serial AttachedSCSI, SAS), connect the signal and thus issue the host command from the 120 PCI Express interface to the 111 flash memory controller, and the 120 PCI Express interface channel design can be based on the data transmission speed of the device X1, X4, X8 or X16 channel link width design (Link Widths) is adopted according to the requirements. In this case, the channel link width of X1 is used as a design example to achieve the purpose of device miniaturization. If the channel link width of X16 is used, it can be The height of the device is greatly reduced to achieve the same miniaturization purpose. If further utilizing semiconductor miniaturization technology, the 110 host bus adapter (Host Bus Adapter) and the 111 memory controller can be integrated into a single chip, and an appropriate interface can be used inside the single chip to handle data transmission, for example, using The AMBA interface is used in ARM-based chips, which can save the more complicated SATA interface and reduce the cost of the chip. The 111 flash memory controller is then connected to the 112 flash memory array composed of a plurality of NAND flash memories, and directly reads and writes data to the 112 flash memories through the 111 controller, and the memory is averagely worn ( Wear-Leveling) optimization processing and garbage collection (Garbage Collection) actions to improve the efficiency of memory usage. The 113 power processing circuit filters the power supply noise supplied by the host system and provides it to each electronic component. 114 is a read-only memory (ReadOnly Memory), which is connected with the 110 host bus converter, and stores all the information when starting up. Basic Input/Output System (BIOS) information required. Currently, there is no standard operating system driver software for the disk system with PCI Express interface, so the BBS (BIOS Boot Specification) must be followed to regulate how the system BIOS selects the boot device when processing the system boot process, which is mainly for identification The initial program load (Initial ProgramLoad, IPL) device in the system, then visits each IPL device and checks whether it can start the system, and the data stored in the 114 ROM is to provide the system with various interrupts required for identifying the IPL device Parameters and pointers, so that the boot pointer of the system BIOS points to the flash disk device of this case to load the operating system. The 114 ROMs can also be completed by using the internal storage space of the 112 flash memory, so as to further reduce the 114 ROMs and reduce the cost. If the industry develops relevant software standards in this respect in the future, the BIOS of the system will support the disk boot configuration of the PCIE interface, and the device designed in this case no longer needs 114 ROMs.

From the above, it can be known that this case simplifies the electronic circuit of the traditional PCIExpress solid-state memory storage device based on the redundant array of independent disks (Redundant Array of Independent Disks, RAID), which greatly reduces the circuit cost and reduces heat dissipation. In line with the design goals of green industry.

As for the structural design of the device, please refer to FIG. 2 . Figure 2 shows the standard X1 PCIExpress connector, in which slot 210 is used to provide the embedded connection signal of the device in this case, and there are multiple metal contacts inside. For detailed explanation, please refer to FIG. 3 again. Fig. 3 is a schematic diagram of the structure of the device in this case, wherein 310 printed circuit board is the body of the device, and relevant electronic circuits are laid out on it to provide the setting and connection of various components in Fig. 1, and 320 is the gold finger of the PCI Express interface, and its size can be It is embedded in the 210 slot, and the metal contacts inside the 210 slot conduct signals. Please refer to Figure 2 and Figure 3 again, where 220 protruding conductors are formed on the body of the 200 connector, and the 400 fixing clip is composed of an elastic body, which is fixed on the 310 printed circuit board, when the device is inserted into the connection After the connector, the 400 fixing clip can bite the 220 protruding conductor to fix the device, as shown in Figure 4, so that the solid-state storage device can be firmly connected with the connector, and the system's resistance to severe vibration environments can be improved. In addition, in the design of the 400 clamp, the structure of the 220 protruding conductor can also be used to design the concept of the sliding sleeve, that is, the 400 clamp is designed as a 410 sliding sleeve to engage the connector. Please refer to Figure 5, where The 400 fixing clip can slide on the body of the 200 connector. The principle is to use the 220 protruding conductor as the track of the sliding sleeve and clamp the 200 connector; and when the device is inserted into the 210 slot, it is located on the 310 printed circuit board. The 311 locating holes on the top will embed the 420 locating plugs in the 311 locating holes due to the elastic stress of the 400 fixing clips to fix the device on the connector, and the 400 fixing clips are also thus positioned to stop sliding. This design makes it unnecessary to fix the 400 clip on the device. You only need to slide the 400 clip into the 200 connector during assembly, and then insert it into the device. After locking it, a very stable interface connection can be completed. This separate design also simplifies the production and assembly process of the device itself and improves the reliability and efficiency of product packaging.

As mentioned above, this case uses the PCI Express interface to design a flash memory device with high speed and low power consumption, and removes excessive flash memory components to reduce the size of the device and make it more efficient to use the space of the industrial host system. Improve the ability of device integration, although this device can only provide limited storage capacity, on the one hand, with the continuous improvement of semiconductor miniaturization technology, the storage capacity provided by the unit area of the chip has been continuously improved; on the other hand, Its streamlined operating system and application programs don't require gigabytes of storage for task-specific industrial system designs. Therefore, for the design of industrial embedded systems, the modular design of the device in this case can fully meet the operating requirements of the system for memory capacity. Furthermore, its unique connection mechanism design provides a more stable connection capability than traditional SATA/USB DOM (Disk On Module, solid-state disk module), which solves the problem of loose connection of SATA/USB DOM that was a headache in the past. The cause of this problem is that the interface design of SATA/USB is not suitable for the connection of embedded devices. However, the design of the golden finger in this case is indeed the best design method for the connection of an embedded system, and the design of the external fixing clip is supplemented to form a highly earthquake-resistant connection structure. It cannot but be called a new and progressive design solution.

The solid-state storage disk device and system suitable for the fast interface of peripheral interconnection disclosed by the present invention can greatly improve the connection defects of the solid-state flash memory storage module of the traditional interface, and reduce the device size of the traditional PCI Express flash memory storage device, streamline its Complex electronic circuits make it more suitable for industrial integrated systems.

However, what is disclosed in this case is a preferred embodiment, and any partial changes or modifications derived from the technical idea of this case and easily deduced by those familiar with the technology are all within the scope of the patent right of this case.

To sum up, the purpose, means and efficacy of this case are different from the known technical features and meet the requirements of a patent for an invention, so a patent application is filed according to law.

Claims (11)

1. solid-state stored disk device that is applicable to the prompt interface of the interconnected speed of peripheral hardware, it mainly is made of following elements:

One host bus converter, it connects a PCI Express interface, with the work of processing signals conversion;

One memory cell, it provides the Storage Media as device;

One Memory Controller, it connects this host bus converter and this memory cell, this memory cell carried out reading of data and to write and memory cell is done planning and managed;

One printed circuit board (PCB) is provided with this host bus converter, this memory cell, reaches this Memory Controller, and has the necessary circuit layout on it; And

The one fixing anchor clamps of using, the ability that generator is fixing;

Wherein an end of this printed circuit board (PCB) forms a golden finger structure, the binding of PCI Express signal and necessary power transmission is provided, and can be embedded in the connection slot of Standard PC I Express; Then be connected between this host bus converter and this Memory Controller by a disk interface.

2. the solid-state stored disk device that is applicable to the prompt interface of the interconnected speed of peripheral hardware as claimed in claim 1, memory cell wherein is made up of at least one non-volatility memorizer.

3. the solid-state stored disk device that is applicable to the prompt interface of the interconnected speed of peripheral hardware as claimed in claim 2, non-volatility memorizer wherein is a flash memories.

4. the solid-state stored disk device that is applicable to the prompt interface of the interconnected speed of peripheral hardware as claimed in claim 1 wherein further comprises a ROM (read-only memory), and this ROM (read-only memory) is connected with the host bus converter.

5. BIOS required when the solid-state stored disk device that is applicable to the prompt interface of the interconnected speed of peripheral hardware as claimed in claim 4, ROM (read-only memory) inside wherein are the storage device start interrupts data and instruction.

6. the solid-state stored disk device that is applicable to the prompt interface of the interconnected speed of peripheral hardware as claimed in claim 1, wherein fixing are to be fixed on the printed circuit board (PCB) with anchor clamps, and the ability that clamping PCI Express connector connects with intensifying device that is used for is provided.

7. the solid-state stored disk device that is applicable to the prompt interface of the interconnected speed of peripheral hardware as claimed in claim 1, disk interface wherein is ATA, SATA, SCSI or SAS interface.

8. the solid-state stored disk device that is applicable to the prompt interface of the interconnected speed of peripheral hardware as claimed in claim 1, PCI Express interface wherein is X1, X4, the passage link width of X8 or X16.

9. BIOS required when the solid-state stored disk device that is applicable to the prompt interface of the interconnected speed of peripheral hardware as claimed in claim 1, the part storage space of memory cell inside wherein are the storage device start interrupts data and instruction.

10. the solid-state stored disk device that is applicable to the prompt interface of the interconnected speed of peripheral hardware as claimed in claim 1, wherein host bus converter and Memory Controller are to integrate to become one chip.

11. a solid-state stored disk system that is applicable to the prompt interface of the interconnected speed of peripheral hardware, it mainly is made of following elements:

One PCI Express interface connector, it has slot;

One memory cell, it provides the Storage Media as device;

One chip, it has host bus converter and Memory Controller, and wherein the host bus converter is used for the work of processing signals conversion, and Memory Controller then carries out reading of data to memory cell and writes and memory cell is done planning and management;

One printed circuit board (PCB) is provided with this chip and memory cell and has the necessary circuit layout to connect chip and memory cell on it; And

One fixing use anchor clamps, the ability that provides printed circuit board (PCB) to fix;

Wherein an end of this printed circuit board (PCB) forms a golden finger structure, the binding of PCI Express signal and necessary power transmission is provided, and can be embedded in the slot of PCI Express interface connector; Fixing simultaneously with anchor clamps be can with PCI Express interface connector mutually down go into and allow the printed circuit board (PCB) insertion and locate and make the signal of printed circuit board (PCB) be connected with PCI Express interface signal.

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