CN102129827B - Digital-to-analog converter, drive device for display, and image data conversion method - Google Patents
Digital-to-analog converter, drive device for display, and image data conversion method Download PDFInfo
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Abstract
本发明提供了一种数字类比转换器、显示器的驱动装置及图像数据转换方法，此数字类比转换器包括一灰阶判决电路与一脉波分段单元。灰阶判决电路根据图像数据的数值输出一判断信号至脉波分段单元，脉波分段单元连接灰阶判决电路以接收判断信号，然后根据判断信号选择不同数值顺序的参考信号来与图像数据进行比较以产生不同数目的子工作周期以避免画面闪烁及脉波失真损耗。
The present invention provides a digital-to-analog converter, a display driving device and an image data conversion method. The digital-to-analog converter includes a grayscale decision circuit and a pulse segmentation unit. The grayscale decision circuit outputs a decision signal to the pulse segmentation unit according to the value of the image data. The pulse segmentation unit is connected to the grayscale decision circuit to receive the decision signal, and then selects reference signals of different numerical sequences according to the decision signal to compare with the image data to generate different numbers of sub-duty cycles to avoid screen flickering and pulse distortion loss.
Description
Technical field
The invention relates to a kind of digital analogue converter, and particularly relevant for a kind of digital analogue converter, drive unit and image data conversion method thereof that is applied to light emitting diode indicator.
Background technology
The volume of light emitting diode (Light Emitting Diode, LED) is little, power saving and durable, and along with the maturation of processing procedure, prices, recently more and more general as the product of light source with light emitting diode.In addition, light emitting diode operating voltage low (only 1.5-3V), can active illuminating and certain brightness is arranged, brightness voltage available or electric current are regulated, possess simultaneously shock-resistant, anti-vibration, the characteristics in life-span long (100,000 hours), therefore, light emitting diode is widely used in various terminal devices, from car headlamp, traffic lights, indicator by character, billboard and giant-screen video display, to fields such as common and architectural lighting and LCD are backlight.
The driving circuit of light emitting diode can utilize pulse wave width modulation (Pulse Width Modulation, PWM) signal to adjust the brightness of light emitting diode usually, also can be described as the GTG value.Driving circuit decides the ON time of light emitting diode according to the work period in the pwm signal, can determine the GTG value of display with this.Yet, owing to having the problem of image update rate deficiency in the existing pwm signal, can cause image flicker like this.For overcoming the film flicker phenomenon, the work period that prior art is right with image gray-scale level disperses to be reduced in the harmonic wave signal energy in the human eye visual range, but excessive dispersion treatment will cause the image signal distortion.
Summary of the invention
The invention provides a kind of digital analogue converter of Adaptive Control and the drive unit of display, can be applicable in the driving circuit of light emitting diode indicator, this digital analogue converter can be divided into the different sub-work periods with raising image update rate with its work period according to the shade of gray of view data, and avoids simultaneously the problem of distortion loss.
The invention provides a kind of conversion method of view data, it is according to the shade of gray of view data, its work period is divided into the different sub-work periods so that the image update rate to be provided, and avoids simultaneously the problem of distortion loss.
Hold above-mentionedly, the invention provides the drive unit of a kind of digital analogue converter and display, drive unit comprises digital analogue converter and driving circuit, in order to drive LED display panel.Above-mentioned digital analogue converter comprises a GTG decision circuit and a pulse wave segmenting unit, wherein the GTG decision circuit is judged signal according to the numerical value output one of view data, this judges that signal is positioned at one first numerical value interval or second value interval in order to the numerical value of presentation video data, wherein the numerical value in second value interval is greater than the numerical value in the first numerical value interval, and the numerical value of view data is corresponding to a work period.The pulse wave segmenting unit is connected in the GTG decision circuit to receive this judgement signal, when the numerical value of view data was positioned at the first numerical value interval, the pulse wave segmenting unit was divided at most N sub-work period to produce a segmentation pulse wave signal with the corresponding work period of view data.When the numerical value of view data is positioned at second value when interval, the pulse wave segmenting unit is divided at most M sub-work period to produce this segmentation pulse wave signal with the corresponding work period of view data, and wherein M, N are that positive integer and M are greater than N.
In an embodiment of the present invention, the summation of an above-mentioned N sub-work period or above-mentioned M work period equals in fact this work period.
In an embodiment of the present invention, above-mentioned pulse wave segmenting unit comprises a sequence counter, an output regulation circuit and a digital comparator.Sequence counter is in order to export a reference signal, and the bit number of reference signal is identical with the bit number of view data.Output regulation circuit is connected in sequence counter and GTG decision circuit, adjusts the bit-order of reference signal to produce a segment reference signal according to the judgement signal.Digital comparator is connected in output regulation circuit, in order to compare segment reference signal and view data to produce the segmentation pulse wave signal.Wherein, when the numerical value of view data was positioned at the first numerical value interval, segment reference signal was corresponding to one first bit-order.When the numerical value of view data was positioned at the second value interval, segment reference signal was corresponding to one second bit-order.
Above-mentioned output regulation circuit comprises a plurality of selection circuit, is connected in the reference signal that GTG decision circuit and sequence counter are exported.Described selection circuit is adjusted the bit-order of reference signal to produce segment reference signal according to the judgement signal.Wherein, the first input end that respectively should select circuit respectively should select one second input end of circuit corresponding to this second bit-order corresponding to this first bit-order.
From another perspective, the present invention proposes a kind of conversion method of view data, be applicable to the drive unit of a display, above-mentioned conversion method comprises the following steps: at first, signal is judged in numerical value output one according to a view data, judge that signal is positioned at one first numerical value interval or second value interval in order to the numerical value of presentation video data, wherein the numerical value in second value interval is greater than the numerical value in the first numerical value interval, and the numerical value of view data is corresponding to a work period.When the numerical value of view data is positioned at the first numerical value interval, the corresponding work period of view data is divided at most N sub-work period to produce a segmentation pulse wave signal; When the numerical value of view data is positioned at second value when interval, the corresponding work period of view data is divided at most M sub-work period to produce the segmentation pulse wave signal, wherein M, N are that positive integer and M are greater than N.Wherein an above-mentioned N sub-work period or above-mentioned M work period summation equals in fact this work period.
Based on above-mentioned, the present invention proposes a kind of digital analogue converter, drive unit and image data conversion method thereof of Adaptive Control, and it can compare to produce according to the numerical value (shade of gray) of view data the sub-work period of different numbers with the reference signal of different bit-order.When high gray is spent, be divided into the sub-work period of more number relatively its work period to improve the turnover rate of picture, when low shade of gray, its work period is divided into relatively the sub-work period of minority purpose to avoid waveform distortion.
For above-mentioned feature and advantage of the present invention can be become apparent, embodiment cited below particularly, and cooperate accompanying drawing to be described in detail below.
Description of drawings
Fig. 1 is the driving device structure schematic diagram of the display of one embodiment of the invention;
Fig. 2 is four bit output regulation circuits of first embodiment of the invention;
Fig. 3 (a)～Fig. 3 (c) is the bit-order of reference signal BS and the segment reference signal DBS of first embodiment of the invention;
Fig. 4 (a)～Fig. 4 (c) is the oscillogram of the segmentation pulse wave signal PDM of first embodiment of the invention;
Fig. 5 is the conversion method process flow diagram of the view data of second embodiment of the invention.
Main element symbol description in the accompanying drawing:
The 100-drive unit; The 101-display;
The 105-digital analogue converter; 120-pulse wave segmenting unit;
The 122-sequence counter; 124,224-output regulation circuit;
The 126-digital comparator; 130-GTG decision circuit;
The 140-driving circuit; The 150-display panel;
210,220,230,240-selects electricity
The 410-work period;
The road;
421～424, sub-work week of 432～438-
The ID-view data;
Phase;
SET-judges signal; PDM-segmentation pulse wave signal;
SET-judges signal; The BS-reference signal;
The DBS-segment reference signal; C[3], C[2], C[1], C[0]-reference signal
The bit of BS;
S510～S540-step.
Embodiment
Please refer to Fig. 1, Fig. 1 is the driving device structure schematic diagram of the display of one embodiment of the invention.Display 101 comprises drive unit 100 and display panel 150, and drive unit 100 is connected in display panel 150, drives display panel 150 according to view data ID.The display that display panel 150 can form for light-emitting diode.Drive unit 100 comprises digital analogue converter 105 and driving circuit 140, and wherein digital analogue converter 105 also comprises pulse wave segmenting unit 120 and GTG decision circuit 130.Pulse wave segmenting unit 120 comprises sequence counter 122, output regulation circuit 124 and digital comparator 126.GTG decision circuit 130 is connected in output regulation circuit 124 with sequence counter 122, and the output of output regulation circuit 124 is connected in digital comparator 126, and the output of digital comparator 126 then is connected in driving circuit 140.
Pulse wave segmenting unit 120 can be divided into a plurality of sub-work periods with the corresponding work period of view data ID according to judging signal SET, and the summation of its sub-work period can equal the corresponding work period of view data ID, and namely the whole work period is constant.Pulse wave segmenting unit 120 can be scattered in the diverse location of whole signal period to produce a segmentation pulse wave signal PDM with the sub-work period.Take above-mentioned two numerical value intervals as example, when the numerical value of view data ID was positioned at the first numerical value interval, the pulse wave segmenting unit was divided at most N sub-work period to produce segmentation pulse wave signal PDM with the corresponding work period of view data ID.When the numerical value of view data ID is positioned at second value when interval, pulse wave segmenting unit 120 is divided at most M sub-work period to produce the segmentation pulse wave signal with the corresponding work period of view data ID, and wherein M, N are that positive integer and M are greater than N.
In other words, pulse wave segmenting unit 120 can according to the corresponding shade of gray of view data ID, be adjusted the quantity of sub-work period.When the corresponding shade of gray of view data ID was higher, its work period can replace with the more sub-work period.When the corresponding shade of gray of view data ID was low, its work period can replace with the less sub-work period.Accordingly, in the lower image of shade of gray, can reduce that waveform is divided into the too much sub-work period and the problem of the distorted signals loss that causes; In the higher image of shade of gray, can improve the image update rate to avoid the problem of film flicker by the more sub-work period.
Next, further specify the inside structure of pulse wave segmenting unit 120, sequence counter 122 is according to numerical value Sequential output one reference signal BS, and the bit number of reference signal BS is identical with the bit number of view data ID.Sequence counter 122 can sequentially be adjusted reference signal BS or sequentially be adjusted reference signal BS by high numerical value to low numerical value by the paramount numerical value of low numerical value.In the present embodiment, sequence counter 122 is sequentially to adjust reference signal BS by the paramount numerical value of low numerical value, uses for output regulation circuit 124.In conventional art, digital comparator 126 is directly to come with view data ID relatively to produce the pulse wave width modulation signal with reference signal BS.And in the present embodiment, in order to be divided into a plurality of sub-work periods the work period, the numerical value change order that reference signal BS can be first adjusts reference signal BS via output regulation circuit 124 to be producing a segment reference signal DBS, and then offers digital comparator 126 and use.In the present embodiment, output regulation circuit 124 can be exported the segment reference signal DBS with different bit-order according to the bit configuration mode (for example the second bit being changed from the 3rd bit) of judging signal SET adjustment reference signal BS.
In the present embodiment, when the numerical value of view data ID was positioned at the first numerical value interval, segment reference signal DBS was corresponding to the first bit-order, and when the numerical value of view data ID was positioned at the second value interval, segment reference signal DBS was corresponding to the second bit-order.After comparing via digital comparator 126, the segment reference signal DBS of different bit-order can divide into the work period of view data ID work period of different numbers has the different update rate with generation segmentation pulse wave signal PDM.Therefore, this segmentation pulse wave signal PDM also can be called adaptability pulse wave dnsity modulation (Adaptive Pulse DensityModulation) signal, can adjust via the bit-order of segment reference signal DBS the pulse wave density of work period.
Take the reference signal BS of the view data ID of four bits and four bits as example, please be simultaneously with reference to Fig. 2, Fig. 2 is four bit output regulation circuits of first embodiment of the invention.Output regulation circuit 224 comprises selects circuit 210,220,230,240, each selects circuit 210,220,230,240 to have two input ends (" 1 " and " 2 "), receive respectively each bit of reference signal BS, its selecting side " 3 " is connected in judges signal SET, can be according to judging that signal SET switches input end (" 1 " or " 2 ") as output.Select circuit 210,220,230,240 can be multiplexer.The bit-order of reference signal BS is with C[3] C[2] C[1] C[0] expression, C[3 wherein] be the highest significant bit (Most Significant Bits, MSB), C[0] be minimum effective bit (Least Significant Bits, LSB).Shown in following Fig. 3 of the bit-order of the reference signal BS that sequence counter 122 is exported (a), Fig. 3 (a)～Fig. 3 (c) is the bit-order of reference signal BS and the segment reference signal DBS of first embodiment of the invention.Sequence counter 122 can sequentially increase progressively the numerical value of its reference signal BS, and such as from top to bottom order among Fig. 3 (a), wherein " decimal system " field represents the numerical value of reference signal BS, and " scale-of-two " field then is that binary mode represents reference signal BS.
If output regulation circuit 124 directly exports digital comparator 126 to reference to signal BS, the segmentation pulse wave signal PDM that then exports behind digital comparator 126 comparison reference signal BS and the picture signal ID can only have the single work period.Numerical value take picture signal ID equals 8 as example, and the waveform of its segmentation pulse wave signal PDM please refer to Fig. 4 (a), and Fig. 4 (a)～Fig. 4 (c) is the oscillogram of the segmentation pulse wave signal PDM of first embodiment of the invention.Wherein, in Fig. 4 (a), segmentation pulse wave signal PDM is the pulse wave modulating signal of unistage type, and it has the work period of semiperiod, and is identical with general pulse wave modulating signal waveform, the situation that its numerical value corresponding to picture signal ID equals 8.
In the present embodiment, the bit of selecting circuit 210,220,230,240 input end " 1 " to connect is sequentially C[1] C[2] C[3] C[0], this is as the first bit-order in the present embodiment; The bit that input end " 2 " connects is sequentially C[0] C[2] C[1] C[3], this is as the second bit-order in the present embodiment.Has the output order of segment reference signal DBS of the first bit-order shown in Fig. 3 (b), its numerical value output sequentially is 0,1,8,9,4,5,12,13,2,3,10,11,6,7,14,15, and binary expression mode is then shown in Fig. 3 (b).Has the output order of segment reference signal DBS of the second bit-order shown in Fig. 3 (c), its numerical value output sequentially is 0,8,2,10,4,12,6,14,1,9,3,11,5,13,7,15, and binary expression mode is then shown in Fig. 3 (c).In the present embodiment, take 0～8 as the first numerical value interval, take 9-15 as the second value interval as example as an illustration.Therefore, when the numerical value of view data ID is 0～8, select circuit 210,220,230,240 can select input end " 1 " as output; When the numerical value of view data ID is 9～15, select circuit 210,220,230,240 can select input end " 2 " as output.
Numerical value take view data ID equals 8 as example, select circuit 210,220,230,240 can select input end " 1 " as output, the waveform of the received segment reference signal DBS of digital comparator 126 this moment is shown in Fig. 3 (b), and the segmentation pulse wave signal PDM that exports is then shown in Fig. 4 (b).In Fig. 4 (b), the summation that segmentation pulse wave signal PDM can have 4 sub-421～424,4 sub-work periods 421～424 of work period equals half period, and it equated with work period 410 among Fig. 4 (a).Therefore, can reach equally shade of gray and be 8 effect, but can improve its image update rate to avoid film flicker.
Numerical value take view data ID equals 9 as example, select circuit 210,220,230,240 can select input end " 2 " as output, the waveform of the received segment reference signal DBS of digital comparator 126 this moment is shown in Fig. 3 (c), and the segmentation pulse wave signal PDM that exports is then shown in Fig. 4 (c).In Fig. 4 (c), segmentation pulse wave signal PDM can be divided into the work period 7 sections, produces 7 sub-work periods 432～438.The summation of 7 sub-work periods 432～438 is 9/16ths (9/16) of the whole cycle, and the numerical value that equals view data ID equaled for 9 corresponding work periods.Therefore, can reach equally shade of gray and be 9 effect, but more improve its image update rate to avoid film flicker.
From the above, the present embodiment can select the segment reference signal DBS of different bit-order to come to compare with view data ID according to the numerical value of view data ID.By having the segment reference signal DBS of different bit-order, when the numerical value of view data ID hangs down, use the segment reference signal DBS with first bit-order will divide into the less sub-work period of relative number the work period.When the numerical value of view data ID is higher, use the segment reference signal DBS with second bit-order will divide into the more sub-work period of relative number the work period.The height of view data ID is judged and can be decided according to design requirement.When for example view data ID was 4 bit, the first numerical value interval can be ordered was 0～8, and it is 9～15 that the second value interval is ordered.When view data ID was 8 bit, the first numerical value interval can be ordered was 0～127, and it is 128～255 that the second value interval is ordered, and the present invention does not limit the setting means in its numerical value interval, as long as the numerical value in second value interval is interval greater than the first numerical value.
Then, interval according to the residing numerical value of view data ID, adopt the segment reference signal DBS of different bit-order to come to compare with view data ID.Such differentiation mode when low-light level, can be avoided being divided into the too much sub-work period and causes waveform distortion and cause brightness to descend, and when high brightness, can utilize the sub-work period of more number to improve turnover rate, avoids film flicker.
Corresponding relation between indivedual bit-order and the numerical value interval then is to decide according to the maximum sub-work period number that this bit-order can be distinguished.Take above-mentioned the first bit-order and the second bit-order as example, by Fig. 4 (b), Fig. 4 (c) as can be known, the first bit-order is in the first numerical value interval (0～8), multipotency will be divided into 4 sub-work periods (being that N equals 4) work period, and the second bit-order is in second value interval (9～15), and multipotency will be divided into 7 sub-work periods (being that M equals 7) work period.In addition, if the first numerical value interval is adjusted into (0～7), the second value interval is adjusted into (8～15), take Fig. 4 (c) as example, when view data ID equals 8, equal 8 place at segment reference signal DBS and can be converted to logic low, can obtain 8 sub-work periods of separating this moment, and M can equal 8 like this.Therefore, in the interval setting of such numerical value, above-mentioned the first bit-order and the second bit-order are still applicable, can allow the larger numerical value of numerical value relatively many sub-work periods of interval acquisition.
Because when high brightness, the sub-work period of institute's activation can occupy during the major part in whole cycle, can cause so the not divided illusion of its waveform, is the sub-work period to interconnect the effect that causes in fact.Otherwise when low-light level, the work period of view data ID also can't be divided into a plurality of sub-work periods, and for example the numerical value of view data ID equals 1, just only can produce the single sub-work period.Therefore, the number of sub-work period can become with the numerical value of view data ID, so the setting of bit-order is to decide with the maximum number that can cut apart in the numerical value interval of correspondence.In addition, set by suitable bit-order, can allow the sub-work period be evenly distributed in the whole cycle, shown in Fig. 4 (b), Fig. 4 (c), so further the improving picture quality is avoided the problem generation of glimmering.
Moreover, the bit-order of the first bit-order and the second bit-order is not limited to the arrangement mode among Fig. 3 (b) and Fig. 3 (c), the user can with reference to different documents or design requirement, adopt different bit arrangement order (being the output order of numerical value).It should be noted that, the first bit-order and the second bit-order must comprise all numerical value, segment reference signal DBS such as 4 bits just need to comprise 0～15 numerical value such as grade, and the segment reference signal DBS of 8 bits just need to comprise 0～255 numerical value such as grade, and each numerical value only can occur once in same period.Then, according to the corresponding maximum fractionation number of indivedual bit-order, determine that its corresponding numerical value is interval.Cut apart number and heal that to heal numerical value little corresponding to numerical value interval for few bit-order.
In addition, it should be noted that above-mentioned segment reference signal DBS can be more kinds of bit-order according to the value distinguishing of view data ID, for example 3 kinds or 6 kinds, the present embodiment is not limited.As long as increase to select circuit 210,220,230,240 input end number just can produce the segment reference signal DBS with different bit-order.Need 3 kinds of orders just to use the selection circuit 210,220,230,240 with 3 input ends, need 6 kinds of orders just to use the selection circuit 210,220,230,240 of the input end with 6.Same, the number in numerical value interval also is not limited to two, can set up on their own according to design requirement, and the present embodiment is not limited.After via exposure of the present invention, the art has knows that usually the knowledgeable should know its embodiment easily by inference, does not add tired stating at this.
The second embodiment
Can be summarized a kind of conversion method of view data by above-mentioned Fig. 1～Fig. 4, be applicable to the drive unit of a light emitting diode indicator, this numeric class please refer to Fig. 5 than conversion method.Fig. 5 is the conversion method process flow diagram of the view data of second embodiment of the invention.At first, receive a view data (step S510), the numerical value of view data is corresponding to a work period.Then, judge that the numerical value of view data is in the first numerical value interval or second value interval (step S520), wherein the numerical value in second value interval is greater than the numerical value in the first numerical value interval.When the numerical value of view data is positioned at the first numerical value interval, the corresponding work period of view data is divided at most N sub-work period to produce a segmentation pulse wave signal (step S530).When the numerical value of view data is positioned at second value when interval, the corresponding work period of view data is divided at most M sub-work period to produce segmentation pulse wave signal (step S540), wherein M, N are that positive integer and M are greater than N.Wherein, the summation of an above-mentioned N sub-work period or above-mentioned M work period equals the work period.All the other implementation details of this method please refer to the explanation of above-mentioned the first embodiment, are not repeated at this.
In sum, the present invention detects first the numerical value of view data, then selects the reference signal of different numerical value orders to compare to be divided into the different sub-work periods work period according to the numerical value of view data.Can be when the low-light level with this, avoid the work period to cut apart too much and distortion when high brightness, can promote the image update rate and occur with the problem of avoiding film flicker.
It should be noted that at last: above embodiment only in order to technical scheme of the present invention to be described, is not intended to limit; Although with reference to previous embodiment the present invention is had been described in detail, those of ordinary skill in the art is to be understood that: it still can be made amendment to the technical scheme that aforementioned each embodiment puts down in writing, and perhaps part technical characterictic wherein is equal to replacement; And these modifications or replacement do not make the essence of appropriate technical solution break away from the spirit and scope of various embodiments of the present invention technical scheme.
Claims (11)
1. digital analogue converter is applicable to the drive unit of a display, and this digital analogue converter comprises:
One GTG decision circuit, signal is judged in numerical value output one according to a view data, this judgement signal is positioned at one first numerical value interval or second value interval in order to the numerical value that represents this view data, wherein the numerical value in this second value interval is greater than the numerical value in this first numerical value interval, and the numerical value of this view data is corresponding to a work period; And
One pulse wave segmenting unit, be connected in this GTG decision circuit to receive this judgement signal, when the numerical value of this view data is positioned at this first numerical value interval, this pulse wave segmenting unit should be divided at most N sub-work period the work period to produce a segmentation pulse wave signal with this view data is corresponding, when the numerical value of this view data is positioned at this second value interval, this pulse wave segmenting unit should be divided at most M sub-work period the work period to produce this segmentation pulse wave signal with this view data is corresponding, and wherein M, N are that positive integer and M are greater than N;
Wherein this pulse wave segmenting unit is adjusted the bit-order of a reference signal to produce a segment reference signal according to this judgement signal, this reference signal is identical with the bit number of this view data, wherein when the numerical value of this view data is positioned at this first numerical value interval, this segment reference signal is corresponding to one first bit-order, when the numerical value of this view data is positioned at this second value interval, this segment reference signal is corresponding to one second bit-order, this pulse wave segmenting unit relatively this segment reference signal and this view data to produce this segmentation pulse wave signal.
2. digital analogue converter according to claim 1, wherein the summation of an above-mentioned N sub-work period or above-mentioned M work period equals in fact this work period.
3. digital analogue converter according to claim 1, wherein this pulse wave segmenting unit comprises:
One sequence counter, in order to export this reference signal, the bit number of this reference signal is identical with the bit number of this view data;
One output regulation circuit is connected in this sequence counter and this GTG decision circuit, adjusts the bit-order of this reference signal according to this judgement signal to produce this segment reference signal; And
One digital comparator is connected in this output regulation circuit, in order to relatively this segment reference signal and this view data to produce this segmentation pulse wave signal;
Wherein, when the numerical value of this view data was positioned at this first numerical value interval, this segment reference signal was corresponding to this first bit-order, and when the numerical value of this view data was positioned at this second value interval, this segment reference signal was corresponding to this second bit-order.
4. digital analogue converter according to claim 3, wherein this output regulation circuit comprises:
A plurality of selection circuit are connected in this reference signal that this GTG decision circuit and this sequence counter are exported, and described selection circuit is adjusted the bit-order of this reference signal to produce this segment reference signal according to this judgement signal;
Wherein, the first input end that respectively should select circuit respectively should select one second input end of circuit corresponding to this second bit-order corresponding to this first bit-order.
5. the drive unit of a display comprises:
One digital analogue converter comprises:
One GTG decision circuit, signal is judged in numerical value output one according to a view data, this judgement signal is positioned at one first numerical value interval or second value interval in order to the numerical value that represents this view data, wherein the numerical value in this second value interval is greater than the numerical value in this first numerical value interval, and the numerical value of this view data is corresponding to a work period; And
One pulse wave segmenting unit, be connected in this GTG decision circuit to receive this judgement signal, when the numerical value of this view data is positioned at this first numerical value interval, this pulse wave segmenting unit should be divided at most N sub-work period the work period to produce a segmentation pulse wave signal with this view data is corresponding, when the numerical value of this view data is positioned at this second value interval, this pulse wave segmenting unit should be divided at most M sub-work period the work period to produce this segmentation pulse wave signal with this view data is corresponding, and wherein M, N are that positive integer and M are greater than N; And
One drive circuit is connected in this digital analogue converter, drives a display panel according to this segmentation pulse wave signal;
Wherein this pulse wave segmenting unit is adjusted the bit-order of a reference signal to produce a segment reference signal according to this judgement signal, this reference signal is identical with the bit number of this view data, wherein when the numerical value of this view data is positioned at this first numerical value interval, this segment reference signal is corresponding to one first bit-order, when the numerical value of this view data is positioned at this second value interval, this segment reference signal is corresponding to one second bit-order, this pulse wave segmenting unit relatively this segment reference signal and this view data to produce this segmentation pulse wave signal.
6. drive unit according to claim 5, wherein the summation of an above-mentioned N sub-work period or above-mentioned M work period equals in fact this work period.
7. drive unit according to claim 5, wherein this display panel is a LED display panel.
8. drive unit according to claim 5, wherein this pulse wave segmenting unit comprises:
One sequence counter, in order to sequentially to export this reference signal, the bit number of this reference signal is identical with the bit number of this view data;
One output regulation circuit is connected in this sequence counter and this GTG decision circuit, adjusts the bit-order of this reference signal according to this judgement signal to produce this segment reference signal; And
One digital comparator is connected in this output regulation circuit, in order to relatively this segment reference signal and this view data to produce this segmentation pulse wave signal;
Wherein, when the numerical value of this view data was positioned at this first numerical value interval, this segment reference signal was corresponding to this first bit-order, and when the numerical value of this view data was positioned at this second value interval, this segment reference signal was corresponding to this second bit-order.
9. drive unit according to claim 8, wherein this output regulation circuit comprises:
A plurality of selection circuit are connected in this reference signal that this GTG decision circuit and this sequence counter are exported, and described selection circuit is adjusted the bit-order of this reference signal to produce this segment reference signal according to this judgement signal;
Wherein, the first input end that respectively should select circuit respectively should select one second input end of circuit corresponding to this second bit-order corresponding to this first bit-order.
10. image data conversion method is applicable to the drive unit of a display, this conversion method:
Signal is judged in numerical value output one according to a view data, this judgement signal is positioned at one first numerical value interval or second value interval in order to the numerical value that represents this view data, wherein the numerical value in this second value interval is greater than the numerical value in this first numerical value interval, and the numerical value of this view data is corresponding to a work period; And
When the numerical value of this view data is positioned at this first numerical value interval, should be divided at most N sub-work period the work period to produce a segmentation pulse wave signal with this view data is corresponding, when the numerical value of this view data is positioned at this second value interval, should be divided at most M sub-work period the work period to produce this segmentation pulse wave signal with this view data is corresponding, wherein M, N are that positive integer and M are greater than N;
Wherein this image data conversion method also comprises: sequentially export a reference signal, the bit number of this reference signal is identical with the bit number of this view data; Adjust the bit-order of this reference signal according to this judgement signal to produce a segment reference signal, when the numerical value of this view data is positioned at this first numerical value interval, this segment reference signal is corresponding to one first bit-order, when the numerical value of this view data was positioned at this second value interval, this segment reference signal was corresponding to one second bit-order; And relatively this segment reference signal and this view data to produce this segmentation pulse wave signal.
11. image data conversion method according to claim 10, wherein the summation of an above-mentioned N sub-work period or above-mentioned M work period equals in fact this work period.
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| CN1462992A (en) * | 2002-05-28 | 2003-12-24 | 友达光电股份有限公司 | Driving method of plasma display with variable display frame frequency |
| CN1904989A (en) * | 2005-07-27 | 2007-01-31 | 株式会社半导体能源研究所 | Display device, driving method and its electronic device |
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| CN1462992A (en) * | 2002-05-28 | 2003-12-24 | 友达光电股份有限公司 | Driving method of plasma display with variable display frame frequency |
| CN1904989A (en) * | 2005-07-27 | 2007-01-31 | 株式会社半导体能源研究所 | Display device, driving method and its electronic device |
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