CN102122632B - Method for forming dielectric film with low k-value - Google Patents
Method for forming dielectric film with low k-value Download PDFInfo
- Publication number
- CN102122632B CN102122632B CN 201010022584 CN201010022584A CN102122632B CN 102122632 B CN102122632 B CN 102122632B CN 201010022584 CN201010022584 CN 201010022584 CN 201010022584 A CN201010022584 A CN 201010022584A CN 102122632 B CN102122632 B CN 102122632B
- Authority
- CN
- China
- Prior art keywords
- dielectric film
- low
- value
- flow
- watts
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 42
- 150000002500 ions Chemical class 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 230000008439 repair process Effects 0.000 claims abstract description 13
- 238000009832 plasma treatment Methods 0.000 claims abstract description 10
- 229910052799 carbon Inorganic materials 0.000 claims description 10
- 229910052757 nitrogen Inorganic materials 0.000 claims description 10
- -1 nitrogen ion Chemical class 0.000 claims description 7
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 4
- 229910052786 argon Inorganic materials 0.000 claims description 4
- KAJRUHJCBCZULP-UHFFFAOYSA-N 1-cyclohepta-1,3-dien-1-ylcyclohepta-1,3-diene Chemical compound C1CCC=CC=C1C1=CC=CCCC1 KAJRUHJCBCZULP-UHFFFAOYSA-N 0.000 claims description 3
- NBBQQQJUOYRZCA-UHFFFAOYSA-N diethoxymethylsilane Chemical compound CCOC([SiH3])OCC NBBQQQJUOYRZCA-UHFFFAOYSA-N 0.000 claims description 3
- JJQZDUKDJDQPMQ-UHFFFAOYSA-N dimethoxy(dimethyl)silane Chemical compound CO[Si](C)(C)OC JJQZDUKDJDQPMQ-UHFFFAOYSA-N 0.000 claims description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N argon Substances [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 2
- 239000001307 helium Substances 0.000 claims description 2
- 229910052734 helium Inorganic materials 0.000 claims description 2
- 239000000203 mixture Substances 0.000 claims description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N nitrogen Substances N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 2
- 239000010408 film Substances 0.000 description 81
- 230000015572 biosynthetic process Effects 0.000 description 13
- 230000008569 process Effects 0.000 description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910007991 Si-N Inorganic materials 0.000 description 4
- 229910006294 Si—N Inorganic materials 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 3
- 239000003989 dielectric material Substances 0.000 description 3
- 229910008051 Si-OH Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910006358 Si—OH Inorganic materials 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229920001343 polytetrafluoroethylene Polymers 0.000 description 2
- 239000004810 polytetrafluoroethylene Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 230000003746 surface roughness Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000007792 gaseous phase Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000000427 thin-film deposition Methods 0.000 description 1
Images
Landscapes
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Chemical Vapour Deposition (AREA)
Abstract
The invention provides a method for forming a dielectric film with a low k-value. The method comprises the following steps: providing a substrate, wherein, the dielectric film with a low k-value is formed on the surface of the substrate; and carrying out plasma treatment on the dielectric film with a low k-value. The method has the advantages that dangling bonds are eliminated through plasma treatment on the surface of the dielectric film with a low k-value, and plasma damage is repaired by utilizing repair ions, thus effectively lowering the roughness value of the dielectric film with a low k-value.
Description
Technical field
The present invention relates to field of semiconductor manufacture, particularly low k value method for forming dielectric film.
Background technology
In very lagre scale integrated circuit (VLSIC) technique, the silicon dioxide of concrete thermal stability, moisture resistance characteristic is the main insulating material that metal interconnected circuit chien shih is used always, and metallic aluminium then is the main material of circuit interconnection wire in the chip.Yet, along with the microminiaturization of element and the increase of integrated level, the interconnecting lead number constantly increases in the circuit, resistance in the interconnecting lead framework (R) and electric capacity (C) ghost effect increase, and the increase of ghost effect causes serious transmission delay (RC Delay), and transmission delay reaches in the more advanced technology in 130 nanometers becomes the limited principal element of signal transmission speed in the circuit.
Therefore, prior art in semiconductor technology, adopt new low electrical resistant material copper as interconnecting lead and low k value dielectric material as insulating material to reduce transmission delay, described low k value dielectric material generally includes: silica (FSG) and polytetrafluoroethylene (PTFE) that fluorine mixes, and in being 200480000214.3 Chinese patent, application number can find more to hang down the additional information of k value dielectric material formation method.
But follow-up other metallic films or the dielectric film electric property that is formed on the low k value dielectric film surface that adopts existing technique formation is poor.
Summary of the invention
The problem that the present invention solves is to prevent that the low k value dielectric film roughness that forms is large.
For addressing the above problem, the invention provides a kind of low k value method for forming dielectric film, comprising:
Substrate is provided, and described substrate surface is formed with low k value dielectric film;
Described low k value dielectric film is carried out plasma treatment.
Compared with prior art, the present invention has the following advantages: the present invention removes dangling bonds by plasma treatment is carried out on the surface of low k value dielectric film, adopt simultaneously and repair the damage that ion reparation expulsion ion causes, effectively reduce the roughness of low k value dielectric film.And the present invention utilizes the less He of ionic radius, N or Ar ion to avoid low k value dielectric film damage excessive; Adopt simultaneously N
2O repairs damage and avoids again forming dangling bonds.
Description of drawings
By the more specifically explanation of the preferred embodiments of the present invention shown in the accompanying drawing, above-mentioned and other purpose of the present invention, Characteristics and advantages will be more clear.Reference numeral identical in whole accompanying drawings is indicated identical part.Deliberately do not draw accompanying drawing by actual size equal proportion convergent-divergent, focus on illustrating purport of the present invention.
Fig. 1 is the schematic flow sheet of the low k value method for forming dielectric film of one embodiment of the present of invention;
Fig. 2 to Fig. 4 is the process schematic diagram of the low k value method for forming dielectric film of an embodiment of invention.
Embodiment
The inventor finds, follow-up be formed on other metallic films of adopting on the low k value dielectric film surface that existing technique forms or the poor reason of dielectric film electric property be because: the low k value dielectric film roughness (Roughness Value) of existing technique formation is larger, and be because the low k value dielectric film surface that existing technique forms is formed with a large amount of dangling bonds (OH key than the low k value dielectric film of large roughness,-COH key or-the H key), described dangling bonds form the Si-OH structure, Si-COH structure or Si-H structure, so that the low k value dielectric film surface roughness (Roughness Value) that forms is large, and the dielectric film roughness is large, causes follow-up other metallic films or the dielectric film electric property that is formed on the low k value dielectric film surface poor.
For this reason, the present inventor proposes a kind of low k value method for forming dielectric film of optimization, comprising:
Substrate is provided, and described substrate surface is formed with low k value dielectric film;
Described low k value dielectric film is carried out plasma treatment.
A lot of details have been set forth in the following description so that fully understand the present invention.But the present invention can implement much to be different from alternate manner described here, and those skilled in the art can do similar popularization in the situation of intension of the present invention, so the present invention is not subjected to the restriction of following public implementation.
Secondly, the present invention utilizes schematic diagram to be described in detail, when the embodiment of the invention is described in detail in detail; for ease of explanation; the profile of expression device architecture can be disobeyed general ratio and be done local the amplification, and described schematic diagram is example, and it should not limit the scope of protection of the invention at this.The three-dimensional space that in actual fabrication, should comprise in addition, length, width and the degree of depth.
Fig. 1 is the schematic flow sheet of the low k value method for forming dielectric film of one embodiment of the present of invention, Fig. 2 to Fig. 4 describes low k value method for forming dielectric film of the present invention below in conjunction with Fig. 1 to Fig. 4 for the process schematic diagram of the low k value method for forming dielectric film of an embodiment of invention.
Step S101 provides substrate, and described substrate surface is formed with low k value dielectric film.
With reference to figure 2, substrate 100 can be substrate (part that comprises integrated circuit and other elements), the patterning of multi layer substrate (silicon substrate that for example, has covering dielectric and metal film), classification substrate, silicon-on-insulator substrate (SOI), epitaxial silicon substrate, section processes or the substrate that is not patterned.
With reference to figure 3, described substrate 100 surfaces are formed with low k value dielectric film 110.
Described low k value dielectric film 110 is the dielectric film of carbon containing, and the dielectric film of described carbon containing forms technique for select bicycloheptadiene (BCHD), C when forming dielectric film
10H
18, diethoxymethyl silane (DEMS) or dimethoxy dimethylsilane (DMDMOS) mix to described dielectric film.
The formation technique of described low k value dielectric film 110 is existing thin film deposition processes, and for example chemical vapor deposition method or chemical gaseous phase spin coating proceeding (SOG) here repeat no more.
The present inventor finds, since the low k value dielectric film surface that existing formation technique forms be formed with a large amount of dangling bonds (the OH key ,-the COH key or-the H key), described dangling bonds form Si-OH structure, Si-COH or Si-H structure, so that the low k value dielectric film surface roughness that forms is large, cause follow-up other metallic films or the dielectric film electric property that is formed on the low k value dielectric film surface poor.
For this reason, the present invention proposes a kind of formation method of optimizing low k value dielectric film, adds the S102 step after S101, as described in step S102, with reference to figure 4, described low k value dielectric film is carried out plasma treatment 111.
Described plasma treatment 111 techniques specifically comprise adopt to remove the ion remaval dangling bonds (the OH key ,-the COH key or-the H key) and adopt and repair ion and repair the low k value dielectric film that described removal Ions Bombardment causes and damage, when repairing the damage of ion reparation dielectric film, repair ion and form the activation base, form cross-bond (Cross-Link) to reduce the roughness of described low k value dielectric film at low k value dielectric film.
Described removal ion comprises: nitrogen ion, helium ion or argon ion; Described reparation ion is the N of plasma
2O it needs to be noted that the present invention utilizes the less He of ionic radius, N or Ar ion to avoid low k value dielectric film damage excessive; Adopt simultaneously N
2O repairs damage and avoids again forming dangling bonds.
In one embodiment, described plasma treatment 111 technique concrete technology parameters comprise: chamber pressure be 1 the holder to 10 the holder, power is 300 watts to 580 watts, chamber temp is 300 ℃ to 400 ℃, N
2Flow is 1SCCM to 2000SCCM, and the He flow is 1SCCM to 2000SCCM, N
2The O flow is 400SCCM to 500SCCM, and the processing time is relevant with the low k value dielectric film that needs to process, and low k value dielectric film is thick, and the processing time is long, and low k value dielectric film is thin, and the processing time is short.
Specific embodiment comprises: chamber pressure is 8 holders, and power is 380 watts, and chamber temp is 350 ℃, N
2Flow is 1000SCCM, and the He flow is 1500SCCM, N
2The O flow is 450SCCM, and the processing time is 3 minutes.
In the above-described embodiments, the N of plasma
2With He be used for to remove dangling bonds (the OH key ,-the COH key or-the H key), N
2The O plasma forms the activation base, form cross-bond (Cross-Link) to reduce the roughness of described low k value dielectric film at low k value dielectric film, and described reparation ion can form the Si-N key in low k value dielectric film surface, further suppress the formation of dangling bonds, reduced the roughness of described low k value dielectric film.
Also it needs to be noted N
2, He ion volume less, select N
2, He the ion remaval dangling bonds (the OH key ,-the COH key or-the H key) Shi Buhui causes than macrolesion described low k value dielectric film so that N
2The O plasma is easy to repair low k value dielectric film damage.
In another embodiment, described plasma-treating technology 111 concrete technology parameters comprise: chamber pressure be 1 the holder to 10 the holder, power is 300 watts to 580 watts, chamber temp is 300 ℃ to 400 ℃, the Ar flow is 1SCCM to 2000SCCM, N
2The O flow is 400SCCM to 500SCCM, and the processing time is relevant with the low k value dielectric film that needs to process, and low k value dielectric film is thick, and the processing time is long, and low k value dielectric film is thin, and the processing time is short.
Specific embodiment comprises: chamber pressure is 5 holders, and power is 480 watts, and chamber temp is 380 ℃, and the Ar flow is 500SCCM, N
2The O flow is 480SCCM, and the processing time is 50 seconds.
In the above-described embodiments, the Ar of plasma be used for to remove dangling bonds (the OH key ,-the COH key or-the H key), N
2The O plasma be used for to repair is removed the low k value dielectric film damage that Ions Bombardment causes, and described reparation ion can further suppress the formation of dangling bonds at low k value dielectric film surface formation Si-N key, has reduced the roughness of described low k value dielectric film.
In another embodiment, described plasma-treating technology 111 concrete technology parameters comprise: chamber pressure be 1 the holder to 10 the holder, power is 300 watts to 580 watts, chamber temp is 300 ℃ to 400 ℃, the He flow is 1SCCM to 2000SCCM, N
2The O flow is 400SCCM to 500SCCM, and the processing time is relevant with the low k value dielectric film that needs to process, and low k value dielectric film is thick, and the processing time is long, and low k value dielectric film is thin, and the processing time is short.
Specific embodiment comprises: chamber pressure is 3 holders, and power is 340 watts, and chamber temp is 340 ℃, and the He flow is 1000SCCM, N
2The O flow is 410SCCM, and the processing time is 20 seconds.
In the above-described embodiments, the He of plasma be used for to remove dangling bonds (the OH key ,-the COH key or-the H key), N
2The O plasma be used for to repair is removed the low k value dielectric film damage that Ions Bombardment causes, and described reparation ion can further suppress the formation of dangling bonds at low k value dielectric film surface formation Si-N key, has reduced the roughness of described low k value dielectric film.
In another embodiment, described plasma-treating technology 111 concrete technology parameters comprise: chamber pressure be 1 the holder to 10 the holder, power is 300 watts to 580 watts, chamber temp is 300 ℃ to 400 ℃, N
2Flow is 1SCCM to 2000SCCM, N
2The O flow is 400SCCM to 500SCCM, and the processing time is relevant with the low k value dielectric film that needs to process, and low k value dielectric film is thick, and the processing time is long, and low k value dielectric film is thin, and the processing time is short.
Specific embodiment comprises: chamber pressure is 8 holders, and power is 360 watts, and chamber temp is 360 ℃, N
2Flow is 1800SCCM, N
2The O flow is 490SCCM, and the processing time is 50 seconds.
In the above-described embodiments, the N of plasma
2Be used for to remove dangling bonds (the OH key ,-the COH key or-the H key), N
2The O plasma be used for to repair is removed the low k value dielectric film damage that Ions Bombardment causes, and described reparation ion can further suppress the formation of dangling bonds at low k value dielectric film surface formation Si-N key, has reduced the roughness of described low k value dielectric film.
The present invention effectively reduces the roughness of low k value dielectric film by the surface of low k value dielectric film being carried out the damage that plasma is removed dangling bonds and adopted the reparation ion to repair plasma.
Although the present invention discloses as above with preferred embodiment, the present invention is defined in this.Any those skilled in the art without departing from the spirit and scope of the present invention, all can make various changes or modifications, so protection scope of the present invention should be as the criterion with the claim limited range.
Claims (7)
1. one kind low k value method for forming dielectric film is characterized in that, comprising:
Substrate is provided, and described substrate surface is formed with low k value dielectric film;
Described low k value dielectric film is carried out plasma treatment, described low k value dielectric film is carried out plasma treatment to be comprised: adopt and adopt the reparation ion to repair the low k value dielectric film damage that described removal Ions Bombardment causes when removing the ion remaval dangling bonds, described removal ion comprises: nitrogen ion, helium ion or argon ion; Described reparation ion is the N of plasma
2O.
2. low k value method for forming dielectric film as claimed in claim 1 is characterized in that, described plasma-treating technology concrete technology parameter comprises: chamber pressure be 1 the holder to 10 the holder, power is 300 watts to 580 watts, chamber temp is 300 ℃ to 400 ℃, N
2Flow is 1SCCM to 2000SCCM, and the He flow is 1SCCM to 2000SCCM, N
2The O flow is 400SCCM to 500SCCM.
3. low k value method for forming dielectric film as claimed in claim 1 is characterized in that, described plasma-treating technology concrete technology parameter comprises: chamber pressure is that 1 holder is to 10 holders, power is 300 watts to 580 watts, chamber temp is 300 ℃ to 400 ℃, and the Ar flow is 1SCCM to 2000SCCM, N
2The O flow is 400SCCM to 500SCCM.
4. low k value method for forming dielectric film as claimed in claim 1 is characterized in that, described plasma-treating technology concrete technology parameter comprises: chamber pressure is that 1 holder is to 10 holders, power is 300 watts to 580 watts, chamber temp is 300 ℃ to 400 ℃, and the He flow is 1SCCM to 2000SCCM, N
2The O flow is 400SCCM to 500SCCM.
5. low k value method for forming dielectric film as claimed in claim 2 is characterized in that, chamber pressure be 1 the holder to 10 the holder, power is 300 watts to 580 watts, chamber temp is 300 ℃ to 400 ℃, N
2Flow is 1SCCM to 2000SCCM, N
2The O flow is 400SCCM to 500SCCM.
6. low k value method for forming dielectric film as claimed in claim 1 is characterized in that, described low k value dielectric film is the dielectric film of carbon containing.
7. low k value method for forming dielectric film as claimed in claim 6 is characterized in that, the dielectric film of described carbon containing forms technique for select bicycloheptadiene, C when forming dielectric film
10H
18, diethoxymethyl silane or dimethoxy dimethylsilane mix.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010022584 CN102122632B (en) | 2010-01-08 | 2010-01-08 | Method for forming dielectric film with low k-value |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010022584 CN102122632B (en) | 2010-01-08 | 2010-01-08 | Method for forming dielectric film with low k-value |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102122632A CN102122632A (en) | 2011-07-13 |
| CN102122632B true CN102122632B (en) | 2013-05-29 |
Family
ID=44251150
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201010022584 Active CN102122632B (en) | 2010-01-08 | 2010-01-08 | Method for forming dielectric film with low k-value |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102122632B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103426733A (en) * | 2012-05-17 | 2013-12-04 | 中芯国际集成电路制造(上海)有限公司 | Ultra-low-K dielectric layer treatment method |
| CN104124197B (en) * | 2013-04-24 | 2017-09-01 | 中芯国际集成电路制造(上海)有限公司 | A kind of preparation method of semiconductor devices |
| CN104451593A (en) * | 2013-09-23 | 2015-03-25 | 中芯国际集成电路制造(上海)有限公司 | Methods of Depositing Thin Films |
| CN105762109B (en) * | 2014-12-19 | 2019-01-25 | 中芯国际集成电路制造(上海)有限公司 | The forming method of semiconductor structure |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1698189A (en) * | 2003-01-13 | 2005-11-16 | 应用材料股份有限公司 | Method for Improving Cracking Threshold and Mechanical Properties of Low Dielectric Constant Materials |
-
2010
- 2010-01-08 CN CN 201010022584 patent/CN102122632B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1698189A (en) * | 2003-01-13 | 2005-11-16 | 应用材料股份有限公司 | Method for Improving Cracking Threshold and Mechanical Properties of Low Dielectric Constant Materials |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102122632A (en) | 2011-07-13 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP1182275B1 (en) | Method of forming an interlayer insulating film | |
| CN101355047B (en) | Method for forming through hole in low dielectric coefficient medium layer | |
| CN101202244B (en) | Method for removing photoresist graph in forming process of dual embedded structure | |
| CN102122632B (en) | Method for forming dielectric film with low k-value | |
| CN1529905A (en) | Method for etching organic insulating film and dual damasene process | |
| CN101364565A (en) | Method for manufacturing semiconductor device | |
| CN103426749B (en) | The formation method of opening and stacked structure | |
| CN101123243A (en) | Making method for dual enchasing structure | |
| CN101764081A (en) | Method for manufacturing connecting hole | |
| JP2023145565A (en) | Method for si gap fill by pecvd | |
| US20170162430A1 (en) | Methods for producing integrated circuits with air gaps and integrated circuits produced from such methods | |
| CN111370282B (en) | Cleaning method of plasma enhanced chemical vapor deposition chamber | |
| CN104377189A (en) | Integrated circuit with a sidewall layer and an ultra-thick metal layer and method of making | |
| CN101369535A (en) | Method for improving defect of insulation dielectric layer and forming dual damascene structure | |
| CN103579089A (en) | Semiconductor structure and forming method thereof | |
| CN102693935A (en) | Manufacturing method of interconnection structure | |
| CN103165576B (en) | Semiconductor device and manufacture method thereof | |
| CN104465506A (en) | Method for forming air gaps in copper interconnection | |
| CN103117244B (en) | Air gap forming method between integrated circuit (IC) interconnector and interlevel dielectric layer | |
| US7678661B2 (en) | Method of forming an insulating layer in a semiconductor device | |
| CN102751233B (en) | Interconnection structure forming method | |
| KR100945500B1 (en) | Manufacturing method of semiconductor device | |
| CN103165436B (en) | Make the method for semiconductor device | |
| CN102044471B (en) | Interconnecting structure and forming method thereof | |
| CN103779267A (en) | Method for forming semiconductor structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| ASS | Succession or assignment of patent right |
Owner name: SEMICONDUCTOR MANUFACTURING (BEIJING) INTERNATIONA Effective date: 20121102 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20121102 Address after: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Applicant after: Semiconductor Manufacturing International (Shanghai) Corporation Applicant after: Semiconductor Manufacturing International (Beijing) Corporation Address before: 201203 Shanghai City, Pudong New Area Zhangjiang Road No. 18 Applicant before: Semiconductor Manufacturing International (Shanghai) Corporation |
|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |