CN102055417B - Driving amplifier circuit - Google Patents
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- CN102055417B CN102055417B CN 201010131287 CN201010131287A CN102055417B CN 102055417 B CN102055417 B CN 102055417B CN 201010131287 CN201010131287 CN 201010131287 CN 201010131287 A CN201010131287 A CN 201010131287A CN 102055417 B CN102055417 B CN 102055417B
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Abstract
Provided is a driving amplifier circuit, comprising a first driver, a second driver, a first operational amplifier, a second operational amplifier, a first bias circuit for biasing the first driver, a second bias circuit for biasing the second driver, an enabling circuit, coupled to the first bias circuit and the second bias circuit for enabling either the first bias circuit or the second bias circuit according to a control signal, a digital control circuit, coupled to the enabling circuit for monitoring currents of the first driver and the second driver to generate the control signal, and a bias equalizing circuit, adjusting the direct current bias of at least one of the first operational amplifier and the second operational amplifier for enabling the direct current bias of the two operational amplifiers to be equal. Compared with the conventional circuit, the driving amplifier circuit is simpler in structure and is capable of preventing the problem of breakdown current.
Description
Technical field
The present invention is relevant for driving amplifier (driving amplifier), more specifically, and relevant a kind of driving amplifier circuit.
Background technology
In Amplifier Design, always need to reach balanced between efficient (efficiency) and intermodulation distortion (crossover distortion).Traditional AB current drives amplifier comprises the operational amplifier that is couple to a push-pull cascade (push-pull stage), in order to output current to load (load is as receiving terminal) or from load received current (load is as source).When AB current drives amplifier flows out electric current (sourcing current) to this load, can use pmos driver, when electric current (sinking currennt) is drawn in this load certainly, can use the NMOS driver.The very little drift current (biasing current) of traditional AB level amplifier utilization is got over to guarantee more level and smooth friendship.If drift current is too little, amplifier will bear some intermodulation distortions so.Furtherly, if two drivers bearing great current all will produce from supply voltage so and puncture (shoot-through) electric current.Therefore, the accurate control of drift current just is very important.
Be published in IEEE solid-state circuit periodical, February nineteen ninety, the 25th volume, the 1st phase (IEEE journal ofsolid-state circuits, Vol.25, No.1, February 1990) " A CMOS Large-SwingLow-Distortion Three-Stage Class AB Power Amplifier " in disclosed a kind of class ab ammplifier with three grades, be used for addressing the above problem, only be reference at this.This circuit improves to some extent than other prior art, but this circuit still has complicated circuit structure.Therefore, in the urgent need to a kind of new operational amplifier is provided, can simplify the circuit of above-mentioned third stage amplifier, and reduce simultaneously the magnitude of current that is carried by driver.
Summary of the invention
In view of this, one of the object of the invention is to provide a kind of driving amplifier circuit.
The invention provides a kind of driving amplifier circuit, comprise: the first driver is used for flowing out load current to load; The second driver is used for drawing this load current from this load; The first operational amplifier is couple to differential input signal, and this first operational amplifier is used for driving this first driver; The second operational amplifier is couple to this differential input signal, and this second operational amplifier is used for driving this second driver; The first off-centre circuit is used for this first driver of skew; The second off-centre circuit is used for this second driver of skew; Enable circuits is couple to this first off-centre circuit and this second off-centre circuit, is used for enabling this first off-centre circuit or this second off-centre circuit according to control signal; Digital control circuit is couple to this enable circuits, is used for monitoring the electric current of this first driver and the electric current of this second driver, to produce this control signal; And biasing equalizing circuit, be coupled between the internal node of the internal node of this first operational amplifier and this second operational amplifier, be used for to adjust at least one direct current biasing of this first operational amplifier and this second operational amplifier, so that this first operational amplifier and this second operational amplifier have identical direct current biasing.
The present invention provides a kind of driving amplifier circuit again, comprises: the first driver is used for flowing out load current to load; The second driver is used for drawing this load current from this load; The first operational amplifier is couple to differential input signal, and this first operational amplifier is used for driving this first driver; The second operational amplifier is couple to this differential input signal, and this second operational amplifier is used for driving this second driver; The first off-centre circuit is used for this first driver of skew; The second off-centre circuit is used for this second driver of skew;
enable circuits is couple to this first off-centre circuit and this second off-centre circuit, is used for enabling this first off-centre circuit or this second off-centre circuit according to a control signal, digital control circuit is couple to this enable circuits, is used for monitoring the electric current of this first driver and the electric current of this second driver, to produce this control signal, and external circuit, be couple between the inverting input of this first operational amplifier and this second operational amplifier, be used for to adjust at least one direct current biasing of this first operational amplifier and this second operational amplifier, so that this first operational amplifier and this second operational amplifier have identical direct current biasing, wherein this external circuit comprises: at least one tap variable resistor, be couple to reference to electrical equipment, wherein, when this tap variable resistor selectivity tap during at diverse location, the direct voltage of this first operational amplifier is different from the direct voltage of this second operational amplifier.
Driving amplifier circuit provided by the invention is more simple than the prior art circuits structure, also can avoid the problem of breakdown current.
Description of drawings
Fig. 1 is the schematic diagram of driving amplifier circuit according to an embodiment of the invention.
Fig. 2 is the schematic diagram of digital control circuit as shown in Figure 1.
Fig. 3 is the schematic diagram of driving amplifier circuit according to a second embodiment of the present invention.
Fig. 4 is the schematic diagram of the driving amplifier circuit of a third embodiment in accordance with the invention.
Embodiment
Used some vocabulary to censure specific components in the middle of specification and claim.In affiliated field, the technical staff should understand, and same assembly may be called with different nouns by manufacturer.This specification and claims are not used as distinguishing the mode of assembly with the difference of title, but the criterion that the difference on function is used as distinguishing with assembly.In the middle of specification and claim, be an open term mentioned " comprising " and " comprising " in the whole text, therefore should be construed to " comprise but be not limited to ".In addition, " couple " word this for comprise any directly and indirectly be electrically connected means.Indirectly electrical connection means comprise by other device and connecting.
See also Fig. 1, Fig. 1 is the schematic diagram of driving amplifier circuit 100 according to an embodiment of the invention.Driving amplifier circuit 100 comprises a P operational amplifier 110 and a N operational amplifier 120, wherein, above-mentioned two operational amplifiers couple the differential load electric current, and P operational amplifier 110 and N operational amplifier 120 can be referred to as respectively the first operational amplifier and the second operational amplifier.P operational amplifier 110 and N operational amplifier 120 are couple to respectively pmos driver MPD and NMOS driver MND, below pmos driver MPD and NMOS driver MND are called the first driver MPD and the second driver MND.The output of P operational amplifier 110 further is couple to first a diverter switch SW
p, and the first diverter switch SW
pBe couple to drift current, and the output of N operational amplifier 120 further is couple to second a diverter switch SW
n, and the second diverter switch SW
nAlso be couple to above-mentioned drift current.Can see through the first off-centre circuit and the second off-centre circuit, be offset respectively the first driver MPD and the second driver MND, in the present embodiment, the mode that can see through P offset transistor MPB and N offset transistor MNB provides drift current, P offset transistor MPB and N offset transistor MNB namely be offset the first driver MPD and the second driver MND, so can be a specific embodiment of the first off-centre circuit and the second off-centre circuit.the output of the first driver MPD and the second driver MND, see through respectively the first ratio (scaling) circuit and the second ratio circuit, be couple to digital control circuit 150, wherein, the first ratio circuit is couple to this first driver MPD, for generation of one first proportional (scaled) electric current, this first proportional electric current is directly proportional to this electric current that this exports the first driver MPD of this digital control circuit 150 to, and one second ratio circuit, be couple to this second driver MND, for generation of one second proportional electric current, this second proportional electric current is directly proportional to this electric current of this second driver MND that exports this digital control circuit 150 to, and above-mentioned the first ratio circuit and the second ratio circuit can be embodied as respectively the first ratioed transistor MPS and the second ratioed transistor MNS in this embodiment, so the present invention is not as limit, anyly can realize that the above-mentioned functions circuit all can.So in this embodiment, the output of the first driver MPD and the second driver MND sees through respectively the first ratioed transistor MPS and the second ratioed transistor MNS, is couple to digital control circuit 150.And the output control signal CTRL of digital control circuit 150 is couple to the first diverter switch SW
pAnd the second diverter switch SW
nIf control signal CTRL is high level (the first logic level), the first diverter switch SW
pOpen, and the second diverter switch SW
nClosure is if control signal CTRL is low (the second logic level) vice versa.In this embodiment, the first diverter switch SW
pAnd the second diverter switch SW
nCan be referred to as an enable circuits, be used for coupling respectively the first off-centre circuit, P offset transistor MPS for example, and second off-centre circuit, N offset transistor MNS for example, and enable this first off-centre circuit or the second off-centre circuit according to control signal CTRL, and said process also can be summarized as digital control circuit 150 this first proportional electric current of supervision and this second proportional electric currents, to produce this control signal, note that the I in Fig. 1
BRepresent the source electric current, C
cp, C
cnBe electric capacity, V
DDBe supply voltage, and In-, In+ represent input.
When the load current vanishing or just become, be a sign: driving amplifier circuit 100 needs outflow of bus current, and therefore, driver switches in this point, be drift current through operating thus the second driver MND skew, and the first driver MPD opens (active).Similarly, when the load current vanishing or become negatively, that is also a sign: driving amplifier 100 need to draw electric current, and driver switches again in this point.Due to the symmetry of driving amplifier circuit 100, when system did not have the signal input, the electric current that passes the first driver MPD and the second driver MND equaled drift current, and there is no electric current in load place.In the case, any one in the first driver MPD or the second driver MND can be opened.
See also Fig. 2, Fig. 2 is the schematic diagram of digital control circuit 150 as shown in Figure 1.The electric current of scaled (scaled-down) of electric current in ratioed transistor MPS and ratioed transistor MNS bearing ratio the first driver MPD and the second driver MND.Digital control circuit 150 is comprised of the first comparator 152 and the second comparator 154 that (the first comparator 152 and the second comparator 154 are used for the relatively size of electric current, so also can be referred to as the first current comparator and the second current comparator), wherein, the first comparator 152 is for the electric current I with ratioed transistor MPS
pWith the first reference current I
Ref-pMake comparisons, and the electric current I that the second comparator 154 is used for ratioed transistor MNS
nWith the second reference current I
Ref-nMake comparisons, wherein, this first reference current I
Ref-pHas an absolute value between the drift current amplitude of zero and this skew the first driver MPD, this second reference current I
Ref-nHas an absolute value between the drift current amplitude of zero and this skew the second driver MND.The first comparator 152 and the second comparator 154 are couple to respectively the first Schmidt (Schmitt) buffer (buffer) 162 and second Schmidt's buffer 164, be used for exporting respectively the first triggering signal and the second triggering signal according to the comparative result of the first comparator 152 and the second comparator 154, and as the input signal of latch units 170, wherein, S end and the R of input and latch unit 170 hold (as shown in the figure) respectively for the first triggering signal and the second triggering signal.Above-mentioned signal all is input to latch units 170, and according to the first triggering signal and the second triggering signal, sets (set) or (reset) latch units 170 of resetting.Furtherly, when there is no signal, so load current exists, and latch units 170 still (is labeled as Q according to a setting or Reset Status in output
B) control signal of output.Then this control signal output send into the 3rd Schmidt's buffer 180, then exports control signal CTRL to the first diverter switch SW
pAnd the second diverter switch SW
n
See also Fig. 1 and Fig. 2.With reference to the driving amplifier circuit 100 in figure 1, the digital control circuit 150 in Fig. 2 is described below.The starting stage of hypothesis driven amplifier circuit 100 is the first diverter switch SW
pOpen, and the second diverter switch SW
nClosure, digital controlled signal CTRL is high level, thus driving amplifier circuit 100 output currents, and the second driver MND has drift current.Therefore the electric current by the first driver MPD is that load current adds drift current.If load current vanishing or lower, the first comparator 152 of digital control circuit 150 is with escape (trip) so, and simultaneously to latch units 170 output signals, this signal designation driver connects and need to be switched.Therefore control signal CTRL can become low level, and the second driver MND carrying drift current deducts the electric current of load current so the first driver MPD carries drift current, and load current draws from load.If load current escape again is zero or higher, the second comparator 154 of digital control circuit 150 will escape, the latch units 170 of therefore resetting.This will cause that control signal CTRL becomes high level, and the second driver MND can carry drift current and the first driver MPD will output current.Above-mentioned two states are all stable state.Furtherly, use Schmidt's buffer can guarantee the output constant signal, and Schmidt's buffer have hysteresis (hysteresis) function.This also guarantees, though electric current in reference current place's vibration, so digital control electric current 150 can not exported a control signal that always changes yet.When there is no load current, the electric current by the first driver MPD will equal drift current, and the drift current that the electric current by MND equals to bear.Therefore depend on the previous state of driving amplifier circuit 100, control signal CTRL can or be high level, is perhaps low level.Still can provide the stable state of driving amplifier circuit 100.
When the electric current (for example) by the second driver MND approaches zero, can not find out very significantly so.But the electric current of working as the second driver MND just becomes, and latch units 170 escape the first diverter switch SW
pAnd the second diverter switch SW
nSo the first driver MPD output current this moment is got back to drift current to driving amplifier circuit 100 by the electric current " jumping " of the second driver MND.Therefore driving amplifier circuit 100 is provided at the complete digital method that automaticallyes switch between outflow of bus current (current source) and Current draw (current sinking).The use of the Schmidt's buffer in digital control circuit 150 allows digital control, and has eliminated feedback continuous time (continuous-time) (feedback) around digital control circuit 150.This Circuits System is complicated unlike traditional realization, has also stoped the generation of the problem of breakdown current (shoot-throughcurrent).Furtherly, even when load current not, digital control circuit 150 enables this driving amplifier circuit 100 and always operates on stable state.
Under closed loop (closed-loop) condition, when there is no the signal input, the direct current biasing of P operational amplifier and N operational amplifier (DC offset) may be different.Therefore, when control signal is high level, the direct voltage of output will be different when control signal is low level.This closed loop direct current biasing needs by balanced, produces to avoid circuit for generating the situation that surpasses mean value or analogue ground threshold signal.In order to overcome this problem, respectively according to the driving amplifier that utilizes DC offset calibration that provides of the second embodiment of the present invention and the 3rd embodiment.
Please refer to Fig. 3.Fig. 3 is the schematic diagram of driving amplifier circuit 300 according to a second embodiment of the present invention.Except driving amplifier circuit 300 comprised balanced (offset equalization) circuit 310 of biasing, the circuit of the circuit of driving amplifier circuit 300 and the first embodiment was basic identical.Biasing equalizing circuit 310 is couple on the internal node (internal node) of P operational amplifier 110 and N operational amplifier 120.Biasing equalizing circuit 310 is optionally adjusted the one of P operational amplifier 110 and N operational amplifier 120 or both direct current biasings, all has equal direct current biasing to guarantee P operational amplifier 110 and N operational amplifier 120.But biasing equalizing circuit 310 accomplished in various ways.Biasing equalizing circuit 310 can comprise a plurality of weighted currents source or a plurality of resistance.Biasing equalizing circuit 310 can see through the use of control signal and calibrate, and perhaps calibrates in test level.Those skilled in the art can understand, and the unit that forms the biasing equalizing circuit can much be revised and be out of shape, but do not depart from the balanced effect of biasing.Therefore the biasing equalizing circuit is not limited only to above-mentioned realization, in the scope that does not depart from spirit of the present invention, can make various modifications and distortion to design.
But the present invention also provides another can reach same effect the circuit that does not need to calibrate.Please refer to Fig. 4.Fig. 4 is the schematic diagram of the driving amplifier circuit 400 of a third embodiment in accordance with the invention.Can use external circuit to adjust the direct current biasing of P operational amplifier 110 and N operational amplifier 120, in this embodiment, external circuit may be embodied as non-essential resistance.In circuit 400, both inverting input of P operational amplifier 110 and N operational amplifier 120 all is connected to a plurality of resistance R
CA, R
CB, R
DA, R
DBAnd R
T, wherein, R
TBe tap variable (tapped variable) resistance.In addition, resistance R
CAAnd R
CBBe connected to earth terminal.Particularly, resistance R
DAAnd R
DBCoupled in series tap variable resistor R
T, resistance R
DABe couple to the inverting input of P operational amplifier, and resistance R
DBBe couple to the inverting input of N operational amplifier, resistance R
CAAnd R
CBBe coupled in series in earth terminal, resistance R
DAAnd resistance R
DBBetween.And resistance R
BAnd R
ABe coupled in series between the output and input voltage vin of driving amplifier circuit 400, be used for setting closed loop gain.A resistance to and B resistance to (that is, R
CAAnd R
CB, and R
DAAnd R
DB) have an identical value (resistance value).Resistance R
THave the resistance value less than other resistance, for example, resistance R
THas the resistance R of ratio
CA, R
CB, R
DAAnd R
DBThe resistance value of little several orders of magnitude.Resistance R
TTap (tap) have reference voltage V
REFReference voltage V
REFValue and the value of other resistance can be chosen as, for example work as R
TTap when being in mid point, a certain voltage of appearance of the inverting input of P operational amplifier 110 and N operational amplifier 120 (simulation ground).When this tap is removed from mid point, divide the direct voltage of other inverting input different.Therefore, if really have direct current biasing between P operational amplifier 110 and N operational amplifier 120, see through and remove resistance R
TTap, direct current biasing can be proofreaied and correct (corrected) so.In this way, control voltage and just can switch to low level (vice versa) from high level, therefore the output at driving amplifier circuit 400 does not just have the change of voltage.In Fig. 4, resistance R
AAnd R
BFor being coupled to the resistance between input voltage vin and load 160.
Therefore the present invention provides the automatic control of drawing electric current and inflow current (sinking and sourcing current), the method that is used for compensating any direct current biasing also is provided, this direct voltage occurs on operational amplifier when automatically controlling generation.
Any those skilled in the art, without departing from the spirit and scope of the present invention, when can do a little change and retouching, so protection scope of the present invention is as the criterion when looking appended the claim person of defining.
Claims (17)
1. driving amplifier circuit comprises:
The first driver is used for flowing out load current to load;
The second driver is used for drawing this load current from this load;
The first operational amplifier is couple to differential input signal, and this first operational amplifier is used for driving this first driver;
The second operational amplifier is couple to this differential input signal, and this second operational amplifier is used for driving this second driver;
The first off-centre circuit is used for this first driver of skew;
The second off-centre circuit is used for this second driver of skew;
Enable circuits is couple to this first off-centre circuit and this second off-centre circuit, is used for enabling this first off-centre circuit or this second off-centre circuit according to control signal;
Digital control circuit is couple to this enable circuits, is used for monitoring the electric current of this first driver output and the electric current of this second driver output, to produce this control signal; And
The biasing equalizing circuit, be coupled between the internal node of the internal node of this first operational amplifier and this second operational amplifier, be used for to adjust at least one direct current biasing of this first operational amplifier and this second operational amplifier, so that this first operational amplifier and this second operational amplifier have identical direct current biasing;
Wherein, this digital control circuit comprises:
The first current comparator is used for electric current and first reference current of this first driver output are compared;
The second current comparator is used for electric current and second reference current of this second driver output are compared;
First Schmidt's buffer is couple to this first current comparator, is used for the comparative result according to this first current comparator, output the first triggering signal;
Second Schmidt's buffer is couple to this second current comparator, is used for the comparative result according to this second current comparator, output the second triggering signal; And
Latch units is couple to this first Schmidt buffer, and this second Schmidt buffer, is used for according to this first triggering signal and this second triggering signal, exports this control signal.
2. driving amplifier circuit as claimed in claim 1, is characterized in that, this enable circuits comprises:
The first diverter switch is used for according to this control signal, and this first driver is coupled to this first off-centre circuit; And
The second diverter switch is used for according to this control signal, and this second driver is coupled to this second off-centre circuit.
3. driving amplifier circuit as claimed in claim 2, is characterized in that, when this control signal had the first logic level, this first diverter switch was opened, and this second diverter switch is closed, so that this first driver is opened and this second driver is offset; When this control signal had the second logic level, this first diverter switch was closed, and this second diverter switch is opened, so that this first driver is offset and this second driver is opened.
4. driving amplifier circuit as claimed in claim 1, it is characterized in that, this digital control circuit is made comparisons electric current and this first reference current of this first driver output, and electric current and this second reference current of this second driver output compared, and this digital control circuit utilizes comparative result to produce this control signal, to be used for this enable circuits;
Wherein, this first reference current have be positioned at zero with the drift current amplitude of this first driver that has been offset between absolute value, this second reference current has the absolute value between the drift current amplitude that is positioned at zero and this skew the second driver.
5. driving amplifier circuit as claimed in claim 4, is characterized in that, this digital control circuit further comprises:
The 3rd Schmidt's buffer is couple to this latch units, is used for this control signal of buffer memory.
6. driving amplifier circuit as claimed in claim 1 is characterized in that further comprising:
The first ratio circuit is couple to this first driver, and for generation of the first proportional electric current, the electric current that this first proportional electric current and this this first driver that exports this digital control circuit to are exported is proportional; And
The second ratio circuit is couple to this second driver, and for generation of one second proportional electric current, this second proportional electric current is proportional with the electric current of this second driver output that exports this digital control circuit to;
Wherein, this digital control circuit monitors this first proportional electric current and this second proportional electric current, to produce this control signal.
7. driving amplifier circuit as claimed in claim 1, is characterized in that, this biasing equalizing circuit comprises a plurality of weighted currents source or a plurality of resistance.
8. driving amplifier circuit as claimed in claim 1, is characterized in that, this biasing equalizing circuit can be calibrated.
9. driving amplifier circuit comprises:
The first driver is used for flowing out load current to load;
The second driver is used for drawing this load current from this load;
The first operational amplifier is couple to differential input signal, and this first operational amplifier is used for driving this first driver;
The second operational amplifier is couple to this differential input signal, and this second operational amplifier is used for driving this second driver;
The first off-centre circuit is used for this first driver of skew;
The second off-centre circuit is used for this second driver of skew;
Enable circuits is couple to this first off-centre circuit and this second off-centre circuit, is used for enabling this first off-centre circuit or this second off-centre circuit according to a control signal;
Digital control circuit is couple to this enable circuits, is used for monitoring the electric current of this first driver output and the electric current of this second driver output, to produce this control signal; And
External circuit, be couple between the inverting input of this first operational amplifier and this second operational amplifier, be used for to adjust at least one direct current biasing of this first operational amplifier and this second operational amplifier, so that this first operational amplifier and this second operational amplifier have identical direct current biasing, wherein this external circuit comprises:
At least one tap variable resistor is couple to reference to electrical equipment, and wherein, during at diverse location, the direct voltage of this first operational amplifier is different from the direct voltage of this second operational amplifier when this tap variable resistor selectivity tap;
Wherein, this digital control circuit comprises:
The first current comparator is used for electric current and first reference current of this first driver output are compared;
The second current comparator is used for electric current and second reference current of this second driver output are compared;
First Schmidt's buffer is couple to this first current comparator, is used for comparative result output first triggering signal according to this first current comparator;
Second Schmidt's buffer is couple to this second current comparator, is used for comparative result output the second triggering signal according to this second current comparator; And
Latch is couple to this first Schmidt buffer and this second Schmidt buffer, is used for exporting this control signal according to this first triggering signal and this second triggering signal.
10. driving amplifier circuit as claimed in claim 9, is characterized in that, this external circuit further comprises:
The first resistance and the second resistance, this tap variable resistor of coupled in series, this first resistance is couple to the inverting input of this first operational amplifier, and this second resistance is couple to the inverting input of this second operational amplifier; And
The 3rd resistance and the 4th resistance are coupled in series between earth terminal, this first resistance and this second resistance.
11. driving amplifier circuit as claimed in claim 10 is characterized in that further comprising:
The 5th resistance and the 6th resistance are coupled in series between the output and this input voltage of this driving amplifier circuit, are used for setting closed loop gain.
12. driving amplifier circuit as claimed in claim 10, it is characterized in that, this first resistance and this second resistance have same resistance value, the 3rd resistance and the 4th resistance have same resistance value, and this tap variable resistor has than this first resistance and the less resistance value of the 3rd resistance.
13. driving amplifier circuit as claimed in claim 9 is characterized in that, this enable circuits comprises:
The first diverter switch is used for according to this control signal, this first driver being couple to this first off-centre circuit; And
The second diverter switch is used for according to this control signal, this second driver being couple to this second off-centre circuit.
14. driving amplifier circuit as claimed in claim 13, it is characterized in that, when this control signal had the first logic level, this first diverter switch was for opening, and this second diverter switch is closed so that this first driver for this second driver of unlatching for to be offset; And when this control signal when the second logic level is arranged, closed and this second diverter switch of this first diverter switch is for opening, so that this first driver is offset and this second driver is driver.
15. driving amplifier circuit as claimed in claim 11, it is characterized in that, this digital control circuit compares electric current and the reference current of the output of this first driver and this second driver, then utilizes comparative result producing this control signal, thereby is transferred to this enable circuits;
Wherein, this first reference current and have zero and this be offset absolute value between the drift current amplitude of the first driver, this absolute value, and this second reference current have zero and this be offset absolute value between the drift current amplitude of the second driver.
16. driving amplifier circuit as claimed in claim 9 is characterized in that, this digital controlled signal further comprises:
The 3rd Schmidt's buffer is couple to this latch, is used for this control signal of buffer memory.
17. driving amplifier circuit as claimed in claim 9 is characterized in that, further comprises:
The first ratio circuit is couple to this first driver, for generation of to the electric current proportional first proportional electric current of this first driver output, thereby be transferred to this digital control circuit; And
The second ratio circuit is couple to this second driver, for generation of to the electric current proportional second proportional electric current of this second driver output, thereby be transferred to this digital control circuit;
Wherein, this digital control circuit monitors this first proportional electric current and this second proportional electric current, to produce this control signal.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/606,194 | 2009-10-27 | ||
| US12/606,194 US7786804B2 (en) | 2008-06-02 | 2009-10-27 | Driving amplifier circuit with digital control and DC offset equalization |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102055417A CN102055417A (en) | 2011-05-11 |
| CN102055417B true CN102055417B (en) | 2013-06-12 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201010131287 Expired - Fee Related CN102055417B (en) | 2009-10-27 | 2010-03-24 | Driving amplifier circuit |
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|---|---|
| CN (1) | CN102055417B (en) |
| TW (1) | TW201115908A (en) |
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| KR102729883B1 (en) * | 2016-12-30 | 2024-11-13 | 엘지디스플레이 주식회사 | Operational amplifier and touch display device using the same |
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| CN1607564A (en) * | 2003-09-26 | 2005-04-20 | 恩益禧电子股份有限公司 | Differential ab class amplifier circuit and drive circuit using the same |
| US7474153B1 (en) * | 2006-05-23 | 2009-01-06 | Marvell International Ltd. | Dual stage source/sink amplifier circuit with quiescent current determination |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3338334B2 (en) * | 1996-06-24 | 2002-10-28 | 東芝マイクロエレクトロニクス株式会社 | Amplifier circuit |
| JP5028189B2 (en) * | 2007-08-30 | 2012-09-19 | オンセミコンダクター・トレーディング・リミテッド | Amplifier circuit |
-
2010
- 2010-03-16 TW TW99107669A patent/TW201115908A/en unknown
- 2010-03-24 CN CN 201010131287 patent/CN102055417B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1607564A (en) * | 2003-09-26 | 2005-04-20 | 恩益禧电子股份有限公司 | Differential ab class amplifier circuit and drive circuit using the same |
| US7474153B1 (en) * | 2006-05-23 | 2009-01-06 | Marvell International Ltd. | Dual stage source/sink amplifier circuit with quiescent current determination |
Non-Patent Citations (5)
| Title |
|---|
| 1.6GHz高线性度低功耗CMOS驱动放大器;闫涛涛等;《信息技术》;20080925(第9期);68-70 * |
| A CMOS Large-Swing Low-Distortion Three-Stage Class AB Power Amplifier;FRANK N.L.OP’T EYNDE等;《IEEE JOURNAL OF SOLID-STATE CIRCUITS》;19900228;第25卷(第1期);265-273 * |
| FRANK N.L.OP’T EYNDE等.A CMOS Large-Swing Low-Distortion Three-Stage Class AB Power Amplifier.《IEEE JOURNAL OF SOLID-STATE CIRCUITS》.1990,第25卷(第1期), |
| JP特开平10-75131A 1998.03.17 |
| 闫涛涛等.1.6GHz高线性度低功耗CMOS驱动放大器.《信息技术》.2008,(第9期), |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102055417A (en) | 2011-05-11 |
| TW201115908A (en) | 2011-05-01 |
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