CN102034928A - Phase-change memory device - Google Patents

Abstract

A phase-change memory device, comprising: a lower electrode, a phase-change material pattern electrically connected to the lower electrode, and an upper electrode electrically connected to the phase-change material pattern. The lower electrode may include: a first structure including a metal semiconductor compound; a second structure on the first structure including a metal nitride material and including a a lower portion of large width; and a third structure comprising a metal nitride material comprising an element X comprising an element X selected from the group consisting of silicon, boron, At least one selected from the group of aluminum, oxygen and carbon.

Description

phase change memory device

technical field

Example embodiments relate to a phase change memory device including a phase change material whose phase is changed by heat.

Background technique

Phase change memory devices can be used to store information based on the state of a phase change material in the device. Reduced power consumption is desired to provide high integration of phase change memories.

Contents of the invention

A feature of an embodiment is to provide a phase change memory device having a lower electrode including a lower portion having a low resistance and an upper portion having a high resistance.

At least one of the above and other features and advantages may be achieved by providing a phase change memory device comprising: a lower electrode, a phase change material pattern electrically connected to the lower electrode, and a phase change material pattern electrically connected to the lower electrode. The upper electrode of the phase change material pattern. The lower electrode may include: a first structure including a metal semiconductor compound; a second structure on the first structure including a metal nitride material and including a a lower portion of a greater width; and a third structure comprising a metal nitride material comprising an element X, said third structure being located on said second structure, said element X comprising a metal nitride material selected from the group consisting of silicon, At least one selected from the group of boron, aluminum, oxygen and carbon.

The second structure may include a lower portion having a first width and an upper portion having a second width smaller than the first width, and the upper portion of the second structure may extend vertically from a top surface of the lower portion .

The second structure may have an 'L' shape, and the second structure may include: a first vertical surface; a first horizontal surface extending horizontally from a lower portion of the first vertical surface a second horizontal surface extending horizontally from an upper portion of the first vertical surface; a third horizontal surface parallel to the second horizontal surface and spaced therefrom by a predetermined interval a second vertical surface connecting the second horizontal surface to the third horizontal surface; and a third vertical surface connecting the first horizontal surface to the the third horizontal surface.

The third structure may be on the second horizontal surface.

The device may further include an insulating pattern adjacent to the first vertical surface and the third vertical surface. The upper portion of the insulating pattern may include an element X-containing oxide material or an element X-containing nitride material.

The upper portion of the insulation pattern may have the same thickness and height as the third structure.

The third structure may be on the second vertical surface and the third horizontal surface.

The first structure may include titanium silicide, the second structure may include a titanium nitride material, and the third structure may include an X-containing titanium nitride material.

The device may further include a fourth structure including a metal oxide material between the second structure and the third structure.

The fourth structure may include a titanium oxide material.

The device may further include a fourth structure on the third structure, the fourth structure comprising a titanium nitride material containing the element Y. The element Y may include at least one selected from the group consisting of silicon, boron, aluminum, oxygen, and carbon.

Element Y can be different from element X.

The device may further include a lower structure formed under the first structure, and the lower structure includes silicon. The first and second structures may be formed by forming a metal layer on the lower structure and nitriding the resultant.

The metal layer may include titanium.

The third structure is formed by subjecting the second structure to heat treatment or plasma treatment using a first precursor including nitrogen and a second precursor including element X.

The element X may be Si, and the second precursor may include at least one selected from the group consisting of SiH ₄ , Si ₂ H ₆ , Si ₃ H ₈ , SiCl ₂ H ₂ and bis(t-butylamino)silane .

The element X may be boron, and the second precursor may include at least one selected from the group consisting of B ₂ H ₆ and triethylborate.

The element X may be aluminum, and the second precursor may include a compound selected from the group consisting of AlCl ₃ , hafnium tetraethylmethylamide, dimethylaluminum hydride, and dimethylethylamine alane. At least one of the group.

The element X may be oxygen, and the second precursor may include at least one selected from the group consisting of oxygen and ozone gas.

_The element X may be carbon, and the second precursor includes _C2H4 .

Description of drawings

The above and other features and advantages will become more apparent to those skilled in the art by describing in detail example embodiments with reference to the accompanying drawings, in which:

FIG. 1 illustrates an equivalent circuit diagram of a memory device according to example embodiments.

FIG. 2 illustrates a plan view of the memory device illustrated in FIG. 1 .

FIG. 3 illustrates a cross-sectional view of a memory device according to example embodiments.

FIG. 4 illustrates a schematic cross-sectional view of a phase change memory device according to another example embodiment.

FIG. 5 illustrates a schematic cross-sectional view of a phase change memory device according to another example embodiment.

FIG. 6 illustrates a schematic cross-sectional view of a phase change memory device according to another example embodiment.

7 to 16 illustrate schematic cross-sectional views of stages in a method of forming the phase change memory device illustrated in FIG. 3 .

FIG. 18 illustrates a schematic cross-sectional view of a phase change memory device according to yet another example embodiment.

6 to 12 and 17 illustrate schematic cross-sectional views of stages in a method of forming the phase change memory device illustrated in FIG. 18 .

FIG. 20 illustrates a schematic cross-sectional view of a phase change memory device according to yet another example embodiment.

6 to 12 and 19 illustrate schematic cross-sectional views of stages in a method of forming the phase change memory device illustrated in FIG. 20 .

FIG. 21 illustrates transition characteristics of a conventional phase change memory device.

FIG. 22 illustrates transition characteristics of the phase change memory device according to the first example embodiment.

FIG. 23 illustrates endurance characteristics of the phase change memory device according to the first example embodiment.

Detailed ways

Korean Patent Application No. 10-2009-0092615, filed with the Korean Intellectual Property Office on Sep. 29, 2009, and entitled "Phase-Change Memory Device," is hereby incorporated by reference.

Example embodiments are described more fully below with reference to the accompanying drawings; however, example embodiments may be embodied in different forms and should not be construed as limited to the embodiments provided herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will convey the scope of the invention to those skilled in the art.

In the drawings, the dimensions of layers and regions may be exaggerated for clarity. It will also be understood that when a layer or element is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. Further, it will be understood that when a layer is referred to as being 'under' another layer, it can be directly under, and one or more intervening layers may also be present. In addition, it will also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present. Like reference numerals refer to like elements throughout the drawings.

[First exemplary embodiment]

1 illustrates an equivalent circuit diagram of a memory device according to example embodiments, FIG. 2 illustrates a plan view of the memory device illustrated in FIG. 1 , and FIG. 3 illustrates a cross-sectional view of the memory device according to example embodiments.

According to example embodiments, the memory devices illustrated in FIGS. 1 to 3 are phase change memory devices.

1 and 2, the memory device may include a bit line BL, a word line WL, a phase change material pattern Rp, and a switching device S. Referring to FIG.

Each of the bit lines BL may extend in a first direction, and may be arranged at the same interval in a direction perpendicular to the extending direction.

Each of the word lines WL may extend in a second direction different from the first direction, and may be arranged at the same interval in a direction perpendicular to the extending direction. For example, the first direction may be perpendicular to the second direction.

Bit lines BL may be formed to intersect word lines WL. The switching device S may be formed at the intersection of the bit line BL and the word line WL.

The switching device S may be electrically connected to the word line WL.

A phase change material pattern Rp may be formed between the bit line BL and the switching device S. Referring to FIG. The phase change material pattern Rp may be used as a data storage element. In addition, the switching devices S may be electrically connected to each other via the lower electrode BEC to correspond to the phase change material pattern Rp. As a result, the bit line BL may be electrically connected to the word line WL via the phase change material pattern Rp, the lower electrode BEC, and the switching device S. Referring to FIG.

The memory device is described in further detail below.

Referring to FIG. 3 , a memory device may include a word line 104 formed on a substrate 100 , and a switching device 120 , insulating patterns 108 , 130 and 138 , lower electrodes 124 , 134 and 136 , a phase change material pattern 140 and an upper electrode 142 .

The substrate 100 may include field regions and active regions. Field regions may be formed by the isolation pattern 102 . The active area may be defined by a field region. For example, the active region may have a line shape extending in the first direction.

Word lines 104 may be formed in the substrate 100 . According to example embodiments, the word line 104 may have a line shape extending in the second direction. In an embodiment, the word line 104 may be formed in the substrate 100 , and a top surface of the word line 104 may have substantially the same height as that of the substrate 100 . The word line 104 may be formed of a conductive material such as silicon doped with impurities, a metal, or a metal compound.

A buffer layer 105 and/or an etch stop layer 106 may be disposed on the isolation pattern 102 .

The switching device 120 may be formed to be electrically connected to the word line 104 on the substrate 100 .

According to an example embodiment, the switching device 120 may be a diode 120 . The diode 120 may include a lower silicon pattern 116 doped with a first impurity and an upper silicon pattern 118 doped with a second impurity. The first and second impurities may include at least one selected from group III elements or group V elements in the periodic table. The first and second impurities can be substantially different from each other. For example, when the first impurity includes at least one selected from group III elements of the periodic table, the second impurity may include at least one selected from group V elements of the periodic table. In addition, a diode 120 may be formed in contact with the top surface of the word line 104 . For one example, diode 120 may have a width that is substantially narrower than the width of word line 104 . For another example, switching device 120 may have substantially the same width as word line 104 .

According to other example embodiments, the switching device 120 may be a transistor (not shown). A transistor may include a gate insulating layer, a gate electrode, and source/drain regions.

The following description gives an example of using a diode as the switching device 120 . However, embodiments are not limited to using diodes as switching devices 120 .

The insulating patterns 108 , 130 and 138 may include a first insulating pattern 108 , a second insulating pattern 130 and a third insulating pattern 138 . The insulating patterns 108, 130, and 138 may include an oxide material, a nitride material, or an oxynitride material. Examples of oxide materials, nitride materials, and oxynitride materials include silicon oxide materials, silicon nitride materials, and silicon oxynitride materials, respectively. According to example embodiments, the first insulating pattern 108, the second insulating pattern 130, and the third insulating pattern 138 may include substantially the same material. According to other example embodiments, the first insulating pattern 108 , the second insulating pattern 130 and the third insulating pattern 138 may include substantially different materials.

The first insulating pattern 108 may be formed to insulate between adjacent switching devices 120 . According to example embodiments, the first insulating patterns 108 may be formed to be spaced apart by a width of the switching device 120 . In addition, a first insulating pattern 108 may be formed to cover a portion of the isolation pattern 102 and the word line 104 . A top surface of the first insulating pattern 108 may have the same height as that of the lower electrodes 124 , 134 and 136 .

According to other example embodiments, referring to FIG. 4 , the first insulating pattern 108 may include an upper portion 137 and a lower portion 109 . The upper portion 137 may be an element X-containing oxide material or a nitride material. For example, the upper portion 137 of the first insulating pattern 108 may be formed of an element X-containing silicon oxide material or an element X-containing silicon nitride material. The element X may include at least one selected from the group consisting of silicon (Si), boron (B), aluminum (A1), oxygen (O), and carbon (C). The thickness and height of the upper part 137 may be substantially the same as those of the third structure 136 of the lower electrode. The lower portion 109 may be formed of, for example, a silicon oxide material or a silicon nitride material. Additionally, the lower portion 109 may further include a buffer layer 105 and/or an etch stop layer 106 .

The second insulating pattern 130 may be formed adjacent to the lower electrodes 124 , 134 and 136 , the first insulating pattern 108 and the third insulating pattern 138 .

The third insulating pattern 138 may be formed adjacent to the lower electrodes 124 , 134 and 136 , the first insulating pattern 108 and the second insulating pattern 130 . The shapes of the lower electrodes 124 , 134 and 136 may be determined according to the depth and length of the third insulating pattern 138 .

The lower electrodes 124 , 134 and 136 may be electrically connected to the switching device 120 . According to example embodiments, when the switching device 120 is the diode 120 , the lower electrodes 124 , 134 and 136 may be formed on the diode 120 and the lower electrodes 124 , 134 and 136 may be formed in direct contact with the diode 120 . According to another example embodiment, when the switching device 120 is a transistor, the lower electrodes 124, 134, and 136 may be formed to be electrically connected to the transistor through a connection pattern.

The lower electrodes 124, 134, and 136 may include: a first structure 124 including a metal silicide; a second structure 134 including a metal nitride material; and a third structure 136 including a metal nitride material including element X. According to example embodiments, the first structure 124 may include titanium silicide (TiSi ₂ ), the second structure 134 may include a silicon nitride material (TiN), and the third structure 136 may include a titanium nitride material containing element X (TiXN). .

The first structure 124 may be formed to be electrically connected to the switching device 120 . According to example embodiments, when the switching device 120 is the diode 120 , the first structure 124 may be formed to contact an upper portion of the diode 120 . Also, the first structure 124 may have a circular shape when viewed from a plan view, and it may have a rectangular shape when viewed from a cross-sectional view. The width of the first structure 124 may be substantially the same as the width of the diode 120 .

The second structure 134 may be formed on the first structure 124, and a width of a lower portion thereof may be greater than a width of an upper portion thereof. The width of the lower portion of the second structure 134 may be substantially the same as the width of the lower portion of the first structure 124 .

According to example embodiments, the second structure 134 may include a lower portion having a first width and an upper portion having a second width smaller than the first width. The upper portion of the second structure 134 may vertically extend from the top surface of the lower portion. For example, the second structure 134 may have an "L" shape. In this case, the second structure 134 may include: a first vertical surface V1 in contact with the first insulating pattern 108; a first horizontal surface H1 extending horizontally from a lower portion of the first vertical surface V1; The second horizontal surface H2 extending horizontally on the upper part of the horizontal surface; the third horizontal surface H3, which is parallel to the second horizontal surface H2 and separated from it by a predetermined distance; the second vertical surface V2, the second vertical surface The surface V2 connects the second horizontal surface H2 to the third horizontal surface H3; and the third vertical surface V3 connects the first horizontal surface H1 to the third horizontal surface H3.

According to another example embodiment, the second structure 134 may have a "J" shape. According to another example embodiment, the second structure 134 may have a cylindrical, "U" or rectangular shape.

The third structure 136 may be formed on the second structure 134 . For example, when the second structure 134 has an 'L' shape, the third structure 136 may be formed on the second horizontal surface H2 of the second structure 134 . The third structure 136 may have a semicircular shape when viewed from a plan view, and may have a rectangular shape when viewed from a cross section. The width of the third structure 136 may be substantially the same as the second width.

The third structure 136 may be formed of a material having higher resistance than the first structure 124 and the second structure 134 . According to example embodiments, the third structure 136 may have a single layer structure. The third structure 136 may include a titanium nitride material (TiXN) containing an element X, and the element X may include at least one selected from the group consisting of Si, B, Al, O, and C.

According to another exemplary embodiment, as shown in FIG. 5 , the third structure may have a multilayer structure in which a lower pattern 135 including a titanium nitride material containing element X (TiXN) and a titanium nitride material including element Y Upper patterns 136 of material (TiYN) are stacked. The elements X and Y may be different from each other, and each of the elements X and Y may include at least one selected from the group of Si, B, Al, O, and C.

According to another exemplary embodiment, as shown in FIG. 6 , the third structure may have a structure in which the lower pattern 135 includes a titanium oxide material (Ti0 ₂ ) and a titanium nitride material (TiXN) including an element X. The upper patterns 136 are stacked. The element X may include at least one selected from the group of Si, B, Al, O, and C.

The phase change material pattern 140 may be electrically connected to the lower electrodes 124 , 134 and 136 . According to example embodiments, a phase change material pattern 140 may be formed on the lower electrodes 124 , 134 and 136 and the insulating patterns 108 , 130 and 138 . The phase change material pattern 140 may directly contact the lower pattern to be electrically connected thereto.

The phase change material pattern 140 may be formed of, for example, chalcogenides including at least one of Group VI materials of the periodic table. The chalcogenide-based metal element may include Ge, Se, Sb, Te, Sn, and/or As. Combinations of elements may enable the formation of chalcogenide phase transition patterns. For example, the combination may be at least one selected from the group consisting of GaSb, InSb, InSe, Sb ₂ Te, SbSe, GeTe, Sb ₂ Te, SbSe, GeTe, Ge ₂ Sb ₂ Te ₅ , InSbTe, GaSeTe, SnSb ₂ Te, InSbGe, AgInSbTe, (GeSn)SbTe, GeSb(SeTe), and Te ₈₁ GeI ₅ Sb ₂ S ₂ . In addition, in order to enhance the characteristics of the phase change material pattern 140, elements Ag, In, Bi, and Pb may be mixed in addition to the chalcogenide-based metal elements.

The upper electrode 142 may be formed to be electrically connected to the phase change material pattern 140 . According to example embodiments, the upper electrode 142 may contact the phase change material pattern 140 to be electrically connected thereto. In an embodiment, the width of the upper electrode 142 may be substantially the same as that of the phase change material pattern 140 . In another embodiment, the width of the upper electrode 142 may be substantially different from the width of the phase change material pattern 140 .

The upper electrode 142 may include at least one selected from the group consisting of Ti, TiSi, TiN, TiON, TiW, TiAlN, TiAlON, TiSIN, TiBN, W, WN, WON, WSiN, WBN, WCN, Si, Ta, SaSi, TaN, TaON, TaAlN, TaSiN, TaCN, Mo, MoN, MoSiN, MoAlN, ZrSiN, ZrAlN, and RuCoSi.

A method for forming the semiconductor device shown in FIG. 3 is described below.

7 to 16 illustrate schematic cross-sectional views of stages in a method of forming the phase change memory device shown in FIG. 3 .

Referring to FIG. 7 , isolation patterns 102 may be formed on a substrate 100 .

A semiconductor substrate 100 such as a silicon wafer or an SOI wafer can be used as the substrate 100 . The substrate 100 may include first impurities. The first impurity may include at least one selected from group III elements or group V elements of the periodic table.

Describing the process of forming the isolation pattern 102 in further detail, a pad oxide layer (not shown) and a first mask (not shown) may be sequentially formed on the substrate 100 . The pad oxide layer may include a silicon oxide layer, and may be formed through, for example, a thermal oxidation process. The first mask may have a structure in which a nitride pattern and a photoresist pattern are sequentially stacked. The first mask may be used as an etch mask to etch the pad oxide layer and the substrate 100 so that pad oxide patterns and trenches may be formed. Alternatively, a liner comprising a silicon oxide material and a silicon nitride material may be formed along the surface profile of the inner surface of the trench. An isolation layer filling the trenches may be formed so that isolation patterns 102, ie, field regions, may be formed. The field region may define an active region, for example, the active region may have the shape of a line extending in the first direction.

Thereafter, word lines 104 may be formed in the active region of the substrate 100 . The word lines 104 may extend in a first direction that is substantially the same as that of the active region. The word line 104 may include silicon doped with impurities, metal or metal compound. According to example embodiments of inventive concepts, the word line 104 may be formed by implanting second impurities different from the first impurities into the active region.

Referring to FIG. 8, a first insulating pattern 108 may be formed on the substrate 100 in which the word line 104 and the isolation pattern 102 are formed. When the first insulating pattern 108 is formed, the first opening 110 exposing the upper portion of the word line 104 may be formed.

For example, a first insulating layer is formed on the substrate 100 in which the word lines 104 and the isolation patterns 102 are formed. The first insulating layer may be formed to cover the entire surface of the substrate 100 . In an embodiment, the first insulating layer may be formed of a single layer made of, for example, an oxide layer, a nitride layer, or an oxynitride layer. The oxide layer, nitride layer or oxynitride layer may be a silicon oxide layer, a silicon nitride layer and a silicon oxynitride layer, respectively. In another embodiment, the insulating layer may be formed of multiple layers in which at least one oxide layer, at least one nitride layer, and/or at least one oxynitride layer are stacked sequentially or alternately.

The first insulating layer may be formed using, for example, chemical vapor deposition (CVD), low pressure CVD (LPCVD), plasma enhanced CVD (PECVD), or high density plasma CVD (HDP CVD).

According to example embodiments, before forming the first insulating layer, the buffer layer 105 and the etch stop layer 106 may be sequentially formed on the substrate 100 in which the isolation pattern 102 and the word line 104 are formed. The etch stop layer 106 may include a material having etch selectivity with respect to the buffer layer 105 and the insulating layer. For example, when the insulating layer and the buffer layer 105 include a silicon oxide material, the etch stop layer 106 may include a silicon nitride material.

A second mask (not shown) may be formed on the first insulating layer. The second mask may include a material having etch selectivity with respect to the first insulating layer. For example, the second mask may include a nitride pattern.

The first insulating layer may be etched using the second mask as an etching mask to form the first insulating pattern 108 . The first insulating pattern 108 may cover the isolation pattern 102 and a portion of the word line 104 to partially expose the word line 104 . When the first insulating pattern 108 is formed, the first opening 110 partially exposing the word line 104 may be formed.

According to example embodiments, when the buffer layer 105 and the etch stop layer 106 are formed on the substrate 100, the buffer layer 105 and the etch stop layer 106 may also be etched while the first insulating layer is etched, so that the buffer layer 105 and the etch stop layer 106 may be formed. etch stop layer 106 .

After the first insulating pattern 108 is formed, the second mask may be removed from the substrate 100 . Removal processing can be performed using ashing processing and stripping processing.

Referring to FIG. 9 , a semiconductor layer 112 may be formed on the substrate 100 on which the first insulating pattern 108 and the word lines 104 are formed. The semiconductor layer 112 may include, for example, single crystal silicon, amorphous silicon, or polycrystalline silicon.

According to example embodiments, the semiconductor layer 112 may be formed by utilizing a selective epitaxial growth (SEG) technique using the word line 104 as a seed. When the word line 104 includes silicon doped with impurities, the semiconductor layer 112 may also include silicon. According to another example embodiment, the semiconductor layer 112 may be formed using a solid phase epitaxy (SPEG) technique.

In an embodiment, the semiconductor layer 112 may be formed to completely fill the first opening 110 . In another embodiment, the semiconductor layer 112 may be formed to partially fill a lower portion of the first opening 110 .

Referring to FIG. 10, a switching device 120 electrically connected to the word line 104 may be formed. According to example embodiments, the switching device 120 may be a diode.

Describing the process of forming the diode 120 in detail, first, when the semiconductor layer 112 completely fills the first opening 110 , the upper portion of the semiconductor layer 112 may be partially etched to form the semiconductor layer 112 partially filling the lower portion of the first opening 110 . A second opening 114 defined by the semiconductor layer 112 and the first insulating pattern 108 may be formed. The second opening 114 may have substantially the same width as the first opening 110 and may have a bottom surface at a height higher than that of the first opening (see 110 of FIG. 1 ).

Thereafter, ion implantation and diffusion processes may be used to form the first semiconductor pattern 116 doped with the third impurity and the second semiconductor pattern 118 doped with the fourth impurity. The third impurity may be different from the second impurity, and may be substantially the same as the first impurity. In addition, the fourth impurity may be substantially different from the third impurity, and may be substantially the same as the second impurity.

As a result, the diode 120 in which the first semiconductor pattern 116 and the second semiconductor pattern 118 are sequentially stacked may be formed in the first opening 110 .

Referring to FIG. 11 , a first metal layer 122 may be formed on the switching device 120 and the first insulating pattern 108 . The first metal layer 122 may include Ti. The first metal layer 122 may be continuously formed along the surface contours of the switching device 120 and the first insulating pattern 108 , and may be conformally formed without filling the second opening 114 .

The first metal layer 122 may be formed by using, for example, a PECVD process using titanium chloride (TiCl ₄ ) as a source.

According to example embodiments, when the first metal layer 122 is formed, an upper portion of the switching device 120 including silicon and a lower portion of the first metal layer 122 may be converted into titanium silicide (TiSi ₂ ). That is, TiSi ₂ may be formed at the interface of the switching device 120 and the first metal layer 122 .

Referring to FIG. 12, a nitridation process can be performed on the substrate 100 on which the first metal layer 122 is formed, so that a first structure 124 including a metal semiconductor compound and a second preliminary structure including a metal nitride material can be formed on the switching device 120. structure126.

The first structure 124 may include TiSi ₂ , and the second preliminary structure 126 may include a titanium nitride material (TiN).

According to example embodiments, the nitriding treatment may utilize, for example, thermal or plasma treatment using ammonia (NH ₃ ) or nitrogen (N ₂ ) gas as a source. When the nitridation process is performed, the lower portion of the first metal layer 122 in contact with the switching device 120 may be converted into a first structure 124 including TiSi ₂ . The first structure 124 may have a circular shape when viewed from a plan view, and may have a rectangular shape when viewed from a cross-sectional view.

In addition, when the nitriding process is performed, the upper portion of the first metal layer 122 may be combined with ammonia or nitrogen of nitrogen gas to be converted into the second preliminary structure 126 including TiN. The second preliminary structure 126 may be continuously formed along the surface contours of the first insulating pattern 108 and the first structure 124 , and may be conformally formed without filling the second opening 114 .

According to other example embodiments (not shown), after forming the second preliminary structure 126 , a second metal layer may be further formed on the second preliminary structure 126 . The second metal layer may be formed continuously along the surface contour of the second preliminary structure 126 and may be conformally formed without filling the second opening 114 . The second metal layer can be formed using, for example, a PECVD process using _TiCl4 as a source. The process of forming the second metal layer may be omitted.

According to example embodiments, the process of forming the first metal layer 122 and the process of forming the first structure 124 and the second preliminary structure 126 may be performed in substantially the same in-situ chamber. According to another example embodiment, the process of forming the first metal layer 122 and the process of forming the first structure 124 and the second preliminary structure 126 may be performed in different in-situ chambers.

Referring to FIG. 13 , a second insulating layer 128 may be formed on the second preliminary structure 126 . The second insulating layer 128 may be formed to completely fill the second opening 114 .

The second insulating layer 128 may be formed of an oxide material, a nitride material or an oxynitride material. For example, it may be a silicon oxide material, a silicon nitride material or a silicon oxynitride material, respectively. In an embodiment, the second insulating layer 128 may include substantially the same material as the first insulating layer. In another embodiment, the second insulating layer 128 may include a substantially different material than the first insulating layer.

Referring to FIG. 14 , the second insulating layer 128 and the second preliminary structure (see 126 of FIG. 13 ) may be partially etched to expose the top surface of the first insulating pattern 108 so that the second insulating pattern 130 may be formed. According to example embodiments, the second preliminary structure 129 may have a 'U'-shaped structure.

The second insulating layer 128 and the second preliminary structure (see 126 of FIG. 13 ) may be partially etched using, for example, a chemical mechanical polishing (CMP) process and an etch-back process. The top surface of the second insulation pattern 130 and the top surface of the second preliminary structure 129 having a 'U' shape formed by the above-described process may have substantially the same height as that of the first insulation pattern 108 .

According to other embodiments, the first insulating pattern 108 , the "U"-shaped second preliminary structure 129 and the upper portion of the second insulating pattern 130 may be further etched. Further etched upper portions of the first insulating pattern 108 , the second insulating pattern 130 and the 'U'-shaped second preliminary structure 129 may be formed at substantially the same height.

Referring to FIG. 15 , a third preliminary structure 132 including a metal nitride material containing an element X may be formed in the second preliminary structure 129 . The third preliminary structure 132 may include, for example, a titanium nitride material (TiXN).

The element X may include at least one selected from the group of Si, B, Al, O, and C.

According to example embodiments, the process of forming the third preliminary structure 132 will be described in further detail. Heat treatment or plasma heat treatment using a nitrogen-containing first precursor and an element X-containing second precursor may be performed on the substrate 100 on which the "U"-shaped third preliminary structure 132 is formed. The first precursor may include NH ₃ or N ₂ , and the element X of the second precursor may include at least one selected from the group consisting of Si, B, Al, O, and C.

When the element X is silicon, the second precursor may include, for example, at least one selected from the group of SiH ₄ , Si ₂ H ₆ , Si ₃ H ₈ , SiCl ₂ H ₂ and bis(tert-butylamino)silane (BTBAS) .

When the element X is boron, the second precursor may include, for example, at least one selected from the group consisting of B ₂ H ₆ and triethyl borate (TEB).

When the element X is aluminum, the second precursor may include, for example, selected from the group consisting of AlCl ₃ , tetraethylmethylamide hafnium (TEMAH), dimethylaluminum hydride (DMAH) and dimethylethylaminoalane (DMEAA ) at least one of the group.

When the element X is oxygen, the second precursor may include, for example, at least one selected from the group of oxygen (O ₂ ) gas and ozone (O ₃ ) gas.

When element X is carbon, the second precursor may include, for example _{, C2H4} .

When heat treatment or plasma heat treatment using the first and second precursors is performed, the upper portion of the second preliminary structure 129 having a "U" shape can be converted into a titanium nitride material (TiXN) containing element X, so that the A third preliminary structure 132 is formed on the second preliminary structure 129 .

According to example embodiments, a third mask (not shown) may be further formed on the first insulating pattern 108 and the second insulating pattern 130 before performing heat treatment or plasma heat treatment using the first and second precursors. The third mask may be used to protect the first insulating pattern 108 and the second insulating pattern 130 while performing heat treatment or plasma heat treatment. In addition, the third mask may be removed from the substrate 100 after the heat treatment or the plasma heat treatment is completed.

Referring to FIG. 4 , according to other example embodiments, the upper portions of the first insulating pattern 108 and the second insulating pattern 130 may be converted into an element X-containing element while performing heat treatment or plasma heat treatment using the first and second precursors. Silicon nitride material (SiXN).

According to example embodiments, while performing heat treatment or plasma heat treatment using the first and second precursors, a third precursor containing titanium (Ti) may be further injected. In this case, the resulting product may be a third preliminary structure 132 comprising an X-containing titanium nitride material on a "U"-shaped second preliminary structure 129 . The Ti content of the third preliminary structure 132 may be higher.

The semiconductor device illustrated in FIG. 5 according to other example embodiments may further include a fourth preliminary structure (not shown) on the third preliminary structure 132, the fourth preliminary structure including a titanium nitride material containing element Y. . The element Y may include, for example, at least one selected from the group of Si, B, Al, O, and C. The fourth preliminary structure may be formed using substantially the same process as that used to form the third preliminary structure 132 . Furthermore, the fourth preliminary structure may be formed in substantially the same in situ chamber as the chamber in which the third structure 136 is formed.

In the device illustrated in FIG. 6 according to another example embodiment, before forming the third preliminary structure 132, a titanium oxide material (TiO ₂ ) may be further formed on the "U"-shaped second preliminary structure 129. Fourth preliminary structure (not shown). The fourth preliminary structure may be formed in substantially the same in situ chamber as the chamber in which the third structure 136 is formed.

Referring to FIG. 16 , a fourth mask (not shown) may be formed on the first insulating pattern 108 , the second insulating pattern 130 and the third preliminary structure 132 . A fourth mask may be formed to partially cover the third preliminary structure 132 . The fourth mask may include a material having etch selectivity with respect to the first insulating pattern 108 , the second insulating pattern 130 , the 'U'-shaped second preliminary structure 129 and the third preliminary structure 132 .

The third preliminary structure 132, the "U"-shaped second preliminary structure 129, the first insulating pattern 108, and the second insulating pattern 130 may be partially etched using the fourth mask as an etching mask, so that the third structure 136 may be formed. and the second structure 134 . The second structure 134 may have an 'L' or 'J' shape depending on the etching depth and position of the fourth mask.

The second structure 134 according to example embodiments may have an 'L' shape. In this case, the second structure 134 may include a lower portion having a first width and an upper portion having a second width. The first width may be substantially greater than the second width. The second structure 134 may include: a first vertical surface V1 in contact with the first insulating pattern 108; a first horizontal surface H1 extending horizontally from a lower portion of the first vertical surface V1; extending horizontally from an upper portion of the first vertical surface V1. The second horizontal surface H2 of the second horizontal surface H2; the third horizontal surface H3 parallel to the second horizontal surface H2 and separated therefrom by a predetermined interval; the second vertical surface V2 connecting the second horizontal surface H2 to the third horizontal surface surface H3; and a third vertical surface V3 connecting the first horizontal surface H1 to the third horizontal surface H3. The third structure 136 may be formed on the second horizontal surface H2.

During the etching process using the fourth mask, a third opening (not shown) may be formed through the first insulating pattern 108 , the second insulating pattern 130 and the second structure 134 . A third insulating layer (not shown) may be formed on the first insulating pattern 108 , the second insulating pattern 130 and the second structure 134 . The third insulating layer may be formed of oxide material, nitride material or oxynitride material, and the oxide material, nitride material or oxynitride material may be silicon oxide material, silicon nitride material and silicon oxynitride material, respectively.

An upper portion of the third insulating layer may be removed to expose upper portions of the first insulating pattern 108 , the second insulating pattern 130 and the third structure 136 . The removal process can be performed by, for example, polishing process and etch-back process. Upper portions of the first insulating pattern 108, the second insulating pattern 130, the third insulating pattern 138, and the third structure 136 may have substantially the same height.

According to example embodiments, upper portions of the first insulating pattern 108 , the second insulating pattern 130 , the third insulating pattern 138 and the third structure 136 may be further etched. Further etched upper portions of the first insulating pattern 108 , the second insulating pattern 130 , the third insulating pattern 138 and the third structure 136 may have substantially the same height.

Referring back to FIG. 3 , a phase change material layer may be formed on the first insulating pattern 108 , the second insulating pattern 130 , the third insulating pattern 138 and the third structure 136 . A layer of phase change material (not shown) may be formed to be electrically connected to the third structure 136 .

The phase change material layer may be formed of, for example, a chalcogenide including at least one of group VI elements of the periodic table. Typical examples of the chalcogenide-based metal element may include Ge, Se, Sb, Te, Sn, As, and the like. Combinations of elements may enable the formation of chalcogenide phase transition patterns. The combination may include, for example, _at least one selected from the group consisting of GaSb, InSb, InSe, _Sb2Te , SbSe, GeTe, _Sb2Te , SbSe, _GeTe , _Ge2Sb2Te5 , InSbTe, GaSeTe, _SnSb2Te , InSbGe, AgInSbTe, (GeSn)SbTe, GeSb(SeTe) and Te ₈₁ GeI ₅ Sb ₂ S ₂ . In addition, in order to enhance the characteristics of the phase change material layer, elements Ag, In, Bi, and Pb may be mixed in addition to the chalcogenide-based metal elements.

A conductive layer (not shown) may be formed on the phase change material layer. A conductive layer may be formed to be electrically connected to the phase change material layer.

The conductive layer may include at least one selected from the group consisting of Ti, TiSi, TiN, TiON, TiW, TiAlN, TiAlON, TiSIN, TiBN, W, WN, WON, WSiN, WBN, WCN, Si, Ta, SaSi, TaN , TaON, TaAlN, TaSiN, TaCN, Mo, MoN, MoSiN, MoAlN, ZrSiN, ZrAlN, and RuCoSi.

Thereafter, the conductive layer and the phase change material layer may be partially etched to sequentially form a phase change material and an upper electrode on the first insulating pattern 108 , the second insulating pattern 130 , the third insulating pattern 138 and the third structure 136 142.

Although not shown in detail, a bit line BL may be further formed on the upper electrode 142 .

[Second exemplary embodiment]

FIG. 18 illustrates a schematic cross-sectional view of a phase change memory device according to another example embodiment.

Referring to FIG. 18 , the memory device may include a word line 204 formed on a substrate, and a switching device 214 , insulating patterns 208 , 224 and 228 , lower electrodes 216 , 226 and 230 , a phase change material pattern 232 and an upper electrode 234 . The insulating patterns 208 , 224 and 228 may include a first insulating pattern 208 , a second insulating pattern 224 and a third insulating pattern 228 .

The substrate, word line 204, switching device 214, insulating patterns 208, 224, and 228, phase change material pattern 232, and upper electrode 234 may be substantially the same as those described with reference to FIG. 1, and thus detailed description thereof will not be repeated.

The lower electrodes 216 , 226 and 230 may be electrically connected to the switching device 214 . According to example embodiments, when the switching device 214 is the diode 214 , the lower electrodes 216 , 226 and 230 may be formed on the diode 214 , and the lower electrodes 216 , 226 and 230 may be formed in substantially direct contact with the diode 214 . According to another example embodiment, when the switching device 214 is a transistor, the lower electrodes 216, 226, and 230 may be formed to be electrically connected to the transistor through a connection pattern.

The lower electrodes 216, 226, and 230 may include: a first structure 216 including a metal semiconductor compound; a second structure 226 including a metal nitride material; and a third structure 230 including a metal nitride material including element X. According to example embodiments, the first structure 216 may include titanium silicide (TiSi ₂ ), the second structure 226 may include TiN, and the third structure 230 may include an element X-containing titanium nitride material (TiXN).

The first structure 216 may be formed to be electrically connected to the switching device 214 . According to example embodiments, when the switching device 214 is the diode 214 , the first structure 216 may be formed to contact an upper portion of the diode 214 . Also, the first structure 216 may have a circular shape when viewed from a plan view, and may have a rectangular shape when viewed from a cross-sectional view. The width of the first structure 216 may be substantially the same as the width of the diode 214 .

The second structure 226 may be formed on the first structure 216, and a lower portion thereof may have a greater width than an upper portion thereof. The width of the lower portion of the second structure 226 may be substantially the same as the width of the first structure 216 .

According to example embodiments, the second structure 226 may include a lower portion having a first width and an upper portion having a second width smaller than the first width. The upper portion of the second structure 226 may vertically extend from the top surface of the lower portion. For example, it may have an "L" shape. When the second structure 226 has an 'L' shape, the second structure 226 may include a lower portion having a first width and an upper portion having a second width. The first width may be substantially greater than the second width. In this case, the second structure 226 may include: a first vertical surface V1 in contact with the first insulating pattern 208; a first horizontal surface H1 extending horizontally from a lower portion of the first vertical surface V1; A second horizontal surface H2 extending horizontally on the upper portion of the second horizontal surface H2; a third horizontal surface H3 parallel to the second horizontal surface H2 and spaced therefrom by a predetermined interval; a second vertical surface V2 that divides the second horizontal surface H2 is connected to a third horizontal surface H3; and a third vertical surface V3 connecting the first horizontal surface H1 to the third horizontal surface H3.

According to another example embodiment, the second structure 226 may have a "J" shape. According to yet another example embodiment, the second structure 226 may have a circular, "U" or rectangular shape.

The third structure 230 may be formed on the second structure 226 . For example, when the second structure 226 has an 'L' shape, the third structure 230 may be formed on the second vertical surface V2 and the third horizontal surface H3 of the second structure 226 . The third structure 230 may have an 'L' shape. The thickness of the third structure 230 may be substantially smaller than the thickness of the second structure 226 .

The third structure 230 may be formed of a material having a higher electrical resistance than the first structure 216 and the second structure 226 . According to example embodiments, the third structure 230 may have a single layer structure. The third structure 230 may include an element-X-containing metal nitride material, for example, an element-X-containing titanium nitride material (TiXN). The element X may include at least one selected from the group of Si, B, Al, O, and C.

According to another exemplary embodiment, as illustrated in FIG. 5 , the third structure 230 may have a multi-layer structure in which a lower pattern including a titanium nitride material (TiXN) including element X and nitrogen including element Y are stacked. The upper pattern of titanium oxide material (TiYN). Elements X and Y may be different from each other, and each may include at least one selected from the group of Si, B, Al, O, and C.

According to another example embodiment, as illustrated in FIG. 6 , the third structure 230 may have a structure in which a lower pattern including a titanium oxide material (TiO ₂ ) and a titanium nitride material including an element X (TiO 2 ) are stacked. TiXN) on the pattern. The element X may include at least one selected from the group of Si, B, Al, O, and C.

A method for forming the semiconductor device illustrated in FIG. 18 will be described below.

7 to 12 and 17 illustrate schematic cross-sectional views of stages in a method for forming the semiconductor device illustrated in FIG. 18 .

7 to 12, an isolation pattern 202, a word line 204, a first insulating pattern 208, and a switching device 214 may be formed on a substrate 200, and a first surface 216 including titanium silicide and a first surface 216 including a titanium nitride material may be formed. II Preliminary Structure 218.

The process of forming the isolation pattern 202, the word line 204, the first insulating pattern 208, the switching device 214, the first structure 216, and the second preliminary structure 218 may be substantially the same as that described with reference to FIGS. 7 to 12 of the first example embodiment. Same, therefore, description thereof will not be repeated.

Referring to FIG. 17 , a third preliminary structure 222 including a metal nitride material containing element X may be formed on the second preliminary structure 218 . The third preliminary structure 222 may include, for example, a titanium nitride material (TiXN). The element X may include at least one selected from the group of Si, B, Al, O, and C.

The third preliminary structure 222 may be continuously formed along the surface contour of the second preliminary structure 218 . The third preliminary structure 222 may be conformally formed without filling the first opening 220 defined by the second preliminary structure 218 .

According to example embodiments, the process of forming the third preliminary structure 222 will be described in further detail. Thermal treatment or plasma thermal treatment using the nitrogen-containing first precursor and the element X-containing second precursor may be performed on the substrate 200 on which the second preliminary structure 218 is formed. The first precursor may include, for example, NH ₃ or N ₂ , and the element X of the second precursor may include, for example, at least one selected from the group of Si, B, Al, O, and C.

When the element X is silicon, the second precursor may include, for example, at least one selected from the group of SiH ₄ , Si ₂ H ₆ , Si ₃ H ₈ , SiCl ₂ H _{2 ,} and BTBAS.

When the element X is boron, the second precursor may include, for example, at least one selected from the group of B ₂ H ₆ and TEB.

When the element X is aluminum, the second precursor may include, for example, at least one selected from the group consisting of AlCl ₃ , TEMAH, DMAH, and DMEAA.

When the element X is oxygen, the second precursor may include, for example, at least one selected from the group of O ₂ gas and O ₃ gas.

When element X is carbon, the second precursor may include, for example _{, C2H4} .

When heat treatment or plasma heat treatment using the first and second precursors is performed, the upper part of the second preliminary structure 218 can be converted into a titanium nitride material (TiXN) containing the element X, so that the upper part of the second preliminary structure 218 can be A third preliminary structure 222 is formed.

According to example embodiments, while performing heat treatment or plasma heat treatment using the first and second precursors, a third Ti-containing precursor may be further injected. In this case, the resulting product may be a third preliminary structure 222 comprising a titanium nitride material containing the element X on the second preliminary structure 218 . The Ti content of the third preliminary structure 222 may be higher.

According to another example embodiment, a fourth preliminary structure (not shown) including a titanium nitride material containing element Y may be further formed on the third preliminary structure 222 . The fourth preliminary structure may be continuously formed along the surface contour of the third preliminary structure 222 . The fourth preliminary structure may be conformally formed without filling the first opening 220 . The element Y may include, for example, at least one selected from the group of Si, B, Al, O, and C. The fourth preliminary structure may be formed using substantially the same process as that used to form the third preliminary structure 222 . Furthermore, the fourth preliminary structure may be formed in substantially the same in situ chamber as the chamber in which the third preliminary structure 222 is formed.

According to another example embodiment, before forming the third preliminary structure 222 , a fourth preliminary structure (not shown) including a titanium oxide material (TiO ₂ ) may be further formed on the second preliminary structure. The fourth preliminary structure may be formed in substantially the same in situ chamber as the chamber in which the third preliminary structure 222 is formed.

Referring back to FIG. 18 , a second insulating layer (not shown) may be formed on the third preliminary structure 222 . A second insulating layer may be formed to completely fill the second opening 220 .

The second insulating layer, the third preliminary structure 222, and the second preliminary structure 218 may be partially etched to expose the top surface of the first insulating pattern 208, so that the second insulating pattern 224, the "U" shaped third preliminary structure, may be formed. structure (not shown) and a "U" shaped second preliminary structure (not shown).

Parts of the second insulating layer, the third preliminary structure 222 and the second preliminary structure 218 may be etched, for example, using a CMP process or an etch-back process. Top surfaces of the second insulating layer 224 , the 'U'-shaped third preliminary structure, and the 'U'-shaped second preliminary structure formed through the above process may have substantially the same height as the top surface of the first insulating pattern 208 .

According to other example embodiments, upper portions of the first insulating pattern 208 , the second insulating pattern 224 , the 'U'-shaped second preliminary structure, and the 'U'-shaped third preliminary structure may be further etched. Further etched upper portions of the first insulating pattern 208 , the second insulating pattern 224 , the 'U'-shaped second preliminary structure, and the 'U'-shaped third preliminary structure may be formed at substantially the same height.

A mask (not shown) may be formed on the first insulating pattern 208 , the second insulating pattern 224 , the 'U'-shaped second preliminary structure, and the 'U'-shaped third preliminary structure. The mask may be formed to partially cover the 'U'-shaped second preliminary structure and the 'U'-shaped third preliminary structure. The "U"-shaped second preliminary structure and the "U"-shaped third preliminary structure, the first insulating pattern 208, and the second insulating pattern 224 may be partially etched using the mask as an etching mask, so that the third structure may be formed. 230 and the second structure 226. The second structure 226 and the third structure 230 may have an "L" or "J" shape depending on the etching depth and position.

The second structure 226 according to example embodiments may have an 'L' shape. In this case, the second structure 226 may include a lower portion of the first width and an upper portion of the second width. The first width may be substantially greater than the second width. The second structure 226 may include: a first vertical surface V1 in contact with the first insulating pattern 208; a first horizontal surface H1 extending horizontally from a lower portion of the first vertical surface V1; a first horizontal surface H1 extending horizontally from an upper portion of the first vertical surface V1. Two horizontal surfaces H2; the third horizontal surface H3, the third horizontal surface H3 is parallel to the second horizontal surface H2 and separated from it by a predetermined interval; the second vertical surface V2, the second vertical surface V2 divides the second horizontal surface H2 is connected to a third horizontal surface H3; and a third vertical surface V3 connecting the first horizontal surface H1 to the third horizontal surface H3.

In this case, the third structure 230 may also have an "L" shape. For example, the third structure 230 may be formed on the second vertical surface V2 and the third horizontal surface H3 of the second structure 226 .

During the etching process using a mask, a second opening (not shown) is formed through the first insulating pattern 208 , the second insulating pattern 224 , the second structure 226 and the third structure 230 . A third insulating layer (not shown) may be formed on the first insulating pattern 208 , the second insulating pattern 224 , the second structure 226 and the third structure 230 to fill the second opening. The third insulating layer may be formed of oxide material, nitride material or oxynitride material, and the oxide material, nitride material or oxynitride material may be silicon oxide material, silicon nitride material and silicon oxynitride material, respectively.

An upper portion of the third insulating layer may be removed to expose upper portions of the first insulating pattern 208 , the second insulating pattern 224 , the second structure 226 and the third structure 230 . The removal process can be performed by, for example, polishing process and etch-back process. Upper portions of the first insulating pattern 208, the second insulating pattern 224, the third insulating pattern 228, the second structure 226, and the third structure 230 may have substantially the same height.

According to example embodiments, upper portions of the first insulating pattern 208 , the second insulating pattern 224 , the third insulating pattern 228 , the second structure 226 and the third structure 230 may be further etched. The further etched upper portions of the first insulating pattern 208 , the second insulating pattern 224 , the third insulating pattern 228 , the second structure 226 and the third structure 230 may have substantially the same height.

A phase change material layer may be formed on the first insulating pattern 208 , the second insulating pattern 224 , the third insulating pattern 228 , the second structure 226 and the third structure 230 . A layer of phase change material (not shown) may be formed to be electrically connected to the second structure 226 and the third structure 230 .

A conductive layer (not shown) may be formed on the phase change material layer. A conductive layer may be formed to be electrically connected to the phase change material layer.

The conductive layer and the phase change material layer may be partially etched such that the phase change material may be sequentially formed on the first insulating pattern 208 , the second insulating pattern 224 , the third insulating pattern 228 , the second structure 226 and the third structure 230 pattern 232 and upper electrode 234 .

Although not shown in detail, a bit line BL may be further formed on the upper electrode 234 .

[Third exemplary embodiment]

FIG. 20 illustrates a schematic cross-sectional view of a phase change memory device according to another example embodiment.

Referring to FIG. 20 , a memory device may include a word line 304 , a switching device 314 , insulating patterns 308 , 322 and 328 , lower electrodes 316 , 324 and 326 , a phase change material pattern 330 and an upper electrode 332 formed in a substrate 300 . The insulating patterns 308 , 322 and 328 may include a first insulating pattern 308 , a second insulating pattern 322 and a third insulating pattern 328 .

The substrate 300 , word lines 304 , switching devices 314 , insulating patterns 308 , 322 and 328 , phase change material pattern 330 and upper electrode 332 may be substantially the same as those described with reference to FIG. 1 , and thus, detailed description thereof will not be repeated.

The lower electrodes 316 , 324 and 326 may be electrically connected to the switching device 314 . According to example embodiments, when the switching device 314 is the diode 314 , the lower electrodes 316 , 324 and 326 may be formed on the switching device 314 , and the lower electrodes 316 , 324 and 326 may be formed in substantially direct contact with the diode 314 . According to another example embodiment, when the switching device 314 is a transistor, the lower electrodes 316, 324, and 326 may be formed to be electrically connected to the transistor through a connection pattern.

The lower electrodes 316, 324, and 326 may include: a first structure 316 including a metal semiconductor compound; a second structure 324 including a metal nitride material; and a third structure 326 including a metal nitride material including element X. According to example embodiments, the first material 316 may include titanium silicide (TiSi ₂ ), the second structure 324 may include TiN, and the third structure 326 may include an element X-containing titanium nitride material (TiXN).

The first structure 316 may be electrically connected to the switching device 314 . According to example embodiments, when the switching device 314 is the diode 314 , the first structure 316 may be formed to contact an upper portion of the diode 314 . Also, the first structure 316 may have a circular shape when viewed from a plan view, and may have a rectangular shape when viewed from a cross-sectional view. The width of the first structure 316 may be substantially the same as the width of the switching device 314 .

The second structure 324 may be formed on the first structure 316, and a lower portion thereof may have a greater width than an upper portion thereof. The width of the lower portion of the second structure 324 may be substantially the same as the width of the first structure 316 .

According to example embodiments, the second structure 324 may include a lower portion having a first width and an upper portion having a second width smaller than the first width. The upper portion of the second structure 324 may vertically extend from the top surface of the lower portion. For example, the second structure 324 may have an "L" shape. When the second structure 324 has an 'L' shape, the second structure 324 may include a lower portion having a first width and an upper portion having a second width. The first width may be greater than the second width. In this case, the second structure 324 may include: a first vertical surface V1 in contact with the first insulating pattern 308; a first horizontal surface H1 extending horizontally from a lower portion of the first vertical surface V1; A second horizontal surface H2 extending horizontally on the upper portion of the second horizontal surface H2; a third horizontal surface H3 parallel to the second horizontal surface H2 and spaced therefrom by a predetermined interval; a second vertical surface V2 that divides the second horizontal surface H2 is connected to a third horizontal surface H3; and a third vertical surface V3 connecting the first horizontal surface H1 to the third horizontal surface H3.

According to another example embodiment, the second structure 324 may have a "J" shape. According to another example embodiment, the second structure 324 may have a circular, "U" or rectangular shape.

The third structure 326 may be formed on the second structure 324 . More specifically, when the second structure 324 has an 'L' shape, the third structure 326 may be formed on the second horizontal surface H2 , the second vertical surface V2 and the third horizontal surface H3 of the second structure 324 . The thickness of the third structure 326 may be substantially smaller than the thickness of the second structure 324 .

The third structure 326 may be formed of a material having a higher electrical resistance than the first structure 316 and the second structure 324 . According to example embodiments, the third structure 326 may have a single layer structure. The third structure 326 may include an elemental X-containing metal nitride material, for example, an elemental X-containing titanium nitride material. The element X may include at least one selected from the group of Si, B, Al, O, and C.

According to another example embodiment, the third structure 326 may have a multilayer structure in which a lower pattern including a titanium nitride material including an element X and an upper pattern including a titanium nitride material including an element Y are stacked. The elements X and Y may be different from each other, and each of the elements X and Y may include at least one selected from the group of Si, B, Al, O, and C.

According to still another example embodiment, the third structure 326 may have a structure in which a lower pattern including a titanium oxide material (TiO ₂ ) and an upper pattern including a titanium nitride material including element X are stacked. The element X may include at least one selected from the group of Si, B, Al, O, and C.

A method for forming the semiconductor device illustrated in FIG. 20 will be described below.

7 to 16 and 19 illustrate schematic cross-sectional views of stages in a method for forming the semiconductor device illustrated in FIG. 20 .

7 to 12, an isolation pattern 302, a word line 304, a first insulating pattern 308, and a switching device 314 may be formed on a substrate 300, and a first structure 316 including titanium silicide and a first structure 316 including a titanium nitride material may be formed. II Preliminary Structure 318.

The process of forming the isolation pattern 302, the word line 304, the first insulating pattern 308, the switching device 314, the first structure 316, and the second preliminary structure 318 may be substantially the same as that described with reference to FIGS. 7 to 12 of the first example embodiment. Same, therefore, description thereof will not be repeated.

A sacrificial layer (not shown) may be formed on the second preliminary structure 318 . A sacrificial layer may be formed to fill the first opening (not shown) defined by the second preliminary structure 318 . The sacrificial layer may be formed of, for example, an oxide material or photoresist.

The sacrificial layer and the second preliminary structure 318 may be partially etched to expose the top surface of the first insulating pattern 308 so that a sacrificial pattern (not shown) and a "U" shaped second preliminary structure 318 may be formed.

Referring to FIG. 19 , the sacrificial pattern may be removed from the substrate 300 . The sacrificial pattern may be removed using, for example, an ashing process and a stripping process. When the sacrificial pattern is removed, the first opening defined by the 'U'-shaped second preliminary structure 318 may be formed.

A third preliminary structure 320 including an element X-containing metal nitride material may be formed on the "U"-shaped second preliminary structure 318 . For example, the third preliminary structure 320 may be a titanium nitride material. The element X may include at least one selected from the group of Si, B, Al, O, and C.

The third preliminary structure 320 may be continuously formed along the surface contour of the "U" shaped second preliminary structure 318 . The third preliminary structure 320 may be conformally formed without filling the first opening defined by the "U" shaped second preliminary structure 318 .

According to example embodiments, the process of forming the third preliminary structure 320 will be described in further detail. Heat treatment or plasma heat treatment using a nitrogen-containing first precursor and an element X-containing second precursor may be performed on the substrate 300 on which the "U"-shaped second preliminary structure 318 is formed. The first precursor may include, for example, NH ₃ or N ₂ , and the element X of the second precursor may include, for example, at least one selected from the group of Si, B, Al, O, and C.

When the element X is silicon, the second precursor may include, for example, at least one selected from the group of SiH ₄ , Si ₃ H ₆ , Si ₃ H ₈ , SiCl ₃ H _{3 ,} and BTBAS.

When the element X is boron, the second precursor may include, for example, at least one selected from the group of B ₃ H ₆ and TEB.

When the element X is aluminum, the second precursor may include, for example, at least one selected from the group consisting of AlCl ₃ , TEMAH, DMAH, and DMEAA.

When the element X is oxygen, the second precursor may include, for example, at least one selected from the group of O ₂ gas and O ₃ gas.

When element X is carbon, the second precursor may include, for example _{, C2H4} .

When heat treatment or plasma heat treatment using the first and second precursors is performed, the upper portion of the "U"-shaped second preliminary structure 318 can be converted into a titanium nitride material containing the element X, so that the "U"-shaped A third preliminary structure 320 is formed on the second preliminary structure 318.

According to example embodiments, while performing heat treatment or plasma heat treatment using the first and second precursors, a third Ti-containing precursor may be further injected. In this case, the resulting product may be a third preliminary structure 320 comprising titanium nitride containing the element X on the second preliminary structure 318 . The Ti content of the third preliminary structure 320 may be higher.

According to another example embodiment, a fourth preliminary structure (not shown) including a titanium nitride material containing element Y may be further formed on the third preliminary structure 320 . The fourth preliminary structure may be continuously formed along the surface contour of the third preliminary structure 320 . The fourth preliminary structure may be conformally formed without filling the first opening. The element Y may include, for example, at least one selected from the group of Si, B, Al, O, and C. The fourth preliminary structure may be formed using substantially the same process as that used to form the third preliminary structure 320 . Furthermore, the fourth preliminary structure can be formed in substantially the same in situ chamber as the chamber in which the third structure 326 is formed.

According to yet another example embodiment, before forming the third preliminary structure 320 , a fourth preliminary structure (not shown) including TiO ₂ may be further formed on the second preliminary structure 318 . The fourth preliminary structure may be formed in substantially the same in situ chamber as the chamber in which the third structure 326 is formed.

A second insulating layer (not shown) may be formed on the third preliminary structure 320 . A second insulating layer may be formed to completely fill the first opening.

The second insulating layer may be partially etched to expose the top surface of the third preliminary structure 320 so that the second insulating pattern 322 may be formed. The second insulating pattern 322 may be formed to completely fill the opening defined by the third preliminary structure 320 .

A top surface of the second insulating pattern 322 may be located at substantially the same height as that of the third preliminary structure.

Referring back to FIG. 20 , a mask (not shown) may be formed on the first insulating pattern 308 , the second insulating pattern 322 and the third preliminary structure 320 . The mask may be formed to partially cover the third preliminary structure 320 . The third preliminary structure 320, the "U"-shaped second preliminary structure 318, the first insulating pattern 308, and the second insulating pattern 322 may be partially etched using the fourth mask as an etching mask, so that the third structure 326 may be formed. and the second structure 324 . The second structure 324 and the third structure 326 may have an 'L' or 'J' shape depending on the etching depth and position.

According to example embodiments, the second structure 324 may have an 'L' shape. In this case, the second structure 324 may include a lower portion of the first width and an upper portion of the second width. The first width may be substantially greater than the second width. The second structure 324 may include: a first vertical surface V1 in contact with the first insulating pattern 308; a first horizontal surface H1 extending horizontally from a lower portion of the first vertical surface V1; a first horizontal surface H1 extending horizontally from an upper portion of the first vertical surface V1. Two horizontal surfaces H2; the third horizontal surface H3, the third horizontal surface H3 is parallel to the second horizontal surface H2 and separated from it by a predetermined interval; the second vertical surface V2, the second vertical surface V2 divides the second horizontal surface H2 is connected to a third horizontal surface H3; and a third vertical surface V3 connecting the first horizontal surface H1 to the third horizontal surface H3. The third structure 326 may be formed on the second horizontal surface H2 , the second vertical surface V2 and the third vertical surface V3 of the second structure 324 .

A second opening (not shown) may be formed through the first insulating pattern 308 , the second insulating pattern 322 , the second structure 324 and the third structure 326 when performing an etching process using a mask. A third insulating layer (not shown) may be formed on the first insulating pattern 308 , the second insulating pattern 322 , the second structure 324 and the third structure 326 . The third insulating layer may be formed of an oxide material, a nitride material, or an oxynitride material, and the oxide material, nitride material, or oxynitride material may be a silicon oxide material, a silicon nitride material, and a silicon oxynitride material, respectively. .

An upper portion of the third insulating layer may be removed to expose upper portions of the first insulating pattern 308 , the second insulating pattern 322 , the second structure 324 and the third structure 326 . The removal process can be performed by polishing process and etch back process. Upper portions of the first insulating pattern 308, the second insulating pattern 322, the third insulating pattern 328, and the third structure 326 may have substantially the same height.

A phase change material layer (not shown) may be formed on the first insulating pattern 308 , the second insulating pattern 322 , the third insulating pattern 328 , the second structure 324 and the third structure 326 . A layer of phase change material may be formed to be electrically connected to the second structure 324 and the third structure 326 .

A conductive layer (not shown) may be formed on the phase change material layer. A conductive layer may be formed to be electrically connected to the phase change material layer.

The conductive layer and the phase change material layer may be partially etched to sequentially form the phase change material pattern 330 and the upper electrode 332 on the first insulating pattern 308 , the second insulating pattern 322 , the third insulating pattern 328 and the third structure 326 .

Although not shown in detail, a bit line BL may be further formed on the upper electrode 332 .

The following experiments are provided to give specific details of one or more example embodiments. It will be understood, however, that example embodiments are not limited to the specific details described in the experiments, nor are comparative examples to be construed as limiting the scope of the invention or necessarily falling outside the scope of the invention in every respect.

[Experimental example]

FIG. 21 illustrates transition characteristics of a conventional phase change memory device, and FIG. 22 illustrates transition characteristics of a phase change memory according to the first example embodiment. The applied current to the phase change memory device is plotted in μA on the horizontal axis of FIGS. 21 and 22 . The resistance measured in the phase change memory device is plotted in Ω on the vertical axis of FIGS. 21 and 22 .

厚度的硅化钛的第一结构和包括具有大约80

厚度的氮化钛材料的第二结构。包括该下电极的相变存储器器件的过渡特性被测试。如在图21中图示，相变存储器器件显示大约280μA的复位电流。Referring to FIG. 21 , a lower electrode may be formed, in which a stack comprising about 15

thickness of the first structure of titanium silicide and comprising approximately 80

thickness of the second structure of titanium nitride material. Transition characteristics of a phase change memory device including the bottom electrode were tested. As illustrated in FIG. 21 , the phase change memory device exhibited a reset current of approximately 280 μA.

厚度的硅化钛的第一结构和包括包含具有大约80

厚度的含硅的氮化钛材料的第二结构。包括该下电极的相变存储器器件的过渡特性被测试。如在图22中所示，相变存储器器件显示大约230μA的复位电流。Referring to FIG. 22, a lower electrode is formed, in which a stack comprising about 20

thickness of the first structure of titanium silicide and includes a structure having approximately 80

thickness of the second structure of silicon-containing titanium nitride material. Transition characteristics of a phase change memory device including the bottom electrode were tested. As shown in Figure 22, the phase change memory device exhibited a reset current of approximately 230 μA.

Referring to FIGS. 21 and 22 , it was observed that the reset current of the phase change memory device according to the first exemplary embodiment was about 230 μA, which was reduced by almost 50 μA compared with the conventional phase change memory device.

FIG. 23 illustrates endurance characteristics of the phase change memory device according to the first example embodiment.

的厚度的硅化钛的第一结构、包括具有大约80厚度的氮化钛材料的第二结构以及包括具有大约15

厚度的含硅的氮化钛材料的第三结构。包括该下电极的相变存储器器件的耐久特性被测试。在大约140℃的温度下执行耐久测试大约12小时。Referring to FIG. 23, a lower electrode is formed, in which a stack comprising about 20

The first structure of titanium silicide with a thickness of about 80 thickness of the second structure of titanium nitride material as well as comprising approximately 15

thickness of the third structure of silicon-containing titanium nitride material. Endurance characteristics of a phase change memory device including the lower electrode were tested. The durability test was performed at a temperature of about 140° C. for about 12 hours.

The number of operation tests performed on the phase change memory device is plotted in units of cycles on the horizontal axis of FIG. 23 . The resistance measured in the phase change memory device is plotted in Ω on the vertical axis of FIG. 23 . As illustrated in FIG. 23 , the phase change memory device passed the endurance test for about 10 ⁷ cycles. That is, the phase change memory device according to example embodiments has good endurance.

Generally, various materials of the lower electrode are required. Specifically, there is a need to develop a lower electrode in which the lower part has low resistance and thus is formed of a material that facilitates current supply, and the upper part is made of a material that can increase resistivity and improve heat generation efficiency by a Joule heater to reduce resetting The current material is formed.

According to example embodiments, the first structure including titanium silicide and the second structure including titanium nitride material form a lower portion of the lower electrode with low resistance, so that supply of current applied to the phase change memory device can be facilitated. In addition, the third structure including the titanium nitride material containing the element X forms the upper portion of the lower electrode exhibiting high resistivity, so that the operating current can be reduced.

Example embodiments have been disclosed herein, and although specific terms are used, they are used and interpreted in a generic and descriptive sense only, and not for limitation. Accordingly, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of the present invention as set forth in the appended claims.

Claims (10)

1. A phase-change memory device, comprising: lower electrode; a phase change material pattern electrically connected to the lower electrode; and an upper electrode electrically connected to the phase change material pattern, Wherein, the lower electrode includes: a first structure comprising a metal semiconductor compound; a second structure on the first structure, the second structure comprising a metal nitride material and comprising a lower portion having a greater width than the upper portion; and, A third structure comprising a metal nitride material comprising an element X comprising an element X comprising an element selected from the group consisting of silicon, boron, aluminum, oxygen and carbon, said third structure being located on said second structure at least one of the 2. The device of claim 1, wherein: the second structure includes a lower portion having a first width and an upper portion having a second width less than the first width, and said upper portion of said second structure extends perpendicularly from a top surface of said lower portion, in, The second structure has an 'L' shape, and the second structure includes: a first vertical surface; a first horizontal surface extending horizontally from a lower portion of the first vertical surface; two horizontal surfaces, the second horizontal surface extending horizontally from the upper portion of the first vertical surface; a third horizontal surface, parallel to the second horizontal surface and spaced therefrom by a predetermined interval; two vertical surfaces, the second vertical surface connecting the second horizontal surface to the third horizontal surface; and a third vertical surface connecting the first horizontal surface to the first horizontal surface Three level surfaces. 3. The device of claim 2, wherein the third structure is on the second horizontal surface. 4. The device of claim 2, further comprising: An insulating pattern adjacent to the first vertical surface and the third vertical surface, wherein an upper portion of the insulating pattern includes an element X-containing oxide material or an element X-containing nitride material. 5. The device of claim 4, wherein the upper portion of the insulating pattern has the same thickness and height as the third structure. 6. The device of claim 1, wherein the first structure comprises titanium silicide, the second structure comprises a silicon nitride material, and the third structure comprises an element X-containing titanium nitride material. 7. The device of claim 1, further comprising: a fourth structure comprising a metal oxide material between the second structure and the third structure, Wherein, the fourth structure includes titanium oxide material. 8. The device of claim 1, further comprising: A fourth structure on the third structure, the fourth structure includes a titanium nitride material containing an element Y, wherein the element Y includes at least one element selected from the group consisting of silicon, boron, aluminum, oxygen, and carbon one, Wherein, the element Y is different from the element X. 9. The device of claim 1, further comprising: a lower structure formed under the first structure, and the lower structure includes silicon, wherein the first structure is formed by forming a metal layer on the lower structure and nitriding the resultant and the second structure, Wherein, the metal layer comprises titanium, and Wherein, the third structure is formed by performing heat treatment or plasma treatment using a nitrogen-containing first precursor and an element X-containing second precursor on the second structure. 10. The device of claim 9, Wherein, the element X is Si, and the second precursor includes at least one selected from the group of SiH ₄ , Si ₂ H ₆ , Si ₃ H ₈ , SiCl ₂ H ₂ and bis(tert-butylamino)silane , wherein said element X is boron, and said second precursor comprises at least one selected from _the group consisting of _B2H6 and triethylborate, Wherein, the element X is aluminum, and the second precursor _includes at least one, wherein said element X is oxygen, and said second precursor comprises at least one selected from the group of oxygen and ozone gas, and Wherein, the element X is carbon, and the second precursor includes C ₂ H ₄ .

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