CN101932190B - Measuring equipment and amplifying circuit, impedance component and multi-layer printed circuit board thereof - Google Patents

Abstract

The invention relates to measuring equipment and an amplifying circuit, impedance components and a multi-layer printed circuit board thereof. The measuring equipment comprises a multi-layer printed circuit board 220, a first resistor R21 and a second resistor R22, wherein the multi-layer printed circuit board 220 is provided with an element layer 221, an insulating layer 224, an insulating layer 225 and a shielding layer 223; the element layer 221 is provided with a first bonding pad 231, a second bonding pad 232 and a third bonding pad 233 which are used for arranging the first resistor R21 and the second resistor R22; and a middle layer 222 is arranged in the multi-layer printed circuit board 220, and parasitic capacitances C23, C24 and C25 introduced by the bonding pads 231 and 232 can be reduced or eliminated by changing the sizes of the first bonding pad 231, the second bonding pad 232 and the middle layer 222, the thickness as well as the dielectric constants of the insulating layers 224 and 225, so that the frequency characteristic of the circuit is improved. The measuring equipment and the amplifying circuit, the impedance components and the multi-layer printed circuit board thereof have the characteristics of stable property, simple design and easy realization.

Description

A measuring device and its amplifying circuit, impedance components and multilayer printed circuit board

technical field

A measuring device and its amplifying circuit, impedance component and multilayer printed circuit board of the present invention relate to the field of electric variable measuring device and its adopted amplifying circuit, resistance network or multilayer printed circuit board.

Background technique

With the popularization and development of surface mount technology (SMT), the manufacturing process level of the current measurement equipment has been greatly improved, and the structure of the measurement equipment is more compact and small. But at the same time, this process technology also brings the problem of parasitic capacitance to the measurement equipment, especially in the case of setting a shielding layer (ground layer) on the printed circuit board in order to eliminate electromagnetic interference, this problem becomes even more serious. The reason for this is that parasitic capacitances are formed between the pads on the component layer of the printed circuit board and the shielding layer, and these parasitic capacitances affect the performance of the measurement equipment.

As we all know, the parasitic capacitance on the printed circuit board tends to deteriorate the amplitude-frequency characteristics of the measurement equipment, and the measurement accuracy or measurement range is reduced. Therefore, how to eliminate or counteract the influence of parasitic capacitance has become a difficult problem that must be solved in electrical signal measurement.

The principle of the parasitic capacitance generated by the SMT process and the calculation method of the parasitic capacitance will be described in detail below.

The parasitic capacitance on the printed circuit board is usually formed by two conductors that are insulated from each other and adjacent to each other. For example, referring to FIG. When the component layer 1 has two adjacent conductive pads 6, 7, and the bottom layer 3 is a shielding layer 5 made of conductors and connected to the common terminal, a parasitic capacitance C1 will be formed between the pad 6 and the pad 7, and the pad A parasitic capacitance C2 is formed between the pad 6 and the shielding layer 5 , and a parasitic capacitance C3 is formed between the pad 7 and the shielding layer 5 .

Referring to Fig. 1 and Fig. 2 together, the pad 6 on the printed circuit board 4 corresponds to the connection terminal 21, the pad 7 corresponds to the connection terminal 22, and the shielding layer 5 corresponds to the connection terminal 23, the printed circuit can be obtained The equivalent circuit 24 of the board 4 can be seen from the circuit 24, the parasitic capacitance C1 is connected between the connection terminal 21 and the connection terminal 22, the parasitic capacitance C2 is connected between the connection terminal 21 and the connection terminal 23, and the connection terminal A parasitic capacitance C3 is connected between the connection terminal 22 and the connection terminal 23 .

Those skilled in the art can respectively calculate the capacitance values of the parasitic capacitances C1 , C2 and C3 in the circuit 24 according to the known parasitic capacitance calculation formula 1 .

$C=\frac{{\mathrm{\ϵ}}_r\mathrm{\ϵS}}{d}$ ----------- Parasitic capacitance calculation formula 1

in,

C is the capacitance value of the parasitic capacitance;

ε _r is the relative permittivity of the insulating medium that constitutes the dielectric layer;

ε is the dielectric constant of vacuum;

S is the facing area of the two conductor plates;

d is the thickness of the dielectric layer.

The influence of parasitic capacitance on the measurement equipment will be described in detail below with practical examples.

Parasitic capacitance affects many types of measurement equipment. For example, general measuring instruments such as AC voltmeters, ammeters, multimeters, oscilloscopes, signal generators, logic analyzers, etc., or other comprehensive measuring instruments.

An oscilloscope is one of the most common general-purpose measurement devices, usually used to observe and analyze the waveform of the signal under test, and measure various indicators of the waveform. Parasitic capacitance will affect the oscilloscope. For example, parasitic capacitance will often It affects the frequency response characteristics of the oscilloscope, such as narrowing the bandwidth of the oscilloscope and making the frequency response curve of the oscilloscope not smooth.

Referring to FIG. 3 , common oscilloscopes have an attenuation circuit 31, which is one of the components most susceptible to parasitic capacitance. The bandwidth of the circuit often determines the bandwidth range of the entire oscilloscope. The attenuation circuit 31 of the oscilloscope is usually a The resistor network formed by the resistor R1 and the resistor R2 has an input terminal 32, an output terminal 33 and a common terminal 34, wherein the resistor R1 is connected between the input terminal 32 and the output terminal 33 of the circuit, and the resistor R2 is connected between the output terminal 33 and the common terminal Between 34. The input end 32 and the output end 33 of the attenuation circuit 31 of the oscilloscope are connected in series between the signal input end of the oscilloscope and the sampling measurement part, the signal input end of the oscilloscope is used for connecting the measured signal, and the sampling measurement part is used for It is used to measure and display the signal under test. The attenuation circuit 31 is used to attenuate the measured signal connected to the signal input terminal of the oscilloscope, so that its amplitude meets the measurement range of the subsequent sampling measurement circuit.

With reference to Fig. 4, when adopting surface mounting process to install resistor R1 and resistor R2, usually resistor R1 and resistor R2 are installed on a printed circuit board 44 with dielectric layer 41, element layer 42 and shielding layer 43, printed circuit A first pad 45, a second pad 46 and a third pad 47 are arranged on the element layer 42 of the board 44, so that the resistor R1 is installed between the first pad 45 and the second pad 46, so that the resistor R2 is installed between the second pad 46 and the third pad 47 . There is also a conductive via 48 between the element layer 42 and the shielding layer 43, and the via 48 is used to electrically connect the shielding layer 43 and the third pad 47, so that the shielding layer 43 and the pad 47 have the same potential .

3 and 4, in the prior art, the element layer 42 and the shielding layer 43 are usually formed by copper foil, wherein the shielding layer 43 is usually connected to the common terminal 34, and cooperates with the shielding cover covering the element layer 42 to use In order to shield the influence of the electromagnetic interference signal on the attenuation circuit 31 .

In some applications, more layers of printed circuit boards are used to install the attenuation circuit 31 , for example, a 6-layer printed circuit board is used. In the case of a 6-layer printed circuit board, a plurality of circuit layers can also be provided between the component layer 42 and the shielding layer 43 of the printed circuit board 44, and a medium is used between each circuit layer and the component layer 42 and the shielding layer 43. Layer separation. It should be noted that, as required, other circuit layers may also be provided under the shielding layer 43 .

In the prior art, various raw materials for the dielectric layer 41 of the printed circuit board 44 can be selected, and dielectric layers using different raw materials also have different relative permittivity.

In this example, a parasitic capacitance C11 will be formed between the first pad 45 and the second pad 46, a parasitic capacitance C12 will be formed between the second pad 46 and the third pad 47, the first pad 45 and the shield A parasitic capacitance C13 is formed between the layers 43 , and a parasitic capacitance C14 is formed between the second pad 46 and the shielding layer 43 .

Due to the first pad 45 and the second pad 46, the facing area between the second pad 46 and the third pad 47 is relatively small, and the capacitance values of the parasitic capacitances C11 and C12 are compared with the parasitic capacitance C13 or the parasitic capacitance C14. The parasitic capacitors C11 and C12 are much smaller, and the theoretical capacitance values of the parasitic capacitors C11 and C12 are generally only on the order of 10 ⁻¹⁹ to 10 ⁻²⁰ pF. Therefore, the influence of the parasitic capacitors C11 and C12 on the circuit can be ignored.

After ignoring the parasitic capacitances C11 and C12, an equivalent circuit 51 of the attenuation circuit 31 mounted on the printed circuit board 44 can be obtained, as shown in FIG. 5 .

In the equivalent circuit 51, with reference to FIG. 4 and FIG. 5, the input terminal 52 corresponds to the first pad 45, the output terminal 53 corresponds to the second pad 46, the connection terminal 58 corresponds to the third pad 47, and the shielding layer 43 corresponds to the signal common terminal 54 . Because, on the printed circuit board 44, the shielding layer 43 is electrically connected to the third pad 47 through a conductive via hole 48 as an equipotential component, and the conductive via hole 48 makes the third pad 47 and the shielding layer 43, etc. potential, therefore, there is no parasitic capacitance between the third pad 47 and the shielding layer 43 .

It can be seen from the equivalent circuit 51 that the capacitor C13 is built between the input terminal 52 and the common terminal 54, and will not affect the voltage dividing characteristics of the resistors R1 and R2, while the capacitor C14 is connected in parallel with the resistor R2, which will Affecting the voltage dividing characteristics of the resistors R1 and R2, according to the known amplitude-frequency characteristic calculation formula, see the following formula 2, the frequency response characteristic curve 61 of the output voltage signal Uo of the equivalent circuit 51 can be drawn, as shown in FIG. 6 .

$\frac{\mathrm{Uo}\left(\mathrm{j\ω}\right)}{\mathrm{Ui}\left(\mathrm{j\ω}\right)}=K\·\frac{1}{1+\mathrm{j\ω}{C}_{14}R}$ -----------Formula 2

In formula 2, $K=\frac{R_2}{R_1+R_2},R=\frac{R_1\&CenterDot;R_2}{R_1+{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="H2009101486247E00031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2},$ ω is the angular frequency

Figure 6, ${\mathrm{\&omega;}}_1=\frac{1}{R\&Center\; Dot;C_{14}},$ $R=\frac{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="H2009101486247E00041.png,H2009101486247E00102.png"\; state="\{\{state\}\}">R</figure-callout>}}_1\&Center\; Dot;R_2}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="H2009101486247E00041.png,H2009101486247E00102.png"\; state="\{\{state\}\}">R</figure-callout>}}_1+{\mathrm{<figure-callout\; id="2"\; label="R"\; filenames="H2009101486247E00031.png"\; state="\{\{state\}\}">R</figure-callout>}}_2}.$

With reference to Fig. 3, Fig. 5 and Fig. 6, due to the influence of the parasitic capacitance C14, when the frequency of the input signal Ui of the input end 52 of the equivalent circuit 51 is higher than the inflection point frequency ω ₁ , the output end 53 of the equivalent circuit 51 The amplitude of the output voltage signal Uo decreases rapidly as the frequency of the input signal Ui at the input terminal 52 increases. It can be seen from this that the parasitic capacitance C14 has an impact on the bandwidth of the attenuation circuit 31 formed by the resistors R1 and R2 , which narrows the bandwidth of the attenuation circuit 31 . The narrowing of the bandwidth of the attenuation circuit 31 often affects the frequency characteristics of the entire oscilloscope, so that the bandwidth of the entire oscilloscope is also narrowed.

The multimeter is also the most commonly used electrical variable measuring instrument. It is usually used to measure parameters such as DC or AC voltage, current and resistance. Some multimeters can also be used to measure the performance of diodes, transistors and other devices, and some can also be used to measure temperature and pressure. And other physical quantities, some can also be used to measure frequency and time indicators. The above-mentioned parasitic capacitance will also affect the frequency characteristics of the multimeter's AC signal measurement, narrowing its bandwidth, or making its amplitude-frequency characteristic curve not smooth.

Referring to FIG. 7 , the range amplification circuit 71 of the multimeter is also one of the circuits most susceptible to parasitic capacitance. The range amplifying circuit 71 of the multimeter is usually an inverting amplifying circuit connected by a resistor network R11, a range resistor R12 and an operational amplifier 72, wherein the resistor network R11 is connected to the input terminal 73 of the amplifying circuit 71 and the reverse direction of the operational amplifier 72. Between the input terminals 74 , the span resistor R12 is connected between the inverting input terminal 74 of the operational amplifier 72 and the output terminal 75 of the amplifying circuit 71 . The positive input terminal 76 of the operational amplifier 72 is connected to the common terminal 77. In practical applications, the range resistor R12 can often be composed of a plurality of resistors connected in parallel with each other and a selection switch. The selection switch can be selected to be different The resistor is connected between the inverting input terminal 74 of the operational amplifier 72 and the output terminal 75 of the amplifying circuit 71, thus, the measurement range of the range amplifying circuit 71 can be changed by controlling and changing the resistance value of the range resistor R12.

In practical applications, due to the large resistance of the resistor network R11, for example, in order to accurately measure and improve the input impedance, a precision resistor of about 1Mohm is usually used. In order to solve the problem of small precision resistor power, the resistor network R11 often needs to be dismantled The solution is two resistors R13 and R14 connected in series to reduce the power consumption carried by each resistor R13 and R14, or other reasons. However, once the resistor network R11 is disassembled into two resistors R13 and R14 connected in series, the problem of parasitic capacitance is introduced into the circuit.

Referring to Fig. 7 and Fig. 8 in combination, when the resistor R13 and the resistor R14 are mounted on a printed circuit board 84 having a dielectric layer 81, a component layer 82 and a shielding layer 83 connected to the common terminal 77 by surface mount technology , a first pad 85, a second pad 86, and a third pad 87 will be set on the element layer 82 of the printed circuit board 84, so that the resistor R13 is mounted on the first pad 85 and the second pad. Between the pads 86, the resistor R14 is installed between the second pad 86 and the third pad 87.

In this example, a parasitic capacitance C21 will be formed between the first pad 85 and the second pad 86, a parasitic capacitance C22 will be formed between the second pad 86 and the third pad 87, the first pad 85 and the shield A parasitic capacitance C23 is formed between the layers 83 , and a parasitic capacitance C24 is formed between the second pad 86 and the shielding layer 83 .

In this example, since the third pad 87 is also used to connect the inverting input terminal 74 of the operational amplifier 72, and the forward input terminal 76 of the operational amplifier 72 is connected to the common terminal 77, the characteristics of the negative feedback circuit formed by the operational amplifier 72 ( Virtual short and virtual break characteristics) make the third pad 87 and the common terminal 77 have the same potential, and there is no parasitic capacitance between them.

In this example, since the areas of the opposing surfaces between the first pad 85 and the second pad 86 , the second pad 86 and the third pad 87 are relatively small, the parasitic capacitances C21 and C22 can be ignored.

After ignoring the parasitic capacitances C21 and C22, the equivalent circuit 91 of the range amplifying circuit 71 installed on the printed circuit board 84 can be obtained. Referring to FIG. 8 and FIG. 9 together, in the equivalent circuit 91, the input terminal 73 corresponds to the first A pad 85 , the middle connection point 92 of the resistor R13 and the resistor R14 corresponds to the second pad 86 , and the pin of the resistor R14 connected to the inverting input terminal 74 of the operational amplifier 72 corresponds to the third pad 87 .

In this embodiment, the parasitic capacitances C23 and C24 introduced by the first pad 85 and the second pad 86 are about 1 pF. When the resistance R13=R144=500kΩ, the parasitic capacitance C24 makes the magnitude-frequency response curve 101 of the equivalent circuit 91 of the multimeter range amplifying circuit 71 have a depression greater than -3dB (equivalent to -30% error) at a frequency of 318kHz ( Signal attenuation), referring to Figure 10, this makes the frequency characteristics of the multimeter not smooth.

In the prior art, for the general multimeter AC voltage measurement function, the bandwidth at -3dB is usually required to be 1MHz. Obviously, due to the existence of the parasitic capacitance C24, referring to FIG. 9, the performance index of the multimeter is greatly reduced. , unable to meet the above market demand. For this reason, measures must be taken to eliminate the influence of parasitic capacitance C24 on the frequency response of the multimeter, so that the frequency characteristics of the multimeter become smooth.

There are many ways to reduce or eliminate the influence of parasitic capacitance on the printed circuit board on the frequency characteristics of the circuit.

For example, according to the principle of parasitic capacitance, it can be known that the parasitic capacitance generated on the printed circuit board is often associated with the resistance. Therefore, the influence of the parasitic capacitance on the printed circuit board on the frequency characteristics of the circuit can be reduced or eliminated by reducing the resistance value. But this approach is only feasible in certain circuit designs. For example, when the resistance value determines some parameter characteristics of the circuit, such as DC characteristics, the size of the resistance cannot be changed arbitrarily. For another example, in order to increase the voltage measurement range of the oscilloscope, the resistance of the input attenuation network must use a large resistance to reduce the measurement current and reduce the impact on the circuit under test during measurement. In this case, the method of reducing the resistance value will not work.

The method of removing the shielding layer can also reduce parasitic capacitance. However, this method cannot be applied to measurement circuits that are very sensitive to electromagnetic interference. In these circuits, it is often necessary to add a circuit shielding layer on the printed circuit board, such as the front-end circuit of the oscilloscope, the probe circuit, and the AC of the multimeter. The measurement circuit, of course, also includes other measurement circuits that are very sensitive to electromagnetic interference. The main reason is that after the circuit shield is removed, the circuit is easily disturbed by the external electromagnetic field, and the measurement accuracy will be greatly reduced. Although it is sometimes possible to place the circuit of the measuring equipment in a shielding box made of metal plates or metal blocks, instead of setting the shielding layer on the printed circuit board, this will not only significantly increase the manufacturing cost of the equipment, but also increase the cost of the equipment. volume, and will make the circuit assembly process more complicated.

In the prior art, in order to reduce or eliminate the influence of the parasitic capacitance on the printed circuit board on the frequency response of the circuit, the most common method is to add a compensation capacitance in the circuit to offset the influence of the parasitic capacitance.

Referring to FIG. 11, for example, in the equivalent circuit 51, a compensation capacitor C111 is externally connected between the input terminal 52 and the output terminal 53, and the compensation capacitor C111 satisfies $C111=\frac{R2}{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="H2009101486247E00041.png,H2009101486247E00102.png"\; state="\{\{state\}\}">R</figure-callout>}1}\&Center\; Dot;C14,$ The influence of the parasitic capacitance C14 on the circuit can be eliminated.

Using the external compensation capacitor C111 to eliminate or reduce the influence of the parasitic capacitor C14 on the circuit is a known technology. The capacitance value of capacitor C111 satisfies the $C111=\frac{R2}{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="H2009101486247E00041.png,H2009101486247E00102.png"\; state="\{\{state\}\}">R</figure-callout>}1}\&CenterDot;C14$ , the current in the line from the connection point 60 between the two resistors R1 and R2 to the connection point 59 between the two capacitors C111 and C14 is zero, at this moment, the electric bridge is balanced, and the parasitic capacitance C14 No longer affect the voltage dividing characteristics of the resistors R1 and R2.

Theoretically speaking, the method of using the external compensation capacitor C111 can compensate the parasitic capacitor C14 in the equivalent circuit 51 , thereby improving the frequency response characteristic of the equivalent circuit 51 . However, it is very difficult to implement because of:

1. Due to the change of temperature, the dielectric constant of the dielectric layer of the above-mentioned printed circuit board will change by up to 20%, which makes it impossible to accurately determine the size of the compensation capacitor. Therefore, when using this method to compensate for parasitic capacitance, some people design the compensation capacitor as an adjustable capacitor, but this will bring difficulties to the application and mass production of equipment. In order to solve the influence of temperature on printed circuit boards, some people choose materials with stable dielectric constants to make printed circuit boards, but this method has the disadvantages of high cost or difficult processing.

2. The capacitance value of the usual capacitive element is discontinuous, and there is a tolerance between the nominal data and the actual data. Sometimes it is difficult to find a compensation capacitor that is exactly equal to the parasitic capacitance.

3. The capacitive element as a compensation capacitor also has temperature characteristics, and its temperature characteristics are often difficult to match with the temperature characteristics of the parasitic capacitance of the printed circuit board.

Contents of the invention

In order to solve the problems in the prior art, the invention discloses a measuring device and its amplifying circuit, impedance components and multilayer printed circuit board.

A multilayer printed circuit board,

Consists of a component layer and a shield for connection to common,

The element layer has a first pad, a second pad and a third pad,

The first pad and the second pad are used to connect a first resistor,

The second pad and the third pad are also used to connect a second resistor,

The third pad is also used to connect an equipotential component that makes the third pad and the shielding layer equipotential,

There is also an electrically suspended intermediate conductive layer between the element layer and the shielding layer, and,

In the vertical projection of the middle conductive layer, at least a part of the vertical projection falls into the shielding layer, and in the vertical projection of the first pad, at least a part of the vertical projection falls in the middle In the conductive layer, the vertical projection of the second pad falls into the middle conductive layer.

In a multilayer printed circuit board of the present invention, the equipotential component may be formed of a conductor connecting the third pad and the shielding layer.

In a multi-layer printed circuit board of the present invention, the equipotential component may also be composed of an operational amplifier with a positive input terminal and an inverting input terminal, and the third pad is used to connect the One input terminal of the operational amplifier, and the other input terminal of the operational amplifier is used to connect to the common terminal.

In a multi-layer printed circuit board of the present invention, a first parasitic capacitance may be formed between the first pad and the middle conductive layer, and between the middle conductive layer and the shielding layer A second parasitic capacitance may be formed, and a ratio of the first parasitic capacitance to the second parasitic capacitance may be equal to a ratio of the second resistance to the first resistance.

an impedance component,

consists of a multilayer printed circuit board and a resistor network,

The multilayer printed circuit board includes a component layer and a shielding layer for connecting the common terminal,

The element layer has a first pad, a second pad and a third pad,

The resistor network includes a first resistor and a second resistor,

The first resistor is connected to the first pad and the second pad,

The second resistor is connected to the second pad and the third pad,

The third pad is also used to connect an equipotential component that makes the third pad and the shielding layer equipotential,

There is also an electrically suspended intermediate conductive layer between the element layer and the shielding layer, and,

In the vertical projection of the middle conductive layer, at least a part of the vertical projection falls into the shielding layer, and in the vertical projection of the first pad, at least a part of the vertical projection falls in the middle In the conductive layer, the vertical projection of the second pad falls into the middle conductive layer.

In an impedance component according to the present invention, the equipotential component may be composed of a conductor connecting the third pad and the shielding layer.

In an impedance component according to the present invention, the equipotential component may be composed of an operational amplifier with a positive input terminal and an inverting input terminal, and the third pad is used to connect the operational amplifier One input end of the amplifier, and the other input end of the operational amplifier is used to connect to the common end. In an impedance component according to the present invention, a first parasitic capacitance may be formed between the first pad and the intermediate conductive layer, and may be formed between the intermediate conductive layer and the shielding layer A second parasitic capacitance is formed, and a ratio of the first parasitic capacitance to the second parasitic capacitance may be equal to a ratio of the second resistance to the first resistance.

an amplifier circuit,

comprising a multilayer printed circuit board, an operational amplifier having a positive input and an inverting input, and a resistor network connected to said operational amplifier,

The multilayer printed circuit board includes a component layer and a shielding layer for connecting the common terminal,

The element layer has a first pad, a second pad and a third pad,

The resistor network includes a first resistor and a second resistor,

The first resistor is connected to the first pad and the second pad,

The second resistor is connected to the second pad and the third pad,

The third pad is also used to connect an equipotential component that makes the third pad and the shielding layer equipotential,

There is also an electrically suspended intermediate conductive layer between the element layer and the shielding layer, and,

In the vertical projection of the middle conductive layer, at least a part of the vertical projection falls into the shielding layer, and in the vertical projection of the first pad, at least a part of the vertical projection falls in the middle In the conductive layer, the vertical projection of the second pad falls into the middle conductive layer.

a measuring device,

consists of a multilayer printed circuit board, a resistor network and a common terminal,

The multilayer printed circuit board includes an element layer and a shielding layer for connecting the common terminal, the element layer has a first pad, a second pad and a third pad,

The resistor network includes a first resistor and a second resistor,

The first resistor is connected to the first pad and the second pad,

The second resistor is connected to the second pad and the third pad,

The third pad is also used to connect an equipotential component that makes the third pad and the shielding layer equipotential,

There is also an electrically suspended intermediate conductive layer between the element layer and the shielding layer, and,

In the vertical projection of the middle conductive layer, at least a part of the vertical projection falls into the shielding layer, and in the vertical projection of the first pad, at least a part of the vertical projection falls in the middle In the conductive layer, the vertical projection of the second pad falls into the middle conductive layer.

In the measuring device of the present invention, the equipotential component may be formed of a conductor connecting the third pad and the shielding layer.

In the measuring device of the present invention, the equipotential component may be formed by an operational amplifier having a positive input terminal and an inverting input terminal, and the third pad is connected to an input of the operational amplifier terminal, and the other input terminal of the operational amplifier is connected to the common terminal.

In the measuring device of the present invention, a first parasitic capacitance may be formed between the first pad and the intermediate conductive layer, and a first parasitic capacitance may be formed between the intermediate conductive layer and the shielding layer. Two parasitic capacitances, the ratio of the first parasitic capacitance to the second parasitic capacitance may be equal to the ratio of the second resistance to the first resistance.

In order to solve the problems in the prior art, the present invention discloses another measuring device and its amplifying circuit, impedance components and multilayer printed circuit board.

A multilayer printed circuit board,

Consists of a component layer and a shield for connection to common,

The element layer has a first pad, a second pad and a third pad,

The first pad and the second pad are used to connect a first resistor,

The second pad and the third pad are also used to connect a second resistor,

The third pad is also used to connect an equipotential component that makes the third pad and the shielding layer equipotential,

There is also an intermediate conductive layer between the element layer and the shielding layer, and,

The first pad is connected to the intermediate conductive layer through a conductor, and in the vertical projection of the intermediate conductive layer, at least a part of the vertical projection falls into the shielding layer, and in the second In the vertical projection of the pad, a part of the vertical projection falls into the middle conductive layer, and a part of the vertical projection falls into the shielding layer.

In the multilayer printed circuit board of the present invention, the equipotential component may be formed of a conductor connecting the third pad and the shielding layer.

In a multi-layer printed circuit board according to the present invention, the equipotential component may be composed of an operational amplifier with a forward input terminal and a reverse input terminal, and the third pad is used to connect the One input end of the operational amplifier, and the other input end of the operational amplifier is used to connect to the common end.

In a multilayer printed circuit board according to the present invention, a first parasitic capacitance may be formed between the second pad and the intermediate conductive layer, and the second pad and the shielding A second parasitic capacitance may be formed between layers, and a ratio of the first parasitic capacitance to the second parasitic capacitance may be equal to a ratio of the second resistance to the first resistance.

an impedance component,

consists of a multilayer printed circuit board, a resistor network,

The multilayer printed circuit board includes a component layer and a shielding layer for connecting the common terminal,

The element layer has a first pad, a second pad and a third pad,

The resistor network includes a first resistor and a second resistor,

The first resistor is connected to the first pad and the second pad,

The second resistor is connected to the second pad and the third pad,

The third pad is also used to connect an equipotential component that makes the third pad and the shielding layer equipotential,

There is also an intermediate conductive layer between the element layer and the shielding layer, and,

The first pad is connected to the intermediate conductive layer through a conductor,

In the vertical projection of the middle conductive layer, at least a part of the vertical projection falls into the shielding layer, and in the vertical projection of the second pad, a part of the vertical projection falls into the middle conductive layer Inside, a part of the vertical projection falls into the shielding layer.

In an impedance component according to the present invention, the equipotential component may be composed of a conductor connecting the third pad and the shielding layer.

In an impedance component according to the present invention, the equipotential component may also be composed of an operational amplifier with a positive input terminal and an inverting input terminal, and the third pad is used to connect the One input terminal of the operational amplifier, and the other input terminal of the operational amplifier is used to connect to the common terminal.

In an impedance component according to the present invention, a first parasitic capacitance may be formed between the second pad and the intermediate conductive layer, and between the second pad and the shielding layer A second parasitic capacitance may be formed, and a ratio of the first parasitic capacitance to the second parasitic capacitance may be equal to a ratio of the second resistance to the first resistance.

an amplifier circuit,

comprising a multi-layer printed circuit board, an operational amplifier having a forward input terminal and an inverting input terminal and a resistor network connected to said operational amplifier,

The multilayer printed circuit board includes a component layer and a shielding layer for connecting the common terminal,

The element layer has a first pad, a second pad and a third pad,

The resistor network includes a first resistor and a second resistor,

The first resistor is connected to the first pad and the second pad,

The second resistor is connected to the second pad and the third pad,

The third pad is also used to connect an equipotential component that makes the third pad and the shielding layer equipotential,

There is also an intermediate conductive layer between the element layer and the shielding layer, and,

The first pad is connected to the intermediate conductive layer through a conductor,

In the vertical projection of the middle conductive layer, at least a part of the vertical projection falls into the shielding layer, and in the vertical projection of the second pad, a part of the vertical projection falls into the middle conductive layer Inside, a part of the vertical projection falls into the shielding layer.

a measuring device,

Consists of a multilayer printed circuit board, a resistor network, a common terminal,

The multilayer printed circuit board includes an element layer and a shielding layer for connecting the common terminal,

The element layer has a first pad, a second pad and a third pad,

The resistor network includes a first resistor and a second resistor,

The first resistor is connected to the first pad and the second pad,

The second resistor is connected to the second pad and the third pad,

The third pad is also used to connect an equipotential component that makes the third pad and the shielding layer equipotential,

There is also an intermediate conductive layer between the element layer and the shielding layer, and,

The first pad is connected to the intermediate conductive layer through a conductor,

In the vertical projection of the middle conductive layer, at least a part of the vertical projection falls into the shielding layer, and in the vertical projection of the second pad, a part of the vertical projection falls into the middle conductive layer Inside, a part of the vertical projection falls into the shielding layer.

In a measuring device according to the present invention, the equipotential component may be composed of a conductor connecting the third pad and the shielding layer.

In a measuring device according to the present invention, the equipotential component may also be composed of an operational amplifier with a positive input terminal and a negative input terminal, and the third pad is used to connect the One input terminal of the operational amplifier, and the other input terminal of the operational amplifier is used to connect to the common terminal.

In a measuring device according to the present invention, a first parasitic capacitance may be formed between the second pad and the intermediate conductive layer, and between the second pad and the shielding layer A second parasitic capacitance may be formed, and a ratio of the first parasitic capacitance to the second parasitic capacitance may be equal to a ratio of the second resistance to the first resistance.

In order to solve the problems in the prior art, the present invention discloses another measuring device and its amplifying circuit, impedance components and multilayer printed circuit board.

A multilayer printed circuit board,

Consists of a component layer and a shield for connection to common,

The element layer has a first pad, a second pad and a third pad,

The first pad and the second pad are used to connect a first resistor,

The second pad and the third pad are also used to connect a second resistor,

The third pad is also used to connect an equipotential component that makes the third pad and the shielding layer equipotential,

There is also an intermediate conductive layer between the element layer and the shielding layer, and,

The second pad is connected to the intermediate conductive layer through a conductor,

In the vertical projection of the middle conductive layer, at least a part of the vertical projection falls into the shielding layer, and in the vertical projection of the first pad, at least a part of the vertical projection falls in the middle within the conductive layer.

In the multi-layer printed circuit board of the present invention, the equipotential component may be composed of a conductor connecting the third pad and the shielding layer.

In a multi-layer printed circuit board according to the present invention, the equipotential part may also be composed of an operational amplifier with a forward input terminal and a reverse input terminal, and the third pad is used for connecting One input end of the operational amplifier, and the other input end of the operational amplifier are used to connect to the common end.

In a multilayer printed circuit board according to the present invention, a first parasitic capacitance can be formed between the first pad and the middle conductive layer, and the middle conductive layer and the shielding layer A second parasitic capacitance may be formed therebetween, and the ratio of the first parasitic capacitance to the second parasitic capacitance may be equal to the ratio of the second resistance to the first resistance.

an impedance component,

consists of a multilayer printed circuit board, a resistor network,

The multilayer printed circuit board includes a component layer and a shielding layer for connecting the common terminal,

The element layer has a first pad, a second pad and a third pad,

The resistor network includes a first resistor and a second resistor,

The first resistor is connected to the first pad and the second pad,

The second resistor is connected to the second pad and the third pad,

The third pad is also used to connect an equipotential component that makes the third pad and the shielding layer equipotential,

There is also an intermediate conductive layer between the element layer and the shielding layer, and,

The second pad is connected to the intermediate conductive layer through a conductor,

In the vertical projection of the middle conductive layer, at least a part of the vertical projection falls into the shielding layer, and in the vertical projection of the first pad, at least a part of the vertical projection falls in the middle within the conductive layer.

In an impedance component according to the present invention, the equipotential component may be composed of a conductor connecting the third pad and the shielding layer.

In an impedance component according to the present invention, the equipotential component may also be composed of an operational amplifier with a positive input terminal and an inverting input terminal, and the third pad is used to connect the One input terminal of the operational amplifier, and the other input terminal of the operational amplifier is used to connect to the common terminal.

In an impedance component according to the present invention, a first parasitic capacitance may be formed between the first pad and the intermediate conductive layer, and may be formed between the intermediate conductive layer and the shielding layer A second parasitic capacitance is formed, and a ratio of the first parasitic capacitance to the second parasitic capacitance may be equal to a ratio of the second resistance to the first resistance.

an amplifier circuit,

comprising a multi-layer printed circuit board, an operational amplifier having a forward input terminal and an inverting input terminal and a resistor network connected to said operational amplifier,

The multilayer printed circuit board includes

a component layer and a shield for connection to common,

The element layer has a first pad, a second pad and a third pad,

The resistor network includes a first resistor and a second resistor,

The first resistor is connected to the first pad and the second pad,

The second resistor is connected to the second pad and the third pad,

The third pad is also used to connect an equipotential component that makes the third pad and the shielding layer equipotential,

There is also an intermediate conductive layer between the element layer and the shielding layer, and,

The second pad is connected to the intermediate conductive layer through a conductor,

In the vertical projection of the middle conductive layer, at least a part of the vertical projection falls into the shielding layer, and in the vertical projection of the first pad, at least a part of the vertical projection falls in the middle within the conductive layer.

a measuring device,

Consists of a multilayer printed circuit board, a resistor network, a common terminal,

The multilayer printed circuit board includes

a component layer and a shield for connection to the common terminal,

The element layer has a first pad, a second pad and a third pad,

The resistor network includes a first resistor and a second resistor,

The first resistor is connected to the first pad and the second pad,

The second resistor is connected to the second pad and the third pad,

The third pad is also used to connect an equipotential component that makes the third pad and the shielding layer equipotential,

There is also an intermediate conductive layer between the element layer and the shielding layer, and,

The second pad is connected to the intermediate conductive layer through a conductor,

In the vertical projection of the middle conductive layer, at least a part of the vertical projection falls into the shielding layer, and in the vertical projection of the first pad, at least a part of the vertical projection falls in the middle within the conductive layer.

In a measuring device according to the present invention, the equipotential component may be composed of a conductor connecting the third pad and the shielding layer.

In a measuring device according to the present invention, the equipotential component may be composed of an operational amplifier with a positive input terminal and a negative input terminal, and the third pad is used to connect the operational amplifier One input end of the amplifier, and the other input end of the operational amplifier is used to connect to the common end. In a measuring device according to the present invention, a first parasitic capacitance may be formed between the first pad and the intermediate conductive layer, and may be formed between the intermediate conductive layer and the shielding layer A second parasitic capacitance is formed, and a ratio of the first parasitic capacitance to the second parasitic capacitance may be equal to a ratio of the second resistance to the first resistance.

The measuring equipment, amplifying circuit, impedance component or multilayer printed circuit board of the present invention utilizes the described intermediate conductive layer arranged between the described element layer and the shielding layer, not only can improve the performance without adding additional devices Or eliminate the above parasitic capacitance, and has the characteristics of good temperature compensation, stable operation and high reliability.

Description of drawings

FIG. 1 is a schematic structural diagram of a printed circuit board 4 in the prior art.

FIG. 2 is an explanatory diagram of an equivalent circuit 24 of the printed circuit board 4 .

FIG. 3 is an explanatory diagram of an attenuation circuit 31 of a conventional oscilloscope.

FIG. 4 is a structural schematic diagram of a printed circuit board 44 for mounting the attenuation circuit 31 .

FIG. 5 is an explanatory diagram of an equivalent circuit 51 of the attenuation circuit 31 mounted on the printed circuit board 44 .

FIG. 6 is a schematic diagram of the amplitude-frequency characteristic of the equivalent circuit 51 .

FIG. 7 is an explanatory diagram of a range amplification circuit 71 of a multimeter in the prior art.

FIG. 8 is a structural schematic diagram of a printed circuit board 84 for mounting the range amplifier circuit 71 .

FIG. 9 is an explanatory diagram of an equivalent circuit 91 of the range amplification circuit 71 mounted on the printed circuit board 84 .

FIG. 10 is a schematic diagram of the amplitude-frequency characteristic of the equivalent circuit 91 .

FIG. 11 is an explanatory diagram of a method of canceling parasitic capacitance employed in the prior art.

FIG. 12 is an explanatory diagram of the structure of the multimeter 200 in the first embodiment selected by the present invention.

FIG. 13 is an explanatory diagram of the inverting amplifier circuit 203 .

FIG. 14 is a schematic structural diagram of a multilayer printed circuit board 220 selected in the first embodiment.

FIG. 15 is a schematic view of the vertical projection structure of the multilayer printed circuit board 220 .

FIG. 16 is an explanatory diagram of an equivalent circuit 240 of the inverting amplifier circuit 203 mounted on the multilayer printed circuit board 220 .

FIG. 17 is an explanatory diagram of a further equivalent circuit 250 of the equivalent circuit 240 .

FIG. 18 is a schematic diagram of the amplitude-frequency characteristic of the equivalent circuit 250 .

Fig. 19 is an explanatory view of the structure of the six-layer printed circuit board K selected in the first embodiment.

FIG. 20 is a schematic structural diagram of a multilayer printed circuit board 320 selected in the first embodiment.

FIG. 21 is an explanatory diagram of an equivalent circuit 350 of the amplifier circuit 203 mounted on the printed circuit board 320 .

FIG. 22 is a schematic structural diagram of a multilayer printed circuit board 420 selected in the first embodiment.

FIG. 23 is an explanatory diagram of an equivalent circuit 450 of the amplifier circuit 203 mounted on the printed circuit board 420 .

FIG. 24 is a schematic structural diagram of a multilayer printed circuit board 520 selected in the first embodiment.

FIG. 25 is an explanatory diagram of an equivalent circuit 550 of the amplifier circuit 203 mounted on the printed circuit board 520 .

FIG. 26 is an explanatory diagram of the amplification circuit 601 of the oscilloscope 600 used in the second embodiment.

FIG. 27 is a schematic structural diagram of a multilayer printed circuit board 620 selected in the second embodiment.

FIG. 28 is an explanatory diagram of a structural change of the amplifier circuit 601 .

FIG. 29 is a schematic structural diagram of a multilayer printed circuit board 630 selected in the second embodiment.

FIG. 30 is a schematic structural diagram of a multilayer printed circuit board 640 selected in the second embodiment.

FIG. 31 is a schematic structural diagram of a multilayer printed circuit board 650 selected in the second real-time example.

Detailed ways

In order to further illustrate a measuring device and its components of the present invention, the specific embodiments selected by the present invention are exemplified below.

First embodiment:

Referring to Fig. 12, in the present embodiment, the measuring equipment of the present invention is a digital multimeter 200, and the digital multimeter 200 includes an input terminal 202, a range amplification circuit 201, an A/D converter 204 and a microprocessor device 205. The input terminal 202 is used to connect the external measured signal, the range amplifier circuit 201 is used to perform signal amplification processing on the measured signal from the input terminal 202, and the A/D converter 204 is used to simulate the output signal of the range amplifier circuit 201. For digital conversion, the microprocessor 205 is used to process the digital signal output by the A/D converter 204.

As an example, in this embodiment, other circuits may be included between the input terminal 202 and the range amplification circuit 201, such as an overvoltage and overcurrent protection circuit, an attenuation circuit, and the like. Other circuits may also be included between the range amplification circuit 201 and the A/D converter 204 , such as a filter circuit, a DC removal circuit or an AC-DC conversion circuit.

In this embodiment, the microprocessor 205 may be composed of a CPU, or may be composed of a CPU and an FPGA or a CPLD programmable device, or may be composed of a CPU and a DSP, and the CPU may be a meter-specific CPU Or DSP constitutes, also can be constituted by the one-chip computer. Certainly, for different applications, the microprocessor 205 may also be composed of a computer, such as a personal computer.

In this embodiment, the digital multimeter 200 is a general-purpose measuring instrument that can be used to measure various electrical signals, such as DC voltage, current, AC voltage and current, resistance, or devices such as capacitance, diodes, and triodes. Depending on the application, the digital multimeter 200 can also include more measurement functions, or reduce some measurement functions.

In this embodiment, the range amplifying circuit 201 of the digital multimeter 200 is composed of an inverting amplifying circuit 203 , please refer to FIG. 13 .

The reverse amplification circuit 203 includes an input terminal 211 , an operational amplifier A1 , a resistor network 219 , a range resistor R23 , an output terminal 212 and a common terminal 244 . The resistor network 219 is connected in series between the input terminal 211 and the inverting input terminal 216 of the operational amplifier A1, and the resistor network 219 is composed of a resistor R21 and a resistor R22 connected in series. The range resistor R23 is connected between the inverting input terminal 216 of the operational amplifier A1 and the output terminal 214 of the operational amplifier A1, the positive input terminal 215 of the operational amplifier A1 is connected to the common terminal 244, and the output terminal 214 of the operational amplifier A1 is connected to the reverse The output terminal 212 of the amplification circuit 203 . When an input signal Uin is connected to the input terminal 211 of the reverse amplifier circuit 203 , the reverse amplifier circuit 203 amplifies the input signal Uin into an output signal Uout, which is then output from the output terminal 212 .

Referring to FIG. 14 , in this embodiment, there is also a multilayer printed circuit board 220 . The multilayer printed circuit board 220 is a three-layer printed circuit board including an element layer 221 , a shielding layer 223 and an intermediate layer 222 between the element layer 221 and the shielding layer 223 .

In this embodiment, the element layer 221, the intermediate layer 222 and the shielding layer 223 are made of conductive copper foil, an insulating layer 224 is arranged between the element layer 221 and the intermediate layer 222, and an insulating layer 224 is arranged between the intermediate layer 222 and the shielding layer 223. An insulating layer 225, insulating layer 224 and insulating layer 225 are made of insulating dielectric material.

In this embodiment, the component layer 221 of the multilayer printed circuit board 220 includes a first pad 231 , a second pad 232 and a third pad 233 . The pads 231, 232, and 233 are copper foil pads.

13 and 14, in this embodiment, the input terminal 211 of the inverting amplifier circuit 203 corresponds to the first pad 231 of the multilayer printed circuit board 220, and the inverting input terminal 216 of the operational amplifier A1 corresponds to the multilayer printed circuit board. The third pad 233 of the circuit board 220 and the common terminal 244 correspond to the shielding layer 223 of the multilayer printed circuit board 220 , and the shielding layer 223 is used to prevent the inverting amplifier circuit 203 from being interfered by external electromagnetic fields. The two pins of the resistor R21 in the resistor network 219 of the reverse amplifier circuit 203 are installed on the first pad 231 and the second pad 232 by welding, and the two pins of the resistor R22 are installed on the second pad by soldering. pad 232 and the third pad 233 .

In this embodiment, the intermediate layer 222 is disposed under the first pad 231 and the second pad 232 , and forms an electrically suspended conductive layer by being electrically insulated from the element layer 221 and the shielding layer 223 .

Please refer to Fig. 15, in the present embodiment, the area of the intermediate layer 222 of the multilayer printed circuit board 220 is greater than the area of the first pad 231 and the second pad 232, and the first pad 231 and the second pad 232 The vertical projection of all falls within the middle layer 222. The area of the shielding layer 223 is greater than or equal to the area of the middle layer 222 , and the vertical projection of the middle layer 222 completely falls into the shielding layer 223 .

Please refer to FIG. 13 and FIG. 14 again, in the multilayer printed circuit board 220 of this embodiment, a parasitic capacitance C21 will be generated between the first pad 231 and the second pad 232, and the second pad 232 and the second pad A parasitic capacitance C22 will be generated between the three pads 233, a parasitic capacitance C23 will be generated between the first pad 231 and the middle layer 222, a parasitic capacitance C24 will be generated between the second pad 232 and the middle layer 222, and the middle A parasitic capacitance C25 is generated between the layer 222 and the shielding layer 223 . It should be noted here that, in this embodiment, since the third pad 233 is correspondingly connected to the inverting input terminal 216 of the operational amplifier A1, according to the equipotential relationship between the positive input terminal 215 and the inverting input terminal 216 of the operational amplifier A1 Known characteristics, the operational amplifier A1 actually acts as an equipotential component, which makes the potential of the third pad 233 the same as that of the shielding layer 223 . Also because the potential of the third pad 233 is the same as that of the shielding layer 223 , there is no parasitic capacitance between the third pad 233 and the shielding layer 223 .

Please refer to FIG. 14, FIG. 15 and FIG. 16 together. Due to the existence of parasitic capacitances C21, C22, C23, C24, and C25, the reverse amplifier circuit 203 installed on the multilayer printed circuit board 220 can be equivalent to an equivalent circuit 240 . In the equivalent circuit 240, the node 241 is connected to the input terminal 211, the node 241 corresponds to the first pad 231 in the multilayer printed circuit board 220, and the node 242 corresponds to the second pad 232 in the multilayer printed circuit board 220 , the node 243 corresponds to the third pad 233 in the multilayer printed circuit board 220 , and the common terminal 244 corresponds to the shielding layer 223 .

In the multi-layer printed circuit board 220, since the facing area between the first pad 231 and the second pad 232 and between the second pad 232 and the third pad 233 is relatively small, the parasitic capacitances C21 and C22 are relatively small. Since the parasitic capacitances C23, C24, and C25 are relatively small, their effects can be ignored. After ignoring the parasitic capacitances C21 and C22 , a further equivalent circuit 250 of the equivalent circuit 240 can be obtained, refer to FIG. 17 .

It can be seen from the equivalent circuit 250 that the resistor R21, the resistor R22, and the parasitic capacitors C23, C24, and C25 actually form a bridge circuit (bridge). In the above bridge circuit, the parasitic capacitances C23, C24 and C25 will affect the frequency characteristic of the resistor network 219 composed of the resistors R21 and R22 only when the current flows in the parasitic capacitor C24. According to the principle of bridge balance, at this time, if the parasitic capacitors C23 and C25 are controlled, the $\frac{C\mathrm{twenty\; three}}{C25}=\frac{R\mathrm{twenty\; two}}{R\mathrm{twenty\; one}},$ Then the current flowing through the parasitic capacitor C24 can be made zero. Thus, the influence of the parasitic capacitances C23, C24 and C25 on the frequency characteristics of the resistor network 219 is eliminated.

In this embodiment, with reference to FIG. 14 and FIG. 17 , assuming that the area facing the first pad 231 and the intermediate layer 222 is S ₁ , the thickness of the insulating medium in the insulating layer 224 is D ₁ , and the insulating medium in the insulating layer 224 is The relative dielectric constant of the medium is ε _r1 , then the capacitance value of the parasitic capacitance C23 can be calculated according to $C\mathrm{twenty\; three}=\frac{{\mathrm{\&epsiv;}}_{\mathrm{<figure-callout\; id="1"\; label="r"\; filenames="H2009101486247E00041.png,H2009101486247E00102.png"\; state="\{\{state\}\}">r</figure-callout>}1}\mathrm{\&epsiv;}{\mathrm{<figure-callout\; id="1"\; label="S"\; filenames="H2009101486247E00041.png,H2009101486247E00102.png"\; state="\{\{state\}\}">S</figure-callout>}}_1}{{\mathrm{D.}}_1}$ Determine; if the area facing the middle layer 222 and the shielding layer 223 is S ₂ , the thickness of the insulating medium in the insulating layer 225 is D ₂ , and the relative permittivity of the insulating medium in the insulating layer 225 is ε _r2 , then the parasitic capacitance C25 Capacitance values can be based on $C25=\frac{{\mathrm{\&epsiv;}}_{\mathrm{<figure-callout\; id="2"\; label="r"\; filenames="H2009101486247E00031.png"\; state="\{\{state\}\}">r</figure-callout>}2}\mathrm{\&epsiv;}{\mathrm{<figure-callout\; id="2"\; label="S"\; filenames="H2009101486247E00031.png"\; state="\{\{state\}\}">S</figure-callout>}}_2}{{\mathrm{D.}}_2}$ Sure. It can be seen that by controlling the facing areas S ₁ , S ₂ , or by controlling the thicknesses D ₁ , D ₂ of the insulating layers 224, 225, or by changing the materials to adjust the relative permittivity ε _r2 , ε _r1 , can change the size of parasitic capacitance C23 and C25, when the parasitic capacitance C23 and C25 satisfy $\frac{C\mathrm{twenty\; three}}{C25}=\frac{R\mathrm{twenty\; two}}{R\mathrm{twenty\; one}},$ Then the current flowing through the parasitic capacitor C24 can be made zero, thereby eliminating the influence of the parasitic capacitors C23 , C24 and C25 on the frequency characteristic of the resistor network 219 .

In this embodiment, since the insulating layers 224, 225 of the multilayer printed circuit board 220 are made of the same material, in this embodiment, by changing the size of the facing areas S ₁ , S ₂ and the insulating layer 224 , 225 thickness D ₁ , D ₂ to make the parasitic capacitance C23 and C25 satisfy $\frac{C\mathrm{twenty\; three}}{C25}=\frac{R\mathrm{twenty\; two}}{R\mathrm{twenty\; one}}.$

After utilizing the above method to eliminate the influence of the parasitic capacitances C23, C24 and C25 on the frequency characteristics of the resistor network 219, the amplitude-frequency characteristic curve 270 of the reverse amplifying circuit 203 becomes relatively smooth. Referring to FIG. 18, the reverse amplifying circuit 203 Bandwidth can reach 1MHZ.

As an example of this embodiment, the multilayer printed circuit board 220 in this embodiment may also be formed by using a multilayer printed circuit board with more than three layers. For example, the printed circuit board 220 may be formed by using a six-layer printed circuit board K, refer to FIG. 19 . Set the first layer K1 of the six-layer printed circuit board K as the element layer, set the third layer K3 of the six-layer printed circuit board K as the position where the middle layer is located, and set the sixth layer K6 of the six-layer printed circuit board K for the shielding layer. At this time, the thickness of the insulating layer between the first layer K1 and the third layer K3 includes the thickness of the insulating layer 224a and the insulating layer 224b. The thickness of the insulating layer between the third layer K3 and the sixth layer includes the thicknesses of the insulating layer 225a, the insulating layer 225b and the insulating layer 225c. In this illustration, the intermediate layer disposed on the third layer K3 is an electrically suspended conductive layer, and the first layer K1, the sixth layer K6, and the lines disposed between the first layer K1 and the third layer K3 layers, any wiring layers arranged between the third layer K3 and the sixth layer K6 are electrically insulated.

As yet another example, the first embodiment may also use a multilayer printed circuit board 320, please refer to Figure 13, Figure 14 and Figure 20 in conjunction,

Different from the multilayer printed circuit board 220, in the multilayer printed circuit board 320, the vertical projection of the middle layer 222 all falls into the shielding layer 223, and only part of the vertical projection of the first pad 231 falls into the middle layer 222, and the rest Part of it falls into the shielding layer 223 , while the vertical projection of the second pad 232 completely falls into the middle layer 222 .

In this example, since only a part of the vertical projection of the first pad 231 falls into the middle layer 222, and the rest falls into the shielding layer 223, there is a parasitic projection between the first pad 231 and the shielding layer 223. Capacitor C36. After ignoring the parasitic capacitance C21 and the parasitic capacitance C22, an equivalent circuit 350 of the inverting amplifier circuit 203 mounted on the multilayer printed circuit board 320 can be obtained, refer to FIG. 21 .

It can be known from the equivalent circuit 350 that the parasitic capacitor C36 is equivalently connected between the input terminal 211 and the common terminal 244 of the inverting amplifying circuit 203 , and it will not affect the frequency characteristics of the resistor network 219 and the amplifying circuit 203 .

As another example, the first embodiment may also use a multi-layer printed circuit board 420, please refer to Figure 13, Figure 14 and Figure 22 in conjunction,

Different from the multilayer printed circuit board 220, in the multilayer printed circuit board 420, the vertical projection of the middle layer 222 all falls into the shielding layer 223, a part of the vertical projection of the second pad 232 falls into the middle layer 222, and the rest Part of it falls within the shielding layer 223 , and the first pad 231 is electrically connected to the intermediate layer 222 through a conductive via 428 . In this example, the conductive via 428 is equivalent to an equipotential component, which makes the potential of the first pad 231 and the potential of the intermediate layer 222 the same. Also because the potential of the first pad 231 is the same as that of the middle layer 222 , there is no parasitic capacitance between the first pad 231 and the middle layer 222 .

In this embodiment, since only a part of the vertical projection of the second pad 232 falls into the middle layer 222, and the rest falls into the shielding layer 223, there will be a parasitic projection between the second pad 232 and the shielding layer 223. Capacitor C26, after ignoring parasitic capacitance C21 and parasitic capacitance C22, an equivalent circuit 450 of amplifying circuit 203 mounted on a multilayer printed circuit board 420 can be obtained, as shown in FIG. 23 .

It can be seen from the equivalent circuit 450 that the resistor R21, the resistor R22, and the parasitic capacitors C24 and C26 form a bridge circuit. By making the parasitic capacitances C24 and C26 satisfy $\frac{C\mathrm{twenty\; four}}{C26}=\frac{R\mathrm{twenty\; two}}{R\mathrm{twenty\; one}},$ Then the current on the branch 455 can be made zero, thereby eliminating the influence of the parasitic capacitances C24 and C26 on the resistor network 219 .

In this example, since the parasitic capacitor C25 is equivalently connected between the input terminal 211 and the common terminal 244 , it will not affect the frequency characteristics of the resistor network 219 and the inverting amplifier circuit 203 .

As another example, the first embodiment may also use a multi-layer printed circuit board 520, please refer to Figure 13, Figure 14 and Figure 24 in conjunction,

Different from the multilayer printed circuit board 220 , in the multilayer printed circuit board 520 , the second pad 232 is electrically connected to the middle layer 222 through a conductive via 528 . At this time, after ignoring the parasitic capacitance C21 and the parasitic capacitance C22 , an equivalent circuit 550 of the amplifier circuit 203 mounted on the multilayer printed circuit board 520 can be obtained, as shown in FIG. 25 .

It can be seen from the equivalent circuit 550 that the resistor R21, the resistor R22, the parasitic capacitor C23 and the parasitic capacitor C25 form a bridge circuit. By controlling the capacitance values of the parasitic capacitor C23 and the parasitic capacitor C25, the $\frac{C\mathrm{twenty\; three}}{C25}=\frac{R\mathrm{twenty\; two}}{R\mathrm{twenty\; one}},$ Then, the current on the branch 555 can be made zero, thereby eliminating the influence of the parasitic capacitances C23 and C25 on the frequency characteristics of the resistor network 219 and the inverting amplifier circuit 203 .

As a further illustration, in this illustration, referring to FIG. 24 and FIG. 25, the parasitic capacitance C23 may not only include the parasitic capacitance generated by the pad 231 relative to the shielding layer 223, but also include capacitance caused by other reasons, such as resistance The parasitic capacitance existing in the element of R21 itself, or the parasitic capacitance generated by the resistor R21 relative to the shielding layer 223 . At this time, by controlling the facing area of the first pad 231 and the intermediate layer 222, the thickness of the insulating layer 224 and the insulating layer 225, and the dielectric constant, the capacitance values of the parasitic capacitance C23 and the parasitic capacitance C25 can also be adjusted, so that $\frac{C\mathrm{twenty\; three}}{C25}=\frac{R\mathrm{twenty\; two}}{R\mathrm{twenty\; one}},$ Make the current on the branch 555 zero, so as to eliminate the influence of the parasitic capacitances C23 and C25 on the frequency characteristics of the resistor network 219 and the inverting amplifier circuit 203 .

Second embodiment:

In this embodiment, the measuring device of the present invention is an oscilloscope 600. Please refer to FIG. 26. The oscilloscope 600 includes an amplifying circuit 601. The amplifying circuit 601 is connected in series to the input of the oscilloscope 600 through an input terminal 611 and an output terminal 612. in the loop. In this amplifier circuit there is a resistor network 602 connected in series between an input terminal 611 and an output terminal 612 and an operational amplifier A61. Among them, the resistor network 602 is an attenuation network composed of a resistor R61 and a resistor R62, which is mainly used to attenuate the incoming measured signal. One end of the resistor R61 is connected to the input terminal 611, and the other end is connected to the positive input of the amplifier A61. One end of the resistor R62 is connected to the positive input end 614 of the amplifier A61, and the other end is connected to the common end 613. In this embodiment, the output terminal 616 of the operational amplifier A61 is connected to the output terminal 612 of the amplifying circuit 601, and the output terminal 616 of the operational amplifier A61 is connected to the inverting input terminal 615, so that the operational amplifier A61 is connected as a driving circuit or called a buffer The circuit is used to provide driving current for the lower circuit.

Referring to FIG. 27 , in this embodiment, there is also a multilayer printed circuit board 620 . The multilayer printed circuit board 620 is a three-layer printed circuit board, including an element layer 621 , a shielding layer 623 and an intermediate layer 622 between the element layer 621 and the shielding layer 623 .

In this embodiment, the element layer 621, the intermediate layer 622 and the shielding layer 623 are composed of conductors, an insulating layer 624 is disposed between the element layer 621 and the intermediate layer 622, and an insulating layer 625 is disposed between the intermediate layer 622 and the shielding layer 623. , the insulating layer 624 and the insulating layer 625 are both made of insulating materials.

In this embodiment, the element layer 621 of the multilayer printed circuit board 620 has a first pad 631 , a second pad 632 and a third pad 633 . The pads 631, 632, 633 are copper foil pads.

Please refer to FIG. 26 and FIG. 27 in conjunction. In this embodiment, the resistors R61 and R62 constituting the resistor network 602 are mounted on a multilayer printed circuit board 620 . The two pins of the resistor R61 are mounted on the first pad 631 and the second pad 632 , and the two pins of the resistor R62 are mounted on the second pad 632 and the third pad 633 . The third pad 633 is electrically connected to the shielding layer 623 through the conductive via 629 , and the conductive via 629 makes the third pad 633 and the shielding layer 623 equipotential.

In this embodiment, the middle layer 622 is an electrically suspended conductive layer, located below the first pad 631 and the second pad 632 . The so-called electrically suspended conductive layer means that the middle layer 622 is not directly connected to any voltage or telecommunication conductive layer.

In this embodiment, the first pad 631 corresponds to the input end 611 of the amplifying circuit 601, the second pad 632 corresponds to the input end 614 of the operational amplifier A61, the third pad 633 and the shielding layer 623 of the multilayer printed circuit board 620 Corresponding to the common terminal 613. The shielding layer 623 is used to prevent interference from external electromagnetic fields.

In this embodiment, the area of the middle layer 622 of the multilayer printed circuit board 620 is greater than the area of the first pad 631 and the second pad 632, and the vertical projections of the first pad 631 and the second pad 632 all fall into the middle layer 622. The area of the shielding layer 623 is greater than or equal to the area of the middle layer 622 , and the vertical projection of the middle layer 622 completely falls into the shielding layer 623 .

In this embodiment, a parasitic capacitance C61 is generated between the first pad 631 and the second pad 632, a parasitic capacitance C62 is generated between the second pad 632 and the third pad 633, and the first pad A parasitic capacitance C63 is generated between 631 and the middle layer 622 , a parasitic capacitance C64 is generated between the second pad 632 and the middle layer 622 , and a parasitic capacitance C65 is generated between the middle layer 622 and the shielding layer 623 .

Based on the same principle as the first embodiment of the present invention, in this embodiment, the influence of parasitic capacitances C61 and C62 on the circuit can be ignored, and by adjusting the vertical projected area of the first pad 631 on the intermediate layer 622, The vertical projected area of the intermediate layer 622 on the shielding layer 623, or by adjusting the dielectric thickness or the dielectric constant of the insulating layer 624 and the insulating layer 625, changing the capacitance values of the parasitic capacitances C63 and C65, can make $\frac{C63}{C65}=\frac{R62}{\mathrm{<figure-callout\; id="61"\; label="R"\; filenames="H2009101486247E00023.png"\; state="\{\{state\}\}">R</figure-callout>}61}.$ when $\frac{C63}{C65}=\frac{R62}{\mathrm{<figure-callout\; id="61"\; label="R"\; filenames="H2009101486247E00023.png"\; state="\{\{state\}\}">R</figure-callout>}61}$ When , the current flowing through the parasitic capacitor C64 will be zero, so that the capacitors C63 and C65 are equivalently connected in series between the input terminal 611 and the common terminal 613, thereby eliminating the parasitic capacitors C63, C64, C65 on the resistance network 602 and the entire Influence of the frequency characteristics of the amplifier circuit 601.

As yet another example of this embodiment, please refer to FIG. 27 and FIG. 28 together. The difference between this example and the second embodiment is the connection mode of the amplifying circuit 601 . In this illustration, in the amplifying circuit 601, one end of the resistor R61 in the resistor network 602 is connected to the output terminal 616 of the amplifier A61, the other end of the resistor R61 is connected to the inverting input terminal 615 of the amplifier A61, and one end of the resistor R62 is connected to The inverting input terminal 615 of the amplifier A61 is connected to the common terminal 613 at the other end. The positive input terminal 614 of the amplifier A61 is connected to the input terminal 611 of the amplification circuit 601 .

This example still uses a multilayer printed circuit board 620. On the multilayer printed circuit board 620, the first pad 631 corresponds to the output terminal 616 of the operational amplifier A61, the second pad 632 corresponds to the input terminal 615 of the operational amplifier A61, and the second pad 632 corresponds to the input terminal 615 of the operational amplifier A61. The three pads 633 and the shielding layer 623 correspond to the common terminal 613 .

In this example, by changing the capacitance values of parasitic capacitors C63 and C65, the $\frac{C63}{C65}=\frac{R62}{\mathrm{<figure-callout\; id="61"\; label="R"\; filenames="H2009101486247E00023.png"\; state="\{\{state\}\}">R</figure-callout>}61},$ The current flowing through the parasitic capacitor C64 can be made zero, so that the final parasitic capacitors C63 and C65 are established on the output terminal 612 of the amplifying circuit 601 . In this embodiment, by using $\frac{C63}{C65}=\frac{R62}{\mathrm{<figure-callout\; id="61"\; label="R"\; filenames="H2009101486247E00023.png"\; state="\{\{state\}\}">R</figure-callout>}61},$ The smoothness of the amplitude-frequency characteristics of the amplifying circuit 601 can be improved, but it does not help to improve its bandwidth, and is applicable to some specific application environments.

As another example, the second embodiment may also use a multi-layer printed circuit board 630, please refer to Figure 26, Figure 27 and Figure 29 in conjunction,

Different from the multilayer printed circuit board 620, the vertical projections of the first pad 631 and the second pad 632 of the multilayer printed circuit board 630 partly fall into the middle layer 622, and the vertical projection of the middle layer 622 all falls into the shielding layer 623 Inside. Specifically, part of the vertical projection of the first pad 631 falls into the middle layer 622 , and the other part falls into the shielding layer 623 , and the vertical projection of the second pad 632 completely falls into the shielding layer 623 .

In this example, because a part of the vertical projection of the first pad 631 falls in the shielding layer 623, a parasitic capacitance C66 is generated, but since the parasitic capacitance C66 is connected between the input terminal 611 and the common terminal 613, Therefore, the parasitic capacitance C66 will not affect the frequency characteristic of the resistor network 602 .

As another example, please refer to FIG. 26 , FIG. 27 and FIG. 30 in combination. The oscilloscope 600 in the second embodiment may also use a multilayer printed circuit board 640 .

Unlike the multilayer printed circuit board 620 , a part of the vertical projection of the second pad 632 of the multilayer printed circuit board 640 falls into the middle layer 622 , and another part falls into the shield layer 623 . The first pad 631 is electrically connected to the middle layer 622 through a conductive via 628 .

In this example, the parasitic capacitor C65 is equivalently connected between the input terminal 611 and the common terminal 613 , and will not affect the frequency characteristic of the resistor network 602 . In this example, by adjusting the parasitic capacitance C64 and C67, so that $\frac{C64}{C67}=\frac{R62}{\mathrm{<figure-callout\; id="61"\; label="R"\; filenames="H2009101486247E00023.png"\; state="\{\{state\}\}">R</figure-callout>}61},$ The parasitic capacitances C64 and C67 can also be equivalently connected between the input terminal 611 and the common terminal 613 without affecting the frequency characteristics of the resistor network 602 or the amplifier circuit 601 .

In this example, the vertical projection of the first pad 631 may also partially fall into, completely fall into, or not fall into the middle layer 622 .

As another example, please refer to FIG. 26 , FIG. 27 and FIG. 31 in combination. The oscilloscope 600 in the second embodiment may also use a multilayer printed circuit board 650 .

Different from the multilayer printed circuit board 620 , the second pad 632 of the multilayer printed circuit board 650 is electrically connected to the middle layer 622 through a conductive via 627 . In this example, by adjusting the parasitic capacitance C63 and C65, so that $\frac{C63}{C65}=\frac{R62}{\mathrm{<figure-callout\; id="61"\; label="R"\; filenames="H2009101486247E00023.png"\; state="\{\{state\}\}">R</figure-callout>}61},$ It is also possible to make the parasitic capacitors C63 and C65 equivalently connected between the input terminal 611 and the common terminal 613 without affecting the frequency characteristics of the resistor network 602 or the amplifier circuit 601 .

As a further illustration, in this example, the vertical projection of the first pad 631 may also partially fall into the middle layer 622 , and the vertical projection of the second pad 632 may also partially fall into the middle layer 622 .

As a further illustration, in the multilayer printed circuit board 620, 630, 640 or 650 described in this embodiment, the resistor R61 and the resistor R62 mounted on it are composed of pure resistive elements, but for different applications, the resistor R61 and the resistor R62 may also be composed of other components including impedance.

As a further illustration, the multilayer printed circuit board 620, 630, 640 or 650 described in this embodiment can not only be used to install the resistor network 602 in the amplifier circuit 601, but also can be used to install the entire amplifier circuit including the amplifier A61 601, or can also be used to install other circuits or components in the oscilloscope 600.

The method disclosed in this embodiment can not only be used to eliminate, weaken or improve the parasitic capacitance caused by the pads on the printed circuit board, thereby improving the bandwidth or other frequency characteristics of the resistor network 602 or the entire amplifying circuit 601, but also It can be used to eliminate, weaken or improve the parasitic capacitance introduced by other reasons, such as components or wiring. Those skilled in the art can also easily implement the present invention according to the method disclosed in the present invention, which will not be repeated here.

In the above embodiments and further illustrations, it is disclosed how to improve or eliminate the parasitic capacitance by using the intermediate conductive layer disposed between the element layer and the shielding layer. Utilizing the method disclosed in the present invention not only can achieve the purpose of improving or eliminating the parasitic capacitance without adding additional devices, but also has the characteristics of good temperature compensation characteristics, stable operation and high reliability.

The above is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Anyone skilled in the art can easily think of changes or substitutions within the technical scope disclosed in the present invention. Should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims (13)

1. A multilayer printed circuit board comprises

An element layer and a shield layer for connecting the common terminals,

the element layer has a first pad, a second pad and a third pad,

the first bonding pad and the second bonding pad are used for connecting a first resistor,

the second bonding pad and the third bonding pad are used for connecting a second resistor,

said third pad being further adapted to connect to an equipotential device for equalizing said third pad to said shielding layer,

the method is characterized in that:

an intermediate conductive layer is further provided between the element layer and the shielding layer, and the first pad and the intermediate conductive layer are connected by a conductor,

in the vertical projection of the middle conducting layer, at least one part of the vertical projection falls into the shielding layer, in the vertical projection of the second bonding pad, one part of the vertical projection falls into the middle conducting layer, and one part of the vertical projection falls into the shielding layer.

2. The multilayer printed circuit board of claim 1, wherein:

the equipotential component is formed by a conductor connecting the third pad and the shielding layer.

3. The multilayer printed circuit board of claim 1, wherein:

the equipotential component is formed by an operational amplifier with a positive input end and a negative input end, the third bonding pad is used for connecting one input end of the operational amplifier, and the other input end of the operational amplifier is used for connecting the common end.

4. A multilayer printed circuit board according to claim 1, 2 or 3, wherein:

a first parasitic capacitor is formed between the second bonding pad and the middle conducting layer, a second parasitic capacitor is formed between the second bonding pad and the shielding layer, and the ratio of the first parasitic capacitor to the second parasitic capacitor is equal to the ratio of the second resistor to the first resistor.

5. An impedance component comprising

A multilayer printed circuit board, a resistor network,

The multilayer printed circuit board comprises

An element layer and a shield layer for connecting the common terminals,

the element layer has a first pad, a second pad and a third pad,

the resistor network includes a first resistor and a second resistor,

the first resistor is connected to the first pad and the second pad,

the second resistor is connected to the second bonding pad and the third bonding pad,

said third pad being further adapted to connect to an equipotential device for equalizing said third pad to said shielding layer,

the method is characterized in that:

an intermediate conductive layer is further provided between the element layer and the shielding layer, and the first pad and the intermediate conductive layer are connected by a conductor,

in the vertical projection of the middle conducting layer, at least one part of the vertical projection falls into the shielding layer, in the vertical projection of the second bonding pad, one part of the vertical projection falls into the middle conducting layer, and one part of the vertical projection falls into the shielding layer.

6. The impedance component of claim 5, wherein:

the equipotential component is formed by a conductor connecting the third pad and the shielding layer.

7. The impedance component of claim 5, wherein:

the equipotential component is formed by an operational amplifier with a positive input end and a negative input end, the third bonding pad is used for connecting one input end of the operational amplifier, and the other input end of the operational amplifier is used for connecting the common end.

8. Impedance component according to claim 5, 6 or 7, characterized in that:

a first parasitic capacitor is formed between the second bonding pad and the middle conducting layer, a second parasitic capacitor is formed between the second bonding pad and the shielding layer, and the ratio of the first parasitic capacitor to the second parasitic capacitor is equal to the ratio of the second resistor to the first resistor.

9. An amplifying circuit comprises

A multilayer printed circuit board, an operational amplifier having a forward input terminal and an inverting input terminal, and a resistor network connected to said operational amplifier,

The multilayer printed circuit board comprises

An element layer and a shield layer for connecting the common terminals,

the element layer has a first pad, a second pad and a third pad,

the resistor network includes a first resistor and a second resistor,

the first resistor is connected to the first pad and the second pad,

the second resistor is connected to the second bonding pad and the third bonding pad,

said third pad being further adapted to connect to an equipotential device for equalizing said third pad to said shielding layer,

the method is characterized in that:

an intermediate conductive layer is also provided between the component layer and the shield layer,

and the first pad is connected with the middle conductive layer through a conductor,

in the vertical projection of the middle conducting layer, at least one part of the vertical projection falls into the shielding layer, in the vertical projection of the second bonding pad, one part of the vertical projection falls into the middle conducting layer, and one part of the vertical projection falls into the shielding layer.

10. A measuring device comprises

A multilayer printed circuit board, a resistor network, a common terminal,

the multilayer printed circuit board includes a component layer and a shield layer for connecting the common terminal,

the element layer has a first pad, a second pad and a third pad,

the resistor network includes a first resistor and a second resistor,

the first resistor is connected to the first pad and the second pad,

the second resistor is connected to the second bonding pad and the third bonding pad,

said third pad being further adapted to connect to an equipotential device for equalizing said third pad to said shielding layer,

the method is characterized in that:

an intermediate conductive layer is further provided between the element layer and the shielding layer, and the first pad and the intermediate conductive layer are connected by a conductor,

in the vertical projection of the middle conducting layer, at least one part of the vertical projection falls into the shielding layer, in the vertical projection of the second bonding pad, one part of the vertical projection falls into the middle conducting layer, and one part of the vertical projection falls into the shielding layer.

11. The measurement device of claim 10, wherein:

the equipotential component is formed by a conductor connecting the third pad and the shielding layer.

12. The measurement device of claim 10, wherein:

the equipotential component is formed by an operational amplifier having a forward input and a reverse input,

the third pad is used for connecting one input end of the operational amplifier, and the other input end of the operational amplifier is used for connecting the common end.

13. The measurement device according to claim 10, 11 or 12, characterized in that:

a first parasitic capacitor is formed between the second bonding pad and the middle conducting layer, a second parasitic capacitor is formed between the second bonding pad and the shielding layer, and the ratio of the first parasitic capacitor to the second parasitic capacitor is equal to the ratio of the second resistor to the first resistor.

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