CN101931397A - Method and circuit for correcting frequency of USB device - Google Patents
Method and circuit for correcting frequency of USB device Download PDFInfo
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Abstract
A method of calibrating a frequency of a USB device, the USB device including an internally calibratable oscillator to generate a frequency, the method comprising: detecting the end of a packet in an input data serial to initialize a counter; detecting a synchronous column data field in the data series to trigger the counter to start counting the number of the frequencies and generate a count value; and comparing the counting value with a reference value to adjust the frequency of the internal adjustable oscillator so that the counting value is equal to the reference value. The method and the circuit for correcting the frequency of the USB device have the advantages of quickly and accurately correcting the frequency of the USB device, simplifying the correction circuit and reducing the cost.
Description
Technical field
The present invention relates to a kind of method and circuit of emending frequency, specifically, is a kind of method and circuit of correcting frequency of USB device.
Background technology
In universal sequence converges current drainage 2.0 and 1.1 driver agreements (USB 2.0 and 1.1driver protocol), universal sequence converge current drainage (USB) host side (host) to the interface communications protocol of USB device (device) for low speed (low speed), frequency of utilization under (full speed) and high speed (high speed) state has strict standard at full speed, with the different application of correspondence, for example under lower-speed state, the data transfer rate specification of the data serial of usb host (data stream) (data rate specification) is 1.5MHz ± 1.5%, be applied in keyboard, mouse etc., under full-speed state, the data transfer rate specification of the data serial of usb host is 12MHz ± 0.25%, be applied in sound and microphone etc., under fast state, the data transfer rate specification of the data serial of usb host is 480MHz ± 0.05%, is applied in video and imaging (imaging) etc.Therefore, the frequency source of known USB device adopts crystal oscillator, resonance oscillator mostly or the mode with digital phase locked loop (DPLL) frequency locking of adding produces a frequency signal accurately, yet this mode but can't be incorporated into frequency source in the integrated circuit (IC) of USB device.
In order to reduce cost and to consider the consistency of assembly, internal resistance and the electric capacity of integrating USB device IC produce the frequency source of a resistance capacitance (RC) oscillator as the USB device, make the frequency source of USB device be comprised in the IC inside of USB device.Yet because the variation of processing procedure, the frequency of described RC oscillator has approximately ± 25% error, can't reach the standard of usb driver agreement.
As shown in Figure 1, USB interface communication protocol has strict standard for the form of the output package of usb host end data serial (datastream), in a data trade (transaction), the output package comprises that sign package (token packet) 12, data packet (data packet) 14 and friendship hold package (handshake packet) 16, and it all has the bit period (bits period) of regular length (for example eight) and fixing synchronous row data field (the synchronization sequence of place value content; And regular length but the unfixed package identification of place value content metadata fields (packet identifier SYNC); PID), indicate that wherein it is 32 bit period that package 12 has regular length, data packet 14 has the bit period of length less than nine sixteen bits, hands over to hold package 16 and have the bit period that regular length is a sixteen bit.Therefore, can utilize the characteristic of output package in the serial of usb host end data, the signal length of acquisition usb host end data serial is as the calibration radix of RC oscillator frequency in the USB device, proofread and correct the frequency of RC oscillator in the USB device, make the accuracy of its frequency reach the standard of usb driver agreement, make the data serial signal Synchronization (synchronizing) of USB device and usb host end simultaneously.
United States Patent (USP) is announced and is proposed a kind of utilization for No. 6343364 and set up the bit period that the time of preceding four falling edges of positive differential wave (D+) (falling edge) of (SETUT) sign package equals eight, the frequency of proofreading and correct RC oscillator in the USB device.U.S. Patent Publication proposes a kind of time relationship of utilizing between the positive differential wave falling edge No. 2007/0159221, whether the package that identification enters is the sign package, if the package that enters is the sign package, then utilize the bit period that the time between positive differential wave first and the 4th falling edge equals eight, the frequency of proofreading and correct RC oscillator in the USB device.United States Patent (USP) is announced the bit period that proposes four (for example second to the 5th) in a kind of utilization sign package for No. 6407641 the interior RC oscillator of USB device is carried out coarse adjustment, via the bit period of 20 (for example the 6th to the 25) in the described sign package the interior RC oscillator of USB device is carried out fine tuning again.Yet, the sign package is proofreaied and correct the interior RC oscillator of USB device in the serial of this kind acquisition usb host end data, can't in single data trade (transaction), repeatedly proofread and correct, in addition, only utilize the sign package to proofread and correct the interior RC oscillator of USB device, on proofreading and correct, lack flexibility.
Therefore the method for known correcting frequency of USB device exists above-mentioned all inconvenience and problem.
Summary of the invention
Purpose of the present invention is to propose a kind of synchronous row the data field repeatedly method and circuit of correcting frequency of USB device of utilizing.
Another object of the present invention is to propose a kind of method and circuit that utilizes sign package correcting frequency of USB device.
Another purpose of the present invention is to propose a kind of the utilization and hands over method and the circuit of holding the package correcting frequency of USB device.
For achieving the above object, technical solution of the present invention is:
A kind of method of correcting frequency of USB device, described USB device comprise an inner adjustable oscillator to produce a frequency, and described method is characterized in that comprising the following steps:
First step: the package that detects in the input data serial ends up with initialization one counter;
Second step: detect that a synchronous columns begins to count the quantity of described frequency and produces a count value to trigger described counter according to the territory in the described data serial;
Third step: a more described count value and a reference value make described count value equate with described reference value to adjust the frequency of described inner adjustable oscillator.
The method of correcting frequency of USB device of the present invention can also be further achieved by the following technical measures.
Aforesaid method, the step of synchronous row data field described in the described data serial of wherein said detection comprises that first rising edge that detects the moving signal of a minus tolerance makes described counter begin counting, and detects described minus tolerance and move the 4th rising edge of signal with the described count value of breech lock.
Aforesaid method, described in the described data serial of wherein said detection synchronously the step of row data field comprise that first falling edge that detects a positive differential wave makes described counter begin to count, and the 4th falling edge that detects described positive differential wave is with the described count value of breech lock.
Aforesaid method, the step of the frequency of the described inner adjustable oscillator of wherein said adjustment comprises when described count value during greater than described reference value, reduce the frequency of described inner adjustable oscillator, when described count value during, increase the frequency of described inner adjustable oscillator less than described reference value.
Aforesaid method wherein more comprises the frequency of the described inner adjustable oscillator of frequency multiplication.
A kind of circuit of correcting frequency of USB device, described USB device comprise an inner adjustable oscillator to produce a frequency, it is characterized in that described circuit comprises:
One counter is in order to count the quantity of described frequency;
One first detecting unit, the package that detects in the data serial of importing ends up with the described counter of initialization;
One second detecting unit, detect in the described data serial a synchronous columns according to the territory to produce a triggering signal, make described counter begin counting and produce a count value;
One calibration code unit, a more described count value and a reference value produce the frequency that a calibrating signal is adjusted described inner adjustable oscillator, and described count value is equated with described reference value.
The circuit of correcting frequency of USB device of the present invention can also be further achieved by the following technical measures.
Aforesaid circuit is comprising the frequency of a phase-locked loop with the described inner adjustable oscillator of frequency multiplication.
Aforesaid circuit, wherein said second detecting unit detect first rising edge of the moving signal of a minus tolerance with the described triggering signal of initialization, and detect described minus tolerance and move the 4th rising edge of signal to finish described triggering signal.
Aforesaid circuit, wherein said second detecting unit detect first falling edge of a positive differential wave with the described triggering signal of initialization, and the 4th falling edge that detects described positive differential wave is to finish described triggering signal.
A kind of method of correcting frequency of USB device, described USB device comprise an inner adjustable oscillator to produce a frequency, it is characterized in that described method comprises the following steps:
(a) package that detects in the data serial of importing ends up with initialization one counter;
(b) detect in the described data serial a synchronous columns according to the territory to trigger the quantity that described counter begins to count described frequency;
(c) identification comprises whether the current package of described synchronous row data field is the sign package, if described current package then carries out step (d) for the sign package, otherwise, then stop the counting of described counter and get back to step (a)
(d) the package ending of the described current package of detection produces a count value with the described counter of breech lock;
(e) a more described count value and a reference value make described count value equate with described reference value to adjust the frequency of described inner adjustable oscillator.
Aforesaid method, wherein said step (b) comprise first rising edge that detects the moving signal of a minus tolerance.
Aforesaid method, wherein said step (c) comprises the following steps:
Detect the 4th rising edge of the moving signal of described minus tolerance;
Second to the 4th behind the 4th rising edge of the moving signal of the described minus tolerance of breech lock produces a package identification unit;
If comprising two logic states in the described package identification unit is high position, then be judged to be the sign package.
Aforesaid method, wherein said step (c) comprises the following steps:
Detect the 4th rising edge of the moving signal of described minus tolerance;
First to fourth behind the 4th rising edge of the moving signal of the described minus tolerance of breech lock produces a package identification unit;
If comprising three logic states in the described package identification unit is high position, then be judged to be the sign package.
Aforesaid method, wherein said step (b) comprise first falling edge that detects a positive differential wave.
Aforesaid method, wherein said step (c) comprises the following steps:
Detect the 4th falling edge of described positive differential wave;
Second to the 4th behind the 4th falling edge of the described positive differential wave of breech lock produces a package identification unit;
If comprising two logic states in the described package identification unit is low position, then be judged to be the sign package.
Aforesaid method, wherein said step (c) comprises the following steps:
Detect the 4th falling edge of described positive differential wave;
First to fourth behind the 4th falling edge of the described positive differential wave of breech lock produces a package identification unit;
If comprising three logic states in the described package identification unit is low position, then be judged to be the sign package.
Aforesaid method, the step of the frequency of the described inner adjustable oscillator of wherein said adjustment comprises when described count value during greater than described reference value, reduce the frequency of described inner adjustable oscillator,, increase the frequency of described inner adjustable oscillator when described count value during less than described reference value
A kind of circuit of correcting frequency of USB device, described USB device comprise an inner adjustable oscillator to produce a frequency, it is characterized in that described circuit comprises:
One counter is in order to count the quantity of described frequency;
One first detecting unit, the package that detects in the data serial of importing ends up with the described counter of initialization;
One second detecting unit detects in the described data serial sign package to produce a triggering signal, makes described counter begin counting and produces a count value;
One calibration code unit, a more described count value and a reference value produce the frequency that a calibrating signal is adjusted described inner adjustable oscillator, and described count value is equated with described reference value.
Aforesaid circuit, wherein said second detecting unit detects first rising edge of the moving signal of a minus tolerance with the described triggering signal of initialization, the 4th rising edge that detects the moving signal of described minus tolerance makes described inner adjustable oscillator produce a package identification unit for the described sign package of identification, and the package ending that detects described sign package is to finish described triggering signal.
Aforesaid circuit, wherein said package identification unit comprises first to fourth position behind described the 4th rising edge.
Aforesaid circuit, wherein said package identification unit comprises second to the 4th position behind described the 4th rising edge.
Aforesaid circuit, wherein said second detecting unit detects first falling edge of a positive differential wave with the described triggering signal of initialization, the 4th falling edge that detects described positive differential wave makes described inner adjustable oscillator produce a package identification unit for the described sign package of identification, and the package ending that detects described sign package is to finish described triggering signal.
Aforesaid circuit, wherein said package identification unit comprises first to fourth position behind described the 4th falling edge.
Aforesaid circuit, wherein said package identification unit comprises second to the 4th position behind described the 4th falling edge.
A kind of method of correcting frequency of USB device, described USB device comprise an inner adjustable oscillator to produce a frequency, and described method is characterized in that comprising the following steps:
(a) package that detects in the data serial of importing ends up with initialization one counter;
(b) detect in the described data serial a synchronous columns according to the territory to trigger the quantity that described counter begins to count described frequency;
(c) identification comprises whether the current package of described synchronous row data field is to hand over to hold package, if described current package is held package for handing over, then carries out step (d), otherwise, then stop the counting of described counter and get back to step (a);
(d) the package ending of the described current package of detection produces a count value with the described counter of breech lock;
(e) a more described count value and a reference value make described count value equate with described reference value to adjust the frequency of described inner adjustable oscillator.
Aforesaid method, wherein said step (b) comprise first rising edge that detects the moving signal of a minus tolerance.
Aforesaid method, wherein said step (c) comprises the following steps:
Count the rising edge quantity of the moving signal of described minus tolerance;
Detect the package ending of described current package;
Wherein, when described package ending occurred, if described rising edge quantity is six, then described current package was held package for handing over.
Aforesaid method, wherein said step (b) comprise first falling edge that detects a positive differential wave.
Aforesaid method, wherein said step (c) comprises the following steps:
Count the falling edge quantity of described positive differential wave;
Detect the package ending of described current package;
Wherein, when described package ending occurred, if described falling edge quantity is six, then described current package was held package for handing over.
Aforesaid method, the step of the frequency of the described inner adjustable oscillator of wherein said adjustment comprises when described count value during greater than described reference value, reduce the frequency of described inner adjustable oscillator, when described count value during, increase the frequency of described inner adjustable oscillator less than described reference value.
A kind of circuit of correcting frequency of USB device, described USB device comprise an inner adjustable oscillator to produce a frequency, it is characterized in that described circuit comprises:
One counter is in order to count the quantity of described frequency;
One first detecting unit, the package that detects in the data serial of importing ends up with the described counter of initialization;
One second detecting unit detects in the described data serial one and hands over and hold package to produce a triggering signal, makes described counter begin counting and produces a count value;
One calibration code unit, a more described count value and a reference value produce the frequency that a calibrating signal is adjusted described inner adjustable oscillator, and described count value is equated with described reference value.
Aforesaid circuit, wherein said second detecting unit detect first rising edge of the moving signal of a minus tolerance with the described triggering signal of initialization, and detect described friendship and hold the package ending of package to finish described triggering signal.
Aforesaid circuit wherein more comprises one second counter bit in described second detecting unit, to count the rising edge quantity of the moving signal of described minus tolerance.
First falling edge that aforesaid circuit, wherein said second detecting unit detect a positive differential wave to be producing described triggering signal, and detects described friendship and hold the package of package and end up to finish described triggering signal.
Aforesaid circuit wherein more comprises one second counter bit in described second detecting unit, to count the falling edge quantity of described positive differential wave.
After adopting technique scheme, the method and the circuit of correcting frequency of USB device of the present invention have the following advantages:
1. proofread and correct the frequency of USB device quickly and accurately.
2. the simplification correcting circuit reduces cost, and increases the accuracy of USB device frequency.
Description of drawings
Fig. 1 is the schematic diagram of package format specification;
Fig. 2 is the first embodiment schematic diagram of the method for correcting frequency of USB device of the present invention;
Fig. 3 is the first embodiment schematic diagram of the circuit of correcting frequency of USB device of the present invention;
Fig. 4 is the oscillogram of correcting frequency of USB device;
Fig. 5 is the second embodiment schematic diagram of the method for correcting frequency of USB device of the present invention;
Fig. 6 is the second embodiment schematic diagram of the circuit of correcting frequency of USB device of the present invention;
Fig. 7 is the 3rd an embodiment schematic diagram of the method for correcting frequency of USB device of the present invention;
Fig. 8 is the 3rd an embodiment schematic diagram of the circuit of correcting frequency of USB device of the present invention;
Fig. 9 is the oscillogram of correcting frequency of USB device;
Figure 10 is the 4th an embodiment schematic diagram of the method for correcting frequency of USB device of the present invention;
Figure 11 is the 4th an embodiment schematic diagram of the circuit of correcting frequency of USB device of the present invention;
Figure 12 is the oscillogram of correcting frequency of USB device.
Embodiment
Below in conjunction with embodiment and accompanying drawing thereof the present invention is illustrated further.
Now see also Fig. 1～Fig. 3, Fig. 1 is the schematic diagram of package format specification, and Fig. 2 is the method flow Figure 20 according to correcting frequency of USB device of the present invention, and Fig. 3 is the circuit 30 of correcting frequency of USB device.As shown in the figure, in described step 22, package ending (end of packet; EOP) between the beginning of the end of a package and next package, detecting unit 32 detects EOP in the serials of usb host end data and produces a reset signal R and give counter 36 with count initialized device 36, and counter 36 is made zero.In step 24, sign package 12, data packet 14 and handing over held package 16 and had the regular length and the fixing synchronous row data field (SYNC) of place value content, and the synchronous row data field that detecting unit 34 detects in the serials of usb host end data produces a triggering signal T to counter 36.In step 26, counter 36 begins to count the quantity of the frequency that inner adjustable oscillator 40 produces in response to triggering signal T, to produce a count value
The formula 1 of P=n * (F/M)
Wherein, n is the bit period of counter 36 countings, and F is the frequency of inner adjustable oscillator 40, and M is the data transfer rate of usb host end data serial.In step 28, calibration code unit 38 compares count value P and a reference value K produces calibrating signal Tr to inner adjustable oscillator 40, as count value P during greater than reference value K, reduce frequency F,, increase frequency F as count value P during less than reference value K, count value P is equated with reference value K, wherein, reference value K is design frequency F ' the calculating generation with inner adjustable oscillator 40, and design frequency F ' substitution formula 1 can be got reference value
K=n * (F '/M) formula 2
Fig. 4 is waveform Figure 39 of correcting frequency of USB device, with reference to figure 3 and Fig. 4, in one embodiment, inner adjustable oscillator 40 comprise a design frequency be F ' but adjustment RC oscillator, the bit period that captures synchronous row data field first six digits is as the calibration radix, for example minus tolerance is moved the first six digits of signal D-" 101010 ", or the first six digits of positive differential wave D+ " 010101 ", make the bit period n of counting equal 6.Utilize minus tolerance to move signal D-first six digits " 101010 " bit period be equivalent to time between 42 and the 4th rising edges 44 of first rising edge (rising edge) of the moving signal D-of minus tolerance, by detecting the rising edge of the moving signal D-of minus tolerance, detecting unit 34 produces triggering signal T, for example when detecting unit 34 detects first rising edge 42 of the moving signal D-of minus tolerance, initialization triggering signal T, counter 36 begins the quantity of count frequency 43 in response to the beginning of triggering signal T, when detecting unit 34 detects the 4th rising edge 44 of the moving signal D-of minus tolerance, end trigger signal T, counter 36 is breech lock count value P in response to the end of triggering signal T, and calibration code unit 38 comparison count value P and reference value K are with the F that adjusts frequency.Equally, utilize positive differential wave D+ first six digits " 010101 " bit period be equivalent to time between 46 and the 4th falling edges 48 of first falling edge (falling edge) of positive differential wave D+, by first falling edge 46 that detects positive differential wave D+ with initialization triggering signal T, and the 4th falling edge 48 that detects positive differential wave D+ produces count value P and reference value K relatively with the F that adjusts frequency with end trigger signal T.When design frequency F ' is 1.5MHz for 24MHz and bit data rate M, can get reference value K=96 according to formula 2, but has error between the frequency F of in fact inner adjustable oscillator 40 and the design frequency F ', can get the count value P=6 that counter 36 produces * (F/1.5MHz) according to formula 1, compare count value P and reference value K, as count value P during greater than reference value K, F is greater than design frequency F ' for the expression frequency, calibration code unit 38 produces calibrating signal Tr to reduce frequency F, as count value P during less than reference value K, F is less than design frequency F ' for the expression frequency, calibration code unit 38 produces calibrating signal Tr to increase frequency F, when count value P equaled reference value K, expression frequency F equaled design frequency F ', and calibration code unit 38 produces calibrating signal Tr to keep frequency F.In addition, the adjustment amount (trimming step) on inner adjustable oscillator 40 every rank is correction resolution
C=1/K formula 3
K=96 substitution formula 3 can be got correction resolution C approximate ± 1.04%, meet in the driver agreement of universal sequence remittance current drainage 2.0 and 1.1, to frequency of utilization error under the lower-speed state ± 1.5% standard.This embodiment utilizes in the transmission of USB interface communication protocol data, different packages has the characteristic of a fixing synchronous row data field, frequency by synchronous row data field signal correction USB device in the serial of acquisition usb host end data, produce one with respect to accurately in the frequency of usb host end data serial, in single data trade, repeatedly to proofread and correct the frequency of USB device, with respect to the known frequency of only utilizing the sign package to proofread and correct the USB device, this embodiment is not subjected to the restriction of package characteristic, the frequency that can utilize the synchronous row data field in the different packages to proofread and correct the USB device, needn't differentiate the form of package, reach quick, accurately proofread and correct the frequency of USB device, and the purpose of simplifying correcting circuit.
From formula 3 as can be known, can obtain less correction resolution C, reach the purpose that increases USB device frequency accuracy by increasing reference value K.According to formula 2, reference value K can or increase the bit period n of counting and increases via the design frequency F ' that increases inner adjustable oscillator 40.
As Fig. 5 and shown in Figure 6, in one embodiment, method flow Figure 50 of correcting frequency of USB device comprises a frequency multiplication step 52, after phase-locked loop (PLL) 56 frequencys multiplication in the circuit 54 of the calibrated USB device of the frequency F frequency of inner adjustable oscillator 40, the generation frequency is that the frequency of NF is counted for counter 36, to obtain less correction resolution C, wherein N is a constant.For example when N=2, the frequency of confession counter 36 countings is 56 frequencys multiplication through the phase-locked loop, therefore described frequency increases to 2F from F, under data transfer rate M to be 1.5MHz, design frequency F ' for 24MHz and bit period n be 6 situation, according to formula 2 and formula 3, can get reference value K=192 and correction resolution C to approximate ± 0.52%, thereby the accuracy of increase USB device frequency.Frequency by the inner adjustable oscillator 40 of phase-locked loop 56 frequencys multiplication, provide the higher frequency of frequency for counter 36 countings, but not directly increase the frequency of inner adjustable oscillator 40, can avoid causing such as problems such as circuit complicated, cost increases because of the frequency that directly increases inner adjustable oscillator 40.
As shown in Figure 7, in another embodiment, method flow Figure 58 of correcting frequency of USB device comprises the step 60 of an identification mark package, fix 32 bit period by acquisition sign package, calibration radix as correcting frequency of USB device, to increase the bit period n of counting, obtain less correction resolution C.
Fig. 8 is the circuit 65 of the correcting frequency of USB device of corresponding diagram 7, and with reference to figure 7 and Fig. 8, in step 22, the EOP in the detecting unit 32 detection usb host end data serials produces a reset signal R and gives counter 36 with count initialized device 36, and counter 36 is made zero.In step 24, the synchronous row data field that detecting unit 67 detects in the serial of usb host end data produces a triggering signal T to counter 36.In step 64, counter 36 begins to count the quantity of the frequency that inner adjustable oscillator 40 produces in response to triggering signal T, and at this moment, the frequency of inner adjustable oscillator 40 is F.In step 60, whether the current package that identification has described synchronous row data field is the sign package, if described current package is not the sign package, then carry out step 62, counter 36 stops counting, gets back to step 22, if described current package is the sign package, then carry out step 66, the EOP that detecting unit 34 detects described sign package is with end trigger signal T, and its count value of counter 36 breech locks produces count value P.In step 28, calibration code unit 38 compares count value P and reference value K produces calibrating signal Tr to inner adjustable oscillator 40, and count value P is equated with reference value K.In the present embodiment, step 60 and step 64 are to carry out synchronously.
Fig. 9 is waveform Figure 68 of school USB device frequency, with reference to figure 7～Fig. 9, in one embodiment, the serial of usb host end data comprises positive differential wave D+ and the moving signal D-of minus tolerance, inner adjustable oscillator 40 comprise a design frequency be F ' but adjustment RC oscillator, whether step 60 produces a package identification unit (PID) 78 by inner adjustable oscillator 40 and gives detecting unit 67 from the serial of usb host end data, serve as the sign package with the current package of identification.When detecting unit 32 detects EOP, produce a reset signal R, counter 88 is initialised in response to reset signal R.When detecting unit 67 detects first falling edge 72 of first rising edge 70 of the moving signal D-of minus tolerance or positive differential wave D+, initialization triggering signal T, counter 36 begins the quantity of count frequency 76 in response to the beginning of triggering signal T, at this moment, the frequency of inner adjustable oscillator 40 is F, when detecting unit 67 detects the 4th falling edge 77 of the 4th rising edge 75 of the moving signal D-of minus tolerance or positive differential wave D+, first to fourth position behind inner adjustable the 4th rising edge 75 of oscillator 40 breech locks or the 4th falling edge 77 " 1110 " or " 0001 ", shown in waveform 74, produce package identification unit 78, whether detecting unit 67 is discerned the current package of first 78 identifications according to package is the sign package, be high (being that logic state is 1) or three positions that logic state is low (being that logic state is 0) if comprise three logic states in the package identification unit 78, then be judged to be the sign package, counter 36 continues counting, detect EOP once more up to detecting unit 67, end trigger signal T, its count value of breech lock produces count value P to counter 36 in response to the end of triggering signal T, otherwise, then be judged to be non-sign package, counter 36 stops counting, gets back to step 22.Calibration code unit 38 comparison count value P and reference value K are with the F that adjusts frequency.In the present embodiment, the moving signal D-of minus tolerance is equivalent to the bit period that whole sign package is fixed 32 from first rising edge 70 to the time that detects EOP once more, similarly, positive differential wave D+ is equivalent to the bit period that whole sign package is fixed 32 from first falling edge 72 to the time that detects EOP once more, so bit period n=32 of counting, when data transfer rate M is 1.5MHz, and design frequency F ' is when being 6MHz, can get reference value K=128 according to formula 2, compare count value P and reference value K, if count value P is greater than reference value K, F is greater than design frequency F ' for the expression frequency, calibration code unit 38 produces calibrating signal Tr to reduce frequency F, if count value P, represents that frequency F is less than design frequency F ' less than reference value K, calibration code unit 38 produces calibrating signal Tr to increase frequency F, when if count value P equals reference value K, expression frequency F equals design frequency F ', and calibration code unit 38 produces calibrating signal Tr to keep frequency F.Because the frequency of inner adjustable oscillator 40 has approximately ± 25% error, behind the 4th falling edge 77 of the 4th rising edge 75 that detects the moving signal D-of minus tolerance or positive differential wave D+ (be synchronous row data field the 6th), just by first to fourth position behind the 4th rising edge 75 of inner adjustable oscillator 40 breech locks or the 4th falling edge 77 as package identification unit 78, can avoid because of the frequency error of inner adjustable oscillator 40 can't the identification mark package, present embodiment utilize first to fourth position behind the 4th falling edge 77 of the 4th rising edge 75 of the moving signal D-of minus tolerance or positive differential wave D+ as package identification unit with correct identification mark package, and acquisition sign package is fixed 32 bit period as the calibration radix of correcting frequency of USB device, identification mark package and count frequency are carried out synchronously, need not be divided into two steps of coarse adjustment and fine tuning, announce No. 6407641 elder generation in row data field coarse adjustment synchronously compared to United States Patent (USP), acquisition indicates 20 calibration radixes as correcting frequency of USB device in the package again, present embodiment can be proofreaied and correct the result more accurately, and reaches the purpose of simplifying circuit and reducing cost.In addition, according to formula 3, when reference value K=128, correction resolution C approximates ± and 0.78%, meeting universal sequence and converge in the driver agreement of current drainage 2.0 and 1.1, is ± 1.5% standard to frequency of utilization error under the lower-speed state, at this moment, the design frequency F ' of inner adjustable oscillator 40 is 6MHz, in other words, by the bit period n that increases counting, inner adjustable oscillator 40 can use the oscillator of lower frequency, the RC oscillator of lower frequency for example is further to reduce cost.
In an embodiment who changes, when detecting unit 67 detects the 4th falling edge 77 of the 4th rising edge 75 of the moving signal D-of minus tolerance or positive differential wave D+, second to the 4th position behind inner adjustable the 4th rising edge 75 of oscillator 40 breech locks or the 4th falling edge 77 " 110 " or " 001 ", produce package identification unit 80, be high (being that logic state is 1) or two positions that logic state is low (being that logic state is 0) if comprise two logic states in the package identification unit 80, then be judged to be the sign package, otherwise, then be judged to be non-sign package.
As shown in figure 10, in another embodiment, method flow Figure 82 of correcting frequency of USB device comprises the step 84 that package is held in identification friendship, hold the fixedly bit period of sixteen bit of package by the acquisition friendship, calibration radix as correcting frequency of USB device, increase the bit period n of counting, obtain less correction resolution C.
Figure 11 is the circuit 86 of the correcting frequency of USB device of corresponding Figure 10, and with reference to Figure 10 and Figure 11, in step 22, the EOP in the detecting unit 32 detection usb host end data serials produces a reset signal R and gives counter 36 with count initialized device 36.In step 24, the synchronous row data field that detecting unit 87 detects in the serial of usb host end data produces a triggering signal T to counter 36.In step 64, counter 36 begins to count the quantity of the frequency that inner adjustable oscillator 40 produces in response to triggering signal T, and at this moment, the frequency of inner adjustable oscillator 40 is F.In step 84, whether the current package that identification has described synchronous row data field is to hand over to hold package, if described current package is not to hand over to hold package, then carry out step 62, counter 36 stops counting, gets back to step 22, if described current package is held package for handing over, then carry out step 66, the EOP that package is held in the described friendship of detecting unit 87 detections is with end trigger signal T, and its count value of breech lock produces count value P to counter 36 in response to the end of triggering signal T.In step 28, calibration code unit 38 compares count value P and reference value K produces calibrating signal Tr to inner adjustable oscillator 40, and count value P is equated with reference value K.In the present embodiment, step 84 and step 64 are to carry out synchronously.
Figure 12 is waveform Figure 90 of correcting frequency of USB device, with reference to Figure 10～Figure 12, in one embodiment, friendship in the serial of usb host end data is held package and is comprised affirmation (ACK) package 91, negate (NAK) package 93 and delay (STALL) package 94, inner adjustable oscillator 40 comprise a design frequency be F ' but adjustment resistance capacitance RC oscillator, step 84 is confirmed package 91 by counter 88 countings that are arranged in detecting unit 87, negate that the package 93 or the rising edge 96 of delay package 94 or the quantity of falling edge 97 produce rising edge quantity or falling edge quantity, detecting unit 87 is according to described rising edge quantity or falling edge quantity, and whether the current package of identification is to hand over to hold package.When detecting unit 32 detects EOP, produce a reset signal R, counter 88 is initialised in response to reset signal R.When detecting unit 87 detects first falling edge of first rising edge of the moving signal D-of minus tolerance or positive differential wave D+, initialization triggering signal T, counter 36 begins the quantity of count frequency 76 in response to the beginning of triggering signal T, counter 88 is in response to triggering the quantity that letter begins to count the falling edge 97 of the quantity of rising edge 96 of the moving signal D-of minus tolerance or positive differential wave D+ for T number, at this moment, the frequency of inner adjustable oscillator 40 is F, when detecting unit 87 detects EOP once more, end trigger signal T, counter 88 is its count value of breech lock in response to the end of triggering signal T, produce rising edge quantity or a falling edge quantity, whether detecting unit 87 is to hand over to hold package according to described rising edge or the identification of falling edge quantity, if described rising edge or falling edge quantity equal six, then be judged to be to hand over and hold package, its count value of breech lock produces count value P to counter 36 in response to the end of triggering signal T, otherwise, then be judged to be non-friendship and hold package, counter 36 stops counting, gets back to step 22.Calibration code unit 38 comparison count value P and reference value K are with the F that adjusts frequency.In the present embodiment, the time that the moving signal D-of minus tolerance occurs from first rising edge to EOP is equivalent to the bit period that package is held in whole friendship, equally, the time that positive differential wave D+ occurs from first falling edge to EOP is equivalent to the bit period that package is held in whole friendship, so bit period n=16 of counting, when data transfer rate M is 1.5MHz, and design frequency F ' is when being 12MHz, can get reference value K=128 according to formula 2, compare count value P and reference value K, if count value P is greater than reference value K, F is greater than design frequency F ' for the expression frequency, calibration code unit 38 produces calibrating signal Tr to reduce frequency F, if count value P, represents that frequency F is less than design frequency F ' less than reference value K, calibration code unit 38 produces calibrating signal Tr to increase frequency F, when if count value P equals reference value K, expression frequency F equals design frequency F ', and calibration code unit 38 produces calibrating signal Tr to keep frequency F.Present embodiment is by rising edge quantity or falling edge quantity in the serial of counting usb host end data, hold package with correct identification friendship, needn't produce package identification unit, in addition, according to formula 3, when reference value K=128, correction resolution C approximates ± and 0.78%, meet in the driver agreement of universal sequence remittance current drainage 2.0 and 1.1, to frequency of utilization error under the lower-speed state is ± 1.5% standard, and at this moment, the design frequency F ' of inner adjustable oscillator 40 is 12MHz, in other words, by correct identification and acquisition hand over hold package fixedly the bit period of sixteen bit make the identification friendship hold package and count frequency carries out synchronously as the calibration base of correcting frequency of USB device, inner adjustable oscillator 40 can use the oscillator of lower frequency, for example the RC oscillator of lower frequency reaches the purpose that reduces cost.
Above embodiment is only for the usefulness that the present invention is described, but not limitation of the present invention, person skilled in the relevant technique under the situation that does not break away from the spirit and scope of the present invention, can also be made various conversion or variation.Therefore, all technical schemes that are equal to also should belong to category of the present invention, should be limited by each claim.
The assembly symbol description
12 sign packages
14 Datagrams
Package is held in 16 friendships
20 proofread and correct the method flow diagram of USB device frequency
The 22-28 step
30 proofread and correct the circuit of USB device frequency
32 detecting units
34 detecting units
36 counters
38 calibration coding units
39 oscillograms
40 inner adjustable oscillators
42 first rising edges
43 frequencies
44 the 4th rising edges
46 first falling edges
48 the 4th falling edges
The method flow diagram of 50 correcting frequency of USB device
52 steps
The circuit of 54 correcting frequency of USB device
56 phase-locked loops
The method flow diagram of 58 correcting frequency of USB device
The 60-64 step
The circuit of 65 correcting frequency of USB device
66 steps
67 detecting units
68 oscillograms
70 first rising edges
72 first falling edges
74 waveforms
75 the 4th rising edges
76 frequencies
77 the 4th falling edges
78 package identification units
80 package identification units
The method flow diagram of 82 correcting frequency of USB device
84 steps
The circuit of 86 correcting frequency of USB device
87 detecting units
88 counters
90 oscillograms
91 confirm package
93 negates package
94 delay package
96 rising edges
97 falling edges.
Claims (35)
1. the method for a correcting frequency of USB device, described USB device comprises an inner adjustable oscillator to produce a frequency, and described method is characterized in that comprising the following steps:
First step: the package that detects in the input data serial ends up with initialization one counter;
Second step: detect that a synchronous columns begins to count the quantity of described frequency and produces a count value to trigger described counter according to the territory in the described data serial;
Third step: a more described count value and a reference value make described count value equate with described reference value to adjust the frequency of described inner adjustable oscillator.
2. the method for claim 1, it is characterized in that, the step of synchronous row data field described in the described data serial of described detection comprises that first rising edge that detects the moving signal of a minus tolerance makes described counter begin counting, and detects described minus tolerance and move the 4th rising edge of signal with the described count value of breech lock.
3. the method for claim 1, it is characterized in that, described in the described data serial of described detection synchronously the step of row data field comprise that first falling edge that detects a positive differential wave makes described counter begin to count, and the 4th falling edge that detects described positive differential wave is with the described count value of breech lock.
4. the method for claim 1, it is characterized in that, the step of the frequency of the described inner adjustable oscillator of described adjustment comprises when described count value during greater than described reference value, reduce the frequency of described inner adjustable oscillator, when described count value during, increase the frequency of described inner adjustable oscillator less than described reference value.
5. the method for claim 1 is characterized in that, more comprises the frequency of the described inner adjustable oscillator of frequency multiplication.
6. the circuit of a correcting frequency of USB device, described USB device comprises an inner adjustable oscillator to produce a frequency, and described circuit is characterized in that comprising:
One counter is in order to count the quantity of described frequency;
One first detecting unit, the package that detects in the data serial of importing ends up with the described counter of initialization;
One second detecting unit, detect in the described data serial a synchronous columns according to the territory to produce a triggering signal, make described counter begin counting and produce a count value;
One calibration code unit, a more described count value and a reference value produce the frequency that a calibrating signal is adjusted described inner adjustable oscillator, and described count value is equated with described reference value.
7. circuit as claimed in claim 6 is characterized in that, comprises the frequency of a phase-locked loop with the described inner adjustable oscillator of frequency multiplication.
8. circuit as claimed in claim 6 is characterized in that, described second detecting unit detects first rising edge of the moving signal of a minus tolerance with the described triggering signal of initialization, and detects described minus tolerance and move the 4th rising edge of signal to finish described triggering signal.
9. circuit as claimed in claim 6 is characterized in that, described second detecting unit detects first falling edge of a positive differential wave with the described triggering signal of initialization, and the 4th falling edge that detects described positive differential wave is to finish described triggering signal.
10. the method for a correcting frequency of USB device, described USB device comprises an inner adjustable oscillator to produce a frequency, it is characterized in that described method comprises the following steps:
(a) package that detects in the data serial of importing ends up with initialization one counter;
(b) detect in the described data serial a synchronous columns according to the territory to trigger the quantity that described counter begins to count described frequency;
(c) identification comprises whether the current package of described synchronous row data field is the sign package, if described current package then carries out step (d) for the sign package, otherwise, then stop the counting of described counter and get back to step (a)
(d) the package ending of the described current package of detection produces a count value with the described counter of breech lock;
(e) a more described count value and a reference value make described count value equate with described reference value to adjust the frequency of described inner adjustable oscillator.
11. method as claimed in claim 10 is characterized in that, described step (b) comprises first rising edge that detects the moving signal of a minus tolerance.
12. method as claimed in claim 10 is characterized in that, described step (c) comprises the following steps:
Detect the 4th rising edge of the moving signal of described minus tolerance;
Second to the 4th behind the 4th rising edge of the moving signal of the described minus tolerance of breech lock produces a package identification unit;
If comprising two logic states in the described package identification unit is high position, then be judged to be the sign package.
13. method as claimed in claim 10 is characterized in that, described step (c) comprises the following steps:
Detect the 4th rising edge of the moving signal of described minus tolerance;
First to fourth behind the 4th rising edge of the moving signal of the described minus tolerance of breech lock produces a package identification unit;
If comprising three logic states in the described package identification unit is high position, then be judged to be the sign package.
14. method as claimed in claim 10 is characterized in that, described step (b) comprises first falling edge that detects a positive differential wave.
15. method as claimed in claim 10 is characterized in that, described step (c) comprises the following steps:
Detect the 4th falling edge of described positive differential wave;
Second to the 4th behind the 4th falling edge of the described positive differential wave of breech lock produces a package identification unit;
If comprising two logic states in the described package identification unit is low position, then be judged to be the sign package.
16. method as claimed in claim 10 is characterized in that, described step (c) comprises the following steps:
Detect the 4th falling edge of described positive differential wave;
First to fourth behind the 4th falling edge of the described positive differential wave of breech lock produces a package identification unit;
If comprising three logic states in the described package identification unit is low position, then be judged to be the sign package.
17. method as claimed in claim 10, it is characterized in that, the step of the frequency of the described inner adjustable oscillator of described adjustment comprises when described count value during greater than described reference value, reduce the frequency of described inner adjustable oscillator, when described count value during, increase the frequency of described inner adjustable oscillator less than described reference value.
18. the circuit of a correcting frequency of USB device, described USB device comprise an inner adjustable oscillator to produce a frequency, it is characterized in that described circuit comprises:
One counter is in order to count the quantity of described frequency;
One first detecting unit, the package that detects in the data serial of importing ends up with the described counter of initialization;
One second detecting unit detects in the described data serial sign package to produce a triggering signal, makes described counter begin counting and produces a count value;
One calibration code unit, a more described count value and a reference value produce the frequency that a calibrating signal is adjusted described inner adjustable oscillator, and described count value is equated with described reference value.
19. circuit as claimed in claim 18, it is characterized in that, described second detecting unit detects first rising edge of the moving signal of a minus tolerance with the described triggering signal of initialization, the 4th rising edge that detects the moving signal of described minus tolerance makes described inner adjustable oscillator produce a package identification unit for the described sign package of identification, and the package ending that detects described sign package is to finish described triggering signal.
20. circuit as claimed in claim 18 is characterized in that, described package identification unit comprises first to fourth position behind described the 4th rising edge.
21. circuit as claimed in claim 18 is characterized in that, described package identification unit comprises second to the 4th position behind described the 4th rising edge.
22. circuit as claimed in claim 18, it is characterized in that, described second detecting unit detects first falling edge of a positive differential wave with the described triggering signal of initialization, the 4th falling edge that detects described positive differential wave makes described inner adjustable oscillator produce a package identification unit for the described sign package of identification, and the package ending that detects described sign package is to finish described triggering signal.
23. circuit as claimed in claim 22 is characterized in that, described package identification unit comprises first to fourth position behind described the 4th falling edge.
24. circuit as claimed in claim 22 is characterized in that, described package identification unit comprises second to the 4th position behind described the 4th falling edge.
25. the method for a correcting frequency of USB device, described USB device comprise an inner adjustable oscillator to produce a frequency, described method is characterized in that comprising the following steps:
(a) package that detects in the data serial of importing ends up with initialization one counter;
(b) detect in the described data serial a synchronous columns according to the territory to trigger the quantity that described counter begins to count described frequency;
(c) identification comprises whether the current package of described synchronous row data field is to hand over to hold package, if described current package is held package for handing over, then carries out step (d), otherwise, then stop the counting of described counter and get back to step (a);
(d) the package ending of the described current package of detection produces a count value with the described counter of breech lock;
(e) a more described count value and a reference value make described count value equate with described reference value to adjust the frequency of described inner adjustable oscillator.
26. method as claimed in claim 25 is characterized in that, described step (b) comprises first rising edge that detects the moving signal of a minus tolerance.
27. method as claimed in claim 25 is characterized in that, described step (c) comprises the following steps:
Count the rising edge quantity of the moving signal of described minus tolerance;
Detect the package ending of described current package;
Wherein, when described package ending occurs, if described rising edge quantity is six, then
Described current package is held package for handing over.
28. method as claimed in claim 25 is characterized in that, described step (b) comprises first falling edge that detects a positive differential wave.
29. method as claimed in claim 25 is characterized in that, described step (c) comprises the following steps:
Count the falling edge quantity of described positive differential wave;
Detect the package ending of described current package;
Wherein, when described package ending occurred, if described falling edge quantity is six, then described current package was held package for handing over.
30. method as claimed in claim 25, it is characterized in that, the step of the frequency of the described inner adjustable oscillator of described adjustment comprises when described count value during greater than described reference value, reduce the frequency of described inner adjustable oscillator, when described count value during, increase the frequency of described inner adjustable oscillator less than described reference value.
31. the circuit of a correcting frequency of USB device, described USB device comprise an inner adjustable oscillator to produce a frequency, it is characterized in that described circuit comprises:
One counter is in order to count the quantity of described frequency;
One first detecting unit, the package that detects in the data serial of importing ends up with the described counter of initialization;
One second detecting unit detects in the described data serial one and hands over and hold package to produce a triggering signal, makes described counter begin counting and produces a count value;
One calibration code unit, a more described count value and a reference value produce the frequency that a calibrating signal is adjusted described inner adjustable oscillator, and described count value is equated with described reference value.
32. circuit as claimed in claim 31 is characterized in that, described second detecting unit detects first rising edge of the moving signal of a minus tolerance with the described triggering signal of initialization, and detects described friendship and hold the package ending of package to finish described triggering signal.
33. circuit as claimed in claim 31 is characterized in that, more comprises one second counter bit in described second detecting unit, to count the rising edge quantity of the moving signal of described minus tolerance.
34. circuit as claimed in claim 31 is characterized in that, first falling edge that described second detecting unit detects a positive differential wave to be producing described triggering signal, and detects described friendship and hold the package of package and end up to finish described triggering signal.
35. circuit as claimed in claim 31 is characterized in that, more comprises one second counter bit in described second detecting unit, to count the falling edge quantity of described positive differential wave.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2009101425506A CN101931397A (en) | 2009-06-23 | 2009-06-23 | Method and circuit for correcting frequency of USB device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009101425506A CN101931397A (en) | 2009-06-23 | 2009-06-23 | Method and circuit for correcting frequency of USB device |
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| CN101931397A true CN101931397A (en) | 2010-12-29 |
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| CN2009101425506A Pending CN101931397A (en) | 2009-06-23 | 2009-06-23 | Method and circuit for correcting frequency of USB device |
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| CN102545838A (en) * | 2011-10-21 | 2012-07-04 | 嘉兴联星微电子有限公司 | Clock generator with ultralow power consumption |
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| CN106484155A (en) * | 2015-08-25 | 2017-03-08 | 原相科技(槟城)有限公司 | Navigation system and its clock correcting method |
| CN109687867A (en) * | 2018-11-30 | 2019-04-26 | 珠海慧联科技有限公司 | A kind of no crystal oscillator USB device clock correcting method and calibration circuit |
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| CN114780469A (en) * | 2022-06-24 | 2022-07-22 | 浙江地芯引力科技有限公司 | Clock frequency calibration device, data chip and clock frequency calibration method |
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| CN102694564A (en) * | 2011-03-23 | 2012-09-26 | 笙科电子股份有限公司 | Circuit and method for automatically correcting antenna resonance frequency |
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| CN102545838A (en) * | 2011-10-21 | 2012-07-04 | 嘉兴联星微电子有限公司 | Clock generator with ultralow power consumption |
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| CN106484155A (en) * | 2015-08-25 | 2017-03-08 | 原相科技(槟城)有限公司 | Navigation system and its clock correcting method |
| CN109687867A (en) * | 2018-11-30 | 2019-04-26 | 珠海慧联科技有限公司 | A kind of no crystal oscillator USB device clock correcting method and calibration circuit |
| CN109687867B (en) * | 2018-11-30 | 2023-04-07 | 珠海慧联科技有限公司 | Clock calibration method and calibration circuit for crystal-oscillator-free USB (universal serial bus) equipment |
| CN111290984A (en) * | 2018-12-07 | 2020-06-16 | 新唐科技股份有限公司 | Universal serial bus device and operation method thereof |
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