CN101923527B - Integrated network chip and electronic device - Google Patents

Abstract

An integrated network chip and an electronic device. The integrated network chip includes at least one first access interface, at least one second access interface, a power management unit and an interface bridge. The first access interface and the second access interface provide a local area network connection function and a memory card access function to the electronic device respectively. The interface bridge integrates the first access interface and the second access interface by providing a hub function. The power management unit provides power and grounding to the first access interface, the second access interface and the interface bridge. When the power management unit determines that the second access interface enters a power saving mode, the power management unit provides a first voltage to the second access interface.

Description

Integrated network chip and electronic device

technical field

The present invention relates to an integrated network chip, and in particular to an integrated network chip and an electronic device using the integrated network chip.

Background technique

At present, most notebook computers, netbook computers (Netbook), mobile Internet devices (Mobile Internet Device, referred to as MID) and smart phones (Smartphone) usually have at least one built-in LAN module or at least one built-in The WLAN module, or even has a card reader (Card-reader), if the user needs to connect other electronic devices every time to achieve these functions, it will make the user feel inconvenient. As shown in Figure 1, Figure 1 is a schematic diagram of a traditional independent packaging system with network functions and card reader functions. In FIG. 1 , the LAN access interface 120 and the card reader access interface 140 are packaged independently of each other, and are connected to the LAN interface 130 and the memory card slot 150 respectively. In addition, the LAN access interface 120 and the card reader access interface 140 are respectively connected to the host chipset 112 of the electronic device 110 through a peripheral component interconnect (PCI for short) interface. Alternatively, the LAN access interface 120 and the card reader access interface 140 can be respectively connected to the host chipset 112 through an accelerated peripheral component interconnect (PCI Express, referred to as PCIe) interface. However, such a circuit configuration requires at least two independent standard interfaces and at least two independent power supply sources, wherein the power supply sources include a power supply terminal and a ground terminal. These two independent standard interfaces provide signal input and signal output to the LAN access interface 120 and the card reader access interface 140, and the power supply source is connected to the LAN access interface 120 and the LAN access interface 120 through its power supply terminal and ground terminal. The card reader access interface 140 is coupled to provide power and ground to the LAN access interface 120 and the card reader access interface 140 respectively. Accordingly, such a circuit configuration occupies more circuit wires, chip pins and chip area, resulting in high packaging cost and high power consumption.

FIG. 2 illustrates an integrated system of a wireless network card controller and a card reader controller connected to an electronic device using a single bus. The integrated system 210 shown in FIG. 2 is a technology disclosed in US Patent Application No. 20080172512, which is used to improve the above situation. In the integrated system 210, the Universal Serial Bus (USB) interface between the power and data units 252 and 246 is used, and the electronic device 250 provides power supply, grounding and signal exchange functions to the bus interface 240, and the bus The power and data unit 246 of the interface 240 is connected with the electronic device 250 to exchange or transmit data. In addition, the bus interface 240 is connected to the power and data unit 222 of the wireless network card controller 220 and the power and data unit 232 of the card reader controller 230 through separate power and data units 242 and 244, and provides power and ground to the wireless network. The network card controller 220 exchanges signals with the card reader controller 230 and with the two controllers ( 220 and 230 ). However, the integrated system 210 still occupies at least three sets of power supply and ground and their corresponding pins, thus occupying more circuit wiring and chip area, resulting in high packaging cost and power consumption.

Contents of the invention

Based on the above, according to exemplary embodiments of the present invention, the present invention provides an integrated network chip and an electronic device using the integrated network chip. The integrated network chip provides an interface device with a hub function, which connects the first access interface providing the LAN connection function and the second access interface providing the memory card access function to the electronic device, and when the second access When the interface enters the power saving mode, a lower operating voltage is provided to the core chips of the first access interface and the second access interface. Accordingly, the area, number of pins and power consumption of the packaged integrated network chip are reduced.

According to an exemplary embodiment of the present invention, the present invention provides an integrated network chip suitable for electronic devices. The integrated network chip includes at least one first access interface, at least one second access interface, a power management unit and an interface bridge. The first access interface is used to provide the local area network connection function to the electronic device, and the second access interface is used to provide the memory card access function to the electronic device. The interface bridge has at least one first end and at least one second end. The first end and the second end of the interface bridge are respectively coupled to the first access interface and the second access interface of the electronic device, and the interface bridge has a hub function capable of integrating the first access interface and the second access interface . The power management unit is coupled to the first access interface, the second access interface and the interface bridge for providing the first voltage to the first access interface and the second voltage to the second access interface. When the power management unit judges that the second access interface enters a power saving mode, the power management unit provides the first voltage to the second access interface, and the first voltage is smaller than the second voltage.

According to an exemplary embodiment of the present invention, the first access interface of the integrated network chip is a LAN control chip, and the first access interface is coupled to at least one LAN connector to provide a LAN connection function to the electronic device.

According to an exemplary embodiment of the present invention, the second access interface of the above-mentioned integrated network chip is a card reader control chip, and is coupled to at least one card reader slot to access a memory card in the card reader slot , wherein, the card reader slot is a multiple card reader slot.

According to an exemplary embodiment of the present invention, in the aforementioned integrated network chip, when the first access interface receives or transmits a LAN packet, the aforementioned second access interface is in a standby state. In addition, when the electronic device intends to access the memory card and the first access interface does not receive or transmit the LAN packet, the electronic device will access the memory card through the above-mentioned second access interface.

According to an exemplary embodiment of the present invention, the above-mentioned electronic device includes a computer motherboard, and the integrated network chip is disposed on the computer motherboard.

According to an exemplary embodiment of the present invention, the above-mentioned integrated network chip further includes a set of power management pins, which has a set of power pins and ground pins, the power pins and ground pins are used to receive external power and external ground , wherein, the interface bridge, the first access interface and the second access interface share the group of power pins and ground pins.

According to an exemplary embodiment of the present invention, the above-mentioned power management unit receives a system power provided by the electronic device, and a voltage value of the system power is a third voltage, wherein the power management unit converts the third voltage into the first voltage and second voltage. In addition, the power management unit provides a third voltage to the interface bridge.

According to an exemplary embodiment of the present invention, the above-mentioned first voltage is substantially equal to 1.2 volts, the second voltage is substantially equal to 1.8 volts, and the third voltage is substantially equal to 3.3 volts.

According to an exemplary embodiment of the present invention, the present invention provides an electronic device including a host and an integrated network chip. The integrated network chip is connected with the host to exchange data, and the integrated network chip includes at least one first access interface, at least one second access interface, power management unit and interface bridge. The first access interface is used to provide the local area network connection function to the electronic device, and the second access interface is used to provide the memory card access function to the electronic device. The interface bridge has at least one first end, at least one second end and at least one third end. The first terminal, the second terminal and the third terminal of the interface bridge are respectively coupled to the first access interface, the second access interface and the host. In addition, the power management unit is coupled to the first access interface, the second access interface and the interface bridge for providing the first voltage to the first access interface and the second voltage to the second access interface. When the power management unit judges that the second access interface enters a power saving mode, the power management unit provides the first voltage to the second access interface, and the first voltage is smaller than the second voltage.

Based on the above, several exemplary embodiments of the present invention provide an integrated network chip and an electronic device using the integrated network chip. The integrated network chip provides an interface bridge with a hub function, and the interface bridge is used to connect the first access interface providing the LAN connection function and the second access interface providing the memory card access function to the electronic device. In addition, when it is determined that the second access interface enters the power saving mode, a lower operating voltage is provided to the second access interface. Accordingly, the area, number of pins, hardware manufacturing cost and power consumption of the packaged integrated network chip are reduced.

Exemplary embodiments of the present invention are exemplified below and described in detail in conjunction with the accompanying drawings, so as to make the above-mentioned features and advantages more comprehensible.

Description of drawings

Figure 1 is a schematic diagram of a traditional stand-alone packaging system with network functions and card reader functions.

FIG. 2 is a system schematic diagram of an integrated system of a wireless network card controller and a card reader controller connected to an electronic device using a single bus.

FIG. 3 is a system block diagram of an integrated network chip according to an exemplary embodiment of the present invention.

FIG. 4 is a system block diagram of an integrated network chip according to another exemplary embodiment of the present invention.

FIG. 5 is a system block diagram of an electronic device with an integrated network chip according to another exemplary embodiment of the present invention.

FIG. 6 is a flowchart illustrating an operation method of an integrated chip according to an exemplary embodiment of the present invention.

Symbol Description

110, 250, 310, 510: electronic device 112, 312, 412, 512: host chipset

320, 520: integrated network chip 120, 324: local area network access interface

140, 326: card reader access interface 322: bus interface bridge

130, 340: local area network interface 150, 350: memory card slot

210: Integrated system 410: Computer motherboard

220: Wireless network card controller 230: Card reader controller

240: Bus interface S602～S610: Step process

428: Power Management Unit 440: Area Network Connector

450: All-in-one card reader slot 530: The third access interface

560: The third peripheral hardware module

222, 232, 242, 244, 246, 252: power and data units

Detailed ways

Reference will now be made in detail to the disclosed exemplary embodiments, many of which are illustrated in the accompanying drawings, wherein like reference numerals are used throughout the drawings to designate like or like components.

According to an exemplary embodiment of the present invention, the present invention provides an integrated network chip and a circuit board/electronic device using the integrated network chip. The integrated network chip provides an interface device with a hub function to connect the first access interface providing the LAN connection function and the second access interface providing the memory card access function to the electronic device. When the electronic device enters the power saving mode, a lower operating voltage is provided to the central chip of the first access interface and the second access interface. The interface device with the line gathering function, the first access interface and the second access interface share the same power management unit, its power pin and its ground pin. In addition, all exemplary embodiments described below are for illustration only, and are not intended to limit the present invention.

Please refer to FIG. 3 first. FIG. 3 is a system block diagram of an integrated network chip according to an exemplary embodiment of the present invention. The integrated network chip 320 includes a bus interface bridge 322 , a LAN access interface 324 and a card reader access interface 326 . In this exemplary embodiment, the integrated network chip 320 exchanges a plurality of signals or data with the host chipset 312 of the electronic device 310 through the bus interface bridge 322, and the integrated network chip 320 obtains a system power from the electronic device 310 (not shown drawn). The electronic device 310 includes a computer motherboard, and can be a notebook computer, a netbook computer, a mobile Internet device, a personal navigation device (Personal Navigation Device, referred to as PND), a personal multimedia player (Personal Multimedia Player, referred to as PMP) ) or a smartphone. The host chipset 312 executes main functions of the electronic device 310 , such as Internet connection, document processing, and multimedia playback. The interface between the bus interface bridge 322 and the host chipset 312 can be a PCI interface or a PCIe interface. However, the present invention is not limited to the above, and the interface between the bus interface bridge 322 and the host chipset 312 can also be another standard interface, such as a USB interface. In addition, the LAN access interface 324 and the card reader access interface 326 can also communicate with each other through a USB standard interface, a PCI standard interface or a PCIe standard interface.

The LAN access interface 324 is used to provide the LAN connection function to the electronic device 310, and is coupled to the LAN interface 340. The LAN interface 340 can be an RJ-45 interface standard, or other LAN interface standards, for example: Wireless LAN interface IEEE 802.11a/b/g. When the transmission data speed between the LAN access interface 324 and the LAN interface 340 is 10 megabits per second (Mbps) or 100 Mbps, use 2 between the LAN access interface 324 and the LAN interface 340 Twisted pair wires. When the transmission data speed between the LAN access interface 324 and the LAN interface 340 is above Gigabits per second (Gbps), that is, the LAN interface 340 is a Gigabit local area network (Gigabit local area network) , referred to as GLAN) network interface, between the LAN access interface 324 and the LAN interface 340, 4 twisted pairs or optical fibers are used to transmit data.

The card reader access interface 326 is used to provide the memory card access function to the electronic device 310 and is coupled to the memory card slot 350 . The memory card slot 350 is an all-in-one card reader slot, for example: a seven-in-one card reader slot, and can support multiple memory card format standards, for example: MultiMediaCard (MMC for short) Standard, Memory Stickcard (MS Card for short) standard or Secure Digital card (SD card for short) standard. In addition, in other exemplary embodiments, the interface between the card reader access interface 326 and the memory card slot 350 may also be a Secure Digital Input/Output (SDIO) standard interface.

FIG. 4 is a system block diagram of an integrated network chip according to another exemplary embodiment of the present invention. The bus interface bridge 322 of the integrated network chip 320 has a first terminal, a second terminal and a third terminal, and the first terminal, the second terminal and the third terminal of the bus interface bridge 322 are respectively coupled to the LAN access interface 324 , the card reader access interface 326 and the host chipset 412 of the computer motherboard 410 (or a computer host). In addition, the bus interface bridge 322 has a line gathering function, so the integrated network chip 320 can integrate the LAN access interface 324 and the card reader access interface 326 through the bus interface bridge 322 . In other words, the bus interface bridge 322 arranges the order in which the card reader access interface 326 and the LAN access interface 324 transmit data to the host computer, and the bus interface bridge 322 may even switch the card reader access interface 326 and the area network access interface 324. The format of the data transmitted by the network access interface 324 is such that the format of the data can be accessed by the host computer. It is worth mentioning that, in this exemplary embodiment, the PCIe interface is used between the bus interface bridge 322 and the computer host chipset 412, so the computer host chipset 412 uses a set of differential signal lines TXP and TXN to transmit data to The bus interface bridge 322, and the computer host chipset 412 uses another set of differential signal lines RXP and RXN to receive the data sent by the bus interface bridge 322.

In this exemplary embodiment, the computer motherboard 410 includes a CPU chip, a memory module and other power management modules in addition to the computer motherboard chipset 412 . The circuit technology of the computer mainboard is well known to those skilled in the art, so its relevant details will not be described here.

In this exemplary embodiment, when the first end of the bus interface bridge 322 can be a PCIe interface, and the second end and the third end of the bus interface bridge 322 can also be a PCIe interface, but the second end of the bus interface bridge 322 The interfaces used by the first terminal, the second terminal and the third terminal are not intended to limit the present invention. In more detail, a set of differential signal lines TXP0 and TXN0 are used between the bus interface bridge 322 and the card reader access interface 326 to transmit data to the card reader access interface 326, while the bus interface bridge 322 uses another A set of differential signal lines RXP0 and RXN0 receive data sent by the card reader access interface 326 . In addition, the bus interface bridge 322 uses a set of differential signal lines TXP1 and TXN1 to transmit data to the LAN access interface 324, and the bus interface bridge 322 uses another set of differential signal lines RXP1 and RXN1 to receive data from the LAN memory. Get the data sent by the interface 324.

In this exemplary embodiment, the integrated network chip 320 further includes a power management unit 428 and a set of power management pins (not shown). The power management unit 428 is coupled to the bus interface bridge 322, the LAN access interface 324 and the card reader access interface 326 to provide power and ground to the bus interface bridge 322, the LAN access interface 324 and the card reader Machine access interface 326. The power management unit 428 also performs other functions related to power control. In addition, the above-mentioned group of power management pins are used to receive external power (not shown) and external ground (not shown), and serve as the bus interface bridge 322, the LAN access interface 324 and the card reader access The interface 326 has a plurality of shared power pins and a shared ground pin. In other words, the bus interface bridge 322 , the LAN access interface 324 and the card reader access interface 326 share the same set of power pins and ground pins. Accordingly, the packaging method of the integrated network chip 320 can save at least one set of PCIe interfaces and reduce the number of pins in the overall package. For example, if the local area network access interface 324 and the card reader access interface 326 are originally two chips with 48 pins respectively, through the above-mentioned integration method of the integrated network chip 320 and the shared power management mechanism, after adopting The integrated network chip 320 with PICe interface and proper integration only needs 64 pins. In addition, in other exemplary embodiments, the integrated network chip 320 can also use a USB interface or a PCI interface, but when the PICe interface is used to support the SDIO interface and the GLAN network interface, the integrated network chip 320 will have better power management. performance and high data transfer speeds.

In this exemplary embodiment, the operating principles of the integrated network chip 320 and the host computer chipset 412 are roughly as follows. When the integrated network chip 320 receives LAN packets or transmits LAN packets through the LAN access interface 324 , the card reader access interface 326 is in a standby state. In addition, when the computer motherboard 410 wants to access the content of the memory card, and the LAN access interface 324 does not receive the LAN packet and the first group of interfaces does not transmit the LAN packet, the computer motherboard 410 will pass through the above-mentioned card reader. The access interface 326 accesses the memory card through the card reader access interface 326 .

In this embodiment, when the electronic device provides a system power to the integrated network chip 320, the power management pin receives the system power (for example, a voltage value of 3.3V), and since the power management pin (not shown) is It is connected to the power management unit 428, so the power management unit also receives the system power of the same voltage value. The power management unit 428 further converts the system power into a first voltage (voltage value is, for example, 1.2V) and provides the first voltage to the core (Core) chip of the LAN access interface 324, and the power management unit 428 converts the system power It is a second voltage (for example, 1.8V) and provides the second voltage to the central chip of the card reader access interface 326 . The first voltage provided by the power management unit 428 to the central chip of the LAN access interface 324 can only maintain the operation of the input/output (Input/Output, referred to as I/O) of the LAN access interface 324, and the power management unit The second voltage provided by 428 to the central chip of the card reader access interface 326 can only maintain the I/O operation of the card reader access interface 326 . The power management unit 428 also provides power with a third voltage (voltage value such as 3.3V) to the bus interface bridge 322 . In this embodiment, since the voltage of the system power supply is the same as the third voltage, the power management unit 428 does not need to perform voltage conversion.

When the power management unit 428 determines that the power saving mode can be entered, the power management unit 428 provides the first voltage (substantially lower than the second voltage) to the central chip of the card reader access interface 326 . For example, the voltage received by the card reader access interface 326 in the power saving mode is the first voltage (such as 1.2V) lower than the second voltage (such as 1.8V), and the voltage of 1.2V Although the card reader access interface 326 cannot be made to function normally, it can be placed in standby mode. Accordingly, the operating voltage of the central chip of the card reader access interface 326 can be reduced, thereby reducing the overall power consumption of the integrated network chip 320 . More precisely, when the integrated network chip 320 adopts the PCIe interface and enters the power saving mode, the integrated network chip 320 adopts a deep sleep mode (Deep slumber mode, DSM for short). When the integrated network chip 320 adopts the USB interface and enters the power saving mode, the integrated network chip 320 adopts a selective suspend mode. In addition, it can be judged whether the current LAN access interface 324 or the card reader access interface 326 is transmitting data or receiving data through the firmware (not shown) running on the computer motherboard 410, so as to further determine whether to enter power saving model. Furthermore, assuming that the card reader access interface 326 stops transmitting data or receiving data and maintains this state for more than a preset waiting time, the power management unit 428 determines that the power saving mode can be entered. When the power management unit 428 determines that the card reader access interface 326 enters the power saving mode, the power management unit 428 will provide the first voltage to the second access interface. However, the present invention is not limited to the above, and other methods can also be used to determine whether the electronic device connected to the integrated network chip 320 enters the power saving mode, or whether the integrated chip 320 itself or its components can enter the power saving mode, and Such judging methods are well known to those skilled in the art, so their relevant details will not be described here.

In this exemplary embodiment, the integrated network chip 320 is disposed on the computer motherboard 410 . However, the present invention is not limited thereto. In other exemplary embodiments, the integrated network chip 320 can also be connected to the computer motherboard 410 or the electronic device 310 through an external connection interface.

FIG. 5 is a system block diagram of an electronic device with an integrated network chip according to another exemplary embodiment of the present invention. Please refer to FIG. 5 , in this exemplary embodiment, the electronic device 510 includes a host chipset 512 (which has a main system chip inside), a central processing unit (not shown), a memory module (not shown) and an integrated network chip 520. The host chipset 512 is used to execute the main functions of the electronic device 510, such as logic operations and file management functions. The integrated network chip 520 is connected with the host chipset 412 of the electronic device 510 and exchanges a plurality of signals or data. And the integrated network chip 520 is substantially similar to the integrated network chip 420 in FIG. 4 , except for the following differences.

In this exemplary embodiment, the integrated network chip 520 further includes a third access interface 530 . The third access interface 530 is coupled to the third peripheral hardware module 560 for providing other functions to the electronic device 510 . The bus interface bridge 322 has a hub function and can integrate the LAN access interface 324 , the card reader access interface 326 and the third access interface 330 . A fourth end of the bus interface bridge 322 is coupled to the third access interface 530 . The power management unit 328 is also coupled to the third access interface 330, and provides shared power and shared ground to the bus interface bridge 322, the LAN access interface 324, the card reader access interface 326, and the third access interface 330 (For example, providing the fourth voltage to the third access interface 330). In addition, a group of power management pins (not shown) of the integrated network chip 520 are also used as the bus interface bridge 322, the LAN access interface 324, the card reader access interface 326 and the third access interface 330. Multiple shared power pins and one shared ground pin. In addition, the bus interface bridge 322 also transmits signals to the third access interface 530 through a set of differential signal lines TXP2 and TXN2, and the bus interface bridge 322 uses another set of differential signal lines RXP2 and RXN2 to receive signals from the third access interface 530. The signal sent by the access interface 530 .

However, the present invention is not limited to the above. In other exemplary embodiments, the integrated network chip can also include more than three access interfaces to provide different functions of the electronic device, such as: video recording, recording or receiving GPS (Global Positioning System, referred to as GPS) signal function. The bus interface bridge of the integrated network chip needs to provide an appropriate number of connection terminals according to the access interface to be connected. For example, in the third exemplary embodiment, in addition to the host chipset 412, the bus interface bridge 322 needs to be connected to three other access interfaces, so at least four connection terminals are required.

The electronic device 510 provides system power to the integrated network chip 520, which is received by the power management unit 428 through the power management pin. The power requirements of the interface 326 and the third access interface 530 convert the voltages of the system power and output them respectively.

When the power management unit 428 detects that the electronic device 510 enters the power saving mode, the power management unit 428 provides the first voltage (substantially lower than the second voltage and the fourth voltage) to the central chip of the card reader access interface 326 and the first voltage. Three central chips of the access interface 530 . In other embodiments, if the second voltage is substantially lower than the fourth voltage, the power management unit 428 may also provide the second voltage to the third access interface 530 when providing the first voltage to the card reader access interface 326 . Accordingly, the operating voltage of the central chip of the card reader access interface 326 and the central chip of the third access interface 530 can be reduced, thereby reducing the overall power consumption of the integrated network chip 520 and the electronic device 510 .

FIG. 6 is a flowchart illustrating an operation method of an integrated chip according to an exemplary embodiment of the present invention. Please refer to FIG. 6 , in this exemplary embodiment, the integrated chip operating method 600 starts from step S602 . In step S604, the bus interface bridge 322 detects the operation status of the LAN access interface 324, and after step S604, proceed to step S606. In step S606, if the bus interface bridge 322 detects that the LAN access interface 324 is transmitting data to the LAN connector 340 or receiving data from the network connector 340 by the LAN access interface 324, the card reader The access interface 326 remains in the standby state, and returns to step S602. On the contrary, in step S606, if the bus interface bridge 322 does not detect that the LAN access interface 324 is transmitting data to the LAN connector 340 or receiving data from the LAN connector 340 by the LAN access interface 324, And when the electronic device 510 attempts to access the data in the memory card, the electronic device 510 accesses the data in the memory card in the slot of the all-in-one card reader through the card reader access interface 326, that is, transmits the data to the memory card Or receive data from memory card.

To sum up, according to several exemplary embodiments of the present invention, several exemplary embodiments of the present invention provide an integrated network chip and an electronic device using the integrated network chip. The integrated network chip provides an interface bridge with a hub function, and the interface bridge is used to connect the first access interface providing the LAN connection function and the second access interface providing the memory card access function to the electronic device. When the electronic device enters the power saving mode, a lower operating voltage is provided to the first access interface and the second access interface. In addition, the interface bridge, the power management unit of the first access interface and the power management unit of the second access interface share the same power management unit, its power pin and its ground pin. Accordingly, the area of the packaged integrated network chip, the number of pins, the hardware manufacturing cost and the power consumption can be reduced.

Although the exemplary embodiments have been disclosed above, they are not intended to limit the implementation of the present invention. Anyone with ordinary knowledge in the art can make some modifications without departing from the spirit and scope of the disclosed embodiments. Changes and retouching, so the scope of protection should be based on the content defined in the appended claims.

Claims (9)

1. An integrated network chip suitable for an electronic device, characterized in that the integrated network chip includes: at least one first access interface for providing a local area network connection function to the electronic device; At least one second access interface for providing a memory card access function to the electronic device; An interface bridge has at least one first end and at least one second end, the first end and the second end are respectively coupled to the first access interface and the second access interface, the interface bridge has a A hub function is used to integrate the first access interface and the second access interface; A power management unit, coupled to the first access interface, the second access interface and the interface bridge, for providing a first voltage to the first access interface and a second voltage to the second access interface Two access interface, Wherein, when the power management unit determines that the second access interface enters a power saving mode, the power management unit provides the first voltage to the second access interface, and the first voltage is lower than the second voltage; and A set of power management pins has a set of power pins and ground pins, the set of power pins and ground pins are respectively used to receive an external power supply and an external ground, wherein the interface bridge, the first memory The access interface shares the set of power pins and ground pins with the second access interface. 2. The integrated network chip according to claim 1, wherein the first access interface is an area network control chip, and the first access interface is coupled to at least one area network connector to provide the The local area network connection function is provided to the electronic device. 3. The integrated network chip according to claim 2, wherein the second access interface is a card reader control chip, and is coupled to at least one card reader slot to access the card reader A memory card in the slot, wherein the card reader slot is an all-in-one card reader slot. 4. The integrated network chip according to claim 3, wherein when the first access interface sends and receives a local area network packet, the second access interface is in a standby state; The electronic device accesses the memory card through the second access interface when the memory card is accessed and the first access interface is not sending or receiving the LAN packet. 5. The integrated network chip according to claim 1, wherein the electronic device comprises a computer motherboard, and the integrated network chip is disposed on the computer motherboard. 6. The integrated network chip according to claim 1, characterized in that, The power management unit receives a system power provided by the electronic device, a voltage value of the system power is a third voltage, wherein the power management unit converts the third voltage into the first voltage and the second voltage; and The power management unit provides the third voltage to the interface bridge. 7. The integrated network chip according to claim 6, wherein the first voltage is equal to 1.2 volts, the second voltage is equal to 1.8 volts, and the third voltage is equal to 3.3 volts. 8. An electronic device, characterized in that it comprises: a host; and An integrated network chip, wherein the integrated network chip is connected to the host to exchange data, the integrated network chip includes: at least one first access interface for providing a local area network connection function to the electronic device; At least one second access interface for providing a memory card access function to the electronic device; An interface bridge having at least one first end, at least one second end and at least one third end, wherein the first end is coupled to the first access interface, and the second end is coupled to the second an access interface, and the third end is coupled to the host of the electronic device; A power management unit, coupled to the first access interface, the second access interface and the interface bridge, for providing a first voltage to the first access interface and a second voltage to the second access interface Two access interface, Wherein, when the power management unit determines that the second access interface enters a power saving mode, the power management unit provides the first voltage to the second access interface, and the first voltage is lower than the second voltage; A set of power management pins has a set of power pins and ground pins, the set of power pins and ground pins are respectively used to receive an external power supply and an external ground, wherein the interface bridge, the first memory The access interface shares the set of power pins and ground pins with the second access interface. 9. The electronic device according to claim 8, comprising a computer motherboard, and the integrated network chip is disposed on the computer motherboard.

Images