CN101916543B - Data communication method of LED display system - Google Patents

Abstract

The invention discloses a data communication method of an LED display system, which adopts a single-line bus for realizing data communication. The method comprises data full-receiving communication and/or data serial-receiving communication, wherein the timing sequence of the data full-receiving communication sent out by an LED controller sequentially comprises a resetting timing sequence, a resetting end timing sequence, a full-receiving instruction timing sequence, a starting address timing sequence, an M-effective data timing sequence, an end mark timing sequence and a resetting timing sequence; and the timing sequence of the data serial-receiving communication sent out by the LED controller sequentially comprises a resetting timing sequence, a resetting end timing sequence, a serial-receiving instruction timing sequence, a starting address timing sequence, an L-effective data timing sequence and a resetting timing sequence. The data communication method in the invention has the advantages of high communication efficiency, flexible control and good synchronization effect.

Description

A data communication method for an LED display system

technical field

The invention relates to LED display technology, in particular to a data communication method of an LED display system realized by a single-wire bus.

Background technique

At this stage, the application of LED display technology has become more and more popular. At present, the widely existing LED display system, as shown in Figure 1, includes an LED controller and several rows of LED unit boards connected in series;

The LED unit board includes a BUFFER circuit that enhances the signal driving capability, a decoding circuit that generates dynamic display scanning timing, several switch tubes and several LED drive circuits;

The communication signals sent by the LED controller are shown in Figure 2, including scan signal (SCANI), enable signal (ENI), latch signal (LATI), clock signal (CLKI), and data signal (DIN). The scanning signal, enabling signal, latching signal, and clock signal are driven and enhanced by the BUFFER circuit of each series-connected LED unit board in sequence, and then output;

The scanning signal (SCANO) enhanced by the BUFFER circuit in each LED unit board is provided to the decoding circuit of the LED unit board, and the decoding circuit decodes to generate a dynamic display scan timing control switch tube;

The enable signal (ENO), latch signal (LATO), and clock signal (CLKO) enhanced by the BUFFER circuit in each LED unit board are respectively provided to all LED drive circuits in the LED unit board;

The data signal (DIN) sent by the LED controller is provided to the BUFFER circuit of the first LED unit board, and then output to the data signal input terminal (Din) of the first LED driving circuit of the first LED unit board after being driven and strengthened. The signal passes through each LED driving circuit of the first LED unit board, and is output to the data signal input terminal (Din) of the next LED driving circuit by the internal shift register under the control of the clock signal; similarly, each subsequent LED unit The BUFFER circuit of the board obtains the data signal from the previous LED unit board connected in series, and the data signal is driven and enhanced by the BUFFER circuit and then output to the data signal input terminal (Din) of the first LED drive circuit of the LED unit board. The signal passes through each LED driving circuit of this LED unit board, and is output to the data signal input terminal (Din) of the next LED driving circuit of this LED unit board by the internal shift register under the control of the clock signal, the last of this LED unit board The data signal of one LED driving circuit is output to the BUFFER circuit of the next LED unit board; the data output of the last LED driving circuit on the last LED unit board is suspended.

In the above-mentioned LED display system, the LED controller needs multiple control signals to realize the control of the LED unit board, and the wiring is complicated.

In order to overcome the shortcomings of the LED display system shown in Figure 1, the invention patent application number 200910099888.8 proposes an LED drive circuit and its serial communication system and communication method. The serial communication system is shown in Figure 3. A large number of LED drive circuits can be controlled by one output port of the LED control circuit, and the cost is low, the wiring is simple, and the anti-interference ability is strong.

Contents of the invention

The purpose of the present invention is to further illustrate the data communication method of the LED display system shown in FIG. 3 .

A communication method for an LED display system, wherein the LED display system includes: an LED controller and an L-level LED driver;

The LED controller includes an output communication port;

The LED driver includes an input communication port and an output communication port;

The output communication port of the LED controller is connected to the input communication port of the first-level LED driver, and the output communication port of the first-level LED driver is connected to the input communication port of the second-level LED driver in series, and so on. The input communication port of the first-level LED driver, the output communication port of the current-level LED driver is connected in series to the input communication port of the next-level LED driver, the L-level LED drivers are connected in series in sequence, and the output communication port of the last-level LED driver is suspended;

The LED driver includes a communication mode register: the communication mode register has two states: straight-through mode and non-through-through mode. When in the straight-through mode, the LED driver simultaneously sends the timing received by the input communication port to the output communication port of the LED driver ; When in non-pass-through mode, the LED driver generates the output of its output communication port according to the received command.

The LED driver further includes a memory for storing control information and display information sent by the LED controller to the LED driver.

The data communication method of the above-mentioned LED display system includes all data receiving communication and/or data serial receiving communication:

The LED controller sends data to the L-level LED driver, and the L-level LED driver synchronously puts the received data into the designated memory space of all LED drivers according to the instruction to realize all-data communication. The timing of all-data communication sent by the LED controller is as follows The timing is composed in turn: reset timing, reset end timing, all receive instruction timing, start address timing, M valid data timing, end flag timing, reset timing;

The M valid data timings are composed of M consecutive valid data timings.

The LED controller sends data to the L-level LED driver, and the L-level LED driver receives the data sent by the LED controller in turn according to the instructions, and puts the received data into the designated memory space of each LED driver to realize data serial communication. The LED controller The sent data serial receiving communication timing is composed of the following timing sequentially: reset timing, reset end timing, serial receiving instruction timing, start address timing, L effective data frame timing, and reset timing.

The L valid data frame timings are composed of L continuous valid data frame timings, and the valid data frame timings are composed of N consecutive valid data timing sequences and 1 end mark timing;

The first-level LED driver receives the first valid data frame sequence belonging to the LED driver from the LED controller, puts the received data into the designated memory space, and outputs the communication port to it when receiving the first valid data frame sequence Send the invalid timing synchronously, and then continue to send the second to the L valid data frame timing and reset timing to its output communication port;

The second-level LED driver receives the timing sent by the output communication port of the first-level LED driver, analyzes the timing of the second valid data frame belonging to the LED driver and puts the received data into the designated memory space, and receives the second When the timing of the valid data frame is valid, the invalid timing is sent synchronously to its output communication port, and then the 3rd to the Lth valid data frame timing and reset timing are continued to be sent to the output communication port;

By analogy, the nth level LED driver receives the timing sent by the output communication port of the n-1th level LED driver, parses the timing of the nth effective data frame belonging to the LED driver and puts the received data into the designated memory space, And when receiving the nth valid data frame timing, synchronously send the invalid timing sequence to its output communication port, and then continue to send the n+1th to Lth valid data frame timing and reset timing sequence to its output communication port.

Reset sequence (RESET), its function is to complete the reset function of the LED driver receiving the reset sequence, and set the communication mode register of the LED driver to the direct mode;

The reset end sequence (RESET_END) can only be used after the reset sequence; its function indicates the end of reset;

All received command sequence (IR_RX_ALL), used to indicate that the communication is data received all communication;

Serial receiving command sequence (IR_RX_S), used to indicate that this communication is data serial receiving communication;

The start address timing (ADDS) is used to indicate the starting address of the address space corresponding to the LED driver memory that receives the timing of the data that needs to be transferred in the instruction;

Effective data timing (Data), used to represent the data that needs to be transmitted in the instruction;

End mark sequence (END), the LED driver receives the end mark byte to indicate the end of the current valid data sequence;

Invalid timing (Noneeffect), this byte can be inserted after the reset end timing, all receive command timing, serial receive command timing, start address, valid data timing or end mark timing, the LED driver receives invalid timing and does not do any processing .

After the LED display system implemented by the single-wire bus is powered on, the initial communication is performed, and the steps are as follows:

(1) The LED controller sends out at least L reset timing sequences. After receiving the reset timing sequences, the first-level LED driver sets the communication mode register to the direct mode, and the first-level LED driver simultaneously sends the received timing sequences to the output communication port;

(2) After the second-level LED driver receives the reset sequence, it sets the communication mode register to the direct mode, and the second-level LED driver sends the received sequence to the output communication port at the same time; and so on, all levels of LED drivers receive After the reset sequence of the previous LED driver, set the communication mode register to the direct mode, and send the received sequence to the output communication port at the same time, until all LED drivers set the communication mode register to the direct mode.

The communication steps of the data all receiving communication are:

(1) After the LED display system implemented by the single-wire bus performs initial communication, the communication mode register of each LED driver is set to the direct mode;

(2) The LED controller sequentially sends out reset timing, reset end timing, all-receive instruction timing, start address timing, M effective data frame timing, end flag timing, and reset timing;

(3) While performing step (2), the first-level LED driver synchronously receives reset timing, reset end timing, all-receive command timing, start address timing, M valid data frame timing, end flag timing, and reset timing.

(4) Since the communication mode register of each LED driver is set to the direct mode, while performing step (2), the nth level LED driver synchronously receives the n-1 level driver in sequence from the output communication port of the n-1 level LED driver The transmitted reset timing, reset end timing, all receive instruction timing, start address timing, M valid data frame timing, end flag timing, and reset timing, n is an integer greater than 1 and less than L-1.

When the LED drivers at all levels receive the start address sequence, the LED drivers at all levels receive and analyze the start address sequence, and prepare to receive M valid data sequences;

When the LED drivers at all levels receive M valid data sequences, they analyze the M valid data sequences, accumulate the memory addresses, and put the M valid data sequentially into the memory space whose address starts with the start address.

The communication steps of the data serial reception communication are:

(1) After the LED display system implemented by the single-wire bus performs initial communication, the communication mode register of each LED driver is set to the direct mode;

(2) The LED controller sends out the reset sequence, the reset end sequence, the serial receiving command sequence, and the start address sequence in sequence;

(3) While performing step (2), since the communication mode registers of each LED driver are set to direct mode, LED drivers at all levels receive reset timing, reset end timing, serial instruction timing, and start address timing synchronously. The driver sets the respective communication mode registers to non-straight-through mode after receiving the start address sequence;

(4) The LED controller sequentially sends the first to the L effective data frame timing and reset timing;

(5) While performing step (4), the first-level LED driver sequentially receives the timing sequence of L valid data frames sent by the LED controller, and analyzes the timing sequence of the first valid data frame, and converts the timing sequence of the first valid data frame into N The valid data are sequentially put into the memory space with the start address as the first address, and the memory addresses are accumulated; while receiving the N valid data timing and the end mark timing in the first valid data frame sequentially, the first-level LED driver sequentially sends out N+1 invalid timings are sent to the output communication port for the second-level LED driver. Since the communication registers of the second-level to L-level LED drivers are in non-through mode, the second-level to L-level LED drivers receive N+1 sequentially synchronously An invalid sequence; when the first stage LED driver receives the end flag sequence in the first valid data frame sequence, set the communication mode register of the first stage LED driver to the direct mode, and the first stage LED driver will control the LED The second to L effective data frame timings and reset timings sent by the device are sent to the output communication port of the first-level LED driver in sequence;

(6) The second-level LED driver sequentially receives the timing of the second to L valid data frames sent by the first-level LED driver, and analyzes the timing of the second valid data frame, and converts the timing of N effective data frames in the second valid data frame The data is sequentially put into the memory space with the start address as the first address, and the memory addresses are accumulated; while receiving the N valid data in the second valid data frame timing sequence and the end mark timing sequence, the second-level LED driver sequentially sends out N+ 1 invalid sequence to the output communication port to the third-level LED driver, because the communication registers of the third-level to L-level LED drivers are in non-through mode, the third-level to L-level LED drivers receive N+1 invalid timing synchronously ; When the second-level LED driver receives the end flag timing in the second valid data frame timing, set the communication mode register of the second-level LED driver to the direct mode, and at the same time, the second-level LED driver sends the LED controller. The third to Lth effective data frame timings and reset timings are sequentially sent to the output communication port of the second-level LED driver;

(7) By analogy, the nth level LED driver sequentially receives the nth to Lth valid data frame timings sent by the n-1th level LED driver, and analyzes the nth valid data frame timing, and converts the nth valid data frame N valid data in the frame timing are sequentially put into the memory space with the start address as the first address, and the memory addresses are accumulated; while receiving the N valid data in the nth valid data frame timing and the timing of the end mark in turn, the nth LED The driver sequentially sends N+1 invalid timings to the output communication port to the n+1th level LED driver. Since the communication registers of the n+1th level to the Lth level LED driver are in non-through mode, the n+1th level to the Lth level LED driver The level LED driver receives N+1 invalid timings synchronously; when the nth level LED driver receives the end mark timing in the nth valid data frame timing, the communication mode register of the nth level LED driver is set to the direct mode, and the first level The n-level LED driver sends the n+1th to the Lth effective data frame timing and reset timing sent by the LED controller to the output communication port of the n-level LED driver in sequence; n=n+1, n is greater than 2 and For integers less than L-1, repeat step (7).

The beneficial effects of the present invention are: the data communication method of the LED display system realized by the single-wire bus of the present invention has the advantages of high communication efficiency, flexible control and good synchronization effect.

Description of drawings

Figure 1 shows the existing LED display system

Figure 2 is the communication protocol of the existing LED display system

Fig. 3 is the LED display system realized by single-wire bus in the present invention

Fig. 4 is the sequence diagram of all data receiving communication proposed by the present invention

Fig. 5 is the sequence diagram of data serial receiving communication proposed by the present invention

Fig. 6 is a timing diagram of logic 0/1 in the LED display system communication protocol of the embodiment of the present invention

Fig. 7 is a timing diagram of 8 timings in the communication protocol of the LED display system according to the embodiment of the present invention

Fig. 8 is a schematic diagram of the data input of each LED driver in the all-data communication proposed by the present invention

Fig. 9 is a schematic diagram of the data input of each LED driver in the data serial reception communication proposed by the present invention

Detailed ways

An LED display system implemented by a single-wire bus, as shown in Figure 3, includes an LED controller (3) and an L-level LED driver (21-2L):

The LED controller (3) includes an output communication port (30);

The LED driver includes an input communication port (DIN) and an output communication port (DOUT);

The output communication port (30) of the LED controller (3) is connected to the input communication port (DIN) of the first-level LED driver (21), and the output communication port (DOUT) of the first-level LED driver (21) is connected in series to the second-level LED driver ( 22) Input communication port (DIN), and so on, the output communication port (DOUT) of the previous stage LED driver is connected in series with the input communication port (DIN) of the current stage LED driver, and the output communication port (DOUT) of the current stage LED driver is connected in series The first-level LED driver input communication port (DIN), the L-level LED driver (21-2L) are sequentially connected in series, and the last-level LED driver output communication port (DOUT) is suspended;

The LED driver includes a communication mode register: when the communication mode register value is 0, it is a direct mode, and the LED driver sends the timing received by the input communication port (DIN) to the LED driver output communication port (DOUT) at the same time; the communication mode When the register value is 1, it is non-through mode, and the LED driver generates the output of its output communication port according to the received command.

The LED driver also includes a memory for storing control information and display information sent to the LED driver by the LED controller (3).

The data communication method of the above-mentioned LED display system includes all data receiving communication and/or data serial receiving communication:

The LED controller (3) sends data to the L-level LED driver (21-2L), and the L-level LED driver synchronously puts the received data into the designated memory space of all LED drivers according to the instruction, so as to realize the communication of all data received, and the LED controller ( 3) The communication timing sequence of sending out all received data, as shown in Figure 4, consists of the following timing sequences in sequence: reset timing sequence, reset end timing sequence, all receiving instruction timing sequence, start address timing sequence, M valid data timing sequence, end flag timing sequence, reset timing sequence ;

The M valid data timings are composed of M consecutive valid data timings.

The LED controller (3) sends data to the L-level LED driver (21-2L), and the L-level LED driver receives the data sent by the LED controller (3) in sequence according to the instruction, and puts the received data into the designated memory of each LED driver Space, to realize data serial reception communication, as shown in Figure 5, consists of the following sequence in sequence: reset sequence, reset end sequence, serial receive instruction sequence, start address sequence, L valid data frame sequence, reset sequence.

The L valid data frame timings are composed of L continuous valid data frame timings, and the valid data frame timings are composed of N consecutive valid data timing sequences and 1 end mark timing;

The first-level LED driver receives the first valid data frame sequence belonging to the LED driver from the LED controller, puts the received data into the designated memory space, and outputs the communication port to it when receiving the first valid data frame sequence Send the invalid timing synchronously, and then continue to send the second to the L valid data frame timing and reset timing to its output communication port;

The second-level LED driver receives the timing sent by the output communication port of the first-level LED driver, analyzes the timing of the second valid data frame belonging to the LED driver and puts the received data into the designated memory space, and receives the second When the timing of the valid data frame is valid, the invalid timing is sent synchronously to its output communication port, and then the 3rd to the Lth valid data frame timing and reset timing are continued to be sent to the output communication port;

By analogy, the nth level LED driver receives the timing sent by the output communication port of the n-1th level LED driver, parses the timing of the nth effective data frame belonging to the LED driver and puts the received data into the designated memory space, And when receiving the nth valid data frame timing, synchronously send the invalid timing sequence to its output communication port, and then continue to send the n+1th to Lth valid data frame timing and reset timing sequence to its output communication port.

In this embodiment, the reset sequence length is 8 bits or more, and the reset end sequence, all receive instruction sequence, serial receive instruction sequence, start address sequence, valid data sequence, end flag sequence, and invalid sequence sequence have fixed lengths. 8 bits, each bit can only be logic 0 or logic 1, the high/low level duty ratio is 1:3 means logic 0, the high/low level duty ratio is 3:1 means logic 1, as shown in Figure 6 Show.

As shown in Figure 7, each timing is defined as follows:

Reset sequence (RESET), coded as 00...00 (8 0s, or greater than 8 0s); its function is to complete the reset function of the LED driver receiving the reset sequence, and set the communication mode register of the LED driver to the direct mode;

The reset end sequence (RESET_END), coded as 0000_0001, can only be used after the reset sequence; its function indicates the end of reset;

All receive command sequence (IR_RX_ALL), encoded as 0001_1111, used to indicate that this communication is data all receive communication;

Serial receiving command sequence (IR_RX_S), coded as 0010_1111, used to indicate that this communication is data serial receiving communication;

Start address timing (ADDS), coded as 1XXX_XXXX (X means it can be either 0 or 1, the same below), used to indicate the start of the address space corresponding to the LED driver memory that receives the timing of the data that needs to be transferred in the instruction Address, the last 7 bits represent the address information;

Effective data timing (Data), coded as 1XXX_XXXX, used to indicate the data to be transmitted in the instruction, and the last 7 bits indicate the data information;

End mark sequence (END), encoded as 0000_0010, the LED driver receives the end mark byte to indicate the end of the current valid data sequence;

Invalid timing (Noneffect), coded as 0111_1111, this byte can be inserted after reset end timing, all receive command timing, serial receive command timing, start address, valid data timing or end mark timing, LED driver receives invalid command word section, do not do any processing.

After the LED display system implemented by the single-wire bus is powered on, the initial communication is performed, and the steps are as follows:

(1) The LED controller (3) sends out at least L reset sequences, and after the first-stage LED driver (21) receives the reset sequences, it sets the communication mode register to a straight-through mode, and the first-stage LED driver (21) will receive The timing is sent to the output communication port at the same time;

(2) After the second-level LED driver (22) receives the reset sequence, the communication mode register is set to the direct mode, and the second-level LED driver (22) sends the received sequence to the output communication port at the same time; and so on, After receiving the reset sequence of the previous LED driver, the LED drivers at all levels set the communication mode register to the through mode, and send the received sequence to the output communication port at the same time, until all LED drivers set the communication mode register to the through mode model.

The communication steps of the data all-receiving communication are as shown in FIG. 8:

(1) After the LED display system implemented by the single-wire bus performs system initialization communication, the communication mode register of each LED driver is set to the direct mode;

(2) The LED controller (3) sequentially sends out reset timing, reset end timing, all-receive instruction timing, start address timing, M effective data frame timing, end flag timing, and reset timing;

(3) While performing step (1), the first-level LED driver synchronously receives reset timing, reset end timing, all-receive instruction timing, start address timing, M valid data frame timing, end flag timing, and reset timing.

(4) Since the communication mode register of each LED driver is set to the direct mode, while performing step (1), the nth level LED driver synchronously receives the n-1 level driver in sequence from the output communication port of the n-1 level LED driver The transmitted reset timing, reset end timing, all receive instruction timing, start address timing, M valid data frame timing, end flag timing, and reset timing, n is an integer greater than 1 and less than L-1.

When the LED drivers at all levels receive the start address timing, the LED drivers (21-2L) at all levels receive and analyze the start address timing, and prepare to receive M valid data timings;

When each LED driver (21-2L) receives M valid data sequences, it analyzes the M valid data sequences, accumulates the memory addresses, and sequentially puts the M valid data into the memory space whose starting address is the first address.

The communication steps of the data serial reception communication are, as shown in Figure 9:

(1) After the LED display system implemented by the single-wire bus performs system initialization communication, the communication mode register of each LED driver is set to the direct mode;

(2) The LED controller (3) sequentially sends out the reset sequence, the reset end sequence, the serial receiving instruction sequence, and the start address sequence;

(3) While performing step (2), since the communication mode registers of each LED driver are set to direct mode, LED drivers at all levels receive reset timing, reset end timing, serial instruction timing, and start address timing synchronously. The driver sets the respective communication mode registers to non-straight-through mode after receiving the start address sequence;

(4) The LED controller sequentially sends the first to the L effective data frame timing and reset timing;

(5) While performing step (4), the first-level LED driver sequentially receives the timing sequence of L valid data frames sent by the LED controller (3), and analyzes the timing sequence of the first valid data frame, and converts the first valid data frame N valid data in the timing sequence are put into the memory space with the start address as the first address, and the memory address is accumulated; while receiving the N valid data timing sequence and the end mark timing sequence in the first valid data frame sequence sequentially, the first level LED The driver (21) sequentially sends N+1 invalid timings to the output communication port to the second-level LED driver. Since the communication registers of the second-level to L-level LED drivers are in non-straight-through mode, the second-level to L-level LED drivers Synchronously receive N+1 invalid timings sequentially; when the first-level LED driver receives the end flag timing in the first valid data frame timing, set the communication mode register of the first-level LED driver to the direct mode, and at the same time the first The first-level LED driver sends the second to Lth effective data frame timing and reset timing sent by the LED controller to the output communication port of the first-level LED driver in sequence;

(6) The second-level LED driver sequentially receives the timing of the second to L valid data frames sent by the first-level LED driver, and analyzes the timing of the second valid data frame, and converts the timing of N effective data frames in the second valid data frame The data is put into the memory space with the start address as the first address in turn, and the memory address is accumulated; while receiving the N valid data and the end mark timing in the second valid data frame sequentially, the second-level LED driver (22) sequentially Send N+1 invalid timings to the output communication port to the third-level LED driver. Since the communication registers of the third-level to L-level LED drivers are in non-through mode, the third-level to L-level LED drivers receive N+1 synchronously. an invalid timing; when the second-level LED driver receives the end flag timing in the second valid data frame timing, set the communication mode register of the second-level LED driver to the direct mode, and the second-level LED driver will control the LED The 3rd to Lth effective data frame timing and reset timing sent by the device are sent to the output communication port of the second-level LED driver in sequence;

(7) By analogy, the nth level LED driver sequentially receives the nth to Lth valid data frame timings sent by the n-1th level LED driver, and analyzes the nth valid data frame timing, and converts the nth valid data frame N valid data in the frame timing are sequentially put into the memory space with the start address as the first address, and the memory addresses are accumulated; while receiving the N valid data in the nth valid data frame timing and the timing of the end mark in turn, the nth LED The driver (2n) sequentially sends N+1 invalid timings to the output communication port to the n+1th level LED driver. Since the communication registers of the n+1th level to the L-th level LED driver are in non-through mode, the n+1st level When the L-th LED driver receives N+1 invalid timings synchronously; when the n-th LED driver receives the end flag timing in the n-th valid data frame timing, set the communication mode register of the n-th LED driver to the direct mode , at the same time, the nth-level LED driver sends the n+1th to the Lth effective data frame timing and reset timing sent by the LED controller to the output communication port of the nth-level LED driver in sequence; n=n+1, n is For an integer greater than 2 and less than L-1, repeat step (7).

It should be understood that the above-mentioned embodiments are only descriptions of the present invention, rather than limitations of the present invention, and any inventions that do not exceed the spirit of the present invention fall within the protection scope of the present invention.

Claims (11)

1. The communication method of the LED display system, wherein the LED display system includes: an LED controller and an L-level LED driver; The LED controller includes an output communication port; The LED driver includes an input communication port and an output communication port; The output communication port of the LED controller is connected to the input communication port of the first-level LED driver, and the output communication port of the first-level LED driver is connected to the input communication port of the second-level LED driver in series, and so on. The input communication port of the first-level LED driver, the output communication port of the current-level LED driver is connected in series to the input communication port of the next-level LED driver, the L-level LED drivers are connected in series in sequence, and the output communication port of the last-level LED driver is suspended; The LED driver includes a communication mode register: the communication mode register has two states: straight-through mode and non-through-through mode. When in the straight-through mode, the LED driver simultaneously sends the timing received by the input communication port to the output communication port of the LED driver ;When in the non-through mode, the LED driver generates the output of its output communication port according to the received command; The LED driver also includes a memory for storing control information and display information sent by the LED controller to the LED driver; It is characterized in that the data communication method of the above-mentioned LED display system includes all data receiving communication and/or data serial receiving communication: The LED controller sends data to the L-level LED driver, and the L-level LED driver synchronously puts the received data into the designated memory space of all LED drivers according to the instruction to realize all-data communication. The timing of all-data communication sent by the LED controller is as follows The timing is composed in turn: reset timing, reset end timing, all receive instruction timing, start address timing, M valid data timing, end flag timing, reset timing; The LED controller sends data to the L-level LED driver, and the L-level LED driver receives the data sent by the LED controller in turn according to the instructions, and puts the received data into the designated memory space of each LED driver to realize data serial communication. The LED controller The sent data serial reception communication timing is composed of the following timing sequences in sequence: reset timing, reset end timing, serial receiving instruction timing, start address timing, L effective data frame timing, and reset timing; The L valid data frame timings are composed of L continuous valid data frame timings, and the valid data frame timings are composed of N consecutive valid data timing sequences and 1 end mark timing; The first-level LED driver receives the first valid data frame sequence belonging to the LED driver from the LED controller, puts the received data into the designated memory space, and outputs the communication port to it when receiving the first valid data frame sequence Send the invalid timing synchronously, and then continue to send the second to the L valid data frame timing and reset timing to its output communication port; The second-level LED driver receives the timing sent by the output communication port of the first-level LED driver, analyzes the timing of the second valid data frame belonging to the LED driver and puts the received data into the designated memory space, and receives the second When the timing of the valid data frame is valid, the invalid timing is sent synchronously to its output communication port, and then the 3rd to the Lth valid data frame timing and reset timing are continued to be sent to the output communication port; By analogy, the nth level LED driver receives the timing sent by the output communication port of the n-1th level LED driver, parses the timing of the nth effective data frame belonging to the LED driver and puts the received data into the designated memory space, And when receiving the nth valid data frame timing, synchronously send the invalid timing sequence to its output communication port, and then continue to send the n+1th to Lth valid data frame timing and reset timing sequence to its output communication port. 2. The communication method of the LED display system according to claim 1, wherein the M valid data sequences are composed of M continuous valid data sequences. 3. The communication method of LED display system as claimed in claim 1, characterized in that: Reset timing, its function is to complete the reset function of the LED driver receiving the reset timing, and set the communication mode register of the LED driver to the direct mode; The reset end sequence can only be used after the reset sequence; its function indicates the end of reset; The sequence of the all-receive command is used to indicate that the communication is a data-receive communication; The sequence of serial receiving instructions is used to indicate that the communication is data serial receiving communication; The start address sequence is used to indicate the start address of the address space corresponding to the LED driver memory that receives the sequence of data that needs to be transferred in the instruction; Effective data timing, used to represent the data that needs to be transferred in the instruction; End mark sequence, the LED driver receives the end mark byte to indicate the end of the current effective data sequence; Invalid timing, this byte can be inserted after reset end timing, all receive command timing, serial receive command timing, start address, valid data timing or end mark timing, LED driver receives invalid timing and does not do any processing. 4. The communication method of LED display system as claimed in claim 1, characterized in that the communication step of said data receiving communication is: (1) After the LED display system implemented by the single-wire bus performs initial communication, the communication mode register of each LED driver is set to the direct mode; (2) The LED controller sequentially sends out reset timing, reset end timing, all-receive instruction timing, start address timing, M effective data frame timing, end flag timing, and reset timing; (3) While performing step (2), the first-level LED driver synchronously receives reset timing, reset end timing, all-receive instruction timing, start address timing, M valid data frame timing, end flag timing, and reset timing; (4) Since the communication mode register of each LED driver is set to the direct mode, while performing step (2), the nth level LED driver synchronously receives the n-1 level driver in sequence from the output communication port of the n-1 level LED driver The transmitted reset timing, reset end timing, all received instruction timing, start address timing, M valid data frame timing, end flag timing, reset timing, n is an integer greater than 1 and less than L-1; When the LED drivers at all levels receive the start address sequence, the LED drivers at all levels receive and analyze the start address sequence, and prepare to receive M valid data sequences; When the LED drivers at all levels receive M valid data sequences, they analyze the M valid data sequences, accumulate the memory addresses, and put the M valid data sequentially into the memory space whose address starts with the start address. 5. The communication method of the LED display system according to claim 1, wherein the communication steps of the data serial communication are as follows: (1) After the LED display system implemented by the single-wire bus performs initial communication, the communication mode register of each LED driver is set to the direct mode; (2) The LED controller sends out the reset sequence, the reset end sequence, the serial receiving command sequence, and the start address sequence in sequence; (3) While performing step (2), since the communication mode registers of each LED driver are set to direct mode, LED drivers at all levels receive reset timing, reset end timing, serial instruction timing, and start address timing synchronously. The driver sets the respective communication mode registers to non-straight-through mode after receiving the start address sequence; (4) The LED controller sequentially sends the first to the L effective data frame timing and reset timing; (5) While performing step (4), the first-level LED driver sequentially receives the timing sequence of L valid data frames sent by the LED controller, and analyzes the timing sequence of the first valid data frame, and converts the timing sequence of the first valid data frame into N The valid data are sequentially put into the memory space with the start address as the first address, and the memory addresses are accumulated; while receiving the N valid data timing and the end mark timing in the first valid data frame sequentially, the first-level LED driver sequentially sends out N+1 invalid timings are sent to the output communication port for the second-level LED driver. Since the communication registers of the second-level to L-level LED drivers are in non-through mode, the second-level to L-level LED drivers receive N+1 sequentially synchronously An invalid sequence; when the first stage LED driver receives the end flag sequence in the first valid data frame sequence, set the communication mode register of the first stage LED driver to the direct mode, and the first stage LED driver will control the LED The second to L effective data frame timings and reset timings sent by the device are sent to the output communication port of the first-level LED driver in sequence; (6) The second-level LED driver sequentially receives the timing of the second to L valid data frames sent by the first-level LED driver, and analyzes the timing of the second valid data frame, and converts the timing of N effective data frames in the second valid data frame The data is sequentially put into the memory space with the start address as the first address, and the memory addresses are accumulated; while receiving the N valid data in the second valid data frame timing sequence and the end mark timing sequence, the second-level LED driver sequentially sends out N+ 1 invalid sequence to the output communication port for the third-level LED driver, since the communication registers of the third-level to L-level LED drivers are in non-through mode, the third-level to L-level LED drivers receive N+1 synchronously Invalid timing; when the second-level LED driver receives the end flag timing in the second valid data frame timing, set the communication mode register of the second-level LED driver to direct mode, and at the same time, the second-level LED driver sets the LED controller The 3rd to L valid data frame timings and reset timings are sent to the output communication port of the second-level LED driver in sequence; (7) By analogy, the nth level LED driver sequentially receives the nth to Lth valid data frame timings sent by the n-1th level LED driver, and analyzes the nth valid data frame timing, and converts the nth valid data frame N valid data in the frame timing are sequentially put into the memory space with the start address as the first address, and the memory address is accumulated; while receiving the N valid data in the nth valid data frame timing and the timing of the end mark in turn, the nth LED The driver sequentially sends N+1 invalid timings to the output communication port to the n+1th level LED driver. Since the communication registers of the n+1th level to the Lth level LED driver are in non-through mode, the n+1th level to the Lth level LED driver The level LED driver receives N+1 invalid timings synchronously; when the nth level LED driver receives the end mark timing in the nth valid data frame timing, the communication mode register of the nth level LED driver is set to the direct mode, and the first level The n-level LED driver sends the n+1th to the Lth effective data frame timing and reset timing sent by the LED controller to the output communication port of the n-level LED driver in sequence; n=n+1, n is greater than 2 and Integers less than L-1, repeat step (7). 6. The communication method of LED display system as claimed in claim 4 or 5, characterized in that the initialization communication step is: (1) The LED controller sends out at least L reset timing sequences. After receiving the reset timing sequences, the first-level LED driver sets the communication mode register to the direct mode, and the first-level LED driver simultaneously sends the received timing sequences to the output communication port; (2) After the second-level LED driver receives the reset sequence, it sets the communication mode register to the direct mode, and the second-level LED driver sends the received sequence to the output communication port at the same time; and so on, all levels of LED drivers receive After the reset sequence of the previous LED driver, set the communication mode register to the direct mode, and send the received sequence to the output communication port at the same time, until all LED drivers set the communication mode register to the direct mode. 7. A communication method for an LED display system, wherein the LED display system includes: an LED controller and an L-level LED driver; The LED controller includes an output communication port; The LED driver includes an input communication port and an output communication port; The output communication port of the LED controller is connected to the input communication port of the first-level LED driver, and the output communication port of the first-level LED driver is connected to the input communication port of the second-level LED driver in series, and so on. The input communication port of the first-level LED driver, the output communication port of the current-level LED driver is connected in series to the input communication port of the next-level LED driver, the L-level LED drivers are connected in series in sequence, and the output communication port of the last-level LED driver is suspended; The LED driver includes a communication mode register: the communication mode register has two states: straight-through mode and non-through-through mode. When in the straight-through mode, the LED driver simultaneously sends the timing received by the input communication port to the output communication port of the LED driver ;When in the non-through mode, the LED driver generates the output of its output communication port according to the received command; The LED driver also includes a memory for storing control information and display information sent by the LED controller to the LED driver; It is characterized in that the data communication method of the above-mentioned LED display system includes all data receiving communication and/or data serial receiving communication: The LED controller sends data to the L-level LED driver, and the L-level LED driver synchronously puts the received data into the designated memory space of all LED drivers according to the instruction to realize all-data communication. The timing of all-data communication sent by the LED controller is as follows The timing is composed in turn: reset timing, reset end timing, all receive instruction timing, start address timing, M valid data timing, end flag timing, reset timing; The LED controller sends data to the L-level LED driver, and the L-level LED driver receives the data sent by the LED controller in turn according to the instructions, and puts the received data into the designated memory space of each LED driver to realize data serial communication. The LED controller The sent data serial reception communication timing is composed of the following timing sequences in sequence: reset timing, reset end timing, serial receiving instruction timing, start address timing, L effective data frame timing, and reset timing; The communication steps of the data serial reception communication are: (1) After the LED display system implemented by the single-wire bus performs initial communication, the communication mode register of each LED driver is set to the direct mode; (2) The LED controller sends out the reset sequence, the reset end sequence, the serial receiving command sequence, and the start address sequence in sequence; (3) While performing step (2), since the communication mode registers of each LED driver are set to direct mode, LED drivers at all levels receive reset timing, reset end timing, serial instruction timing, and start address timing synchronously. The driver sets the respective communication mode registers to non-straight-through mode after receiving the start address sequence; (4) The LED controller sequentially sends the first to the L effective data frame timing and reset timing; (5) While performing step (4), the first-level LED driver sequentially receives the timing sequence of L valid data frames sent by the LED controller, and analyzes the timing sequence of the first valid data frame, and converts the timing sequence of the first valid data frame into N The valid data are put into the memory space with the starting address as the first address in turn, and the memory addresses are accumulated; while receiving the N valid data timing and the end mark timing in the first valid data frame sequentially, the first-level LED driver sequentially sends Send out N+1 invalid timing sequences to the output communication port to the second-level LED driver. Since the communication registers of the second-level to L-level LED drivers are in non-through mode, the second-level to L-level LED drivers receive N+ sequentially synchronously. 1 invalid timing; when the first stage LED driver receives the end flag timing in the first valid data frame timing, set the communication mode register of the first stage LED driver to the direct mode, and the first stage LED driver will LED The second to L effective data frame timings and reset timings sent by the controller are sequentially sent to the output communication port of the first-level LED driver; (6) The second-level LED driver sequentially receives the timing of the second to L valid data frames sent by the first-level LED driver, and analyzes the timing of the second valid data frame, and converts the timing of N valid data frames in the second valid data frame The data is sequentially put into the memory space with the start address as the first address, and the memory addresses are accumulated; while receiving the N valid data and the end mark timing in the second valid data frame sequentially, the second-level LED driver sequentially sends out N+ 1 invalid sequence to the output communication port for the third-level LED driver, since the communication registers of the third-level to L-level LED drivers are in non-through mode, the third-level to L-level LED drivers receive N+1 invalid timing synchronously ; When the second-level LED driver receives the end flag timing in the second valid data frame timing, set the communication mode register of the second-level LED driver to the direct mode, and at the same time, the second-level LED driver sends the LED controller. The 3rd to L effective data frame timing and reset timing are sequentially sent to the output communication port of the second-level LED driver; (7) By analogy, the nth level LED driver sequentially receives the nth to Lth valid data frame timings sent by the n-1th level LED driver, and analyzes the nth valid data frame timing, and converts the nth valid data frame N valid data in the frame timing are sequentially put into the memory space with the start address as the first address, and the memory addresses are accumulated; while receiving the N valid data in the nth valid data frame timing and the timing of the end mark in turn, the nth LED The driver sequentially sends N+1 invalid timings to the output communication port to the n+1th level LED driver. Since the communication registers of the n+1th level to the Lth level LED driver are in non-through mode, the n+1th level to the Lth level LED driver The level LED driver receives N+1 invalid timings synchronously; when the nth level LED driver receives the end mark timing in the nth valid data frame timing, the communication mode register of the nth level LED driver is set to the direct mode, and the first level The n-level LED driver sends the n+1th to the Lth effective data frame timing and reset timing sent by the LED controller to the output communication port of the n-level LED driver in sequence; n=n+1, n is greater than 2 and Integers less than L-1, repeat step (7). 8. The communication method of the LED display system according to claim 7, wherein the M valid data sequences are composed of M continuous valid data sequences. 9. The communication method of LED display system as claimed in claim 7, characterized in that: Reset timing, its function is to complete the reset function of the LED driver receiving the reset timing, and set the communication mode register of the LED driver to the direct mode; The reset end sequence can only be used after the reset sequence; its function indicates the end of reset; The sequence of the all-receive command is used to indicate that the communication is a data-receive communication; The sequence of serial receiving instructions is used to indicate that the communication is data serial receiving communication; The start address sequence is used to indicate the start address of the address space corresponding to the LED driver memory that receives the sequence of data that needs to be transferred in the instruction; Effective data timing, used to represent the data that needs to be transferred in the instruction; End mark sequence, the LED driver receives the end mark byte to indicate the end of the current effective data sequence; Invalid timing, this byte can be inserted after reset end timing, all receive command timing, serial receive command timing, start address, valid data timing or end mark timing, LED driver receives invalid timing and does not do any processing. 10. The communication method of LED display system as claimed in claim 7, characterized in that the communication steps of the all-data-collection communication are: (1) After the LED display system implemented by the single-wire bus performs initial communication, the communication mode register of each LED driver is set to the direct mode; (2) The LED controller sequentially sends out reset timing, reset end timing, all-receive instruction timing, start address timing, M effective data frame timing, end flag timing, and reset timing; (3) While performing step (2), the first-level LED driver synchronously receives reset timing, reset end timing, all-receive instruction timing, start address timing, M valid data frame timing, end flag timing, and reset timing; (4) Since the communication mode register of each LED driver is set to the direct mode, while performing step (2), the nth level LED driver synchronously receives the n-1 level driver in sequence from the output communication port of the n-1 level LED driver The transmitted reset timing, reset end timing, all received instruction timing, start address timing, M valid data frame timing, end flag timing, reset timing, n is an integer greater than 1 and less than L-1; When the LED drivers at all levels receive the start address sequence, the LED drivers at all levels receive and analyze the start address sequence, and prepare to receive M valid data sequences; When the LED drivers at all levels receive M valid data sequences, they analyze the M valid data sequences, accumulate the memory addresses, and put the M valid data sequentially into the memory space whose address starts with the start address. 11. The communication method of LED display system as claimed in claim 7 or 10, characterized in that the initialization communication step is: (1) The LED controller sends out at least L reset timing sequences. After receiving the reset timing sequences, the first-level LED driver sets the communication mode register to the direct mode, and the first-level LED driver simultaneously sends the received timing sequences to the output communication port; (2) After the second-level LED driver receives the reset sequence, it sets the communication mode register to the direct mode, and the second-level LED driver sends the received sequence to the output communication port at the same time; and so on, all levels of LED drivers receive After the reset sequence of the previous LED driver, set the communication mode register to the direct mode, and send the received sequence to the output communication port at the same time, until all LED drivers set the communication mode register to the direct mode. the

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