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CN101908357B - Correction circuit and method for data recovery - Google Patents

Correction circuit and method for data recovery Download PDF

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Publication number
CN101908357B
CN101908357B CN2009101413405A CN200910141340A CN101908357B CN 101908357 B CN101908357 B CN 101908357B CN 2009101413405 A CN2009101413405 A CN 2009101413405A CN 200910141340 A CN200910141340 A CN 200910141340A CN 101908357 B CN101908357 B CN 101908357B
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signal
amplitude
data
period
circuit
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CN101908357A (en
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吴声宏
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Novatek Microelectronics Corp
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Novatek Microelectronics Corp
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Abstract

A correction circuit and method for data recovery, the correction circuit includes an amplitude detection circuit, a period detection circuit and a compensation circuit. The amplitude detection circuit samples a plurality of amplitudes of the data signal based on the zero-crossing point signal and outputs an amplitude signal. The period detection circuit samples the clock signal according to the zero-crossing point signal and outputs a period signal. The compensation circuit receives the amplitude signal, the periodic signal and the data signal, adjusts the phase of the data signal by calculating the difference between the amplitude signal and the periodic signal and the standard signal, and outputs a calibration data signal. Therefore, the invention can correct the data signal in real time and can increase the identification rate of the data signal.

Description

Correcting circuit and method that data are recovered
Technical field
The present invention relates to correcting circuit and method that a kind of data are recovered, and be particularly related to a kind of correcting circuit and method that is applicable to the data recovery of optical memory system.
Background technology
General optical memory system, for example comprise CD (compact disks, CDs) or digital diversified CD (digital versatile disks; Laser CD such as DVDs); The use cd-rom drive (opticaldisc drive, ODD), the operating period of its storage data of regenerating; The disc drives chance is sent laser light in the laser light panel surface, and reads the signal that is reflected by the laser light panel surface.The signal that the laser light panel surface is read is radio frequency (radio frequency; RF) signal; Therefore comprising the non-linear channels, symbol intersymbol interference (the inter-symbol interference that have when defocusing; ISI), electrical delay, a large amount of surperficial scratches of producing back ejection formation aging or recording medium of dyestuff on the pit on the recording medium, recording medium etc., and cause identification bad, and read out distortion data.
In detail, will convert electric signal into from the light that the laser CD is reflected, and the form with binary bit is come regenerate electrical signals via signal Processing.Come regeneration RF signal according to mark that is recorded in all lengths on the laser CD or space, and phase place and the level that must accurately detect radiofrequency signal are to obtain reliable binary bit.
In order to recover the numerical data of original storage from distortion data, generally speaking, known PRML (partial response maximum likelihood) technology is a kind of main means.(partial response, PR) method correct level error is to form the numerical data that can carry out data manipulation on it in wherein partial response.By use maximum likelihood (maximum likelihood, ML) Viterbi of method (Viterbi) decoding mechanism is decoded as the numerical data of original storage with formed numerical data, and therefore its on a bit basis through error correction.The method can be in order to increasing the reliability of radiofrequency signal, but the method will increase difficulty in the design and the complexity that realizes this hardware, and the while is more expended many system resources.
Summary of the invention
In view of this; The correcting circuit that the present invention provides a kind of data to recover; Through the amplitude and the cycle of analysis data-signal, and, can revise this data-signal immediately with its comparison amplitude and the reference value in cycle; Can increase the recognition rate of data-signal, wherein this data-signal can be a radiofrequency signal through cutter (slicer).
The bearing calibration that the present invention provides a kind of data to recover through the amplitude and the cycle of analysis data-signal, and with its comparison amplitude and the reference value in cycle, can be revised this data-signal immediately, can increase the recognition rate of data-signal.
The present invention proposes the correcting circuit that a kind of data are recovered, and comprises amplitude detecting circuit, cycle detection circuit and compensating circuit.Amplitude detecting circuit receives data-signal and zero crossover point (zero-cross) signal, and takes a sample according to a plurality of amplitudes of zero crossover point data signal signal, and the output amplitude signal.The cycle detection circuit receives zero crossover point signal and clock signal, and based on zero crossover point signal clock signal is taken a sample, and the output periodic signal.Compensating circuit receives amplitude signal, periodic signal and data-signal, through calculating the difference of amplitude signal and periodic signal and standard signal, the phase place of adjustment data-signal, and output calibration data signal.
In an example embodiment of the present invention, above-mentioned compensating circuit comprises statistic unit and amending unit.Wherein, Statistic unit couples amplitude detecting circuit; And statistic unit is preset a standard signal; This standard signal comprises a plurality of amplitude reference values and a plurality of cycle reference value, in order to from these amplitude reference values, selecting the amplitude reference value the most close with amplitude signal, and interleaves and exports in these cycle reference values and the corresponding cycle reference value of this amplitude signal.Amending unit couples statistic unit and cycle detection circuit, and receiving cycle signal and cycle reference value use producing first compensating parameter, use the phase place of first compensating parameter adjustment data-signal, and output calibration data signal.
In an example embodiment of the present invention, above-mentioned amending unit comprises computing unit and phasing unit.Wherein, computing unit couples statistic unit and cycle detection circuit, in order to receiving cycle signal and cycle reference value, and the difference value of computation period signal and cycle reference value, difference value multiply by preset multiple, use producing first compensating parameter.Phasing unit couples computing unit, uses the zero-time and the concluding time of the first compensating parameter adjustment cycle signal, uses the phase place of adjustment data-signal, output calibration data signal.
In an example embodiment of the present invention, above-mentioned compensating circuit comprises statistic unit and amending unit.Wherein, Statistic unit couples the cycle detection circuit; And statistic unit is preset a standard signal; This standard signal comprises a plurality of amplitude reference values and a plurality of cycle reference value, in order to from these cycle reference values, selecting the cycle reference value the most close with periodic signal, exports in these amplitude reference values and the corresponding amplitude reference value of this periodic signal to interleave.Amending unit couples statistic unit and amplitude detecting circuit, receives amplitude signal and amplitude reference value, uses producing second compensating parameter, uses the phase place of second compensating parameter adjustment data-signal, and output calibration data signal.
In an example embodiment of the present invention, above-mentioned amending unit comprises computing unit and phasing unit.Wherein, computing unit couples statistic unit and amplitude detecting circuit, in order to reception amplitude signal and amplitude reference value, and the difference value of calculating amplitude signal and amplitude reference value, difference value multiply by preset multiple, use producing second compensating parameter.Phasing unit couples computing unit, uses the zero-time and the concluding time of the second compensating parameter adjustment cycle signal, uses the phase place of adjustment data-signal, output calibration data signal.
In an example embodiment of the present invention, the correcting circuit that above-mentioned data are recovered also comprises clipper circuit and phase-locked loop.Wherein, clipper circuit received RF signal and clipping level, according to clipping level cutting radiofrequency signal, and outputting data signals and zero crossover point signal.The phase-locked loop couples clipper circuit, receives and according to data-signal and clock signal.
In an example embodiment of the present invention, the correcting circuit that above-mentioned data are recovered also comprises the Bit String flow generator.The Bit String flow generator couples compensating circuit, exports after receiving the calibration data signal and converting the bit crossfire to.
The present invention proposes the bearing calibration that a kind of data are recovered.The method is taken a sample according to the amplitude of zero crossover point data signal signal, and obtains amplitude signal.In addition, based on zero crossover point signal-count clock signal, and obtain periodic signal.Then, through calculating the difference of amplitude signal and periodic signal and standard signal, adjust the phase place of data-signal and obtain the calibration data signal.
In an example embodiment of the present invention, the step of above-mentioned acquisition calibration data signal comprises provides standard signal, standard signal to comprise a plurality of amplitude reference values and a plurality of cycle reference value; From these amplitude reference values, select the amplitude reference value the most close with amplitude signal; Search or interleave out in these cycle reference values and the corresponding cycle reference value of amplitude signal according to selecteed this amplitude reference value.Then, computation period signal and the cycle reference value searching or interleave out to produce first compensating parameter, use the phase place of first compensating parameter adjustment data-signal then, with acquisition calibration data signal.
In an example embodiment of the present invention, the step of above-mentioned generation first compensating parameter comprises the difference value of computation period signal and the cycle reference value searching or interleave out, and difference value multiply by preset multiple to produce first compensating parameter.In an example embodiment of the present invention; The phase place of above-mentioned use first compensating parameter adjustment data-signal and the step that obtains the calibration data signal comprises: the zero-time and the concluding time of using the first compensating parameter adjustment cycle signal; Use the phase place of adjustment data-signal, obtain the calibration data signal.
In an example embodiment of the present invention, the step of above-mentioned acquisition calibration data signal comprises provides standard signal, standard signal to comprise a plurality of amplitude reference values and a plurality of cycle reference value; From these cycle reference values, select the cycle reference value the most close with periodic signal; Should the cycle reference value search or interleave out in these amplitude reference values and the corresponding amplitude reference value of periodic signal according to selecteed.Then, calculate amplitude signal and the amplitude reference value searching or interleave out, to produce second compensating parameter; And the phase place of using second compensating parameter adjustment data-signal, to obtain the calibration data signal.
In an example embodiment of the present invention, the step of above-mentioned generation second compensating parameter comprises the difference value of calculating amplitude signal and the amplitude reference value searching or interleave out; And difference value multiply by preset multiple, to produce second compensating parameter.In an example embodiment of the present invention; The phase place of above-mentioned use second compensating parameter adjustment data-signal comprises with the step that obtains the calibration data signal: the zero-time and the concluding time of using the second compensating parameter adjustment cycle signal; Use the phase place of adjustment data-signal, obtain the calibration data signal.
In an example embodiment of the present invention, the bearing calibration that above-mentioned data are recovered also comprises according to clipping level cutting radiofrequency signal, to obtain data-signal and zero crossover point signal.Then, according to the phase place of data-signal and clocking.
In an example embodiment of the present invention, the bearing calibration that above-mentioned data are recovered also comprises converting the calibration data-signal to the bit crossfire.
Based on above-mentioned, the present invention can be in order to increasing the reliability of radiofrequency signal, and increase the recognition rate of radiofrequency signal, in addition, also can reduce the influence that produces the distorted signal of phase place and amplitude etc. because of noise through the instant radiofrequency signal of revising.
For letting the above-mentioned feature and advantage of the present invention can be more obviously understandable, hereinafter is special lifts embodiment, and conjunction with figs. elaborates as follows.
Description of drawings
Fig. 1 is the calcspar according to the correcting circuit of a kind of data recovery of first example embodiment of the present invention.
Fig. 2 is the process flow diagram of the bearing calibration that recovers according to a kind of data that first example embodiment of the present invention is provided.
Fig. 3 is the calcspar according to the correcting circuit of a kind of data recovery of second example embodiment of the present invention.
Fig. 4 is the process flow diagram of the bearing calibration that recovers according to a kind of data that second example embodiment of the present invention is provided.
Fig. 5 is the oscillogram of the bearing calibration that recovers according to a kind of data that second example embodiment of the present invention is provided.
Fig. 6 is the calcspar according to the correcting circuit of a kind of data recovery of the 3rd example embodiment of the present invention.
Fig. 7 is the process flow diagram that a kind of bearing calibration of data recovery is provided according to the 3rd example embodiment of the present invention.
Fig. 8 is the oscillogram of the bearing calibration that recovers according to a kind of data that second example embodiment of the present invention is provided.
Fig. 9 is the calcspar according to the correcting circuit of a kind of data recovery of the 4th example embodiment of the present invention.
Figure 10 is the oscillogram of the bearing calibration that recovers according to a kind of data that the 4th example embodiment of the present invention is provided.
[main element symbol description]
100,300,600,900: the correcting circuit that data are recovered
110: amplitude detecting circuit
120: the cycle detection circuit
130: compensating circuit
330,630: compensating circuit
340,640: statistic unit
350,650: amending unit
351,651: computing unit
352,652: phasing unit
960: clipper circuit
970: the phase-locked loop
980: the Bit String flow generator
S21~S23, S41~S46, S71~S76: the step of the bearing calibration that data are recovered
A k, A K+1: maximum-amplitude signal
A k', A K+1': the amplitude reference value
W k, W K+1: periodic signal
W k', W K+1': the cycle reference value
Z K-2, Z K-1, Z k, Z K+1, Z K+2: zero crossover point
D1: data-signal
Δ 1, Δ 2, Δ 3, Δ 4: phase error
Embodiment
In known optical memory system, the radiofrequency signal of using the calibration of PRML technology to be reflected by the laser light panel surface.Yet this practice also need adopt more mnemon, and area of chip is increased, and increases the cost of chip manufacturing.In addition, use the PRML technology will increase difficulty in the design and the complexity that realizes this hardware.
In view of this; In an embodiment of the present invention; When receiving data-signal, with reference to zero crossover point signal and clock signal, available amplitude detecting circuit and cycle detection circuit are obtained a plurality of amplitudes and a plurality of cycle of data-signal; Wherein, data-signal, zero crossover point signal and clock signal can be by radiofrequency signal through obtaining after partitioning circuitry and the phase-locked loop.Then can through comparison amplitude and cycle, adjust the phase place of above-mentioned data-signal between adjacent zero crossover point, calibrate above-mentioned data-signal according to this by compensating circuit.Because the data-signal after the calibration can reduce the phenomenon of distortion, and can increase the reliability of radiofrequency signal through the compensation of phase place, and the design of hardware can be too not complicated yet.Set forth embodiments of the invention in detail below with reference to accompanying drawing, the for example clear example embodiment of the present invention of accompanying drawing.In following explanation, for presenting consistency, so in various embodiment, if having function and the same or analogous element of structure to use components identical symbol and title to explanation of the present invention.
[first example embodiment]
Fig. 1 is the calcspar according to the correcting circuit of a kind of data recovery of first example embodiment of the present invention.With reference to Fig. 1, among this example embodiment, the correcting circuit 100 that data are recovered comprises amplitude detecting circuit 110, cycle detection circuit 120 and compensating circuit 130.Wherein, compensating circuit 130 couples amplitude detecting circuit 110 and cycle detection circuit 120.Below will introduce the detailed functions of above-mentioned each element.
Amplitude detecting circuit 110 is in order to receive zero crossover point signal Z and data-signal D1, and wherein zero crossover point signal Z is a plurality of zero crossover point Z K-2, Z K-1, Z k, Z K+1, Z K+2... crossfire, amplitude detecting circuit 110 can be divided into the m section with data-signal D1 according to this zero crossover point signal Z, m is a positive integer, and amplitude detecting circuit 110 is taken a sample to this data-signal D1.For instance, amplitude detecting circuit 110 can be measured the peak swing of each section, can obtain the amplitude of each section in the radiofrequency signal of this m section, output amplitude signal A, and wherein amplitude signal A is peak swing A K-2, A K-1, A k, A K+1, A K+2... crossfire.
Cycle detection circuit 120 is in order to receive zero crossover point signal Z and clock signal PCLK; Wherein clock signal PCLK is the crossfire of a plurality of clock intervals; Cycle detection circuit 120 can calculate the clock interval between the adjacent zero crossover point according to clock signal PCLK; Can obtain the cycle of each section in the radiofrequency signal of this m section, output periodic signal W, wherein periodic signal W is each section cycle W K-2, W K-1, W k, W K+1, W K+2... crossfire.For instance, therefore cycle detection circuit 120 can obtain the clock number of times between the adjacent zero crossover point according to this this clock signal of zero crossover point signal Z counting PCLK, with this count results as periodic signal W.
Accept above-mentionedly, compensating circuit 130 receives amplitude signal and periodic signals, through the amplitude A of the k section in the m section amplitude signal kAnd the cycle W of the k section in the periodic signal k, calculate the amplitude A of above-mentioned k section kWith cycle W kThe difference of the two and standard signal, the phase place of adjustment data-signal D1, and output calibration data signal.Below cooperate flow chart to be described in more detail.
Please be simultaneously with reference to Fig. 1 and Fig. 2, Fig. 2 is the process flow diagram of the bearing calibration that recovers according to a kind of data that first example embodiment of the present invention is provided.At first, in step S21, amplitude detecting circuit 110 receives data-signal D1 and zero crossover point signal Z, and according to zero crossover point signal Z the amplitude of data-signal D1 is taken a sample, and the output amplitude signal.In step S22, cycle detection circuit 120 receives zero crossover point signal Z and clock signal PCLK, and according to zero crossover point signal Z clock signal PCLK is taken a sample, and the output periodic signal.In step S23, compensating circuit 130 receives amplitude signal, periodic signal and data-signal D1, through calculating the difference of amplitude signal and periodic signal and standard signal, the phase place of adjustment data-signal D1, and output calibration data signal.
In sum, this example embodiment can be in order to increasing the reliability of data-signal, and increase the recognition rate of data-signal, in addition, also can reduce the influence that produces the distorted signal of phase place and amplitude etc. because of noise through the instant data-signal of revising.
[second example embodiment]
Fig. 3 is the calcspar according to the correcting circuit of a kind of data recovery of second example embodiment of the present invention.Please with reference to Fig. 1 and Fig. 3, the key distinction of second example embodiment and first example embodiment is compensating circuit 330.
Specifically, in this example embodiment, the correcting circuit 300 that data are recovered comprises amplitude detecting circuit 110, cycle detection circuit 120 and compensating circuit 330.Wherein, compensating circuit 330 comprises statistic unit 340 and amending unit 350, and further, amending unit 350 comprises computing unit 351 and phasing unit 352.
At this, statistic unit 340 couples amplitude detecting circuit 110, and computing unit 351 couples statistic unit 340 and cycle detection circuit 120, and phasing unit 352 couples computing unit 351.Below will introduce the detailed functions of above-mentioned each element.
Statistic unit 340 can be by standard signal of input in advance (or setting); This standard signal is in order to the corresponding relation of indication amplitude reference value and cycle reference value; Can find out corresponding cycle reference value by the amplitude reference value; Otherwise, also can find out corresponding amplitude reference value through the reference cycle reference value.In certain embodiments, the corresponding relation of aforementioned amplitude reference value and cycle reference value can be made into " look-up table " (look-up table), and in advance look-up table is left in the statistic unit 340.
In the present embodiment, statistic unit 340 receives the amplitude signal A that amplitude detecting circuit 110 is exported k, in order to from these amplitude reference values of standard signal, to select or to interleave out one and amplitude signal A kCorresponding cycle reference value W k'.Amending unit 350 receives above-mentioned cycle reference value W k', more detailed, the computing unit 351 in the amending unit 350 receives above-mentioned cycle reference value W k', and the periodic signal W of receiving cycle testing circuit 120 outputs k, computation period signal W kWith cycle reference value W k' difference value, i.e. W k-W k'.Difference value multiply by preset multiple K, i.e. K (W k-W k'), use producing first compensating parameter.Zero-time and concluding time that phasing unit 352 uses the first compensating parameter adjustment cycle signal, use the phase place of adjusting data-signal D1, output calibration data signal.Below cooperate flow chart to be described in more detail.
Please be simultaneously with reference to Fig. 3 and Fig. 4, Fig. 4 is the process flow diagram of the bearing calibration that recovers according to a kind of data that second example embodiment of the present invention is provided.At first, in step S41, amplitude detecting circuit 110 receives data-signal D1 and zero crossover point signal Z, and according to zero crossover point signal Z the amplitude of data-signal D1 is taken a sample, and output amplitude signal A kIn step S42, cycle detection circuit 120 receives zero crossover point signal Z and clock signal PCLK, and according to zero crossover point signal Z clock signal PCLK is taken a sample, and output periodic signal W kIn step S43, statistic unit 340 preset standard signals, standard signal comprise a plurality of amplitude reference values and a plurality of cycle reference value.In step S44, statistic unit 340 is selected or is interleave out and amplitude signal A kCorresponding cycle reference value W k', export corresponding cycle reference value W k'.In step S45, computing unit 351 receiving cycle signal W kWith cycle reference value W k', computation period signal W kWith cycle reference value W k' difference value, difference value multiply by preset multiple, use producing first compensating parameter.In step S46, zero-time and concluding time that phasing unit 352 uses the first compensating parameter adjustment cycle signal, use the phase place of adjusting data-signal D1, output calibration data signal.
For instance, Fig. 5 is the oscillogram of the bearing calibration that recovers according to a kind of data that second example embodiment of the present invention is provided.With reference to Fig. 3 and Fig. 5, amplitude detecting circuit 110 receives data-signal D1 and zero crossover point signal Z, and wherein, zero crossover point signal Z is a plurality of zero crossover point Z K-2, Z K-1, Z k, Z K+1And Z K+2Crossfire.Amplitude detecting circuit 110 is according to zero crossover point signal Z can take a sample data-signal D1, wherein zero crossover point Z kTo Z K+1Between data-signal D1 be expressed as the data-signal D1 of k section, and the amplitude detecting circuit 110 peak swing A in the data-signal D1 of k section that can take a sample kExport statistic unit 340 to.And statistic unit 340 is with reference to wherein preset standard signal, in order to select or to interleave out and amplitude signal A kCorresponding cycle reference value W k', statistic unit 340 is exported corresponding cycle reference value W then k' to computing unit 351.
Accept above-mentioned, the cycle detection circuit 120 cycle W in the data-signal D1 of k section that can take a sample k Export computing unit 351 to.And computing unit 351 receiving cycle signal W kAnd cycle reference value W k', computation period signal W kWith cycle reference value W k' error, use formula (1) to produce the first compensating parameter C1, wherein, formula (1) is represented as follows:
C1=K 1*(W k-W k’) (1)
At this, K 1It is a weight parameter.Then, phasing unit 352 uses the first compensating parameter C1 to adjust the phase place among the data-signal D1 of k section.Simple principle is that with same-amplitude, if the cycle that the cycle reference value is measured is long, i.e. the cycle that expression is measured is shorter, can transfer length by way of compensation.For instance, shorter when the cycle of measuring, with the zero-time of the data-signal D1 of k section in advance; Wherein the first compensating parameter C1 can reduce phase error Δ 1 as the foundation of adjustment zero-time, and the concluding time of the data-signal D1 of k section is delayed; Wherein the first compensating parameter C1 can be as the foundation of adjustment concluding time; Reduce phase error Δ 2, that is to say, adjust the periodic signal W of the data-signal D1 of k section k, make periodic signal W kMore near cycle reference value W k', reduce the phase error of the data-signal D1 of k section.In like manner can get, this example embodiment also can be adjusted the data-signal D1 of k+1 section, through peak swing A K+1Contrast obtains cycle reference value W K+1', computation period signal W K+1With cycle reference value W K+1' error, reduce phase error Δ 3 and phase error Δ 4, can reduce the error of the data-signal D1 of k+1 section.
Thus, through the periodic signal of each section among the adjustment data-signal D1, can increase the reliability of data-signal D1.
[the 3rd example embodiment]
Fig. 6 is the calcspar according to the correcting circuit of a kind of data recovery of the 3rd example embodiment of the present invention.Please with reference to Fig. 3 and Fig. 6, the key distinction of second example embodiment and the 3rd example embodiment is compensating circuit 630.
Specifically, in this example embodiment, the difference of second example embodiment and the 3rd example embodiment is that cycle detection circuit 120 couples statistic unit 640, and amplitude detecting circuit 110 couples amending unit 650.
In detail, statistic unit 640 is with reference to wherein preset standard signal, in order to select or to interleave out and periodic signal W kCorresponding amplitude reference value A k', export corresponding amplitude reference value A k' to computing unit 651.Computing unit 651 receives above-mentioned amplitude reference value A k', and receive the amplitude signal A that amplitude detecting circuit 120 is exported k, calculate amplitude signal A kWith amplitude reference value A k' difference value, difference value multiply by preset multiple, use producing the second compensating parameter C2, export the second compensating parameter C2 to phasing unit 652.Then, phasing unit 652 uses the second compensating parameter C2 adjustment cycle signal W kZero-time and concluding time, use the phase place of adjustment data-signal D1, output calibration data signal.Below cooperate flow chart to be described in more detail.
Fig. 7 is the process flow diagram of the bearing calibration that recovers according to a kind of data that the 3rd example embodiment of the present invention is provided.At first, in step S71, amplitude detecting circuit 110 receives data-signal D1 and zero crossover point signal Z, and according to zero crossover point signal Z the amplitude of data-signal D1 is taken a sample, and output amplitude signal A kIn step S72, cycle detection circuit 120 receives zero crossover point signal Z and clock signal PCLK, and according to zero crossover point signal Z clock signal PCLK is taken a sample, and output periodic signal W kIn step S73, statistic unit 640 preset standard signals, standard signal comprise a plurality of amplitude reference values and a plurality of cycle reference value.In step S74, statistic unit 640 is selected or is interleave out and periodic signal W kCorresponding amplitude reference value A k', so statistic unit 640 can be exported corresponding amplitude reference value A k' to computing unit 651.In step S75, computing unit 651 receives amplitude signal A kWith amplitude reference value A k', calculate amplitude signal A kWith amplitude reference value A k' difference value, difference value multiply by preset multiple, use producing the second compensating parameter C2.In step S76, phasing unit 652 uses the second compensating parameter C2 adjustment cycle signal W kZero-time and concluding time, use the phase place of adjustment data-signal D1, output calibration data signal.
Its simple principle is that with same period, if the amplitude that the amplitude reference value is measured is big, i.e. the amplitude that expression is measured is less, can transfer weak point by way of compensation.For instance, Fig. 8 is the oscillogram of the bearing calibration that recovers according to a kind of data that the 3rd example embodiment of the present invention is provided.With reference to Fig. 6 and Fig. 8, the cycle detection circuit 120 cycle W in the data-signal D1 of k section that can take a sample kExport statistic unit 640 to, and statistic unit 640 is with reference to wherein preset standard signal, in order to select or to interleave out and periodic signal W kCorresponding amplitude reference value A k', export corresponding amplitude reference value A k' to computing unit 651.Amplitude detecting circuit 110 receives data-signal D1 and zero crossover point signal Z, the peak swing A of sampling in the data-signal D1 of k section kExport computing unit 651 to.
Accept above-mentionedly, computing unit 651 receives the peak swing A among the data-signal D1 of k sections kAnd amplitude reference value A k', calculate amplitude signal A kWith amplitude reference value A k' error, use formula (2) to produce the second compensating parameter C2, wherein, formula (2) is represented as follows:
C2=K 2*(A k-A k’) (1)
At this, K 2It is a weight parameter.Then, use the second compensating parameter C2 to adjust the phase place among the data-signal D1 of k section, thus,, can increase the reliability of data-signal through the periodic signal of each section in the adjustment data-signal.
[the 4th example embodiment]
Fig. 9 is the calcspar according to the correcting circuit of a kind of data recovery of the 4th example embodiment of the present invention.Please with reference to Fig. 3 and Fig. 9, the key distinction of the 4th example embodiment and second example embodiment is clipper circuit 960, phase-locked loop 970 and Bit String flow generator 980.
Specifically; In this example embodiment; Please with reference to Fig. 9; The correcting circuit 900 that data are recovered also can comprise clipper circuit (slicer) 960, phase-locked loop (phase-locked loop, PLL) 970 and Bit String flow generator (bit stream generator) 980 except that the included circuit of above-mentioned Fig. 3.Wherein, clipper circuit 960 couples phase-locked loop 970, amplitude detecting circuit 110 and compensating circuit 330.Phase-locked loop 970 is coupled between clipper circuit 960 and the cycle detection circuit 120.Bit String flow generator 980 couples compensating circuit 330.
In detail; But clipper circuit 960 received RF signal RF and clipping levels; And according to clipping level cutting radiofrequency signal RF; Outputting data signals D1 to the phase-locked loop 970, amplitude detecting circuit 110 and compensating circuit 330, and output zero crossover point signal Z gives amplitude detecting circuit 110 and cycle detection circuit 120.Aforementioned radiofrequency signal RF is for example read by the read head of optical memory system and provides.Phase-locked loop 970 can receive and according to the phase place of data-signal D1 and clock signal PCLK to cycle detection circuit 120.Bit String flow generator 980 is exported after can receiving the calibration data signal of compensating circuit 330 and converting the bit crossfire to.
For instance, Figure 10 is the oscillogram of the bearing calibration that recovers according to a kind of data that the 4th example embodiment of the present invention is provided.But clipper circuit 960 received RF signal RF and clipping levels, and use clipping level cutting radiofrequency signal RF, at this, the radiofrequency signal of cutting is above-mentioned data-signal D1.Phase-locked loop 970 can receive the phase place of above-mentioned data-signal D1, and clock signal PCLK is to cycle detection circuit 120.In Figure 10, the two phase difference of the clock signal PCLK of phase-locked loop 970 output and the zero crossover point of radiofrequency signal RF is then with φ eExpression.Work as φ eFor on the occasion of the time represent the leading clock signal PCLK of zero crossover point of radiofrequency signal RF, and work as φ eThe zero crossover point of representing radiofrequency signal RF during for negative value falls behind clock signal PCLK.Wherein, φ eBe for example and without limitation to zero crossover point of selecting radiofrequency signal RF and the smaller in adjacent two clock signal PCLK phase error absolute values, this phase error absolute value less the time while at hour also be the snap point in bit signal cycle.CLK representes system clock; LVL is illustrated in the prechiasmal radio frequency level of null value (expression radiofrequency signal RF is high level or low level); TCLK representes a null value crossbar signal; Periodic signal W is illustrated in null value prechiasmal rf period (representing that its Cycle Length is several T, for example 3T or 2T), and amplitude signal A is illustrated in the prechiasmal radio frequency amplitude of null value.
In addition, amplitude detecting circuit 110 sampling is at data-signal D1 one section peak swing A wherein k, output amplitude signal A kTo statistic unit 340, produce the cycle reference value W of a correspondence k' export computing unit 351 to.And cycle detection circuit 120 sampling is at data-signal D1 one section cycle W wherein k, output periodic signal W kTo computing unit 351.Computing unit 351 receiving cycle signal W kWith cycle reference value W k', computation period signal W kDifference value W with the cycle reference value k', difference value multiply by preset multiple, use producing the first compensating parameter C1.Phasing unit 352 uses the first compensating parameter C1 adjustment cycle signal W kZero-time and concluding time, use the phase place of adjustment data-signal D1, output calibration data signal.Export after can converting the calibration data-signal to the bit crossfire through Bit String flow generator 980 at last.This bit crossfire can be as the usefulness of follow-up data processing, and only when follow-up data processing can be used the data layout of calibration data signal, 980 of this Bit String flow generator can be omitted.
In sum, the present invention adjusts the phase place of above-mentioned data-signal between adjacent zero crossover point immediately through the amplitude and the cycle of comparison amplitude and cycle and standard signal, calibrates above-mentioned data-signal according to this.Because the data-signal after the calibration is through the compensation of phase place; Reduce the phenomenon of distortion; Therefore can be in order to increasing the reliability of data-signal, and increase the recognition rate of data-signal, in addition; Also can reduce the influence that produces the distorted signal of phase place and amplitude etc. because of noise through the instant data-signal of revising.
Though the present invention with embodiment openly as above; Right its is not that those skilled in the art are not breaking away from the spirit and scope of the present invention in order to qualification the present invention; When doing a little change and retouching, so protection scope of the present invention is as the criterion when looking the appended claims person of defining.

Claims (16)

1.一种数据恢复的校正电路,包括:1. A correction circuit for data recovery, comprising: 一振幅检测电路,接收一数据信号与一零交越点信号,根据该零交越点信号对该数据信号的多个振幅进行取样,而输出一振幅信号;An amplitude detection circuit, receiving a data signal and a zero-crossing point signal, sampling a plurality of amplitudes of the data signal according to the zero-crossing point signal, and outputting an amplitude signal; 一周期检测电路,接收该零交越点信号与一时钟信号,根据该零交越点信号计数该时钟信号,而输出一周期信号;以及a cycle detection circuit, receiving the zero-crossing point signal and a clock signal, counting the clock signal according to the zero-crossing point signal, and outputting a cycle signal; and 一补偿电路,耦接该振幅检测电路及该周期检测电路,接收该振幅信号、该周期信号及该数据信号,通过计算该振幅信号及该周期信号与一标准信号的差异,调整该数据信号的相位,并输出一校准数据信号。A compensation circuit, coupled to the amplitude detection circuit and the period detection circuit, receives the amplitude signal, the period signal and the data signal, and adjusts the data signal by calculating the difference between the amplitude signal and the period signal and a standard signal phase, and output a calibration data signal. 2.如权利要求1所述的数据恢复的校正电路,其中该补偿电路包括:2. The correction circuit for data recovery as claimed in claim 1, wherein the compensation circuit comprises: 一统计单元,耦接该振幅检测电路,其中该统计单元预设该标准信号,而该标准信号包括多个振幅参考值与多个周期参考值,用以从这些振幅参考值中间插输出这些周期参考值中与该振幅信号相对应的一周期参考值;以及A statistical unit, coupled to the amplitude detection circuit, wherein the statistical unit presets the standard signal, and the standard signal includes a plurality of amplitude reference values and a plurality of cycle reference values, for interpolating and outputting the cycles from the amplitude reference values a period of the reference value corresponding to the amplitude signal; and 一修正单元,耦接该统计单元与该周期检测电路,接收该周期信号与该周期参考值,藉以产生一第一补偿参数,使用该第一补偿参数调整该数据信号的相位,并输出该校准数据信号。A correction unit, coupled to the statistical unit and the period detection circuit, receives the period signal and the period reference value, thereby generating a first compensation parameter, using the first compensation parameter to adjust the phase of the data signal, and outputting the calibration data signal. 3.如权利要求2所述的数据恢复的校正电路,其中该修正单元包括:3. The correction circuit for data recovery as claimed in claim 2, wherein the correction unit comprises: 一计算单元,耦接该统计单元与该周期检测电路,接收该周期信号与该周期参考值,计算该周期信号与该周期参考值的一差异值,将该差异值乘以一预设倍数,藉以产生该第一补偿参数;以及a calculation unit, coupled to the statistical unit and the period detection circuit, receives the period signal and the period reference value, calculates a difference value between the period signal and the period reference value, and multiplies the difference value by a preset multiple, thereby generating the first compensation parameter; and 一相位调整单元,耦接该计算单元,使用该第一补偿参数调整该周期信号的一起始时间与一结束时间,藉以调整该数据信号的相位,输出该校准数据信号。A phase adjustment unit, coupled to the calculation unit, uses the first compensation parameter to adjust a start time and an end time of the periodic signal, so as to adjust the phase of the data signal and output the calibration data signal. 4.如权利要求1所述的数据恢复的校正电路,其中该补偿电路包括:4. The correction circuit for data recovery as claimed in claim 1, wherein the compensation circuit comprises: 一统计单元,耦接该周期检测电路,其中该统计单元预设该标准信号,该标准信号包括多个振幅参考值与多个周期参考值,用以间插输出这些振幅参考值中与该周期信号相对应的一振幅参考值;以及A statistic unit, coupled to the period detection circuit, wherein the statistic unit presets the standard signal, the standard signal includes a plurality of amplitude reference values and a plurality of period reference values, and is used to interleave output between the amplitude reference values and the period an amplitude reference corresponding to the signal; and 一修正单元,耦接该统计单元与该振幅检测电路,接收该振幅信号与该振幅参考值,藉以产生一第二补偿参数,使用该第二补偿参数调整该数据信号的相位,并输出该校准数据信号。A correction unit, coupled to the statistical unit and the amplitude detection circuit, receives the amplitude signal and the amplitude reference value, thereby generating a second compensation parameter, using the second compensation parameter to adjust the phase of the data signal, and outputting the calibration data signal. 5.如权利要求4所述的数据恢复的校正电路,其中该修正单元包括:5. The correction circuit for data recovery as claimed in claim 4, wherein the correction unit comprises: 一计算单元,耦接该统计单元与该振幅检测电路,接收该振幅信号与该振幅参考值,计算该振幅信号与该振幅参考值的一差异值,将该差异值乘以一预设倍数,藉以产生该第二补偿参数;以及a calculation unit, coupled to the statistics unit and the amplitude detection circuit, receives the amplitude signal and the amplitude reference value, calculates a difference value between the amplitude signal and the amplitude reference value, and multiplies the difference value by a preset multiple, thereby generating the second compensation parameter; and 一相位调整单元,耦接该计算单元,使用该第二补偿参数调整该周期信号的一起始时间与一结束时间,藉以调整该数据信号的相位,输出该校准数据信号。A phase adjustment unit, coupled to the calculation unit, uses the second compensation parameter to adjust a start time and an end time of the periodic signal, so as to adjust the phase of the data signal and output the calibration data signal. 6.如权利要求1所述的数据恢复的校正电路,还包括:6. The correction circuit of data recovery as claimed in claim 1, further comprising: 一切割电路,接收一射频信号与一切割电平,依据该切割电平切割该射频信号,而输出该数据信号及该零交越点信号;以及a cutting circuit, receiving a radio frequency signal and a cutting level, cutting the radio frequency signal according to the cutting level, and outputting the data signal and the zero-crossing point signal; and 一锁相回路,耦接该切割电路,接收及根据该数据信号而输出该时钟信号。A phase-locked loop, coupled to the cutting circuit, receives and outputs the clock signal according to the data signal. 7.如权利要求1所述的数据恢复的校正电路,还包括一比特串流产生器,耦接该补偿电路,接收该校准数据信号并转换成一比特串流后输出。7. The calibration circuit for data recovery according to claim 1, further comprising a bit stream generator coupled to the compensation circuit, receiving the calibration data signal and converting it into a bit stream for output. 8.一种数据恢复的校正方法,包括:8. A correction method for data recovery, comprising: a.根据一零交越点信号对一数据信号的振幅进行取样,而获得一振幅信号;a. Sampling the amplitude of a data signal according to a zero-crossing point signal to obtain an amplitude signal; b.根据该零交越点信号计数一时钟信号,而获得一周期信号;以及b. counting a clock signal according to the zero-crossing point signal to obtain a periodic signal; and c.通过计算该振幅信号及该周期信号与一标准信号的差异,调整该数据信号的相位而获得一校准数据信号。c. adjusting the phase of the data signal to obtain a calibration data signal by calculating the difference between the amplitude signal and the period signal and a standard signal. 9.如权利要求8所述的数据恢复的校正方法,其中步骤c包括:9. The correction method of data recovery as claimed in claim 8, wherein step c comprises: d.提供该标准信号,该标准信号包括多个振幅参考值与多个周期参考值;d. Provide the standard signal, the standard signal includes a plurality of amplitude reference values and a plurality of period reference values; e.从这些振幅参考值中查找或间插出这些周期参考值中与该振幅信号相对应的一周期参考值;e. Find or interpolate a period reference value corresponding to the amplitude signal among the period reference values from the amplitude reference values; f.计算该周期信号与所查找或间插出的该周期参考值,以产生一第一补偿参数;以及f. calculating the periodic signal and the searched or interpolated periodic reference value to generate a first compensation parameter; and g.使用该第一补偿参数调整该数据信号的相位,以获得该校准数据信号。g. Using the first compensation parameter to adjust the phase of the data signal to obtain the calibration data signal. 10.如权利要求9所述的数据恢复的校正方法,其中步骤f包括:10. The correction method of data recovery as claimed in claim 9, wherein step f comprises: 计算该周期信号与所查找或间插出的该周期参考值的一差异值;以及calculating a difference between the periodic signal and the looked-up or interpolated periodic reference; and 将该差异值乘以一预设倍数,以产生该第一补偿参数。The difference is multiplied by a preset multiple to generate the first compensation parameter. 11.如权利要求9所述的数据恢复的校正方法,其中步骤g使用该第一补偿参数调整该周期信号的一起始时间与一结束时间,藉以调整该数据信号的相位,获得该校准数据信号。11. The calibration method for data recovery as claimed in claim 9, wherein step g uses the first compensation parameter to adjust a start time and an end time of the periodic signal, thereby adjusting the phase of the data signal to obtain the calibration data signal . 12.如权利要求8所述的数据恢复的校正方法,其中步骤c包括:12. The correction method of data recovery as claimed in claim 8, wherein step c comprises: i.提供该标准信号,该标准信号包括多个振幅参考值与多个周期参考值;i. Provide the standard signal, the standard signal includes a plurality of amplitude reference values and a plurality of period reference values; j.从这些周期参考值中查找或间插出这些振幅参考值中与该周期信号相对应的一振幅参考值;j. Find or interpolate an amplitude reference value corresponding to the periodic signal among the amplitude reference values from the periodic reference values; k.计算该振幅信号与所查找或间插出的该振幅参考值,以产生一第二补偿参数;以及k. calculating the amplitude signal and the amplitude reference value searched or interpolated to generate a second compensation parameter; and l.使用该第二补偿参数调整该数据信号的相位,以获得该校准数据信号。l. Using the second compensation parameter to adjust the phase of the data signal to obtain the calibration data signal. 13.如权利要求12所述的数据恢复的校正方法,其中步骤k包括:13. The correction method of data recovery as claimed in claim 12, wherein step k comprises: 计算该振幅信号与所查找或间插出的该振幅参考值的一差异值;以及calculating a difference between the amplitude signal and the searched or interpolated amplitude reference value; and 将该差异值乘以一预设倍数,以产生该第二补偿参数。The difference is multiplied by a preset multiple to generate the second compensation parameter. 14.如权利要求12所述的数据恢复的校正方法,其中步骤l使用该第二补偿参数调整该周期信号的一起始时间与一结束时间,藉以调整该数据信号的相位,获得该校准数据信号。14. The calibration method for data recovery as claimed in claim 12, wherein step 1 uses the second compensation parameter to adjust a start time and an end time of the periodic signal, thereby adjusting the phase of the data signal to obtain the calibration data signal . 15.如权利要求8所述的数据恢复的校正方法,还包括:15. The correction method of data restoration as claimed in claim 8, further comprising: 依据一切割电平切割一射频信号,以获得该数据信号及该零交越点信号;以及cutting a radio frequency signal according to a cutting level to obtain the data signal and the zero-crossing point signal; and 根据该数据信号的相位而产生该时钟信号。The clock signal is generated according to the phase of the data signal. 16.如权利要求8所述的数据恢复的校正方法,还包括将该校准数据信号转换成一比特串流。16. The calibration method for data recovery as claimed in claim 8, further comprising converting the calibration data signal into a bit stream.
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