CN101902583B - Image sensor and high-conversion-gain and low-noise pixel readout circuit - Google Patents
Image sensor and high-conversion-gain and low-noise pixel readout circuit Download PDFInfo
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- CN101902583B CN101902583B CN2009101418305A CN200910141830A CN101902583B CN 101902583 B CN101902583 B CN 101902583B CN 2009101418305 A CN2009101418305 A CN 2009101418305A CN 200910141830 A CN200910141830 A CN 200910141830A CN 101902583 B CN101902583 B CN 101902583B
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- 238000009792 diffusion process Methods 0.000 claims abstract description 29
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- 238000009825 accumulation Methods 0.000 claims description 17
- 230000005540 biological transmission Effects 0.000 claims description 15
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- 238000005070 sampling Methods 0.000 description 12
- 230000008878 coupling Effects 0.000 description 9
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- 230000000875 corresponding effect Effects 0.000 description 5
- 238000012423 maintenance Methods 0.000 description 3
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- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/50—Control of the SSIS exposure
- H04N25/57—Control of the dynamic range
- H04N25/59—Control of the dynamic range by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance
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Abstract
The invention provides a pixel circuit of a CMOS (complementary metal oxide semiconductor) image sensor, which is characterized by using at least two transferring transistors for respectively transferring the accumulated optical signals of corresponding photodetectors to a first node, using a resetting transistor for resetting the voltage of the first node as the preset resetting voltage of a second node, and using a source follower for buffering the integrated optical signals. In the embodiment of the invention, a capacitor is connected between the first node and the second node, so as to reduce the impact of the effective capacitance comprising the capacitance in the floating diffusion areas and the stray capacitance in the photodetectors and transferring transistors.
Description
Technical field
The present invention relates to complementary metal oxide semiconductor (CMOS) image sensor, be particularly related to a kind of pixel readout circuit (pixel readout circuit) that has than the CMOS image sensor of small size, and a kind of pixel readout circuit with back coupling (or switching) electric capacity.
Background technology
The CMOS image sensor is a kind of electronic installation of pick-up image, for example is used for camera, and luminous intensity is converted to electric charge, is converted into voltage again and reads out.Figure 1A has shown passive pixel sensor (passive pixel sensor, PPS), and it is a kind of of traditional cmos image sensor.For convenience of explanation, two central pixels of pel array have only been shown in the drawings.Each pixel contains photodiode (photodiode) D and access transistor (or switch) M
AccWord line (WL for example
1) being connected to the pixel with delegation, bit line (for example BL) then is connected to the pixel of same row.The end that is positioned at each bit line BL has amplifier 10.
Figure 1B has shown the image element circuit of CMOS active pixel sensor (active pixel sensor, APS).Each pixel comprises a photodiode D and three transistor one M
Rst, M
Sf, M
Sel, so this class transducer is commonly referred to as the 3T image element circuit of CMOS image sensor.As transistor M
RstWhen being reset signal RST and opening (turn on), photodiode D can be reset to replacement reference voltage (power supply V for example
DD).Transistor M
SfAs source electrode following device (source follower), it can be in order to accumulation (integrated) light signal of buffering or amplification photodiode D.As transistor M
SelWhen being opened by word-line signal WL, then allow reading of picture element signal.Because each source electrode following device M in the 3T image element circuit
SfAnd transistor M
RstCan with the noise random dispersion, therefore can alleviate the strip flaw of passive pixel sensor.Yet the photodiode D of 3T image element circuit but has high leakage current is arranged.Moreover, even strip flaw has alleviated, however transistor M
RstCan produce KT/C
pNoise, wherein, stray capacitance value C
pVery little, so KT/C
pThe value of noise can be very large.
Fig. 1 C illustration the another kind of image element circuit of CMOS active pixel sensor.Each pixel comprises a photodiode D and four transistor (M
Tx, M
Rst, M
Sf, M
Sel), so this class transducer is commonly referred to as the 4T image element circuit of CMOS image sensor.The configuration of 4T image element circuit and function class are similar to the 3T image element circuit, yet as extra transistor M
TxWhen being transmitted signal TX unlatching, can be in order to transmit the accumulation light signal of photodiode D.This 4T image element circuit can be used for carrying out the difference characteristic of related Double sampling (correlated double sampling, CDS) to avoid being produced because of process variations difference between the pixel.In addition, when the regional capacity of diffusion (floating diffusion, FD) that floats was enough large, photodiode can send out stored charge fully.Therefore, related Double sampling (CDS) can be with KT/C
pNoise is removed fully, so that time correlation (temporal) noise level becomes very low, and dark (dark) electric current that photodiode causes also seldom.
The image element circuit of Fig. 1 C can take suitable chip area, therefore, is not suitable for modern high-density CMOS image sensor.Given this, therefore need the pixel readout circuit that proposes a kind of CMOS image sensor badly, in order to effective area that reduces the pel array of CMOS image sensor.
Summary of the invention
In view of above-mentioned, one of purpose of the present invention is to reduce substantially the area of the pel array of CMOS image sensor.
Another object of the present invention is to propose a kind of image element circuit of CMOS image sensor, in order to lowering stray capacitance, and can not sacrifice its usefulness and be common to the number of pixels of CMOS image sensor.
According to a first aspect of the invention, provide a kind of image sensor, comprised:
At least two photodetectors;
At least two transmit transistors, in order to the accumulation light signal that transmits respectively corresponding photodetector to first node;
Floating diffusion region is connected to described first node, and the effective capacitance that wherein is positioned at described first node comprises the electric capacity of described floating diffusion region and described photodetector, the transistorized stray capacitance of described transmission;
Reset transistor is the default reset voltage of Section Point in order to the described first node of resetting;
Electric capacity is connected between described first node and the described Section Point, in order to reduce the impact of effective capacitance; And
The source electrode following device transmits from transmitting transistorized accumulation light signal in order to buffering;
Wherein said reset transistor and source electrode following device are common to described at least two photodetectors.
According to a second aspect of the invention, provide a kind of low-noise pixel readout circuit with high-conversion-gain, comprised:
A plurality of photodiodes, it is reversely biased;
A plurality of transmission transistors, the one end is connected to respectively corresponding photodiode, and the other end then connects to first node;
Floating diffusion region is connected to described first node, and the effective capacitance that wherein is positioned at described first node comprises electric capacity and the described photodiode of described floating diffusion region, transmits transistorized stray capacitance;
Reset transistor between described first node and Section Point, is the default reset voltage of described Section Point in order to the described first node of resetting;
The source electrode following device, its grid is connected to described first node;
Row selecting transistor between described Section Point and ground, is in series with described source electrode following device;
Power circuit is connected between power supply and the described Section Point; And
Electric capacity is connected between described first node and the described Section Point, in order to reduce the impact of described effective capacitance.
According to a third aspect of the invention we, provide a kind of low-noise pixel readout circuit with high-conversion-gain, comprised:
A plurality of photodiodes, it is reversely biased;
A plurality of transmission transistors, the one end is connected to respectively corresponding photodiode, and the other end then connects to first node;
Floating diffusion region is connected to described first node, and the effective capacitance that wherein is positioned at described first node comprises electric capacity and the described photodiode of described floating diffusion region, transmits transistorized stray capacitance;
Reset transistor between described first node and Section Point, is the default reset voltage of described Section Point in order to the described first node of resetting;
The source electrode following device, its grid is connected to described first node;
Row selecting transistor between power supply and ground, is in series with described source electrode following device;
Amplifier is connected to described source electrode following device receiving the voltage of described first node, and is output in described Section Point; And
Electric capacity is connected between described first node and the described Section Point, in order to reduce the impact of described effective capacitance.
According to one of embodiment of the invention, use at least two transmit transistors with the accumulation light signal that transmits respectively corresponding photodetector to first node.Floating diffusion region is connected to first node.Use reset transistor to be the default reset voltage of Section Point with the replacement first node; And use the source electrode following device with buffering accumulation light signal.Wherein, reset transistor and source electrode following device are common to this at least two photodetector.According to another embodiment of the present invention, electric capacity is connected between first node and the Section Point, in order to reduce the impact of effective capacitance.
Description of drawings
Figure 1A has shown the traditional passive element sensor.
Figure 1B has shown the 3T image element circuit of traditional CMOS active pixel sensor.
Fig. 1 C has shown the 4T image element circuit of traditional CMOS active pixel sensor.
Fig. 2 A has shown four transistors (4T) image element circuit of complementary metal oxide semiconductor (CMOS) image sensor of the embodiment of the invention, and it is shared (shared) (4S) by four pixels.
Fig. 2 B has shown four transistors (4T) image element circuit of the CMOS image sensor of another embodiment of the present invention, and it is shared (4S) by four pixels.
Fig. 3 A has shown four transistors (4T) image element circuit of the CMOS image sensor of further embodiment of this invention, and it is shared (4S) by four pixels.
Fig. 3 B has shown the correlation timing figure of Fig. 3 A.
Fig. 3 C has shown simplification equivalence calcspar, back coupling electric capacity and related Double sampling (CDS) circuit of the amplifier of Fig. 3 A.
Fig. 3 D has shown the simplification equivalence calcspar of Fig. 3 A at reset phase.
Fig. 3 E shown Fig. 3 A amplifier, feedback the simplification equivalence calcspar of electric capacity at accumulation phase.
Embodiment
Fig. 2 A has shown four transistors (4T) image element circuit of complementary metal oxide semiconductor (CMOS) image sensor of the embodiment of the invention, and it is shared (shared) (4S) by four pixels.Present embodiment can reduce the entire area of the pel array of CMOS image sensor, perhaps can move out of more space to photodiode.In present embodiment (and other embodiment in this specification), image element circuit is shared by four pixels, but is not limited to four; Moreover image element circuit of the present invention also is not limited to and contains four transistors (4T), for example also can be 5T or more transistor.In illustrative 4T 4S image element circuit, corresponding four photodetectors of four pixels (photodetector) (for example pinned photodiode (pinned photodiode)) D
1-D
4Be connected to respectively and transmit transistor M
Tx1-M
Tx4In the present embodiment, transmit transistor M
Tx1-M
Tx4Be N-shaped metal-oxide semiconductor (NMOS) transistor.Photodiode D
1-D
4Be reversely biased, that is, its plus earth negative electrode then is connected to transmission transistor M
Tx1-M
Tx4One of source/drain electrode.Transmit transistor M
Tx1-M
Tx4Another source/drain electrode link together, being connected to again float diffusion (floating diffusion) regional FD (or first node) and source electrode following device M
SfThe grid of (for example being nmos pass transistor).
Although photodiode D in the 4T4S image element circuit
1-D
4The stored charge Q of institute can significantly increase, still, and the voltage (Q/C that bit line BL reads
pXA
Sf, C wherein
pBe the stray capacitance of node P, A
SfBe source electrode following device M
SfGain, general value is 0.8-0.9) then can be subject to the stray capacitance that shared pixel produces and affected.In order to allow the pixel voltage maximization, C
pEffective capacitance value must remain in minimum, but must be even as big as holding photodiode D
1-D
4The electric charge that sends.Contradiction in this design is so that in the optimization capacitor C
pThe time limited also the number of pixels that is common to a circuit.For head it off, thereby following embodiment is proposed.
Fig. 2 B has shown the 4T 4S image element circuit of complementary metal oxide semiconductor (CMOS) image sensor of another embodiment of the present invention, and it comprises four transistors (4T), and is shared (shared) (4S) by four pixels.In the present embodiment, transmit transistor M
Tx1-M
Tx4Link together, be connected to again floating diffusion region FD (or first node) and source electrode following device M
SfThe grid of (for example being nmos pass transistor).Capacitor C
fBe connected between floating diffusion region FD and the node S (Section Point).Capacitor C
pBe effective capacitance, it comprises diffusion capacitance, the source electrode following device M of floating diffusion region FD at least
SfGrid capacitance and the stray capacitance of each pixel.Between node S and ground, source electrode following device M
SfBe series at row selecting transistor M
Sel(for example nmos pass transistor).Those skilled in the art can know the source electrode following device M of series connection
Sf, row selecting transistor M
SelOrder transposing after can't affect its function.Reset transistor M
RstBetween node S and floating diffusion region FD.Power circuit or current source 20 are connected in power supply V
DDAnd between the node S.In the present embodiment, current source 20 is by two series connection p-type metal-oxide semiconductor (PMOS) transistor P
1-2Form.PMOS transistor P
1-2Grid give suitable bias voltage (not shown).
The operation of the 4T 4S image element circuit of Fig. 2 B is divided into and is following three phases.At first, at reset phase, reset transistor M
RstBe reset signal RST and open, transmit transistor M
Tx1-M
Tx4Also being transmitted respectively signal TX1_4 opens.Therefore, photodiode D
1-D
4Be reset and be " pinning (pinning) voltage ", its value is less than the preset reference voltage of node S, and it is again less than power supply V
DD, so photodiode D
1-D
4Be completely depleted (depleted).In the present embodiment, current source 20 is with power supply V
DDBe pulled down to preset value, in order to provide required replacement reference voltage to photodiode D
1-D
4Next, at accumulation (integration or accumulation) stage, reset transistor M
RstAnd transmission transistor M
Tx1-M
Tx4Close (turned off), then irradiation light is in photodiode D
1-D
4Photodiode D
1-D
4Cross-pressure will reduce along with the increase of irradiation light intensity (discharge).In the phase III, reset transistor M
RstHeavily be unlocked a period of time, during this period of time floating diffusion region FD is reset and is above-mentioned predeterminated voltage, then opens row selecting transistor M
SelTo read replacement (or dark (dark)) voltage.Next, transmit transistor M
Tx1-M
Tx4One of them is unlocked and (and keeps row selecting transistor M
SelUnlatching), in order to read the photodiode D of FD
1-D
4The accumulation light signal.The difference of reset voltage and accumulation light signal (this difference is produced by external circuit, and is not shown, but will in following discussion) will be used to carry out related Double sampling (correlated double sampling, CDS).Those skilled in the art can know that if do not need to carry out related Double sampling (CDS), then the replacement of floating diffusion region FD just can be omitted in the above-mentioned third step.
Photodiode D
1-D
4Can be done special configuration according to special purpose.For example, in one embodiment, photodiode D
1, D
2, D
3, D
4Respectively in order to detect ruddiness (R), green glow (G), ruddiness (R), green glow (G).When operation, transmit signal TX1, TX3 and open simultaneously transmission transistor M
Tx1, M
Tx3, transmit signal TX2, TX4 and then open simultaneously transmission transistor M
Tx2, M
Tx4This operation is commonly referred to as pixel stratum " electric charge overlaps (binning) ".Therefore, can effectively increase the area of detection of (multiplication) ruddiness and green glow, thereby be strengthened the task performance under the low-light level environment.If in pixel, use back coupling electric capacity, then can allow more pixels carry out electric charge and overlap, more strengthen the task performance under the low-light level environment.
Fig. 3 A has shown four transistors (4T) image element circuit of complementary metal oxide semiconductor (CMOS) image sensor of further embodiment of this invention, and it is shared (shared) (4S) by four pixels.In the present embodiment, photodiode D
1-D
4, transmit transistor M
Tx1-M
Tx4, capacitor C
pIdentical with Fig. 2 B, therefore omit its related description.At power supply V
DDAnd between the ground, source electrode following device M
SfBe series at row selecting transistor M
Sel(for example nmos pass transistor).
Contain source electrode following device M
SfAmplifier 30 receive input voltage at floating diffusion region FD (or first node).The output node V of amplifier 30
oBack coupling is connected to the back coupling capacitor C
fThe second end.Reset transistor M
RstBetween the output of FD and amplifier 30.In the present embodiment, amplifier 30 is the standard difference amplifier.Amplifier 30 also can adopt other composition forms, as long as it provides inversion signal and has enough loop gains of opening, to meet required loop circuit gain accuracy.
The operation of the image element circuit of Fig. 3 A is divided into and is following three stages.Fig. 3 B has shown correlation timing figure, and Fig. 3 C has shown simplification equivalence calcspar, the back coupling capacitor C of amplifier 30
fAnd related Double sampling (CDS) circuit 32.At first, at reset phase, reset transistor M
RstAt time t
1Be reset signal RST and open, transmit transistor M
Tx1-M
Tx4Also being transmitted respectively signal TX opens.Therefore, photodiode D
1-D
4Be reset and be " pinning (pinning) voltage ", it is worth less than reference voltage V
RSTFig. 3 D has shown the simplification equivalence calcspar of Fig. 3 A at reset phase.The total electrical charge Q in this stage
1Equal capacitor C
pElectric charge (that is, (V
RST-0) * C
p).Total electrical charge Q
1Can be expressed as:
Q
1＝(V
RST-0)*C
p
Next, at accumulation (integration or accumulation) stage, reset transistor M
RstAnd transmission transistor M
Tx1-M
Tx4Close (turned off), then irradiation light is in photodiode D
1-D
4Photodiode D
1-D
4Cross-pressure will reduce along with the increase of irradiation light intensity (discharge).Fig. 3 E has shown amplifier 30, the back coupling capacitor C of Fig. 3 A
fSimplification equivalence calcspar at accumulation phase.The total electrical charge Q in this stage
2Equal capacitor C
pElectric charge (that is, (V
RST-0) * C
p) add capacitor C
fElectric charge (that is, (V
RST-V
o) * C
f).Total electrical charge Q
2Can be expressed as:
Q
2＝V
RST*C
p+(V
RST-V
o)*C
f
In the phase III, reset transistor M
Rst(time t heavily is unlocked a period of time
3With t
4Between), during this period of time floating diffusion region FD is reset and is above-mentioned predeterminated voltage, then opens row selecting transistor M
SelWith sampling (sample) and maintenance (hold) this replacement (or dark (dark)) voltage, this sampling/maintenance is by closed (close) interrupteur SW of control signal SHR
1Finish.Next, transmit transistor M
Tx1-M
Tx4One of them is at time t
5Be unlocked and (and keep row selecting transistor M
SelUnlatching), in order to sampling (sample) and keep the photodiode D of (hold) floating diffusion region FD
1-D
4The accumulation light signal (stored charge is Q
Img), this sampling/maintenance is by closed (close) interrupteur SW of control signal SHS
2Finish.Output voltage V
oCan represent by following formula:
Therefore, conversion gain (conversion gain) can be by the back coupling capacitor C of present embodiment
fControl, this can be avoided being subject to the impact of the stray capacitance of floating diffusion region FD electric capacity and shared pixel.The back coupling capacitor C
fCan be according to demand design modifying in addition, in order to increase output voltage V
oScope and pixel sensitivity.
According to above-described embodiment, output voltage V
oMainly by feedbacking capacitor C
fControl, can be subject to hardly the impact of stray capacitance.Thereby the conductor coiling can have influence on output voltage hardly.In one embodiment, this invention advantage can not affect output voltage in order to the number that increases shared pixel.In another embodiment, can utilize this invention advantage can not affect output voltage with the number that increases row (row), so that in the middle of frame (frame), carry out the exposure of different time, in order to increase its dynamic range (dynamic range).
The above is the preferred embodiments of the present invention only, is not to limit the present invention; All other do not break away from the equivalence of finishing under the spirit that invention discloses and changes or revise, and all should comprise within the scope of the appended claims.
Claims (12)
1. image sensor comprises:
At least two photodetectors;
At least two transmit transistors, in order to the accumulation light signal that transmits respectively corresponding photodetector to first node;
Floating diffusion region is connected to described first node, and the effective capacitance that wherein is positioned at described first node comprises the electric capacity of described floating diffusion region and described photodetector, the transistorized stray capacitance of described transmission;
Reset transistor is the default reset voltage of Section Point in order to the described first node of resetting;
Electric capacity is connected between described first node and the described Section Point, in order to reduce the impact of effective capacitance; And
The source electrode following device transmits from transmitting transistorized accumulation light signal in order to buffering;
Wherein said reset transistor and source electrode following device are common to described at least two photodetectors.
2. image sensor as claimed in claim 1, wherein said photodetector comprises pinned photodiode (pinned photodiode).
3. image sensor as claimed in claim 1 also comprises row selecting transistor, in order to drive the source electrode following device of selected row.
4. image sensor as claimed in claim 1 also comprises power circuit, is connected between described Section Point and the power supply.
5. image sensor as claimed in claim 1 also comprises amplifier, and in order to receiving the voltage of described first node, and output voltage is in described Section Point.
6. low-noise pixel readout circuit with high-conversion-gain comprises:
A plurality of photodiodes, it is reversely biased;
A plurality of transmission transistors, the one end is connected to respectively corresponding photodiode, and the other end then connects to first node;
Floating diffusion region is connected to described first node, and the effective capacitance that wherein is positioned at described first node comprises electric capacity and the described photodiode of described floating diffusion region, transmits transistorized stray capacitance;
Reset transistor between described first node and Section Point, is the default reset voltage of described Section Point in order to the described first node of resetting;
The source electrode following device, its grid is connected to described first node;
Row selecting transistor between described Section Point and ground, is in series with described source electrode following device;
Power circuit is connected between power supply and the described Section Point; And
Electric capacity is connected between described first node and the described Section Point, in order to reduce the impact of described effective capacitance.
7. the low-noise pixel readout circuit with high-conversion-gain as claimed in claim 6, the plus earth of wherein said each photodiode, negative electrode then is connected to one of the transistorized source of corresponding transmission/drain electrode.
8. the low-noise pixel readout circuit with high-conversion-gain as claimed in claim 7, transistorized another source/drain electrode of wherein said transmission connects, and is connected to described first node.
9. the low-noise pixel readout circuit with high-conversion-gain as claimed in claim 6, wherein said power circuit comprise the PMOS transistors of two series connection.
10. low-noise pixel readout circuit with high-conversion-gain comprises:
A plurality of photodiodes, it is reversely biased;
A plurality of transmission transistors, the one end is connected to respectively corresponding photodiode, and the other end then connects to first node;
Floating diffusion region is connected to described first node, and the effective capacitance that wherein is positioned at described first node comprises electric capacity and the described photodiode of described floating diffusion region, transmits transistorized stray capacitance;
Reset transistor between described first node and Section Point, is the default reset voltage of described Section Point in order to the described first node of resetting;
The source electrode following device, its grid is connected to described first node;
Row selecting transistor between power supply and ground, is in series with described source electrode following device;
Amplifier is connected to described source electrode following device receiving the voltage of described first node, and is output in described Section Point; And
Electric capacity is connected between described first node and the described Section Point, in order to reduce the impact of described effective capacitance.
11. the low-noise pixel readout circuit with high-conversion-gain as claimed in claim 10, the plus earth of wherein said each photodiode, negative electrode then is connected to one of the transistorized source of corresponding transmission/drain electrode.
12. the low-noise pixel readout circuit with high-conversion-gain as claimed in claim 11, transistorized another source/drain electrode of wherein said transmission connects, and is connected to described first node.
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| CN102572323B (en) * | 2011-12-28 | 2014-12-10 | 中国科学院上海高等研究院 | Image sensor pixel circuit |
| CN103297720A (en) * | 2012-02-23 | 2013-09-11 | 联咏科技股份有限公司 | Light sensing pixel circuit and image sensor |
| US20130256509A1 (en) * | 2012-03-27 | 2013-10-03 | Omnivision Technologies, Inc. | Dual source follower pixel cell architecture |
| US9374545B2 (en) * | 2013-09-13 | 2016-06-21 | BAE Systems Imaging Solutions Inc. | Amplifier adapted for CMOS imaging sensors |
| US10418407B2 (en) | 2015-11-06 | 2019-09-17 | Artilux, Inc. | High-speed light sensing apparatus III |
| US10110837B2 (en) * | 2017-03-01 | 2018-10-23 | Omnivision Technologies, Inc. | Method and apparatus for data transmission in an image sensor |
| US11448830B2 (en) * | 2018-12-12 | 2022-09-20 | Artilux, Inc. | Photo-detecting apparatus with multi-reset mechanism |
| TWI845706B (en) | 2019-06-19 | 2024-06-21 | 美商光程研創股份有限公司 | Photo-detecting apparatus and current reuse method |
| CN112399099B (en) * | 2019-08-12 | 2023-04-18 | 天津大学青岛海洋技术研究院 | Charge domain sampling low-noise pixel structure |
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|---|---|---|---|---|
| CN101044749A (en) * | 2004-08-25 | 2007-09-26 | 微米技术有限公司 | Pixel for boosting pixel reset voltage |
| CN1819630A (en) * | 2005-02-07 | 2006-08-16 | 三星电子株式会社 | CMOS active pixel sensor and active pixel sensor array |
| CN101171830A (en) * | 2005-05-11 | 2008-04-30 | 美光科技公司 | High fill factor multiplexing pixels |
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| CN101902583A (en) | 2010-12-01 |
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