CN101901840B - Schottky diode device and manufacturing method thereof - Google Patents

Abstract

The invention provides a Schottky diode device and a manufacturing method thereof, wherein the Schottky diode device comprises: a p-type semiconductor structure; the n-type drift region is arranged on the surface of the p-type semiconductor structure and comprises a first n-type doped region and a second n-type doped region with different doping concentrations, and the second n-type doped region has a higher doping concentration than the first n-type doped region; a plurality of isolation structures disposed in the second n-type doped region to define an anode region and a cathode region; a third n-type doped region disposed on the surface of the second n-type doped region partially exposed from the cathode region; the anode electrode is arranged on the first n-type doped region in the anode region; and a cathode electrode disposed on the third n-type doped region in the cathode region. The invention provides a Schottky diode device and a manufacturing method thereof, which are used for improving the electrical performances such as breakdown voltage, unit area current and the like.

Description

Schottky diode device and method of manufacturing the same

technical field

The present invention relates to semiconductor devices, and more particularly to a Schottky diode device and a manufacturing method thereof.

Background technique

A Schottky diode is a semiconductor device with a metal-semiconductor junction, where the current-voltage characteristics of the metal-semiconductor junction structure depend on the polarity of the applied voltage. .

When the Schottky diode is forward biased (that is, a positive voltage is applied to the anode and a negative voltage is applied to the cathode), the carriers can be turned on, and when the Schottky diode is reverse biased (that is, a negative voltage is applied to the anode and the negative voltage is applied to the anode) When a positive voltage is applied to the cathode), the carriers are not easy to conduct, so it has the same unidirectional conduction characteristics as the general pn junction diode. In addition, since the Schottky diode is a single-carrier movement, it has a relatively low threshold voltage when it is forward-biased, and its response speed is extremely fast when it is switched between forward and reverse biases.

Please refer to FIG. 1 , which shows a cross-section of a known Schottky diode device 100 . As shown in FIG. 1 , the Schottky diode device 100 includes an n-type drift region (n drift region) 104, an anode electrode 112, a cathode electrode 114, and an n+ doped substance formed in the n-type drift region (n drift region) 104. Area 116 and other major components. The n-type drift region 104 is formed in the surface of the p-type silicon substrate 102, and two separated field oxides 108 are formed on the surface of the n-type drift region 104, so that the field oxide 108 is defined on the surface of the n-type drift region 104 Separated anode area 150 and cathode area 160 . A patterned interlayer dielectric layer 110 is further formed on the surface of the n-type drift region 104, which covers part of the surface of the field oxide 108 and its adjacent n-type drift region 104 and n+ doped region 116. The anode electrode 112 and the cathode electrode 114 formed of titanium, titanium nitride, tungsten, aluminum and other metal materials respectively cover and penetrate the interlayer dielectric layer 110 to physically contact the n-type drift region 104 located in the anode region 150 and the The n+ doped region 116 located in the cathode region 160 . A p-type doped region 106 is respectively formed in the n-type drift region 104 adjacent to the field oxide 108 in the anode region 150 to avoid forming a high electric field in the region of the electrode 112 adjacent to the n-type drift region 104 and the field oxide 108 , by improving the voltage collapse performance of the Schottky diode device 100 under reverse bias. The interface between the anode electrode 112 in the Schottky diode device 100 and the contacting n-type drift region 104 is a metal-semiconductor junction 120 .

In addition, in order to further increase the breakdown voltage of the Schottky diode device 100 under reverse bias, the n-type doping concentration in the n-type drift region 104 should generally not be higher than 2.0×10 ¹⁶ atoms/cm ³ . Although the doping concentration of the n-type drift region 104 helps to improve the breakdown voltage performance of the Schottky diode device 100 under reverse bias, it makes the Schottky diode device 100 flow through the anode under forward bias. The current per unit area between the region 150 and the cathode region 160 is limited.

Therefore, there is a need for a novel Schottky diode device to meet device requirements such as high breakdown voltage under reverse voltage and high current per unit area under forward bias voltage.

Contents of the invention

In view of this, the present invention provides a Schottky diode device and its manufacturing method to improve its electrical properties such as breakdown voltage and unit area current.

According to an embodiment, the present invention provides a Schottky diode device, comprising:

A p-type semiconductor structure; an n-type drift region, disposed on the surface of the p-type semiconductor structure, wherein the n-type drift region includes a first n-type doped region and a second n-type doped region with different doping concentrations a doped region, and the second n-type doped region surrounds the sidewall of the first n-type doped region and has a higher doping concentration than the first n-type doped region; a plurality of isolation structure, arranged in the second n-type doped region of the n-type drift region to define an anode region and a cathode region, wherein the anode region exposes the surface of the first n-type doped region The cathode region partially exposes the surface of the second n-type doped region; a third n-type doped region is arranged on the surface of the second n-type doped region partially exposed by the cathode region, wherein the The third n-type doped region has a higher doping concentration than the second n-type doped region; an anode electrode is disposed on the first n-type doped region in the anode region; and A cathode electrode is arranged on the third n-type doped region in the cathode region.

According to another embodiment, the present invention provides a method for manufacturing a Schottky diode device, comprising:

A p-type semiconductor layer is provided; an n-type drift region is formed in the surface of the p-type semiconductor layer, wherein the n-type drift region includes a first n-type doped region and surrounds the first n-type doped region a second n-type doped region, and the second n-type doped region has a doping concentration higher than that of the first n-type doped region; several isolation structures are formed adjacent to the first n-type doped region In the second n-type doped region of the doped region, an anode region and a cathode region are defined on the p-type semiconductor layer, wherein the anode region exposes the first n-type doped region. region and a part of the second n-type doped region adjacent to the first n-type doped region, and the cathode region only exposes another part of the second n-type doped region; forming a third The n-type doped region is within the second n-type doped region exposed by the cathode region; and an anode electrode and a cathode electrode are respectively formed in the anode region and the cathode region, so as to physically contact the two respectively. The first n-type doped region and the third n-type doped region.

Description of drawings

Figure 1 shows a cross-section of a known Schottky diode device; and

2-6 are a series of cross-sectional views showing a method for fabricating a Schottky diode device according to an embodiment of the present invention.

Figure number:

100 ~ Schottky diode device;

102～p-type silicon substrate;

104～n-type drift region;

106～p-type doped region;

108～field oxide;

110～interlayer dielectric layer;

112～anode electrode;

114～cathode electrode;

116～n+doped region;

120～metal-semiconductor interface;

150～anode area;

160～cathode area;

202～p-type semiconductor layer;

204～mask layer;

206～Ion implantation procedure;

208～n-type doped region;

210～p-type strip region;

212～the second n-type doped region;

214～the first n-type doped region;

216～mask layer;

218～Ion implantation procedure;

220～p-type doped region;

222～isolation structure;

224～mask layer;

226～Ion implantation procedure;

228～n+doped region;

230～interlayer dielectric layer;

232, 234 ~ electrodes;

235, 237～opening;

250 ~ n-type drift region;

260～anode area;

270～cathode area;

280～metal-semiconductor junction;

W～the width of the mask layer/p-type strip region;

P～mask layer/p-type strip region spacing.

Detailed ways

In order to make the above and other objects, features and advantages of the present invention more comprehensible, a preferred embodiment is specifically cited below, together with the accompanying drawings, and is described in detail as follows:

2-6 are a series of cross-sectional views showing a method for fabricating a Schottky diode device according to an embodiment of the present invention.

Referring to FIG. 2 , firstly, a p-type semiconductor structure, such as a p-type semiconductor layer 202 is provided. The p-type semiconductor layer 202 is, for example, an epitaxial layer of a semiconductor material containing silicon or silicon germanium, or a part of a substrate. Then several patterned mask layers 204 are formed on the surface of the semiconductor substrate 202 to expose part of the p-type semiconductor layer 202 . Next, an ion implantation process 206 is performed on the p-type semiconductor layer 202 and these mask layers 204 are used as ion implantation masks, thus forming several separated n-type doped regions 208 in the p-type semiconductor layer 202 . The ion implantation procedure 206 uses n-type dopants such as phosphorus and arsenic, the ion implantation energy used is about 500KeV-800KeV, and the implanted n-type dopant dose is about 2×10 ¹² ˜8×10 ¹² atoms/cm ² .

As shown in FIG. 2, since several separated mask layers 204 are formed on the p-type semiconductor layer 202, after the ion implantation procedure 206 is performed, between the formed separated several n-type doped regions 208, respectively There is a p-type strip region 210 without n-type doping, which still has the same doping characteristics and doping concentration as the p-type semiconductor layer 202 . Here, the mask layers 204 respectively have a width W between 0.4 μm˜0.8 μm and a distance P between adjacent mask layers 204 exists between 0.4 μm˜0.8 μm. In this way, by adjusting the number of mask layers 204 formed on the p-type semiconductor layer 202, their width W, and the distance P between adjacent mask layers 204, the number, range and size of the p-type strip regions 210 formed can be controlled. contour.

Please refer to FIG. 3 , after removing the mask layer 204 formed on the p-type semiconductor layer 202 (see FIG. 2 ), an annealing process (not shown) is then performed at a temperature of 1000-1100° C. Annealing treatment. Therefore, after the annealing process is performed, a first n-type doped region 214 and a second n-type doped region 212 surrounding the sidewall of the first n-type doped region 214 are formed on the surface of the p-type semiconductor layer 202 , and the bottom surfaces of the first n-type doped region 214 and the second n-type doped region 212 respectively contact the p-type semiconductor layer 202 . Here, the doping concentration in the second n-type doping region 212 is about 2×10 ¹⁶ -8×10 ¹⁶ atoms/cm ³ , and the doping concentration in the first n-type doping region 214 is about 4×10 16 atoms/cm 3 . 10 ¹⁵ ～2×10 ¹⁶ atoms/cm ³ , and the doping concentration in the second n-type doped region 212 is higher than the doping concentration in the first n-type doped region 214, and the previous p-type strip region 210 It ceases to exist after the annealing process is performed. The first n-type doped region 214 and the second n-type doped region 212 constitute the n-type drift region 250 of the Schottky diode device.

Please continue to refer to FIG. 3 , and then a patterned mask layer 216 is formed on the surface of the n-type drift region 250 to respectively expose a part of the second n-type doped region 212 on both sides of the first n-type doped region 214 . Next, an ion implantation process 218 is performed using the mask layer 216 as an ion implantation mask to form a p-type doped region in the second n-type doped region 212 on both sides of the first n-type doped region 214. Miscellaneous area 220. The ion implantation procedure 218 uses p-type dopants such as boron, the ion implantation energy used is about 40KeV-80KeV, and the implanted p-type dopant dose is about 8×10 ¹³ ˜5×10 ¹⁴ atoms /cm ² .

Referring to FIG. 4 , after removing the mask layer 216 (see FIG. 3 ), two separate isolation structures 222 are formed on the surface of the second n-type doped region 212 in the n-type drift region 250 and in it, so as to The surface of the n-type drift region 250 defines an anode region 260 and a cathode region 270 of the Schottky diode device. Here, the isolation structure 222 is shown as a known field oxide (field oxide) and can be formed by a known field oxide process, but it does not limit the present invention, and the isolation structure 222 can also adopt other types of isolation structure. When the isolation structures 222 are formed, annealing can be performed on the previously formed p-type doped regions 220 (see FIG. 3 ), and after the isolation structures 222 are formed, the p-type doped regions 220 can be transformed into one side adjacent to and covering each isolation structure 222. The corner p-type doped region 220. The p-type doped region 220 also partially extends into the first n-type doped region 214 . Then a patterned mask layer 224 is formed to substantially cover the isolation structure 222 and the anode region 260 and expose the surface of the second n-type doped region 212 in the cathode region 270 . Then, an ion implantation procedure 226 is performed to form an n+ doped region 228 on the surface of the second n-type doped region 212 for use as a cathode contact. The ion implantation procedure 226 uses n-type dopants such as phosphorus and arsenic, the ion implantation energy used is about 40KeV-60KeV, and the implanted n-type dopant dose is about 1×10 ¹⁵ ˜5×10 ¹⁵ atoms/cm ² .

Referring to FIG. 5 , after removing the mask layer 224 (see FIG. 4 ), a patterned interlayer dielectric layer 230 is then formed, which substantially covers the isolation structure 222 and the p-type doped portion of the adjacent isolation structure 222 respectively. Region 220 and n+ doped region 228 . An opening 235 and 237 are formed in the interlayer dielectric layer 230 to substantially expose the entire surface of the first n-type doped region 214 and part of the surface of the n+ doped region 228 respectively.

Referring to FIG. 6, patterned electrode layers 232 and 234 are then formed, wherein the electrode layer 232 is disposed on the p-type doped region 220 and the first n-type doped region 214 and partially covers the adjacent interlayer dielectric layer. 230 , and the electrode layer 234 is disposed on the n+ doped region 228 and partially covers the adjacent interlayer dielectric layer 234 . The electrodes 232 and 234 are respectively used as an anode electrode and a cathode electrode, which can be made of metal materials such as titanium, titanium nitride, tungsten, aluminum, etc., and can be formed by known processes such as deposition, grinding, and etching.

As shown in Figure 6, a Schottky diode device according to an embodiment of the present invention is shown, which mainly includes:

A p-type semiconductor structure (such as p-type semiconductor layer 202); an n-type drift region, disposed on the surface of the p-type semiconductor structure, wherein the n-type drift region includes a first n-type doped region with different doping concentrations (such as first n-type doped region 214) and a second n-type doped region (such as the second n-type doped region 212), and the second n-type doped region surrounds the first n-type doped region The sidewall has a higher doping concentration than the first n-type doped region; a plurality of isolation structures (such as isolation structure 222) are arranged in the second n-type doped region of the n-type drift region to define a An anode region (such as the anode region 260) and a cathode region (such as the cathode region 270), wherein the anode region exposes the surface of the first n-type doped region and the cathode region partially exposes the surface of the second n-type doped region; The third n-type doped region (such as n+ doped region 228) is arranged on the surface of the second n-type doped region partially exposed by the cathode region, wherein the third n-type doped region has a The doping concentration of the n-type doped region; an anode electrode (such as the anode electrode 232), which is arranged on the first n-type doped region in the anode region; and a cathode electrode (such as the cathode electrode 234), which is arranged on the above the third n-type doped region in the cathode region.

In this embodiment, the Schottky diode device includes a first n-type doped region 214 with a relatively low doping concentration and a second n-type doped region 212 with a relatively high doping concentration. The n-type drift region 250, in which the first n-type doped region 214 is physically in contact with the anode electrode 232, based on its relatively low n-type doping concentration, thus helps to improve the relationship between the anode electrode 232 and the first n-type doped region. The breakdown voltage performance of the metal-semiconductor junction 280 between the impurity regions 214 under reverse bias. In addition, since the second n-type doped region 212 between the anode region 260 and the cathode region 270 has a relatively high n-type doping concentration, the current per unit area of the Schottky diode device can be improved.

In addition, referring to the manufacturing process of FIGS. 2 to 6, the manufacturing method of the Schottky diode device of the present invention is aimed at the photomask used to form the n-type drift region 104 in the known Schottky diode device as shown in FIG. The n-type drift region 250 composed of two n-type doped regions with different n-type doping concentrations can be formed as shown in FIG. The increase of the number, and the purpose of controlling the n-type doping concentration under the Schottky junction 280 can be achieved by appropriately adjusting the number and width of the p-type strip regions 210 and the spacing between the p-type strip regions 210 .

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make various modifications and changes without departing from the spirit and scope of the present invention. Modification, therefore, the scope of protection of the present invention should be defined by the scope of claims.

Claims (13)

1. a Schottky diode device is characterized in that, said device comprises:

One p N-type semiconductor N structure;

One n type drift region; Be arranged at said p N-type semiconductor N body structure surface; Wherein said n type drift region comprises one the one n type doped region and one the 2nd n type doped region that doping content is different, and said the 2nd n type doped region is around the sidewall of a said n type doped region and have the high doping content of a more said n type doped region;

A plurality of isolation structures; Be arranged in said the 2nd n type doped region of said n type drift region; To define an anode region and a cathodic region; The surface of part of said the 2nd n type doped region of a said n type surface of adulteration area and a contiguous said n type doped region is exposed in wherein said anode region, and the surface of another part of said the 2nd n type doped region is exposed in said cathodic region;

One the 3rd n type doped region is arranged at the 2nd n type doped region surface of exposing for said cathodic region part, and wherein said the 3rd n type doped region has the doping content that is higher than said the 2nd n type doped region;

One anode electrode is arranged on the said n type doped region in the said anode region; And

One cathode electrode is arranged on said the 3rd n type doped region in the said cathodic region.

2. Schottky diode device as claimed in claim 1 is characterized in that, a said n type doped region has between 4 * 10 ¹⁵～2 * 10 ¹⁶Atoms/cm ³Doping content, and said the 2nd n type doped region has between 2 * 10 ¹⁶～8 * 10 ¹⁶Atoms/cm ³Doping content.

3. Schottky diode device as claimed in claim 1 is characterized in that, a said n type doped region contacts said p N-type semiconductor N structure with the bottom surface of said the 2nd n type doped region.

4. Schottky diode device as claimed in claim 1; It is characterized in that; Said device more comprises a p type doped region, is arranged within the said n type surface of adulteration area exposed for said anode region and said the 2nd n type doped region surface and coats the corner of one of said these isolation structures.

5. Schottky diode device as claimed in claim 4; It is characterized in that; Said device more comprises an interlayer dielectric layer; Be arranged between said these isolation structures and said anode electrode and the cathode electrode, said interlayer dielectric layer covers the part of said these isolation structures and contiguous p type doped region thereof and the part of the 3rd n type doped region respectively.

6. Schottky diode device as claimed in claim 4 is characterized in that, said anode electrode entity contacts a said p type doped region and a said n type doped region.

7. Schottky diode device as claimed in claim 1 is characterized in that, said the 3rd n type doped region has between 1 * 10 ¹⁷～5 * 10 ¹⁷Atoms/cm ³Doping content.

8. the manufacturing approach of a Schottky diode device is characterized in that, said method comprises:

One p type semiconductor layer is provided;

Form a n type drift region in said p N-type semiconductor N laminar surface; Wherein said n type drift region comprises one the one n type doped region and around one the 2nd n type doped region of a said n type doped region, and said the 2nd n type doped region has the doping content that is higher than a said n type doped region;

Form several isolation structures within said the 2nd n type doped region of a contiguous said n type doped region; And then on said p type semiconductor layer, define an anode region and a cathodic region; The part of said the 2nd n type doped region of a said n type doped region and a contiguous said n type doped region has been exposed in wherein said anode region, and another part of said the 2nd n type doped region has only been exposed in said cathodic region;

Form within said the 2nd n type doped region that one the 3rd n type doped region exposes in said cathodic region; And

In said anode region and cathodic region, form an anode electrode and a cathode electrode respectively, contact a said n type doped region and said the 3rd n type doped region with entity respectively.

9. the manufacturing approach of Schottky diode device as claimed in claim 8 is characterized in that, a said n type doped region has between 4 * 10 ¹⁵～2 * 10 ¹⁶Atoms/cm ³Doping content, said the 2nd n type doped region has between 2 * 10 ¹⁶～8 * 10 ¹⁶Atoms/cm ³Doping content, and said the 3rd n type doped region has between 1 * 10 ¹⁷～5 * 10 ¹⁷Atoms/cm ³Doping content.

10. the manufacturing approach of Schottky diode device as claimed in claim 8 is characterized in that, forms said n type drift region and in said p N-type semiconductor N laminar surface, comprises:

On said p type semiconductor layer, form first mask layer of a plurality of separations;

Implement one first ion injecting program, adopt said these first mask layers, in said p type semiconductor layer, form the 4th n type doped region of a plurality of separations and be positioned at a plurality of p type bar areas between said these the 4th n type doped regions as injecting mask;

Remove said these first mask layers; And

Implement one first cycle of annealing, in said p type semiconductor layer, to form a said n type doped region and, to use and form said n type drift region around said the 2nd n type doped region of a said n type doped region.

11. the manufacturing approach of Schottky diode device as claimed in claim 10 is characterized in that, said these p type bar areas have between the width of 0.4 μ m～0.8 μ m and said these p type bar areas and have the spacing between 0.4 μ m～0.8 μ m.

12. the manufacturing approach of Schottky diode device as claimed in claim 8 is characterized in that, forms before said these isolation structures, more comprises:

Form one first mask layer, part is exposed the part of said the 2nd n type doped region of a contiguous said n type doped region; And

Implement one first ion injecting program, adopt said first mask layer, form a p type doped region with said the 2nd n type surface of adulteration area in a contiguous said n type doped region as injecting mask.

13. the manufacturing approach of Schottky diode device as claimed in claim 12 is characterized in that, when forming said these isolation structures, more comprises:

Simultaneously said p type doped region is transformed into a p type guard ring that is positioned at a said n type doped region and said the 2nd n type doped region junction, to coat a corner of said these isolation structures.

Images