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CN101887898A - TFT-LCD (Thin Film Transistor Liquid Crystal Display) array base plate and manufacturing method thereof - Google Patents

TFT-LCD (Thin Film Transistor Liquid Crystal Display) array base plate and manufacturing method thereof Download PDF

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Publication number
CN101887898A
CN101887898A CN2009100844926A CN200910084492A CN101887898A CN 101887898 A CN101887898 A CN 101887898A CN 2009100844926 A CN2009100844926 A CN 2009100844926A CN 200910084492 A CN200910084492 A CN 200910084492A CN 101887898 A CN101887898 A CN 101887898A
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China
Prior art keywords
connection electrode
via hole
electrode
grid line
data wire
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CN2009100844926A
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Chinese (zh)
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徐超
张弥
刘竞
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Beijing BOE Optoelectronics Technology Co Ltd
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Beijing BOE Optoelectronics Technology Co Ltd
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Priority to CN2009100844926A priority Critical patent/CN101887898A/en
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Abstract

The invention relates to a TFT-LCD (Thin Film Transistor Liquid Crystal Display) array base plate and a manufacturing method thereof. The array base plate comprises a grid line and a data line, wherein a pixel electrode and a thin film transistor are formed in a pixel region limited by the grid line and the data line, and a connection electrode forming a double-layer structure for the grid line and/or the data line is also arranged in the pixel region. The manufacturing method comprises the following steps of: forming a figure including the grid line, the data line, an active layer, a source electrode and a drain electrode, wherein the grid line and/or the data line is in the double-layer structure; depositing a passivation layer to form a figure including the pixel electrode, wherein a passivation layer through hole is positioned in the same position of the drain electrode; and depositing a transparent conductive thin film to form a figure including the pixel electrode, wherein the pixel electrode is connected with the drain electrode through the passivation layer through hole. The TFT-LCD array base plate effectively reduces bad line breakage of the grid line and the data line to greatly improve the quality and the yield of the product, simultaneously improves the size of capacitance storage in unit area and is beneficial to improving the opening rate and the display luminance of a TFT-LCD.

Description

TFT-LCD array base palte and manufacture method thereof
Technical field
The present invention relates to a kind of LCD and manufacture method thereof, especially a kind of TFT-LCD array base palte and manufacture method thereof.
Background technology
Because Thin Film Transistor-LCD (Thin Film Transistor Liquid CrystalDisplay, abbreviation TFT-LCD) has characteristics such as volume is little, low in energy consumption, radiationless, obtained in recent years developing by leaps and bounds, in current flat panel display market, occupied leading position.Liquid crystal panel is one of most important parts among the TFT-LCD, mainly comprises box is established therebetween array base palte and color membrane substrates together and with liquid crystal folder.Wherein array base palte comprises grid line and the data wire that several mutually insulateds intersect, and grid line and data wire define several pixel regions, are formed with pixel electrode and thin-film transistor in each pixel region.Preparation TFT-LCD array base palte is to form structure graph by a fabric diagram technology to finish, one time composition technology forms one deck structure graph, for TFT-LCD, TFT-LCD array base palte and manufacturing process have determined its product quality, rate of finished products and price.
In TFT-LCD array base palte preparation technology, though the strict particle in the production environment (Particle) grade of having controlled, but the particle of eliminating fully in the production environment is unpractical, therefore because of existing, particle cause the phenomenon of product defects often to take place in the actual production, and particle can cause mainly that grid line broken string is bad, broken data wire is bad or defective such as poor common electrode line breaking, bad not only being difficult to of these broken strings repairs, and causes the waste of subsequent technique.
In addition, existing TFT-LCD array base palte adopt usually grid line or with grid line with the public electrode wire of layer a battery lead plate as storage capacitance, be formed on pixel electrode on the passivation layer as another battery lead plate of storage capacitance.By the formula of storage capacitance as can be known, the distance between the size of unit are storage capacitance and two battery lead plates is inversely proportional to, and distance is big more, and the unit are storage capacitance is more little.Because the distance in the prior art TFT-LCD array base palte between two battery lead plates of storage capacitance is the thickness sum of gate insulation layer and passivation layer, distance is bigger, so there is unit are storage capacitance smaller defect in prior art TFT-LCD array base palte.
Summary of the invention
The purpose of this invention is to provide a kind of TFT-LCD array base palte and manufacture method thereof, effectively solve among the prior art TFT-LCD array base palte preparation technology and to have technological deficiencies such as broken string is bad.
To achieve these goals, the invention provides a kind of TFT-LCD array base palte, comprise grid line and data wire, be formed with pixel electrode and thin-film transistor in the pixel region that described grid line and data wire limit, also be provided with the connection electrode that forms double-deck grid line and/or data wire in the described pixel region.
Described connection electrode can comprise first connection electrode that is provided with and forms with layer with described grid line in a composition technology, be formed with gate insulation layer on the described grid line and first connection electrode, offer at least two first on the described gate insulation layer and connect via hole, described first connection electrode connects via hole by described at least two first and is connected with data wire, forms double-deck data wire.
Described connection electrode also can comprise second connection electrode that is provided with and forms with layer with described data wire in a composition technology, the described data wire and second connection electrode are formed on the gate insulation layer, offer at least two second on the described gate insulation layer and connect via hole, described second connection electrode connects via hole by described at least two second and is connected with grid line, forms double-deck grid line.
Described connection electrode can also comprise first connection electrode that is provided with layer with described grid line and forms and second connection electrode that is provided with and forms with layer with described data wire in a composition technology in a composition technology, be formed with gate insulation layer on the described grid line and first connection electrode, the described data wire and second connection electrode are formed on the gate insulation layer, offer at least two first connection via holes on the described gate insulation layer and be connected via hole with at least two second, described first connection electrode connects via hole by described at least two first and is connected with data wire, form double-deck data wire, described second connection electrode connects via hole by described at least two second and is connected with grid line, forms double-deck grid line.
Described connection electrode also comprises the 4th connection electrode and the 5th connection electrode that is provided with and forms with layer with described pixel electrode in a composition technology, described the 4th connection electrode and the 5th connection electrode are formed on the passivation layer, offer at least two the 4th connection via holes on the described passivation layer and be connected via hole with at least two the 5th, described the 4th connection electrode connects via hole by described at least two the 4th and is connected with data wire, form two double-deck data wires, described the 5th connection electrode connects via hole by described at least two the 5th and is connected with second connection electrode, forms two double-deck grid lines.
On the technique scheme basis, also comprise the public electrode wire that is provided with and in a composition technology, forms with layer with described grid line, described connection electrode comprises the 3rd connection electrode that is provided with and forms with layer with described data wire in a composition technology, described the 3rd connection electrode is formed on the gate insulation layer, offer at least two the 3rd on the described gate insulation layer and connect via hole, described the 3rd connection electrode connects via hole by described at least two the 3rd and is connected with public electrode wire, forms double-deck public electrode wire.
To achieve these goals, the present invention also provides a kind of TFT-LCD manufacturing method of array base plate, comprising:
Step 1, formation comprise the figure of grid line, data wire, active layer, source electrode and drain electrode, and described grid line and/or data wire are double-decker;
Step 2, on the substrate of completing steps 1 deposit passivation layer, form the figure comprise passivation layer via hole, described passivation layer via hole is positioned at the position of described drain electrode;
Step 3, on the substrate of completing steps 2 the deposit transparent conductive film, form and to comprise pattern of pixel electrodes, described pixel electrode is connected with drain electrode by described passivation layer via hole.
Described step 1 can comprise: deposition grid metallic film forms the figure that comprises gate electrode, grid line and first connection electrode by composition technology; Successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films comprise that by the formation of composition technology active layer is connected the figure of via hole with first, and at least two first connect the position that via holes are positioned at first connection electrode; Sedimentary origin leaks metallic film, forms the figure that comprises data wire, source electrode, drain electrode and TFT channel region by composition technology, and data wire connects via hole by described at least two first and is connected with first connection electrode, forms double-deck data wire.
Described step 1 also can comprise: deposition grid metallic film forms the figure that comprises gate electrode and grid line by composition technology; Successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films comprise that by the formation of composition technology active layer is connected the figure of via hole with second, and at least two second connect the position that via holes are positioned at described grid line; Sedimentary origin leaks metallic film, form the figure that comprises source electrode, drain electrode, TFT channel region, data wire and second connection electrode by composition technology, described second connection electrode connects via hole by described at least two second and is connected with described grid line, forms double-deck grid line.
Described step 1 can also comprise: deposition grid metallic film forms the figure that comprises gate electrode, grid line and first connection electrode by composition technology; Successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films, comprise that by the formation of composition technology active layer, first connects via hole is connected via hole with second figure, at least two first connect the position that via hole is positioned at described first connection electrode, and at least two second connect the position that via hole is positioned at described grid line; Sedimentary origin leaks metallic film, form the figure that comprises source electrode, drain electrode, TFT channel region, data wire and second connection electrode by composition technology, described data wire connects via hole by described at least two first and is connected with described first connection electrode, form double-deck data wire, described second connection electrode connects via hole by described at least two second and is connected with described grid line, forms double-deck grid line.
On the technique scheme basis, also comprise the figure that forms public electrode wire in the described step 1, described public electrode wire is a double-decker.
The invention provides a kind of TFT-LCD array base palte and manufacture method thereof, under the prerequisite that does not increase production technology, play double-deck grid line, double-deck data wire and/or the double-deck public electrode wire of redundant effect by formation, improved the reliability of grid line, data wire, public electrode wire work, reduced effectively that grid line broken string is bad, broken data wire is bad, poor common electrode line breaking, has increased substantially product quality and rate of finished products.Further, the distance in the structure of the present invention between two battery lead plates of storage capacitance reduces, and has improved the size of unit are storage capacitance, helps improving aperture opening ratio and the display brightness of TFT-LCD.In addition, the present invention also has does not increase cost, do not influence production capacity, simple and practical, need not strict control particle grades in producing etc. advantage.
Description of drawings
Fig. 1 is the plane graph of TFT-LCD array base palte first embodiment of the present invention;
Fig. 2 be among Fig. 1 A1-A1 to profile;
Fig. 3 be among Fig. 1 B1-B1 to profile;
Fig. 4 be among Fig. 1 C1-C1 to profile;
Fig. 5 is the plane graph after TFT-LCD array base palte first embodiment composition technology first time of the present invention;
Fig. 6 be among Fig. 5 A2-A2 to profile;
Fig. 7 be among Fig. 5 B2-B2 to profile;
Fig. 8 be among Fig. 5 C2-C2 to profile;
Fig. 9 is the plane graph after TFT-LCD array base palte first embodiment composition technology second time of the present invention;
Figure 10 be among Fig. 9 A3-A3 to profile;
Figure 11 be among Fig. 9 B3-B3 to profile;
Figure 12 be among Fig. 9 C3-C3 to profile;
Figure 13 is TFT-LCD array base palte first embodiment of the present invention plane graph after the composition technology for the third time;
Figure 14 be among Figure 13 A4-A4 to profile;
Figure 15 be among Figure 13 B4-B4 to profile;
Figure 16 be among Figure 13 C4-C4 to profile;
Figure 17 is the plane graph after the 4th composition technology of TFT-LCD array base palte first embodiment of the present invention;
Figure 18 be among Figure 17 A5-A5 to profile;
Figure 19 be among Figure 17 B5-B5 to profile;
Figure 20 be among Figure 17 C5-C5 to profile;
Figure 21 is the plane graph of TFT-LCD array base palte second embodiment of the present invention;
Figure 22 is the plane graph of TFT-LCD array base palte the 3rd embodiment of the present invention;
Figure 23 is the plane graph of TFT-LCD array base palte the 4th embodiment of the present invention;
Figure 24 be among Figure 23 D1-D1 to profile;
Figure 25 is the plane graph of TFT-LCD array base palte the 4th embodiment of the present invention;
Figure 26 be among Figure 25 E1-E1 to profile;
Figure 27 be among Figure 25 F1-F1 to profile;
Figure 28 is the flow chart of TFT-LCD manufacturing method of array base plate of the present invention;
Figure 29 is the flow chart of TFT-LCD manufacturing method of array base plate first embodiment of the present invention;
Figure 30 is the flow chart of TFT-LCD manufacturing method of array base plate second embodiment of the present invention;
Figure 31 is the flow chart of TFT-LCD manufacturing method of array base plate the 3rd embodiment of the present invention;
Figure 32 is the flow chart of TFT-LCD manufacturing method of array base plate the 4th embodiment of the present invention;
Figure 33 is the flow chart of TFT-LCD manufacturing method of array base plate the 5th embodiment of the present invention.
Description of reference numerals:
The 1-substrate; The 2-gate electrode; The 3-gate insulation layer;
The 4-semiconductor layer; The 5-doping semiconductor layer; 6-source electrode;
The 7-drain electrode; The 8-passivation layer; The 9-passivation layer via hole;
The 10-public electrode wire; The 11-grid line; The 12-data wire;
The 13-pixel electrode; 14-first connection electrode; 15-second connection electrode;
16-first connects via hole; 17-second connects via hole; 18-the 3rd connection electrode;
19-the 3rd connects via hole; 20-the 4th connection electrode; 21-the 4th connects via hole;
22-the 5th connection electrode; 23-the 5th connects via hole.
Embodiment
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
Fig. 1 is the plane graph of TFT-LCD array base palte first embodiment of the present invention, and what reflected is the structure of a pixel cell, Fig. 2 be among Fig. 1 A1-A1 to profile, Fig. 3 be among Fig. 1 B1-B1 to profile, Fig. 4 be among Fig. 1 C1-C1 to profile.As Fig. 1~shown in Figure 4, the agent structure of present embodiment TFT-LCD array base palte comprises several grid lines 11 and data wire 12, orthogonal grid line 11 and data wire 12 have defined several pixel regions, be formed with pixel electrode 13 and thin-film transistor in each pixel region, in each pixel region, the below of data wire 12 is provided with first connection electrode 14 that is connected with data wire 12, first connection electrode 14 is used for forming with data wire 12 data wire of double-deck redundancy structure, the top of grid line 11 is provided with the grid line that second connection electrode, 15, the second connection electrode 15 that are connected with grid line 11 are used for forming with grid line 11 double-deck redundancy structure.Particularly, the present embodiment thin-film transistor comprises the gate electrode 2 that is formed on the substrate 1, gate electrode 2 is connected with grid line 11, gate insulation layer 3 is formed on grid line 11 and the gate electrode 2 and covers whole base plate 1, offer at least two first connection via holes 16 on the gate insulation layer 3 and be connected via hole 17 with at least two second, wherein at least two first connect the position that via hole 16 is positioned at first connection electrode 14, and at least two second connect the position that via hole 17 is positioned at grid line 11; Active layer (comprising semiconductor layer 4 and doping semiconductor layer 5) is formed on the gate insulation layer 3 and is positioned at the top of gate electrode 2; One end of source electrode 6 is positioned on the active layer, the other end is connected with data wire 12, one end of drain electrode 7 is positioned on the active layer, be oppositely arranged with source electrode 6, form the TFT channel region between source electrode 6 and the drain electrode 7, the doping semiconductor layer 5 of TFT channel region is etched away fully, and etches away the semiconductor layer 4 of segment thickness, and the semiconductor layer 4 of TFT channel region is come out; Passivation layer 8 is formed on data wire 12, source electrode 6 and the drain electrode 7 and covers whole base plate 1, offers passivation layer via hole 9 on the passivation layer 8, and passivation layer via hole 9 is positioned at the position of drain electrode 7; Pixel electrode 13 is formed on the passivation layer 8, and is connected with drain electrode 7 by passivation layer via hole 9.First connection electrode 14 is formed on the substrate 1, is provided with layer and is forming with in a composition technology with gate electrode 2 and grid line 11, connects via hole 16 by at least two first simultaneously and is connected with data wire 12, forms double-deck data wire; Second connection electrode 15 is formed on the gate insulation layer 3, is provided with layer with data wire 12, source electrode 6 and drain electrode 7 and is forming with in a composition technology, connects via hole 17 by at least two second simultaneously and is connected with grid line 11, forms double-deck grid line.In the practical application, the optimum seeking site ground of at least two first connection via holes is positioned at two ends of first connection electrode, the optimum seeking site ground of at least two second connection via holes is positioned at two ends of second connection electrode, makes the double-deck data wire of formation and the functional reliability that grid line improves grid line and data wire to greatest extent.
Fig. 5~Figure 20 is the schematic diagram of the TFT-LCD array base palte first embodiment manufacture process of the present invention, the technical scheme of present embodiment can be described, below in the explanation, the alleged composition technology of the present invention comprises technologies such as photoresist coating, mask, exposure, etching, photoresist lift off, and photoresist is example with the positive photoresist.
Fig. 5 is the plane graph after TFT-LCD array base palte first embodiment composition technology first time of the present invention, what reflected is the structure of a pixel cell, Fig. 6 be among Fig. 5 A2-A2 to profile, Fig. 7 be among Fig. 5 B2-B2 to profile, Fig. 8 be among Fig. 5 C2-C2 to profile.At first adopt magnetron sputtering, thermal evaporation or other film build method, go up deposition one deck grid metallic film at substrate 1 (as glass substrate or quartz base plate), the single thin film that the grid metallic film can adopt metal or alloy such as Cr, W, Ti, Ta, Mo, Al, Cu to form also can be the plural layers that above metallic multilayer deposition forms.Adopt the normal masks plate grid metallic film to be carried out composition, on substrate 1, form the figure that comprises gate electrode 2, grid line 11 and first connection electrode 14, as Fig. 5~shown in Figure 7 by composition technology.
Fig. 9 is the plane graph after TFT-LCD array base palte first embodiment composition technology second time of the present invention, what reflected is the structure of a pixel cell, Figure 10 be among Fig. 9 A3-A3 to profile, Figure 11 be among Fig. 9 B3-B3 to profile, Figure 12 be among Fig. 9 C3-C3 to profile.Finish on the substrate of figure shown in Figure 5, using plasma strengthens chemical vapour deposition (CVD) (PECVD) or other film build method, successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films.Adopt the normal masks plate to form and comprise that active layer, first connects via hole 16 is connected via hole 17 with second figure, as Fig. 9~shown in Figure 12 by composition technology.After this composition technology, gate insulation layer 3 is formed on gate electrode 2, grid line 11 and first connection electrode 14 and covers whole base plate 1, active layer is made up of semiconductor layer 4 and doping semiconductor layer 5, be formed on the gate insulation layer 3 and be positioned at the top of gate electrode 2, at least two first connection via holes 16 are opened on the gate insulation layer 3 of first connection electrode, 14 positions, and first connects the surface that exposes first connection electrode 14 in the via hole 16; At least two second connection via holes 17 are opened on the gate insulation layer 3 of grid line 11 positions, and second connects the surface that exposes grid line 11 in the via hole 17.In actual the use, first, second quantity that connects via hole can be arranged to one, two (as shown in this embodiment) or a plurality of as required, two first connect two ends that via hole 16 lays respectively at first connection electrode 14, and two second connect two ends that via hole 17 lays respectively at second connection electrode of follow-up formation.
Figure 13 is TFT-LCD array base palte first embodiment of the present invention plane graph after the composition technology for the third time, what reflected is the structure of a pixel cell, Figure 14 be among Figure 13 A4-A4 to profile, Figure 15 be among Figure 13 B4-B4 to profile, Figure 16 be among Figure 13 C4-C4 to profile.Finish on the substrate of figure shown in Figure 9, adopt magnetron sputtering, thermal evaporation or other film build method, metallic film is leaked in deposition one deck source, the single thin film that metallic film can adopt metal or alloy such as Cr, W, Ti, Ta, Mo, Al, Cu to form is leaked in the source, also can be the plural layers that above metallic multilayer deposition forms.Adopt the normal masks plate to form the figure that comprises source electrode 6, drain electrode 7, data wire 12 and second connection electrode 15, as Figure 13~shown in Figure 16 by composition technology.After this composition technology, one end of source electrode 6 is positioned on the active layer (semiconductor layer 4 and doping semiconductor layer 5), the other end is connected with data wire 12, one end of drain electrode 7 is positioned on the active layer, be oppositely arranged with source electrode 6, form the TFT channel region between source electrode 6 and the drain electrode 7, the doping semiconductor layer 5 of TFT channel region is etched away fully, and etch away the semiconductor layer 4 of segment thickness, the semiconductor layer 4 of TFT channel region is come out; Data wire 12 is formed on the gate insulation layer 3 and by the first connection via hole of offering on the gate insulation layer 3 16 and is connected with first connection electrode 14, forms double-deck data wire; Second connection electrode 15 is formed on the gate insulation layer 3 and is positioned at the top of grid line 11, is connected with grid line 11 by the second connection via hole of offering on the gate insulation layer 3 17, forms double-deck grid line.
Figure 17 is the plane graph after the 4th composition technology of TFT-LCD array base palte first embodiment of the present invention, what reflected is the structure of a pixel cell, Figure 18 be among Figure 17 A5-A5 to profile, Figure 19 be among Figure 17 B5-B5 to profile, Figure 20 be among Figure 17 C5-C5 to profile.Finish on the substrate of figure shown in Figure 13, adopting PECVD or other film build method deposit passivation layer 8.Adopt the normal masks plate to form the figure that comprises passivation layer via hole 9, as Figure 17~shown in Figure 20 by composition technology.Wherein, passivation layer via hole 9 is opened on the passivation layer 8 that is positioned at drain electrode 7 positions, exposes drain electrode 7 surfaces in the passivation layer via hole 9.In addition, also be formed with the grid line interface via hole in grid line interface zone (grid line PAD) and the data line interface via hole figures of data line interface zone (data wire PAD) in this composition technology simultaneously.The technology that forms grid line interface via hole and data line interface via pattern by composition technology has been widely used in repeating no more here in the present composition technology.
At last, finish on the substrate of figure shown in Figure 17, adopt magnetron sputtering, thermal evaporation or other film build method deposit transparent conductive film, transparent conductive film can adopt materials such as tin indium oxide (ITO), indium zinc oxide (IZO) or aluminum zinc oxide, also can adopt other metal and metal oxide.Adopt the normal masks plate in pixel region, to form the figure that comprises pixel electrode 13 by composition technology, pixel electrode 13 not only is connected with drain electrode 7 by passivation layer via hole 9, and overlap with second connection electrode 15, make the pixel electrode 13 and second connection electrode 15 constitute storage capacitance, because second connection electrode 15 is connected with grid line 11, therefore formed storage capacitance structure of (Cs on Gate) on grid line, as described in Fig. 1~Fig. 4.
Present embodiment provides a kind of TFT-LCD array base palte, at first comprises the figure of gate electrode, grid line and first connection electrode by the composition technology formation first time; Comprise that by the composition technology formation second time active layer, first connects via hole is connected via hole with second figure; The figure that comprises source electrode, drain electrode, TFT channel region, data wire and second connection electrode by composition technology formation for the third time, and data wire connects via hole by first and is connected with first connection electrode, second connection electrode connects via hole by second and is connected with grid line, forms double-deck grid line and double-deck data wire; Form the figure that comprises passivation layer via hole by the 4th composition technology; Form by the 5th composition technology at last and comprise pattern of pixel electrodes.Present embodiment is under the prerequisite that does not increase production technology, play the double-deck grid line and the double-deck data wire of redundant effect by formation, improved the reliability of grid line and data wire work, it is bad bad with broken data wire effectively to have reduced the grid line broken string, has increased substantially product quality and rate of finished products.Further, present embodiment is by forming double-deck grid line, makes the distance between two battery lead plates of storage capacitance only be the thickness of gate insulation layer, apart from less, improve the size of unit are storage capacitance, helped improving aperture opening ratio and the display brightness of TFT-LCD.
Figure 21 is the plane graph of TFT-LCD array base palte second embodiment of the present invention, and what reflected is the structure of a pixel cell.As shown in figure 21, the agent structure of present embodiment TFT-LCD array base palte and aforementioned first embodiment are basic identical, different is, present embodiment only is provided with first connection electrode 14, first connection electrode 14 is formed on the substrate 1, be provided with layer and forming with gate electrode 2 and grid line 11, connect via hole 16 by at least two first simultaneously and be connected, form double-deck data wire with data wire 12 with in a composition technology.The preparation process of present embodiment TFT-LCD array base palte is also basic identical with aforementioned first embodiment, just for the second time composition technology and composition technology is different for the third time.Present embodiment composition technology for the second time is specially: adopt PECVD or other film build method successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films, adopt the normal masks plate to form by composition technology and comprise that active layer is connected the figure of via hole 16 with first, at least two first connect via hole 16 and are opened on the gate insulation layer 3 of first connection electrode, 14 positions; Present embodiment composition technology for the third time is specially: at first adopt magnetron sputtering, thermal evaporation or other film build method deposition one deck source to leak metallic film, adopt the normal masks plate to form the figure that comprises source electrode 6, drain electrode 7 and data wire 12 by composition technology, data wire 12 connects via hole 16 by first and is connected with first connection electrode 14, forms double-deck data wire.Present embodiment plays the redundant double-deck data wire that acts on by formation, has improved the reliability of data wire work, and it is bad effectively to have reduced broken data wire.
Figure 22 is the plane graph of TFT-LCD array base palte the 3rd embodiment of the present invention, and what reflected is the structure of a pixel cell.As shown in figure 22, the agent structure of present embodiment TFT-LCD array base palte and aforementioned first embodiment are basic identical, different is, present embodiment only is provided with second connection electrode 15, second connection electrode 15 is formed on the gate insulation layer 3, be provided with layer with data wire 12, source electrode 6 and drain electrode 7 and forming, connect via hole 17 by at least two second simultaneously and be connected, form double-deck grid line with grid line 11 with in a composition technology.The preparation process of present embodiment TFT-LCD array base palte is also basic identical with aforementioned first embodiment, just for the first time composition technology, composition technology and composition technology is different for the third time for the second time.Present embodiment composition technology for the first time is specially: adopt magnetron sputtering, thermal evaporation or other film build method deposition one deck grid metallic film, adopt the normal masks plate grid metallic film to be carried out composition, on substrate 1, form the figure that comprises gate electrode 2 and grid line 11 by composition technology; Present embodiment composition technology for the second time is specially: adopt PECVD or other film build method successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films, adopt the normal masks plate to form by composition technology and comprise that active layer is connected the figure of via hole 17 with second, at least two second connect via hole 17 and are opened on the gate insulation layer 3 of grid line 11 positions; Present embodiment composition technology for the third time is specially: at first adopt magnetron sputtering, thermal evaporation or other film build method deposition one deck source to leak metallic film, adopt the normal masks plate to form the figure that comprises source electrode 6, drain electrode 7, data wire 12 and second connection electrode 15 by composition technology, second connection electrode 15 is formed on the gate insulation layer 3 and is positioned at the top of grid line 11, be connected with grid line 11 by the second connection via hole of offering on the gate insulation layer 3 17, form double-deck grid line.Present embodiment plays the double-deck grid line of redundant effect by formation, not only improved the reliability of grid line work, it is bad effectively to have reduced the grid line broken string, and make the distance between two battery lead plates of storage capacitance only be the thickness of passivation layer, distance is less, improve the size of unit are storage capacitance, helped improving aperture opening ratio and the display brightness of TFT-LCD.
Figure 23 is the plane graph of TFT-LCD array base palte the 4th embodiment of the present invention, and what reflected is the structure of a pixel cell, Figure 24 be among Figure 23 D1-D1 to profile.As Figure 23 and shown in Figure 24, the agent structure of present embodiment TFT-LCD array base palte comprises several grid lines 11, data wire 12 and public electrode wire 10, orthogonal grid line 11 and data wire 12 have defined several pixel regions, be formed with the public electrode wire that thin-film transistor, pixel electrode 13 and the 3rd connection electrode 18, the three connection electrode 18 are used for forming with public electrode wire 10 double-deck redundancy structure in each pixel region.The structure of present embodiment thin-film transistor and pixel electrode is identical with aforementioned first embodiment, public electrode wire 10 is formed on substrate 1, be provided with layer and forming with grid line 11 and gate electrode 2 with in a composition technology, gate insulation layer 3 is formed on gate electrode 2, on grid line 11 and the public electrode wire 10 and cover whole base plate 1, offer at least two the 3rd on the gate insulation layer 3 and connect via hole 19, at least two the 3rd connect the position that via hole 19 is positioned at public electrode wire 10, the 3rd connection electrode 18 is formed on the gate insulation layer 3, with data wire 12, source electrode 6 and drain electrode 7 are provided with layer and are forming with in a composition technology, connect via hole 19 by at least two the 3rd simultaneously and be connected, form double-deck public electrode wire with public electrode wire 10.Equally, two the 3rd connect two ends that via hole 19 lays respectively at the 3rd connection electrode 18.
The preparation process of present embodiment TFT-LCD array base palte is also basic identical with aforementioned first embodiment, just for the first time composition technology, composition technology and composition technology is different for the third time for the second time.Present embodiment composition technology for the first time is specially: adopt magnetron sputtering, thermal evaporation or other film build method deposition one deck grid metallic film, adopt the normal masks plate grid metallic film to be carried out composition, on substrate 1, form the figure that comprises gate electrode 2, grid line 11 and public electrode wire 10 by composition technology; Present embodiment composition technology for the second time is specially: adopt PECVD or other film build method successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films, adopt the normal masks plate to form and comprise that active layer is connected the figure of via hole 19 with the 3rd by composition technology, at least two the 3rd connection via holes 19 are opened on the gate insulation layer 3 of public electrode wire 10 positions, expose public electrode wire 10 surfaces in the 3rd connection via hole 19; Present embodiment composition technology for the third time is specially: at first adopt magnetron sputtering, thermal evaporation or other film build method deposition one deck source to leak metallic film, adopt the normal masks plate to form the figure that comprises source electrode 6, drain electrode 7, data wire 12 and the 3rd connection electrode 18 by composition technology, the 3rd connection electrode 18 is formed on the gate insulation layer 3 and is positioned at the top of public electrode wire 10, be connected with public electrode wire 10 by the 3rd connection via hole of offering on the gate insulation layer 3 19, form double-deck public electrode wire.Behind follow-up formation pixel electrode 13, pixel electrode 13 and the 3rd connection electrode 18 constitute storage capacitances, because the 3rd connection electrode 18 is connected with public electrode wire 10, so have formed storage capacitance structure of (Cs on Common) on public electrode wire.Present embodiment plays the double-deck public electrode wire of redundant effect by formation, not only improved the reliability of public electrode wire work, effectively reduced poor common electrode line breaking, and make the distance between two battery lead plates of storage capacitance only be the thickness of passivation layer, distance is less, improve the size of unit are storage capacitance, helped improving aperture opening ratio and the display brightness of TFT-LCD.
TFT-LCD array base palte the 4th embodiment of the present invention can be combined to form new combining structure with aforementioned first embodiment~the 3rd embodiment, combining structure can be double-deck data wire and double-deck public electrode wire, also can be double-deck grid line and double-deck public electrode wire, can also be double-deck grid line, double-deck data wire and double-deck public electrode wire etc.
Figure 25 is the plane graph of TFT-LCD array base palte the 4th embodiment of the present invention, and what reflected is the structure of a pixel cell, Figure 26 be among Figure 25 E1-E1 to profile, Figure 27 be among Figure 25 F1-F1 to profile.As Figure 25~shown in Figure 27, present embodiment is a kind of structural extended of aforementioned first embodiment, agent structure and aforementioned first embodiment are basic identical, different is, present embodiment also is formed with the 4th connection electrode 20 and the 5th connection electrode 22, the 4th connection electrode 20 is used for constituting with the data wire 12 and first connection electrode 14 data wire of two double-deck redundancy structures, and the 5th connection electrode 22 is used for constituting with second connection electrode 15 and grid line 11 grid line of two double-deck redundancy structures.Particularly, structures such as present embodiment grid line 11, data wire 12, first connection electrode 14 and second connection electrode 15 are identical with aforementioned first embodiment, the 4th connection electrode 20 and the 5th connection electrode 22 are formed on the passivation layer 8, on the passivation layer 8 except offering the passivation layer via hole 9 in drain electrode 7 positions, also offer at least two the 4th and connect via hole 21, offer at least two the 5th in second connection electrode, 15 positions and connect via hole 23 in data wire 12 positions.The 4th connection electrode 20 and the 5th connection electrode 22 are provided with layer with pixel electrode 13 and are forming with in a composition technology, the 4th connection electrode 20 connects via hole 21 by at least two the 4th and is connected with data wire 12, make the 4th connection electrode 20 constitute the data wire of two double-deck redundancy structures with the data wire 12 and first connection electrode 14, the 5th connection electrode 22 connects via holes 23 by at least two the 5th and is connected with second connection electrode 15, makes the 5th connection electrode 22 constitute the grid line of two double-deck redundancy structures with second connection electrode 15 and grid line 11.
First three time composition technology of preparation present embodiment TFT-LCD array base palte is identical with aforementioned first embodiment, the 4th composition technology of present embodiment is: adopt PECVD or other film build method deposit passivation layer 8, adopt the normal masks plate to form and comprise that passivation layer via hole 9, at least two the 4th connect via hole 21 and at least two the 5th figures that are connected via hole 23 by composition technology, passivation layer via hole 9 is positioned at the position of drain electrode 7, passivation layer in the passivation layer via hole 9 is etched away, and exposes drain electrode 7 surfaces; At least two the 4th connect the position that via hole 21 is positioned at data wire 12, and the 4th passivation layer that connects in the via hole 21 is etched away, and exposes data wire 12 surfaces; At least two the 5th connect the position that via hole 23 is positioned at second connection electrode 15, and the 5th passivation layer that connects in the via hole 23 is etched away, and expose the 5th and connect via hole 23 surfaces.The 5th composition technology of present embodiment is: adopt magnetron sputtering, thermal evaporation or other film build method deposit transparent conductive film, adopt the normal masks plate to form and comprise pixel electrode 13 by composition technology, the figure of the 4th connection electrode 20 and the 5th connection electrode 22, pixel electrode 13 is connected with drain electrode 7 by passivation layer via hole 9, the 4th connection electrode 20 connects via hole 21 by at least two the 4th and is connected with data wire 12, form two double-deck data wires, the 5th connection electrode 22 connects via hole 23 by at least two the 5th and is connected with second connection electrode 15, forms two double-deck grid lines.
In fact, fifth embodiment of the invention can also be combined to form new combining structure, give unnecessary details no longer one by one here with aforementioned second embodiment~the 4th embodiment.
Figure 28 is the flow chart of TFT-LCD manufacturing method of array base plate of the present invention, comprising:
Step 1, formation comprise the figure of grid line, data wire, active layer, source electrode and drain electrode, and described grid line and/or data wire are double-decker;
Step 2, on the substrate of completing steps 1 deposit passivation layer, form the figure comprise passivation layer via hole, described passivation layer via hole is positioned at the position of described drain electrode;
Step 3, on the substrate of completing steps 2 the deposit transparent conductive film, form and to comprise pattern of pixel electrodes, described pixel electrode is connected with drain electrode by described passivation layer via hole.
The invention provides a kind of TFT-LCD manufacturing method of array base plate, under the prerequisite that does not increase production technology, play the double-deck grid line and/or the double-deck data wire of redundant effect by formation, improved the reliability of grid line and data wire work, it is bad bad with broken data wire effectively to have reduced the grid line broken string, has increased substantially product quality and rate of finished products.Further,, the distance between two battery lead plates of storage capacitance is reduced, improved the size of unit are storage capacitance, help improving aperture opening ratio and the display brightness of TFT-LCD by forming double-deck grid line.
Figure 29 is the flow chart of TFT-LCD manufacturing method of array base plate first embodiment of the present invention, comprising:
Step 11, on substrate deposition grid metallic film, form the figure that comprises gate electrode, grid line and first connection electrode by composition technology;
Step 12, on the substrate of completing steps 11 successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films, comprise that by the formation of composition technology active layer is connected the figure of via hole with first, at least two first connect the position that via holes are positioned at described first connection electrode;
Step 13, sedimentary origin leaks metallic film on the substrate of completing steps 12, form the figure that comprises data wire, source electrode, drain electrode and TFT channel region by composition technology, described data wire connects via hole by described at least two first and is connected with described first connection electrode, forms double-deck data wire;
Step 14, on the substrate of completing steps 13 deposit passivation layer, form the figure comprise passivation layer via hole, described passivation layer via hole is positioned at the position of drain electrode;
Step 15, on the substrate of completing steps 14 the deposit transparent conductive film, form and to comprise pattern of pixel electrodes, described pixel electrode is connected with drain electrode by passivation layer via hole.
Present embodiment is a kind of technical scheme that forms the double-decker data wire, and its process can repeat no more here referring to the explanation of TFT-LCD array base palte embodiment of the present invention.
Figure 30 is the flow chart of TFT-LCD manufacturing method of array base plate second embodiment of the present invention, comprising:
Step 21, on substrate deposition grid metallic film, form the figure that comprises gate electrode and grid line by composition technology;
Step 22, on the substrate of completing steps 21 successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films, comprise that by the formation of composition technology active layer is connected the figure of via hole with second, at least two second connect the position that via holes are positioned at described grid line;
Step 23, sedimentary origin leaks metallic film on the substrate of completing steps 12, form the figure that comprises source electrode, drain electrode, TFT channel region, data wire and second connection electrode by composition technology, described second connection electrode connects via hole by described at least two second and is connected with described grid line, forms double-deck grid line;
Step 24, on the substrate of completing steps 23 deposit passivation layer, form the figure comprise passivation layer via hole, described passivation layer via hole is positioned at the position of drain electrode;
Step 25, on the substrate of completing steps 24 the deposit transparent conductive film, form and to comprise pattern of pixel electrodes, described pixel electrode is connected with drain electrode by passivation layer via hole.
Present embodiment is a kind of technical scheme that forms the double-decker grid line, and its process can repeat no more here referring to the explanation of TFT-LCD array base palte embodiment of the present invention.
Figure 31 is the flow chart of TFT-LCD manufacturing method of array base plate the 3rd embodiment of the present invention, comprising:
Step 31, on substrate deposition grid metallic film, form the figure that comprises gate electrode, grid line and first connection electrode by composition technology;
Step 32, on the substrate of completing steps 31 successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films, comprise that by the formation of composition technology active layer, first connects via hole is connected via hole with second figure, at least two first connect the position that via hole is positioned at described first connection electrode, and at least two second connect the position that via hole is positioned at described grid line;
Step 33, sedimentary origin leaks metallic film on the substrate of completing steps 32, form the figure that comprises source electrode, drain electrode, TFT channel region, data wire and second connection electrode by composition technology, described data wire connects via hole by described at least two first and is connected with described first connection electrode, form double-deck data wire, described second connection electrode connects via hole by described at least two second and is connected with described grid line, forms double-deck grid line;
Step 34, on the substrate of completing steps 33 deposit passivation layer, form the figure comprise passivation layer via hole, described passivation layer via hole is positioned at the position of drain electrode;
Step 35, on the substrate of completing steps 34 the deposit transparent conductive film, form and to comprise pattern of pixel electrodes, described pixel electrode is connected with drain electrode by passivation layer via hole.
Present embodiment is a kind of technical scheme that forms double-decker grid line and double-decker data wire, and its process can repeat no more here referring to the explanation of TFT-LCD array base palte embodiment of the present invention.
Figure 32 is the flow chart of TFT-LCD manufacturing method of array base plate the 4th embodiment of the present invention, comprising:
Step 41, on substrate deposition grid metallic film, form the figure that comprises gate electrode, grid line and public electrode wire by composition technology;
Step 42, on the substrate of completing steps 41 successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films, comprise that by the formation of composition technology active layer is connected the figure of via hole with the 3rd, at least two the 3rd connect the position that via holes are positioned at described public electrode wire;
Step 43, sedimentary origin leaks metallic film on the substrate of completing steps 42, form the figure that comprises source electrode, drain electrode, TFT channel region, data wire and the 3rd connection electrode by composition technology, described the 3rd connection electrode connects via hole by described at least two the 3rd and is connected with described public electrode wire, forms double-deck public electrode wire;
Step 44, on the substrate of completing steps 43 deposit passivation layer, form the figure comprise passivation layer via hole, described passivation layer via hole is positioned at the position of drain electrode;
Step 45, on the substrate of completing steps 44 the deposit transparent conductive film, form and to comprise pattern of pixel electrodes, described pixel electrode is connected with drain electrode by passivation layer via hole.
Present embodiment is a kind of technical scheme that forms the double-decker public electrode wire, can make up with aforementioned first embodiment~the 3rd embodiment as required, the formation storage capacitance is in the structure on the public electrode wire or form the combining structure of storage capacitance on grid line and public electrode wire.The structure of combination technique scheme can be double-deck data wire and double-deck public electrode wire, also can be double-deck grid line and double-deck public electrode wire, can also be double-deck grid line, double-deck data wire and double-deck public electrode wire etc.
Figure 33 is the flow chart of TFT-LCD manufacturing method of array base plate the 5th embodiment of the present invention, and in technical scheme shown in Figure 31, described step 14 and step 15 are different, and the present embodiment flow process comprises:
Step 51, on substrate deposition grid metallic film, form the figure that comprises gate electrode, grid line and first connection electrode by composition technology;
Step 52, on the substrate of completing steps 51 successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films, comprise that by the formation of composition technology active layer, first connects via hole is connected via hole with second figure, at least two first connect the position that via hole is positioned at described first connection electrode, and at least two second connect the position that via hole is positioned at described grid line;
Step 53, sedimentary origin leaks metallic film on the substrate of completing steps 52, form the figure that comprises source electrode, drain electrode, TFT channel region, data wire and second connection electrode by composition technology, described data wire connects via hole by described at least two first and is connected with described first connection electrode, and described second connection electrode connects via hole by described at least two second and is connected with described grid line;
Step 54, on the substrate of completing steps 53 deposit passivation layer, formation comprises passivation layer via hole, at least two the 4th connection via holes and at least two the 5th figures that are connected via hole, described passivation layer via hole is positioned at the position of described drain electrode, at least two the 4th connect the position that via hole is positioned at described data wire, and at least two the 5th connect the position that via hole is positioned at described second connection electrode;
Step 55, on the substrate of completing steps 54 the deposit transparent conductive film, formation comprises the figure of pixel electrode, the 4th connection electrode and the 5th connection electrode, described pixel electrode is connected with drain electrode by described passivation layer via hole, described the 4th connection electrode connects via hole by described at least two the 4th and is connected with data wire, form two double-deck data wires, described the 5th connection electrode connects via hole by described at least two the 5th and is connected with second connection electrode, forms two double-deck grid lines.
Present embodiment is the technical scheme of a kind of two double-decker data wires of formation and two double-decker grid lines, and its process can repeat no more here referring to the explanation of TFT-LCD array base palte embodiment of the present invention.
It should be noted that at last: above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not break away from the spirit and scope of technical solution of the present invention.

Claims (12)

1. TFT-LCD array base palte, comprise grid line and data wire, be formed with pixel electrode and thin-film transistor in the pixel region that described grid line and data wire limit, it is characterized in that, also be provided with the connection electrode that forms double-deck grid line and/or data wire in the described pixel region.
2. TFT-LCD array base palte according to claim 1, it is characterized in that, described connection electrode comprises first connection electrode that is provided with and forms with layer with described grid line in a composition technology, be formed with gate insulation layer on the described grid line and first connection electrode, offer at least two first on the described gate insulation layer and connect via hole, described first connection electrode connects via hole by described at least two first and is connected with data wire, forms double-deck data wire.
3. TFT-LCD array base palte according to claim 1, it is characterized in that, described connection electrode comprises second connection electrode that is provided with and forms with layer with described data wire in a composition technology, the described data wire and second connection electrode are formed on the gate insulation layer, offer at least two second on the described gate insulation layer and connect via hole, described second connection electrode connects via hole by described at least two second and is connected with grid line, forms double-deck grid line.
4. TFT-LCD array base palte according to claim 1, it is characterized in that, described connection electrode comprises first connection electrode that is provided with layer with described grid line and forms and second connection electrode that is provided with and forms with layer with described data wire in a composition technology in a composition technology, be formed with gate insulation layer on the described grid line and first connection electrode, the described data wire and second connection electrode are formed on the gate insulation layer, offer at least two first connection via holes on the described gate insulation layer and be connected via hole with at least two second, described first connection electrode connects via hole by described at least two first and is connected with data wire, form double-deck data wire, described second connection electrode connects via hole by described at least two second and is connected with grid line, forms double-deck grid line.
5. TFT-LCD array base palte according to claim 4, it is characterized in that, described connection electrode also comprises the 4th connection electrode and the 5th connection electrode that is provided with and forms with layer with described pixel electrode in a composition technology, described the 4th connection electrode and the 5th connection electrode are formed on the passivation layer, offer at least two the 4th connection via holes on the described passivation layer and be connected via hole with at least two the 5th, described the 4th connection electrode connects via hole by described at least two the 4th and is connected with data wire, form two double-deck data wires, described the 5th connection electrode connects via hole by described at least two the 5th and is connected with second connection electrode, forms two double-deck grid lines.
6. according to the described TFT-LCD array base palte of the arbitrary claim of claim 1~5, it is characterized in that, also comprise the public electrode wire that is provided with and in a composition technology, forms with layer with described grid line, described connection electrode comprises the 3rd connection electrode that is provided with and forms with layer with described data wire in a composition technology, described the 3rd connection electrode is formed on the gate insulation layer, offer at least two the 3rd on the described gate insulation layer and connect via hole, described the 3rd connection electrode connects via hole by described at least two the 3rd and is connected with public electrode wire, forms double-deck public electrode wire.
7. a TFT-LCD manufacturing method of array base plate is characterized in that, comprising:
Step 1, formation comprise the figure of grid line, data wire, active layer, source electrode and drain electrode, and described grid line and/or data wire are double-decker;
Step 2, on the substrate of completing steps 1 deposit passivation layer, form the figure comprise passivation layer via hole, described passivation layer via hole is positioned at the position of described drain electrode;
Step 3, on the substrate of completing steps 2 the deposit transparent conductive film, form and to comprise pattern of pixel electrodes, described pixel electrode is connected with drain electrode by described passivation layer via hole.
8. TFT-LCD manufacturing method of array base plate according to claim 7 is characterized in that, described step 1 comprises:
Step 11, on substrate deposition grid metallic film, form the figure that comprises gate electrode, grid line and first connection electrode by composition technology;
Step 12, on the substrate of completing steps 11 successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films, comprise that by the formation of composition technology active layer is connected the figure of via hole with first, at least two first connect the position that via holes are positioned at described first connection electrode;
Step 13, sedimentary origin leaks metallic film on the substrate of completing steps 12, form the figure that comprises data wire, source electrode, drain electrode and TFT channel region by composition technology, described data wire connects via hole by described at least two first and is connected with described first connection electrode, forms double-deck data wire.
9. TFT-LCD manufacturing method of array base plate according to claim 7 is characterized in that, described step 1 comprises:
Step 21, on substrate deposition grid metallic film, form the figure that comprises gate electrode and grid line by composition technology;
Step 22, on the substrate of completing steps 21 successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films, comprise that by the formation of composition technology active layer is connected the figure of via hole with second, at least two second connect the position that via holes are positioned at described grid line;
Step 23, sedimentary origin leaks metallic film on the substrate of completing steps 12, form the figure that comprises source electrode, drain electrode, TFT channel region, data wire and second connection electrode by composition technology, described second connection electrode connects via hole by described at least two second and is connected with described grid line, forms double-deck grid line.
10. TFT-LCD manufacturing method of array base plate according to claim 7 is characterized in that, described step 1 comprises:
Step 31, on substrate deposition grid metallic film, form the figure that comprises gate electrode, grid line and first connection electrode by composition technology;
Step 32, on the substrate of completing steps 31 successive sedimentation gate insulation layer, semiconductive thin film and doped semiconductor films, comprise that by the formation of composition technology active layer, first connects via hole is connected via hole with second figure, at least two first connect the position that via hole is positioned at described first connection electrode, and at least two second connect the position that via hole is positioned at described grid line;
Step 33, sedimentary origin leaks metallic film on the substrate of completing steps 32, form the figure that comprises source electrode, drain electrode, TFT channel region, data wire and second connection electrode by composition technology, described data wire connects via hole by described at least two first and is connected with described first connection electrode, form double-deck data wire, described second connection electrode connects via hole by described at least two second and is connected with described grid line, forms double-deck grid line.
11. TFT-LCD manufacturing method of array base plate according to claim 10, it is characterized in that, described step 2 comprises: deposit passivation layer on the substrate of completing steps 1, formation comprises passivation layer via hole, at least two the 4th connection via holes and at least two the 5th figures that are connected via hole, described passivation layer via hole is positioned at the position of described drain electrode, at least two the 4th connect the position that via hole is positioned at described data wire, and at least two the 5th connect the position that via hole is positioned at described second connection electrode; Described step 3 comprises: deposit transparent conductive film on the substrate of completing steps 2, formation comprises the figure of pixel electrode, the 4th connection electrode and the 5th connection electrode, described pixel electrode is connected with drain electrode by described passivation layer via hole, described the 4th connection electrode connects via hole by described at least two the 4th and is connected with data wire, form two double-deck data wires, described the 5th connection electrode connects via hole by described at least two the 5th and is connected with second connection electrode, forms two double-deck grid lines.
12. according to the described TFT-LCD manufacturing method of array base plate of arbitrary claim in the claim 7~11, it is characterized in that, comprise also in the described step 1 that the figure that forms public electrode wire, described public electrode wire are double-decker.
CN2009100844926A 2009-05-15 2009-05-15 TFT-LCD (Thin Film Transistor Liquid Crystal Display) array base plate and manufacturing method thereof Pending CN101887898A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104183604A (en) * 2014-08-04 2014-12-03 深圳市华星光电技术有限公司 TET-LCD array substrate and manufacture method thereof
CN104505392A (en) * 2014-12-29 2015-04-08 合肥鑫晟光电科技有限公司 Array substrate, production method of array substrate, repair method of array substrate and display device
WO2016045241A1 (en) * 2014-09-25 2016-03-31 京东方科技集团股份有限公司 Array substrate, manufacturing method thereof and display device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104183604A (en) * 2014-08-04 2014-12-03 深圳市华星光电技术有限公司 TET-LCD array substrate and manufacture method thereof
WO2016019520A1 (en) * 2014-08-04 2016-02-11 深圳市华星光电技术有限公司 Tft-lcd array substrate and manufacturing method therefor
WO2016045241A1 (en) * 2014-09-25 2016-03-31 京东方科技集团股份有限公司 Array substrate, manufacturing method thereof and display device
US9786696B2 (en) 2014-09-25 2017-10-10 Boe Technology Group Co., Ltd. Array substrate, manufacturing method thereof and display device
CN104505392A (en) * 2014-12-29 2015-04-08 合肥鑫晟光电科技有限公司 Array substrate, production method of array substrate, repair method of array substrate and display device
US9825062B2 (en) 2014-12-29 2017-11-21 Boe Technology Group Co., Ltd. Array substrate with redundant gate and data line repair structures

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Application publication date: 20101117