CN101873755B - Discharge lamp lighting device and illuminator - Google Patents

Abstract

The present invention provides a lighting device for a discharge lamp, a power supply device, and a lighting appliance, which can avoid excessive electrical stress acting on a circuit element or a discharge lamp immediately after starting. It includes a DC power supply unit, a resonant unit constituting a resonant circuit together with the discharge lamp, a switch unit for switching the connection between the DC power supply unit and the resonant unit, and the switching unit operates at a frequency corresponding to the voltage across the capacitor for control. A drive unit that outputs AC power to the discharge lamp. Immediately after the start, the driving unit does not start to operate for a predetermined stop time T1, and starts to operate after the stop time T1 has elapsed. Since the voltage across the control capacitor can be stabilized during the stop time T1, even in the case of restart after a short stop, it is possible to avoid excessive electrical stress acting on the circuit components or the discharge lamp immediately after start. .

Description

Discharge lamp lighting device and lighting fixture

technical field

The present invention relates to a lighting device for a discharge lamp, a power supply device and a lighting appliance. the

Background technique

Conventionally, there has been provided a discharge lamp lighting device that includes a DC power supply unit that outputs DC power, a resonant unit that constitutes a resonant circuit together with the discharge lamp, and includes at least one switching element that is switched as the switching element is turned on and off. A switch unit for connecting the DC power supply unit and the resonator unit, and a drive unit for supplying AC power from the resonator unit to the discharge lamp by driving switching elements of the switch unit on and off (for example, refer to Patent Document 1 and Patent Document 2). The output power to the discharge lamp can be controlled by the relationship between the resonant frequency of the resonant circuit composed of the discharge lamp and the resonant unit, and the frequency of the drive unit turning on/off the switch unit (hereinafter referred to as “operating frequency”). the

Some of such discharge lamp lighting devices include a control capacitor, and the driving unit is configured to operate at an operating frequency corresponding to the voltage across the control capacitor. In such a discharge lamp lighting device, the control circuit charges and discharges the control capacitor to change the operating frequency of the drive unit, whereby the output power to the discharge lamp can be controlled. In addition, when the operating frequency is changed, the operating frequency and the output power to the discharge lamp gradually change according to the time constant of the control capacitor. Electrical stress is not easily applied to circuit components and discharge lamps. the

However, in the above-mentioned discharge lamp lighting device, when the voltage across the control capacitor is not fully recovered due to discharge or the like after a short-term stop, the output power of the resonator is temporarily excessive immediately after the start. If the ground becomes larger, excessive electrical stress may be applied to the circuit components and the discharge lamp. the

In addition, conventionally known power supplies convert DC voltage from a DC power supply or AC voltage from an AC power supply into a DC voltage of a desired magnitude, convert the DC voltage into a high-frequency voltage, and supply operating power to a load such as a discharge lamp. device. As a conversion mechanism to a desired DC voltage in such a power supply unit, a step-up chopper current that can ensure a stable output voltage for a wide range of input power supply voltages and can improve the distortion of the input current waveform is widely used. Constituted DC power supply circuit. the

The basic operation of a DC power supply circuit is, for example, the operation disclosed in Patent Document 3. The storage of energy to the inductor and the release of the stored energy from the inductor are repeated through the switching operation of the switching element, and the released energy passes through the The diode and smoothing capacitor are supplied to a load circuit including a discharge lamp. The inductor is connected to store energy when the switching element is turned on, detects a switching current flowing through the switching element, and controls the switching element to be switched off when the current value reaches a predetermined value. The predetermined value at which the switching element is switched off is determined by detecting the output voltage of the step-up chopper circuit and feedback-controlling the detected voltage using an error amplifier. In addition, the timing at which the switching element is switched on is determined by detecting the timing at which the inductor releases the stored energy by the zero current detection unit. the

In the zero current detection unit, the inductor is provided with a secondary winding, and the timing at which the inductor releases stored energy is detected by monitoring the voltage generated in the secondary winding. That is, since the polarity of the voltage generated in the secondary winding is reversed at the time of energy storage and discharge of the inductor, for example, if the secondary winding is connected so that a negative voltage is generated at the time of energy storage, the When the voltage reverses to a positive voltage immediately, it converges to a voltage near 0V after the energy is released. Therefore, by monitoring the voltage near 0V at the time when the positive voltage drops, it is possible to detect the timing at which the stored energy of the inductor is released. the

In addition, the output voltage of the input power supply of the DC power supply circuit is, for example, 100V to 200V, that is, when the output voltage of the input power supply is a high voltage, the current flowing through the switching element when switching the switching element from on to off is controlled. The above specified value of is lower so that the conduction period of the switching element is shorter when the output voltage is 200V than when the output voltage is 100V. the

On the other hand, in a diode constituting a DC power supply circuit, when the forward bias voltage is changed to the reverse bias voltage, due to the influence of the carriers accumulated in the forward bias voltage, there is a reverse current flow in the reverse direction for a short time. Recovery Time. Therefore, when the switching element is switched from off to on, a large current may be supplied from the smoothing capacitor to the switching element during the reverse recovery time of the diode. the

In the conventional step-up chopper circuit, when the output voltage of the input power supply temporarily drops, sufficient energy cannot be stored in the inductor even if the switching element is turned on. However, since the predetermined value of the current flowing through the switching element is set low as described above, the current flowing during the reverse recovery time of the diode is erroneously detected as the switching current flowing through the switching element. Switch the switching element to OFF when the energy stored in the inductor is insufficient. Then, since the energy stored in the inductor is insufficient, the stored energy is instantaneously released, and the zero current detection unit detecting this switches the switching element on. Therefore, if the abnormality of the input power supply continues, the switching element may be repeatedly turned on and off in a very short period, specifically, in units of nanoseconds, and the switching element may be damaged by heat due to an increase in switching loss. the

In addition, there has conventionally been provided a power supply unit including a DC power supply unit that is supplied with power from an external power supply to output DC power, and a power conversion unit that appropriately converts the DC power output from the DC power supply unit and outputs it to a load (for example, refer to Patent Document 4 ). The load is, for example, a discharge lamp, and the power conversion unit is, for example, an inverter circuit. the

Furthermore, such a power supply device includes a power supply side abnormality determination unit for determining the presence or absence of an abnormal state of the DC power supply unit, and a load side abnormality determination unit for determining the presence or absence of an abnormal state of at least one of the power conversion unit and the load. department. As an abnormal state judged by the power source side abnormality judgment unit, for example, there is a low state of the output voltage of the DC power supply unit, and as an abnormal state judged by the load side abnormality judgment unit, for example, there is a failure that the load is not correctly connected to the power conversion unit. load status. the

The abnormality judgment by the power supply side abnormality judgment unit is often caused by, for example, a temporary drop in the input power to the DC power supply unit, which can be resolved in a short time. The operation is not to immediately stop the output of the power conversion unit, but to temporarily reduce the output power of the power conversion unit. the

However, since the power conversion unit is provided downstream of the DC power supply unit, when the power source side abnormality determination unit determines that it is an abnormal state, the load side abnormality determination unit often erroneously determines that it is an abnormal state. In addition, if it is configured to stop the operation of the DC power supply unit and the power conversion unit when it is judged to be in an abnormal state by the load-side abnormality judgment unit, the operation of the power conversion unit may not be substantially performed due to the above-mentioned erroneous judgment. The operation that the output power decreases. the

[Patent Document 1] Japanese Unexamined Patent Publication No. 2004-327116

[Patent Document 2] Japanese Unexamined Patent Publication No. 2008-269860

[Patent Document 3] Japanese Unexamined Patent Publication No. 2003-217883

[Patent Document 4] Japanese Unexamined Patent Publication No. 2005-19172

Contents of the invention

The present invention has been made in view of the above reasons, and an object of the present invention is to provide a discharge lamp lighting device and a lighting fixture capable of avoiding excessive electrical stress acting on circuit elements or the discharge lamp immediately after starting. the

Another object of the present invention is to provide a power supply device capable of preventing damage to a switching element when an abnormality occurs in an output voltage of an input power supply. the

Another object of the present invention is to provide a power supply device capable of suppressing stoppage due to misjudgment of an abnormal state. the

According to the first aspect of the present invention, it is characterized in that it includes: a DC power supply unit that outputs DC power; a resonance unit that forms a resonance circuit together with the discharge lamp; Switch the connection between the DC power supply part and the resonant part by turning on and off; the drive part drives the switching element of the switch part by turning it on and off, and supplies AC power from the resonator part to the discharge lamp; the control part controls the operating frequency of the drive part , to control the frequency of the AC power output from the resonant part to the discharge lamp; the drive power supply part is supplied with power from the switch part after the operation of the drive part is started, and outputs DC power; The power supply unit supplies power to the drive power supply unit; the control power supply unit is supplied with power from the drive power supply unit, and during the period when the output voltage of the drive power supply unit is equal to or higher than a predetermined reference voltage, DC power is generated as a power supply of the control unit , is supplied to the control unit; the operating frequency at which the drive unit drives the switch unit is determined by the voltage at both ends of the control capacitor that changes the voltage at both ends corresponding to the output of the control unit; when the control unit starts the discharge lamp, the After the preheating operation of preheating each filament of the discharge lamp, the starting operation of starting the lighting of the discharge lamp is performed, and then the voltage across the control capacitor is changed to transfer to the stable operation of maintaining the lighting of the discharge lamp; the driving part After starting the output of electric power from the control power supply unit, the operation is not started for a predetermined stop time. the

According to the first aspect of the present invention, since the voltage at both ends of the control capacitor can be stabilized during the stop time, even in the case of restarting after a short stop, the output power of the resonator immediately after the start can be avoided. Temporary excessively large and excessive electrical stress acts on the circuit elements constituting the resonator or the discharge lamp. the

According to the second aspect of the present invention, it is characterized in that it includes: a DC power supply circuit having at least one inductor and a switching element connected in series to the inductor, and switching the switching element on/off, repeatedly switching to The energy storage of the inductor and the release of the energy from the inductor will convert the DC voltage from the DC power supply or the rectified pulsating voltage of the AC voltage from the AC power supply to a DC voltage; the load circuit accepts the output voltage of the DC power supply circuit , to supply operating power to the load; the output voltage detection part detects the output voltage of the DC power supply circuit; The output voltage of the power supply circuit is controlled to a specified voltage; the DC power supply control circuit has: a zero current detection unit, which outputs a zero signal if the current flowing through the inductor becomes below the specified current value; When the current of the switching element of the DC power supply circuit becomes more than the specified current value, the peak signal is output; the drive part switches the switching element of the DC power supply circuit to conduction according to the zero signal and switches the switching element of the DC power supply circuit to off according to the peak signal. The ON; zero current detection unit includes a shield unit that outputs a zero signal after the current flowing through the inductor becomes equal to or less than a predetermined current value to stop the operation of the drive unit for a predetermined period. the

According to the second aspect of the present invention, when the output voltage of the input power supply is temporarily lowered and sufficient energy cannot be stored in the inductor, it is possible to prevent the switching element of the DC power supply circuit from being switched on instantaneously. Therefore, even when the output voltage of the input power source is abnormal, the switching element of the DC power supply circuit can be prevented from being switched on/off in a very short cycle, and the switching loss caused by the increase of the switching loss can be prevented. Thermal damage to components. the

According to a third aspect of the present invention, it is characterized by comprising: a DC power supply unit that receives power from an external power supply and outputs DC power; a power conversion unit that appropriately converts the DC power output from the DC power supply unit and outputs it to a load; a power supply The side abnormality judging part judges whether there is an abnormal state of the DC power supply part; the load side abnormality judging part judges whether there is an abnormal state of at least one of the power conversion part and the load; The judgment of the load-side abnormality determination unit controls at least the power conversion unit; the control unit performs a start-up operation in which the output power from the power conversion unit to the load is less than that in the stable operation when starting and before starting the stabilization operation; When it is judged as an abnormal state by the abnormality judgment part on the load side, it will continue to start again for a predetermined period of time; The output of the power conversion unit is stopped. the

According to the third aspect of the present invention, the operation of starting the restart operation based on the determination of the abnormal state by the power source side abnormality determination unit is given priority over the operation of stopping the power conversion unit based on the determination of the abnormal state by the load side abnormality determination unit. Therefore, the stoppage of the power conversion unit due to the abnormality of the load-side abnormality determination unit due to the abnormality of the DC power supply unit is less likely to occur. the

Description of drawings

1 is an explanatory diagram showing an example of the operation of Embodiment 1 of the present invention, FIG. 1( a ) shows a time change of a control voltage, FIG. 1( b ) shows a time change of an input voltage to a stop execution unit, and FIG. 1( c) shows the time change of the output voltage of the stop execution part, Fig. 1 (d) shows the time change of the output voltage of the sequence control part, Fig. 1 (e) shows the time change of the voltage at both ends of the control capacitor, Fig. 1 (f ) represents the temporal variation of the action frequency. the

FIG. 2 is a circuit block diagram showing Embodiment 1. FIG. the

3 is a circuit block diagram showing an activation unit and a control power supply unit in Embodiment 1. FIG. the

4 is an explanatory diagram showing an example of the operation of Embodiment 1. FIG. 4( a ) shows the time change of the output voltage of the DC power supply unit, and FIG. Figure 4(c) shows the time change of the gate voltage of the first switching element of the starting part, Figure 4(d) shows the time change of the control voltage, and Figure 4(e) shows the output voltage of the stop execution part 4(f) shows the time change of the voltage value of the drive signal output from the drive unit to one switching element of the switch unit. the

5 is a circuit block diagram showing an oscillation unit, a drive unit, and a stop execution unit in Embodiment 1. FIG. the

6 is an explanatory diagram showing the operation of the oscillation unit according to Embodiment 1. FIG. 6(a) shows the time change of the voltage across the oscillation capacitor of the oscillation unit, and FIG. 6(b) shows the output voltage of the comparator of the oscillation unit. 6(c) shows the time change of the voltage value of the first rectangular signal, and FIG. 6(d) shows the time change of the voltage value of the first drive signal. the

FIG. 7 is a circuit block diagram showing Embodiment 2 of the present invention. the

FIG. 8 is a circuit block diagram showing Embodiment 3 of the present invention. the

FIG. 9 is a circuit block diagram showing main parts of Embodiment 3. FIG. the

Fig. 10 is an explanatory diagram showing an example of the operation of Embodiment 3, Fig. 10(a) shows the time change of the control voltage, Fig. 10(b) shows the time change of the output voltage of the adjustment control unit, and Fig. 10(c) shows the sequence The temporal change of the output voltage of the control unit, FIG. 10( d ) shows the temporal change of the voltage across the control capacitor, and FIG. 10( f ) shows the temporal change of the operating frequency. the

11 is a circuit block diagram showing main parts of a comparative example of the third embodiment. the

FIG. 12 shows an example of the temporal change of the input voltage to the operational amplifier for input to the oscillation unit according to Embodiment 3. FIG. 12(a) shows a case where the ambient temperature is around room temperature, and FIG. 12(b) shows a case where the ambient temperature is low temperature. . the

Fig. 13 is an explanatory diagram showing the relationship between the input voltage to the non-inverting input terminal of the input operational amplifier and lamp power in Embodiment 3. the

FIG. 14 is an explanatory diagram showing the relationship between ambient temperature, lamp current, and lamp power in Embodiment 3. FIG. the

FIG. 15 is a circuit block diagram showing Embodiment 4 of the present invention. the

16 is an explanatory diagram showing an example of the operation of Embodiment 4. FIG. 16(a) shows a time change of the control voltage, and FIG. c) shows the time change of the report voltage, FIG. 16( d ) shows the time change of the voltage value of the drive signal output from the drive unit to one switching element of the switch unit, and FIG. 16( e ) shows the time change of the clock frequency. the

Fig. 17 is a circuit block diagram showing Embodiment 5 of the present invention. the

FIG. 18 is an explanatory diagram showing an example of the relationship between the cumulative lighting time and the dimming ratio in Embodiment 5. FIG. the

FIG. 19 is a circuit block diagram showing Embodiment 6 of the present invention. the

20 is a circuit block diagram showing a power detection unit and a stop execution unit according to Embodiment 6. FIG. the

21 is an explanatory diagram showing an example of the operation of Embodiment 6. FIG. 21(a) shows the time change of the output voltage of the stop control unit, FIG. 21(b) shows the time change of the output voltage of the power detection unit, and FIG. 21( c) shows the time variation of the output voltage of the input comparator connected to the power supply detection part in the stop execution part, and Fig. 21 (d) shows the time change of the output voltage of the logic sum circuit of the stop execution part, Fig. 21 (e) Fig. 21(f) shows the time change of the report voltage, which shows the time change of the voltage across both ends of the delay capacitor. the

22 is a circuit block diagram showing a modified example of the power detection unit and the stop execution unit of the sixth embodiment. the

Fig. 23 is a circuit block diagram showing Embodiment 7 of the present invention. the

Fig. 24 is a circuit block diagram showing Embodiment 8 of the present invention. the

FIG. 25 is a circuit block diagram showing main parts of Embodiment 8. FIG. the

Fig. 26 is a circuit block diagram showing Embodiment 9 of the present invention. the

FIG. 27 is a circuit diagram showing a DC voltage drop detection unit according to Embodiment 9. FIG. the

28 is an explanatory diagram showing the operation when the duration of the DC voltage drop state does not reach the restart time in Embodiment 9. FIG. b) shows the time change of the output voltage of the comparator of the DC voltage low judging section, Fig. 28 (c) shows the time variation of the output voltage of the DC voltage low judging section, and Fig. 28 (d) shows the time of the output voltage of the sequence control section Fig. 28(e) shows the time change of the operating frequency, and Fig. 28(f) shows the time change of the output voltage of the stop control unit to the driving integrated circuit. the

29 is an explanatory diagram showing the operation in the case where the duration of the DC voltage drop state does not reach the restart time in Embodiment 9. FIG. 29( a ) shows the time change of the output voltage of the DC power supply detection unit, and FIG. 29( b) shows the time change of the output voltage of the comparator of the DC voltage drop judging part, Fig. 29(c) shows the time change of the output voltage of the DC voltage drop judging part, and Fig. 29 (d) shows the time of the output voltage of the sequence control part Fig. 29(e) shows the time change of the operating frequency, and Fig. 29(f) shows the time change of the output voltage of the stop control unit to the driving integrated circuit. the

Fig. 30 is a circuit block diagram showing main parts of Embodiment 10 of the present invention. the

31 is an explanatory diagram showing the operation of the zero current detection unit in Embodiment 10. FIG. 31( a ) shows the time change of the output voltage of the power drive unit, and FIG. 31( b ) shows the time of the input voltage to the zero current detection unit. Change, Fig. 31 (c) shows the time change of the output voltage of the input comparator of the zero current detection section, Fig. 31 (d) shows the time change of the voltage at both ends of the storage capacitor of the zero current detection section, Fig. 31 (e ) shows the time change of the output voltage of the one-shot circuit, FIG. 31( f) shows the time change of the output voltage of the output comparator of the zero current detection part, and FIG. 31( g) shows the time change of the output voltage of the zero current detection part. the

FIG. 32 is a circuit block diagram showing Embodiment 10. FIG. the

Fig. 33 is a circuit block diagram showing a main part of Embodiment 11 of the present invention. the

34 is an explanatory diagram showing the operation of Embodiment 11. FIG. 34(a) shows the time change of the output voltage of the reporting unit, FIG. 34(b) shows the time change of the output voltage from the resonator to the discharge lamp, and FIG. 34( c) Indicates the temporal variation of the action frequency. the

Fig. 35 is a circuit block diagram showing Embodiment 12 of the present invention. the

FIG. 36 is a circuit block diagram showing main parts of Embodiment 12. FIG. the

FIG. 37 is a circuit block diagram showing main parts of a modified example of the twelfth embodiment. the

FIG. 38 is an explanatory diagram showing an example of arrangement on a printed wiring board constituting circuit elements in Embodiment 12. FIG. the

FIG. 39 is an explanatory diagram showing a comparative example of the twelfth embodiment. the

40(a) to 40(c) respectively show the state in which the twelfth embodiment is housed in the casing, FIG. 40(a) is a top view, FIG. 40(b) is a front view, and FIG. 40(c) is a right side view . the

FIG. 41 is a perspective view showing an example of using the lighting fixture of Embodiment 12. FIG. the

FIG. 42 is a perspective view showing another example of using the lighting fixture of Embodiment 12. FIG. the

Fig. 43 is a circuit diagram showing a thirteenth embodiment of the power supply device according to the present invention. the

44 is a circuit diagram showing a start-up unit, a control power comparison unit, and a first control power generation unit according to Embodiment 13. FIG. the

45( a ) to 45 ( g ) are time charts for explaining the operation of the control circuit according to the thirteenth embodiment. the

FIG. 46 is a circuit diagram showing an inverter control circuit according to Embodiment 13. FIG. the

47( a ) to 47( g ) are time charts for explaining sequence control in the thirteenth embodiment. the

FIG. 48 is a circuit diagram showing a stop execution unit in Embodiment 13. FIG. the

Fig. 49 is a flowchart for explaining the basic operation of the operation setting circuit of the thirteenth embodiment. the

FIG. 50 is a circuit diagram showing a zero current detection unit in Embodiment 13. FIG. the

51( a ) to 51 ( f ) are timing charts for explaining the operation of the zero current detection unit in Embodiment 13. FIG. the

FIG. 52 is a circuit diagram showing a zero-current detection unit in Embodiment 14 of the power supply device according to the present invention. the

FIG. 53 is a circuit diagram showing a filter unit according to Embodiment 14. FIG. the

54( a ) to 54 ( e ) are timing charts for explaining the operation of the zero current detection unit in the fourteenth embodiment. the

Fig. 55 is a circuit diagram showing Embodiment 15 of the power supply device according to the present invention. the

FIG. 56 is a circuit diagram showing a voltage drop determination unit in Embodiment 15. FIG. the

FIGS. 57( a ) to 57 ( f ) are time charts for explaining the operation of the voltage drop determination unit in the fifteenth embodiment when the output voltage temporarily drops. the

FIGS. 58( a ) to 58 ( f ) are time charts for explaining the operation of the voltage drop determination unit in the fifteenth embodiment when the output voltage drops continuously. the

FIG. 59 is a flowchart illustrating abnormality determination processing in Embodiment 15. FIG. the

Fig. 60 is a circuit diagram showing Embodiment 16 of the power supply device according to the present invention. the

FIG. 61 is a circuit diagram showing a voltage rise determination unit in Embodiment 16. FIG. the

62(a) to 62(d) are time charts for explaining the operations of the voltage rise determination unit and the restart unit in the sixteenth embodiment. the

Fig. 63 is a circuit block diagram showing Embodiment 17 of the present invention. the

64 is an explanatory diagram showing an example of the operation of the seventeenth embodiment. FIG. 64(a) shows the time change of the control voltage, FIG. 64(b) shows the time change of the input voltage to the stop execution unit, and FIG. 64(c) shows Figure 64(d) shows the time change of the output voltage of the sequence control part, Figure 64(e) shows the time change of the voltage at both ends of the control capacitor, and Figure 64(f) shows the time change of the output voltage of the stop execution unit. The temporal change of the frequency, Fig. 64(g) shows the temporal change of the clock frequency. the

FIG. 65 is a circuit block diagram showing main parts of a modified example of the seventeenth embodiment. the

Fig. 66 is a block diagram showing Embodiment 18 of the present invention. the

67 is an explanatory diagram showing an example of the operation of Embodiment 18. FIG. 67(a) shows the time change of the control voltage, FIG. 67(b) shows the time change of the output voltage of the stop control unit, and FIG. 67(c) shows the time change of the stop Figure 67(d) shows the time change of the output voltage of the sequence control part, Figure 67(e) shows the time change of the voltage across the control capacitor, and Figure 67(f) shows the operating frequency time changes. the

Fig. 68 is a circuit block diagram showing Embodiment 19 of the present invention. the

Detailed ways

Hereinafter, preferred embodiments for carrying out the present invention will be described with reference to the drawings. the

(implementation mode 1)

As shown in FIG. 2, this embodiment is a device for lighting a general hot-cathode type discharge lamp La having a pair of filaments (not shown). The AC power inputted by the AC power supply AC is full-wave rectified; the DC power supply unit 1 at least smoothes the output of the rectification unit DB to output DC power; the switch unit 21 is equipped with two switches connected between the output ends of the DC power supply unit 1 The series circuit of the elements Q10 and Q20 has both ends of the switching element Q20 on the low voltage side (low side) as output terminals; and the resonant part 22 is connected between the output terminals of the switching part 21 to form a resonant circuit together with the discharge lamp La. . That is, the switch unit 21 and the resonance unit 22 constitute a so-called half-bridge inverter circuit as a whole. In addition, the output terminal on the low voltage side of the DC power supply unit 1 is grounded. the

The DC power supply unit 1 may be constituted by, for example, a smoothing capacitor (not shown) connected between the output terminals of the rectification unit DB. In this case, both ends of the smoothing capacitor serve as output terminals of the DC power supply unit 1 . the

In addition, the resonant unit 22 includes a series circuit of a capacitor C1 and an inductor L1 connected in parallel (that is, at the discharge lamp La) with one end connected to the connection point of the switching elements Q10 and Q20 of the switch unit 21 and the other end connected to the ground via the discharge lamp La. between the filaments) the capacitor C2 connected to the discharge lamp La. the

Furthermore, this embodiment is provided with the preheating part 23 for preheating each filament of the discharge lamp La respectively at the time of start-up of the discharge lamp La. The preheating unit 23 includes a primary winding whose one end is connected to the connection point of the switching elements Q10 and Q20 of the switching unit 21 via the capacitor C3 and whose other end is grounded, and a series circuit of the capacitors C4 and C5 connected to the discharge lamp La. Transformer Tr1 with two secondary windings between the ends of each filament. the

In addition, this embodiment includes: a drive unit 31 connected to the respective switching elements Q10 and Q20 of the switching unit 21 via resistors R1 and R2, respectively, and driving the respective switching elements Q10 and Q20 of the switching unit 21 by turning them on and off to achieve resonance. The unit 22 supplies AC power to the discharge lamp La; and the sequence control unit 41 controls the frequency of the AC power output from the resonance unit 22 to the discharge lamp La by controlling the frequency of the drive unit 31 . the

The driving section 31 is provided in the driving integrated circuit 3 composed of a high withstand voltage integrated circuit (HVIC), and the sequence control section 41 is provided in the control integrated circuit 4 composed of an integrated circuit called a microcontroller (microcomputer). . As the control integrated circuit 4, if the input and output voltage values are only two stages and do not include the A/D converter and the D/A converter, the power consumption in the control integrated circuit 4 can be suppressed relatively. Small. the

In addition, the present embodiment includes a drive power supply unit 5 that is supplied with power from the switch unit 21 after the operation of the drive unit 31 is started, and outputs DC power as a power source of the drive integrated circuit 3 . The drive power supply unit 5 includes an input side diode whose anode is grounded and whose cathode is connected to the connection point of the switching elements Q10 and Q20 of the switch unit 21 via an input side capacitor, and an anode connected to a connection part between the input side diode and the input side capacitor. An output-side diode whose cathode is grounded through a parallel circuit of the output-side capacitor C101 and the Zener diode ZD1 makes the voltage across the output-side capacitor C101 an output voltage. When the voltage across the output side capacitor C101 is stabilized after a sufficient time has elapsed since the start of the operation of the drive unit 31 , the voltage across the output side capacitor C101 , that is, the output voltage of the driving power supply unit 5 is, for example, 10V. the

Furthermore, in the driving integrated circuit 3, before the operation of the driving unit 31 is started, the starting unit 32 which is supplied with electric power from the DC power supply unit 1 and outputs the DC power as the power supply for driving the power supply unit 5, and the driving unit 32 which is driven by the driver are respectively provided. The power supply unit 5 supplies electric power to generate a predetermined control voltage Vcc1 (for example, 5V) as a power supply for the control integrated circuit 4 and supply it to the control integrated circuit 4 during a period in which the output voltage of the drive power supply unit 5 is equal to or higher than a predetermined reference voltage. The control power supply unit 33. the

If described in detail, as shown in FIG. 3 , the starting portion 32 has one end connected to the output end of the high-voltage side of the DC power supply portion 1, and the other end connected to the output end of the drive power supply portion 5 via the first switching element Q101. Impedance element Z1. That is, during the period in which the first switching element Q101 of the starting unit 32 is turned on, the output voltage Vdc of the DC power supply unit 1 is output to the driving power supply unit 5 through the impedance element Z1 and the first switching element Q101, whereby the driving power supply The output side capacitor C101 of section 5 is charged. The first switching element Q101 is composed of an n-channel high withstand voltage field effect transistor, and the gate of the first switching element Q101 is connected to the connection point of the DC power supply unit 1 and the impedance element Z1 through a resistor R101, and is connected to the connection point between the DC power supply unit 1 and the impedance element Z1 through a diode D101. The series circuit with the Zener diode ZD2 and the parallel circuit with the second switching element Q102 constituted by an n-channel field effect transistor are grounded. In addition, the starting unit 32 has four voltage-dividing resistors for dividing the output voltage (hereinafter referred to as “driving voltage”) Vcc2 of the drive power supply unit 5, respectively, and outputs voltages (voltage-dividing ratios) from the connection points of these voltage-dividing resistors. Three different detection voltages Va, Vb, Vc. Furthermore, the starting unit 32 includes a comparator CP1 whose output terminal is connected to the gate of the second switching element Q102 via a logical sum circuit OR1 to which a predetermined first reference voltage Vr1 is input to an inverting input terminal. Detection voltages Vb and Vc are input to non-inverting input terminals of the comparator CP1 via a multiplexer TG1 configured using a transfer gate circuit. The multiplexer TG1 is connected to the output terminal of the comparator CP1, and is configured to output the second lowest detection voltage (hereinafter referred to as "second detection voltage") during the period in which the output of the comparator CP1 is at the H (high) level. voltage") Vb is input to the non-inverting input terminal of comparator CP1, and the lowest detection voltage (hereinafter referred to as "third detection voltage") Vc input to the non-inverting input terminal of comparator CP1. the

The operation of the activation unit 32 will be described using FIG. 4 . Immediately after the power supply is turned on, the output of the comparator CP1 is L level, thereby inputting the third detection voltage Vc to the non-inverting injection terminal of the comparator CP1, and by turning off the second switching element Q102, the The Zener voltage of the Zener diode ZD2 turns on the first switching element Q101. During the period when the first switching element Q101 is turned on, the output side capacitor C101 of the drive power supply unit 5 is charged by the output power supplied from the DC power supply unit 1 through the impedance element Z1 of the starting unit 32 and the first switching element Q101, and is gradually charged. The voltage across both terminals (drive voltage) Vcc2 is increased. Finally, when the third detection voltage Vc reaches the first reference voltage Vr1, the output of the comparator CP1 becomes H level. Then, the input voltage to the non-inverting input terminal changes to the second detection voltage Vb higher than the third detection voltage Vc, and by turning on the second switching element Q102 and turning off the first switching element Q101, the start-up operation is stopped. The supply of electric power from the unit 32 to the drive power supply unit 5 . At this time, the drive unit 31 has not yet started to operate, and power is not supplied from the switch unit 21 to the drive power supply unit 5 , so the drive voltage Vcc2 starts to drop due to the discharge of the output side capacitor C101 . Finally, when the second detection voltage Vb reaches the first reference voltage Vr1, the output of the comparator CP1 becomes L level again, and the output voltage of the drive power supply unit 5 starts to rise. Then, when the third detection voltage Vc reaches the first reference voltage Vr1, Then, the output of comparator CP1 becomes H level again. Then, DC power as shown in FIG. 4( a ) is supplied from the DC power supply unit 1 , and the input from the stop execution unit 34 (described later) to the logical sum circuit OR1 shown in FIG. 4( e ) is L level. During the period when the drive unit 31 is stopped, the gate voltage of the first switching element Q101 fluctuates as shown in FIG. The detection voltage Vc repeatedly changes up and down between the upper limit voltage of the first reference voltage Vr1 and the lower limit voltage of the second detection voltage Vb of the first reference voltage Vr1. the

Here, the drive integrated circuit 3 is provided with a stop execution unit 34 that controls the drive unit 31 and the start unit 32 respectively. The output of the stop execution unit 34 is input to the logical sum circuit OR1, and the drive unit 31 is stopped and the power supply from the start unit 32 to the drive power supply unit 5 is turned on while the output of the stop execution unit 34 is at the L level. During the period when the output of the stop execution unit 34 is H level, the second switching element Q102 is turned on and the first switching element Q101 is turned off irrespective of the output of the comparator CP1, so that the drive from the start unit 32 The power supply of the power supply unit 5 is cut off. Among them, during the period in which the output of the stop execution unit 34 is at the H level, the driving unit 31 operates (that is, outputs for driving the switching elements Q10 and Q20 as shown in FIG. The unit 21 supplies electric power to drive the power supply unit 5 . the

In addition, the control power supply unit 33 has the highest detection voltage (hereinafter referred to as "first detection voltage") Va among the detection voltages output by the voltage dividing resistor of the input start-up part 32 among the non-inverting input terminals, and at the inverting input terminal Among the terminals, the comparator CP2 to which the first reference voltage Vr1 is input, the series circuit of the constant current circuit Ir1 and the Zener diode ZD3 connected between the output terminal of the drive power supply unit 5 and the ground potential, and the base connected to the constant current circuit Ir1 On the connection point with the Zener diode ZD3 and the collector is connected on the output end of the drive power supply part 5, the emitter is connected to the npn type transistor Q103 on the control integrated circuit 4 as the output end of the control power supply part 33, and parallel connection The switching element Q104, which is formed of an n-channel field effect transistor and whose gate is connected to the output terminal of the comparator CP2, is connected to the Zener diode ZD3. That is, as shown in FIG. 4( d ), the control voltage Vcc1 is output to the control integrated circuit 4 only during the period when the first detection voltage Va exceeds the first reference voltage Vr1 , and the control voltage Vcc1 is output when the first detection voltage Va is lower than the first reference voltage Vr1 . The driving voltage when the control voltage Vcc1 is not output during the period of the reference voltage Vr1 (that is, the output voltage of the control power supply unit 33 is substantially 0), and the first detection voltage Va is the first reference voltage Vr1 is the reference voltage. Here, the circuit that outputs the control voltage Vcc1 from the driving integrated circuit 3 to the control integrated circuit 4 is grounded via the noise canceling capacitor C51. the

In addition, the driving integrated circuit 3 is provided with an oscillation unit 35 that outputs a rectangular wave corresponding to the frequency of the output of the sequence control unit 41, and the driving unit 31 drives the switching unit 21 on and off at the frequency of the output of the oscillation unit 35. The switching elements Q10, Q20. the

As shown in FIG. 5 , the oscillating unit 35 has a non-inverting input terminal connected to the sequence control unit 41 through a resistor R103, grounded through a parallel circuit of a resistor R104 and a control capacitor C103, and an inverting input terminal connected to an output terminal. The operational amplifier constitutes a voltage follower OP1 whose output terminal is grounded via two resistors R106 and R102, and the non-inverting input terminal is input with a prescribed second reference voltage Vr2 and the inverting input terminal is connected to the voltage follower via resistor R106 The output terminal of OP1 is controlled by the operational amplifier OP2. The output terminal of this operational amplifier OP2 is connected to the gate of the switching element Qc for charging, and the switching element Qc for charging is connected to one output terminal of the current mirror circuit CM1 for charging to which the report voltage Vcc3 is input to each input terminal, respectively. Between the resistors R102, the other output end of the charging current mirror circuit CM1 is grounded via the oscillation capacitor C102. In addition, the oscillation unit 35 includes a first discharge switching element Qd composed of a p-channel field effect transistor connected to the above-mentioned one output terminal of the charging current mirror circuit CM1 through a gate at one input terminal. The voltage Vcc3 is also connected to the other input end of an oscillation capacitor C102 and a current mirror circuit CM2 for discharge whose output ends are respectively grounded. Furthermore, the oscillation unit 35 has an inverting input terminal connected to the oscillation capacitor C102, and the non-inverting input terminal is input with the predetermined third reference voltage Vr3 and the ratio of the third to The comparator CP3 is one of the predetermined fourth reference voltage Vr4 whose reference voltage Vr3 is lower. The output terminal of the comparator CP3 is connected to the multiplexer TG2, and the third reference voltage Vr3 is input to the non-inverting input terminal of the comparator CP3 while the output of the comparator CP3 is at H level. , the fourth reference voltage Vr4 is input to the non-inversion input terminal of the comparator CP3 while the output of the comparator CP3 is at the L level. In addition, a second discharge switching element Q105 is connected in parallel to the discharge current mirror circuit CM2. The second discharge switching element Q105 is composed of an n-type channel field effect transistor, and its gate is connected to the output of the comparator CP3. terminal. the

The operation of the oscillation unit 35 will be described. In the state where the oscillation capacitor C102 is not fully charged, the output of the comparator CP3 is at the H level, whereby the third reference voltage Vr3 is input to the non-inverting input terminal of the comparator CP3, and the switching element Q105 is turned on. Pass. During this period, the discharge of the oscillation capacitor C102 via the discharge current mirror circuit CM2 is suppressed by the conduction of the second discharge switching element Q105 connected in parallel to the discharge current mirror circuit CM2, and the charge current As the mirror circuit CM1 is charged, the voltage across the oscillation capacitor C102 gradually rises. Finally, when the voltage across both ends of the oscillation capacitor C102 reaches the third reference voltage Vr3, the output of the comparator CP3 becomes L level, the input voltage to the non-inverting input terminal of the comparator CP3 becomes the fourth reference voltage Vr4, and The second discharge switching element Q105 is turned off. Then, the discharge current through the discharge current mirror circuit CM2 becomes larger than the charge current through the charge current mirror circuit CM1, whereby the voltage across the oscillation capacitor C102 gradually decreases. Then, when the voltage across the oscillation capacitor C102 reaches the fourth reference voltage Vr4, the output of the comparator CP3 becomes H level again, and the same operation is repeated thereafter. As a result, the voltage across the oscillation capacitor C102, that is, the input voltage to the inverting input terminal of the comparator CP3 repeatedly changes up and down between the third reference voltage Vr3 and the fourth reference voltage Vr4 as shown in FIG. 6(a). , the output of the comparator CP3 becomes a rectangular wave as shown in FIG. 6( b ). Furthermore, the oscillation unit 35 has an output shaping circuit 35 a that shapes the output of the comparator CP3 and outputs it to the drive unit 31 . The output shaping circuit 35a has a first rectangular signal generator (not shown) that generates a first rectangular signal by dividing the output of the comparator CP3 by two, for example, as shown in FIG. The second rectangular signal generating unit (not shown) of the second rectangular signal whose signal output is inverted, and by turning ON (conduction) the first rectangular signal (reversal from L level to H level) Timing is delayed by a predetermined dead time td to generate a first drive signal as shown in FIG. The first drive signal and the second drive signal are respectively output to a dead time generator (not shown) in the drive unit 31 . The driving unit 31 has a function of making one switching element Q10 of the switching unit 21 conduct during the conduction period (H level period) of the first drive signal and turn on during the OFF (off) period (L level period) of the first drive signal. period), and the other switching element Q20 of the switching unit 21 is turned on during the conduction period of the second drive signal and is interrupted during the OFF (disconnection) period of the second drive signal. Open the second driving part 31b. That is, the dead time generation unit prevents the two switching elements Q10 and Q20 of the switching unit 21 from being simultaneously turned on. In the above configuration, since the oscillation capacitor C102 is not required to have a particularly high capacity value, the oscillation capacitor C102 can be configured in the control integrated circuit 4 . the

Here, the charging current and the discharging current of the oscillation capacitor C102 become smaller as the input voltage to the inverting input terminal of the control operational amplifier OP2 increases, that is, as the voltage across the control capacitor C103 increases. That is, the frequencies of the first drive signal and the second drive signal, that is, the frequency of the operation of the drive unit 31 and the frequency of the AC power output to the discharge lamp La (hereinafter referred to as "operation frequency") are equal to the two frequencies of the control capacitor C103. The higher the terminal voltage, the lower it will be.

The sequence control unit 41 of the control integrated circuit 4 changes the voltage across the control capacitor C103 shown in FIG. Thus, after the preheating operations t1 to t2 for preheating the respective filaments of the discharge lamp La, the starting operations t2 to t3 for starting the lighting of the discharge lamp La are performed, and then shift to the stabilization operation t3 for maintaining the lighting of the discharge lamp La. ~t4. For example, sequence control unit 41 is a unit that outputs a PWM signal as shown in FIG. Specifically, by stopping the PWM signal in the warm-up operation t1 to t2 (in other words, setting the duty ratio to 0), and increasing the duty ratio in the stabilization operation t3 to t4 compared to the startup operation t2 to t3, thereby The voltage across the control capacitor C103 is increased stepwise, that is, as shown in FIG. 1(f), the operating frequencies f1 to f3 are decreased stepwise. That is, the operating frequency is set to be the highest operating frequency f1 in the warm-up actions t1-t2, the operating frequency f2 lower than the pre-heating actions t1-t2 in the start-up actions t2-t3, and the lower operating frequency f2 in the steady-state actions t3-t4. The lower operating frequency f3 among actions t2 to t3 is started. In addition, the output of the sequence control part 41 is not limited to a PWM signal, What is necessary is just the signal which changes the voltage of both ends of the capacitor C103 for control. The operating frequencies f1-f3 are set higher than the resonance frequency of the resonant circuit constituted by the discharge lamp La and the resonator 22, that is, the lower the operating frequencies f1-f3 are, the more power output from the resonator 22 to the discharge lamp La increases. That is, the output power to the discharge lamp La increases stepwise by the stepwise decrease of the operating frequencies f1 to f3 as described above. In addition, the timing t2 at which the startup operations t2 to t3 are started and the timing t3 at which the stabilization operations t3 to t4 are started are respectively determined by timing, for example, so that the duration of the warm-up operations t1 to t2 and the duration of the startup operations t2 to t3 are approximately constant. . the

Furthermore, this embodiment has the abnormality determination part 61 which determines whether it is an abnormal state which should stop the drive part 31 or not. In the example of FIG. 2 , the abnormality judging unit 61 is provided entirely outside the control integrated circuit 4 , but a part of the circuit elements constituting the abnormality judging unit 61 may be integrated in the control integrated circuit 4 . In addition, in the control integrated circuit 4, when the abnormality judging unit 61 determines that the driving unit 31 should be stopped, the stop execution unit 34 for the driving integrated circuit 3 at least instructs the stopping of the driving unit 31 and sets the order. The control section 41 stops the stop control section 42 . The stop control unit 42 constitutes a control unit in the technical solution together with the sequence control unit 41 . The circuit from the stop control unit 42 of the control integrated circuit 4 to the stop execution unit 34 of the drive integrated circuit 3 is connected to a circuit of the control voltage Vcc1 via a resistor 51 . The stop control unit 42 normally sets the potential of the above-mentioned circuits to an L level equal to the ground potential, and instructs the drive unit to stop the drive unit 31 by setting the potential of the above-mentioned circuits to an H level equal to the control voltage Vcc1. 31 of the stops. That is, no current flows through the resistor R51 during the period in which the stop of the drive unit 31 is instructed, and power consumption is reduced compared to a configuration in which a current always flows through the resistor R51 . In FIG. 1, at the timing shown in FIG. 4, the output of the stop control unit 42 (that is, the input of the stop execution unit 34) becomes H level, thereby the output of the stop execution unit 34 becomes L level, and the oscillation unit 35 and the operation of the driving unit 31 are respectively stopped. the

An unloaded state in which the discharge lamp La is not connected to the resonator 22 can be considered as a state in which the abnormality determination unit 61 determines that it is an abnormal state. Such an abnormality determination unit 61 can be realized by a known technique, so illustration and detailed description thereof are omitted. the

Here, in the case of turning off the power supply in the stabilization operations t3 to t4 and then immediately turning on the power supply, if the discharge of the control capacitor C103 is not sufficient at the time of turning on the power supply, the above-mentioned power supply immediately after turning on After passing through, the output power of the resonator 22 temporarily increases excessively, and excessive electric stress acts on the circuit elements constituting the resonator 22 or the discharge lamp La. the

Therefore, in the present embodiment, the stop execution unit 34 stops the drive unit 31 by setting the output to the L level before the predetermined stop time T1 elapses from the start of the output of the control voltage Vcc1 , and stops the drive unit 31 after the elapse of the stop time T1 . The output becomes H level, and the operation of the drive unit 31 starts. This stop time T1 is set to a time sufficient for discharging the control capacitor C103. Therefore, even in the case where the power is turned on immediately after the power is turned off during the steady operations t3 to t4 as described above, since the control capacitor C103 is discharged during the stop time T1 at the time of startup, it is possible to avoid Excessive electrical stress acts on the circuit elements of the resonator 22 and the discharge lamp La. the

In the example of FIG. 1 , the input to the stop execution unit 34 (that is, the output of the stop control unit 42 ) is maintained at L from the start of the output of the control voltage Vcc1 to the end time t4 of the stabilization operations t3 to t4. level, so that the warm-up operation t1 to t2 starts after the stop time T1 has elapsed since the output of the control voltage Vcc1 starts, but after the output of the control voltage Vcc1 starts, the input to the stop execution unit 34 becomes H level and then changes to In the case of the L level, the warm-up operation t1 to t2 starts after the stop time T1 elapses after the input to the stop execution unit 34 becomes the L level. That is, strictly speaking, the warm-up operation t1 to t2 starts when the control voltage Vcc1 is output from the control power supply unit 33 and the input to the stop execution unit 34 is at the L level for the stop time T1, and starts from the stabilization operation t3. During the period from the end of -t4 to the next start of the warm-up operation t1 - t2, at least the stop for the stop time T1 is ensured. the

In addition, the output from the sequence control unit 41 to the oscillation unit 35 is meaningless while the driving unit 31 is stopped. Therefore, the sequence control unit 41 may not generate the electrical signal (PWM signal in the above example) input to the oscillation unit 35 during the stop of the drive unit 31 by transmitting and receiving the electrical signal with the stop execution unit 34 or timing. . According to this configuration, it is possible to reduce the power consumption during the stop of the drive unit 31, and accordingly, the requirements for the durability of the circuit elements of the start unit 32 are relaxed, thereby enabling miniaturization of the drive integrated circuit 3. . the

(implementation mode 2)

The basic configuration of this embodiment is common to that of Embodiment 1, and therefore the same reference numerals are assigned to the common parts and descriptions thereof are omitted. the

As shown in FIG. 7 , the present embodiment includes a sensor 62 for detecting a human body, and a human body determination unit 43 a for determining the presence or absence of a human body within a predetermined detection range based on the output of the sensor 62 . That is, the sensor 62 and the human body determination unit 43a constitute a so-called human body sensing sensor. The human body determination unit 43a is provided in the control integrated circuit 4, and both the sensor 62 and the human body determination unit 43a use the control voltage Vcc1 as a power source. As the sensor 62, for example, a pyroelectric sensor that detects heat rays (infrared light) radiated from the human body can be used. Since both the sensor 62 and the human body determination unit 43a can be realized by known techniques, detailed illustrations and descriptions are omitted. the

In the present embodiment, the sequence control unit 41 starts lighting the discharge lamp La through a series of operations starting from the warm-up operation when the presence of a human body is determined by the human body determination unit 43a. In addition, when the predetermined lighting maintenance time has elapsed since the presence of a human body has not been determined by the human body determination unit 43a, the stop control unit 42 sets the output to the H level and stops the output of the sequence control unit 41 to turn on the discharge lamp La. turn off the lights. the

According to the above configuration, it is possible to suppress unnecessary power consumption due to the user forgetting to turn off the discharge lamp La. the

(implementation mode 3)

The basic configuration of this embodiment is common to that of Embodiment 1, and therefore the same reference numerals are assigned to the common parts and descriptions thereof are omitted. the

As shown in FIG. 8 , the present embodiment is provided with a known brightness sensor 63 for detecting the brightness of the space illuminated by the discharge lamp La, and the integrated circuit 4 for control is provided with a signal generated at least during the steady operation of the sequence control unit 41 . The control unit 44 adjusts the output corresponding to the output of the brightness sensor 63 . As shown in FIG. 9 , the adjustment control unit 44 is connected to the control capacitor C103 via a resistor, and controls the operating frequency by changing the voltage across the control capacitor C103 similarly to the sequence control unit 41 . In this embodiment, the adjustment control unit 44 outputs a PWM signal similarly to the sequence control unit 41, but the output of the adjustment control unit 44 does not necessarily have to be a PWM signal, as long as it is a signal that changes both ends of the control capacitor C103. . the

In addition, the switch unit 21 has a detection resistor R3 connected between the switching element Q20 and the ground potential in order to detect the current flowing in the switching element Q20 on the low voltage side (low side). the

Furthermore, a change is applied to the oscillating unit 35 of the driving integrated circuit 3 such that the sequence control unit 41 and adjust the output of the control unit 44 to adjust the operating frequency. That is, the control unit in the technical solution is constituted by the sequence control unit 41 , the stop control unit 42 and the regulation control unit 44 . the

To describe in detail, the oscillating unit 35 is provided with an input operational amplifier OP3 instead of the voltage follower OP1. The input operational amplifier OP3 is input with the voltage across the control capacitor C103 at the non-inverting input terminal, and is input with the connection between the detection resistor R3 of the switch unit 21 and the switching element Q20 through the resistor R109 at the inverting input terminal. The voltage at the point (hereinafter referred to as "current detection voltage"), and the output terminal and the inverting input terminal are connected via the capacitor C104 to constitute an integrating circuit. The output terminal of the input operational amplifier OP3 is connected to the inverting input terminal of the control operational amplifier OP2 via a resistor R110 and a diode D102 whose cathode is directed toward the input operational amplifier OP3 side. That is, the higher the integrated value of the difference between the voltage across the control capacitor C103 and the current detection voltage is, the higher the output voltage of the input operational amplifier OP3 is, the lower the output voltage of the control operational amplifier OP2 is, and the lower the operating frequency is. . The sequence control unit 41 is connected to the control capacitor C103 via the resistor R103 as in the first embodiment, and the adjustment control unit 44 is also connected to the control capacitor C103 via another resistor R31. the

The operation of this embodiment will be described using FIG. 10 . When the supply of the control voltage Vcc1 shown in FIG. 10( a ) is started, the adjustment control unit 44 first starts to operate after a predetermined time shorter than the stop time T1 . The output of the adjustment control part 44 shown in FIG. 10 (b) is from the start of the operation of the adjustment control part 44 to the end time t3 of the start-up operation t2-t3, regardless of the output of the brightness sensor 63, and the duty ratio is set to 1. During the steady operation, t3 to t4 are set to a duty ratio corresponding to the brightness detected by the brightness sensor 63 . The output of the sequence control unit 41 shown in FIG. 10( c) sets the duty ratio to 0 before the starting time of the startup operation t2 to t3, and sets the duty ratio to be smaller than 1 during the startup operation from t2 to t3 and is not When the value is 0, the duty ratio is set to 1 during t3 to t4 during steady operation. At the start time t2 of the start-up operation t2 to t3, the voltage across the control capacitor C103 shown in FIG. 10(d) is increased by the output of the sequence control unit 41, thereby reducing the operating frequency shown in FIG. 10(e). . In addition, at the start time t3 of the stabilization operation t3 to t4, the contribution of the reduction of the duty ratio of the adjustment control unit 44 is greater than the contribution of the increase of the duty ratio of the output of the sequence control unit 41. The voltage across the capacitor C103 drops, but in the example of FIG. 10 , the contribution of the drop in the current detection voltage is greater than the drop in the voltage across the control capacitor C103, and thus the operating frequency drops. As a whole, the operating frequency Modifications are the same as those in the example of FIG. 1 shown in the first embodiment. the

As for the operation from t3 to t4 in the stable operation, specifically, for example, the brighter the brightness detected by the brightness sensor 63 is, the smaller the duty ratio of the output of the adjustment control unit 44 is, the higher the operating frequency is, and the resonance is increased. The output power of the portion 22 to the discharge lamp La decreases. Through the above operation, power consumption can be suppressed while maintaining brightness including light from light sources other than the discharge lamp La (so-called external light). the

In addition, if only the light of the discharge lamp La is made to enter the brightness sensor 63, control may be performed to maintain the light output of the discharge lamp La constant regardless of external light. the

In addition, the circuit configuration is not limited to the configuration shown in FIG. 9. For example, the adjustment control unit 44 is not connected to the control capacitor C103, but is connected to the oscillation unit 33 via the voltage follower OP1 as in the example of FIG. 5 shown in Embodiment 1. On the control operational amplifier OP2, on the other hand, regarding the regulation control unit 44, as shown in FIG. C31. The adjustment capacitor C31 is the same as the control capacitor C103 in the example of FIG. Resistor R108 is connected. In addition, in FIG. 11 , illustration of the control capacitor C103 and its surrounding resistors R103 and R104 and the voltage follower OP1 is omitted. Parts other than the above are common to the example in FIG. 9 , and illustration and description of the common parts are omitted. In this case, it is necessary to consider sufficiently discharging the adjustment capacitor C31 during the stop time T1 similarly to the control capacitor C103 at the time of design. However, the example of FIG. 9 has an advantage that the number of components can be reduced compared to the example of FIG. 11 . the

Here, in the circuit of FIG. 9 and the circuit of FIG. 11, as shown in FIG. 12(a) and FIG. 12(b), the input voltage Vop- to the inverting input terminal of the input operational amplifier OP3 fluctuates periodically. As shown in FIG. 12(a), as long as the upper limit value of the input voltage Vop- to the inverting input terminal of the input operational amplifier OP3 is sufficiently higher than the input voltage Vop+ to the non-inverting input terminal of the input operational amplifier OP3 13, the output power from the resonator 22 to the discharge lamp La (hereinafter referred to as "lamp power") increases monotonously with respect to the input voltage Vop+ to the non-inverting input terminal of the input operational amplifier OP3. However, when the ambient temperature is very high or the ambient temperature is very low, the output power of the drive power supply unit 5 is insufficient due to changes in the characteristics of the discharge lamp La, and the control of increasing the lamp power based on the current detection voltage becomes incompatible. not on. For example, as shown in FIG. 12(b), the upper limit value of the input voltage Vop- to the inverting input terminal of the input operational amplifier OP3 is always higher than the input voltage Vop- to the non-inverting input terminal of the input operational amplifier OP3. When the voltage Vop+ is low at low temperature, etc., when the output voltage of the input operational amplifier OP3 becomes higher than the output voltage of the control operational amplifier OP2, the output of the input operational amplifier OP3 no longer reflects the operating frequency. The operating frequency is fixed at a predetermined lower limit frequency regardless of fluctuations in the input voltage Vop- of the inverting input terminal of the input operational amplifier OP3 (that is, fluctuations in the current detection voltage). Therefore, in this embodiment, as shown by the curve PLa in FIG. 14, the lamp power is maintained constant by changing the operating frequency as long as the ambient temperature is within a predetermined range. It is fixed at the above-mentioned lower limit frequency, and decreases as the ambient temperature leaves the above-mentioned specified range. Therefore, the output current from the resonator 22 to the discharge lamp La (hereinafter referred to as "lamp current") increases as the ambient temperature moves away from the center of the predetermined range as a whole, as shown by the curve ILa in FIG. 14 , but By fixing the operating frequency as described above at a low temperature or a high temperature, the amount of increase due to changes in the ambient temperature becomes smaller than when the ambient temperature is within the predetermined range. That is, in the present embodiment, it is possible to prevent the shortening of the life of the discharge lamp La due to an excessive increase in the lamp current at low temperature or high temperature. the

(Implementation 4)

The basic configuration of the present embodiment is common to that of Embodiment 3, so the same reference numerals are assigned to the common parts and descriptions thereof are omitted. the

In this embodiment, instead of the brightness sensor 63 of the third embodiment, as shown in FIG. 15 , a dimming signal input unit 64 to which a dimming signal for instructing the light output of the discharge lamp La is input is provided, and the adjustment control unit 44 operates stably. The middle operation is performed to change the light output of the discharge lamp La according to the dimming signal input to the dimming signal input unit 64 . Like the sensor 62 of the second embodiment, the dimming signal input unit 64 uses the control voltage Vcc1 output from the control power supply unit 33 as a power source. In addition, in the integrated circuit 4 for control, there is provided a dimming signal determination unit 43f that determines the type of the dimming signal input to the dimming signal input unit 64, and if the dimming signal input is The dimming signal in the input unit 64 is a signal indicating light output, then an electrical signal corresponding to the content of the dimming signal is input into the adjustment control unit 44, if the dimming signal input to the dimming signal input unit 64 is an indication A signal to turn on or turn off the light is an electrical signal corresponding to the content of the dimming signal, which is input to the stop control unit 42 . the

A general dimming signal is a PWM signal transmitted through a signal line connected to the dimming signal input part 64, and the frequency is 100Hz to 1kHz. The higher the duty cycle, the higher the light output, and the lower limit value is specified. The following duty ratio indicates a signal for turning off the discharge lamp La. In addition, the dimming signal is not limited to the above, and may be an analog signal of a voltage value corresponding to the indicated light output, or a digital signal indicating the light output by digital data. In any case, the dimming signal input unit 64 and the dimming signal determination unit 43f can be realized by known techniques, and therefore detailed description and illustration are omitted. With the above configuration, control such as turning on/off of the discharge lamp La and changing the light output based on the dimming signal from the outside can be performed. In addition, when the dimming signal determination unit 43f receives the input from the dimming signal input unit 64 and consumes power by, for example, A/D conversion, that is, when the conduction control of the discharge lamp La is performed by other than the dimming signal. In the case where the dimming signal judging part 43f does not accept the input from the dimming signal input part 64 from the time of starting to the start of the stable operation, the control integrated circuit 4 always accepts the input from the dimming signal input part 64. Compared with the case of inputting, the power consumption can be reduced. the

Here, the control integrated circuit 4 has a clock unit 45 that generates a clock signal. The higher the frequency of the clock signal generated by the clock unit 45 (hereinafter referred to as “clock frequency”), the higher the frequency of the clock signal in the control integrated circuit 4 other than the clock unit 45. The faster the operation, the faster the response to the input from the abnormality judgment unit 61 outside the control integrated circuit 4, and the more the power consumption of the control integrated circuit 4 increases. the

In addition, in this embodiment, since the speed of response as described above is not particularly required when the drive unit 31 is stopped, a configuration is adopted in which the clock frequency is lowered at least when the drive unit 31 is stopped than when the discharge lamp La is turned on. the

To describe in detail, the driving integrated circuit 3 is provided with the reporting power supply unit 30, and the reporting power supply unit 30 is operating the driving unit 31 from the control voltage Vcc1 shown in FIG. After the stop time T1 has elapsed from the start of the output of the output, the output shown in FIG. 16 (b) from the stop execution part 34 to the drive part 31 or the start part 32 is H level, and the drive is generated as shown in FIG. 13 (d). During the output period of the unit 31, a predetermined report voltage Vcc3 is output as shown in FIG. 16(c). In the present embodiment, the oscillation unit 35 uses the report voltage Vcc3 as a power source, that is, the stop execution unit 34 stops the input of the report voltage Vcc3 when the above-mentioned output is set to L level, whereby the oscillation unit 35 and the drive unit 31 are respectively stopped. . the

Furthermore, the aforementioned report voltage Vcc3 is also input to the clock unit 45 of the control integrated circuit 4 . As shown in FIG. 16( e ), the clock unit 45 makes the clock frequency TA lower during the period when the report voltage Vcc3 is not input than the clock frequency TB during the period when the report voltage Vcc3 is input. Thus, an operation in which the clock frequency is lowered during the stop of the drive unit 31 than during the operation of the drive unit 31 is realized. the

According to the above configuration, the power consumption can be reduced by reducing the clock frequency before the operation of the drive unit 31 starts, and by increasing the clock frequency at least during the lighting of the discharge lamp La, the response to the control integrated circuit 4 can be accelerated. Response to external input. the

In addition, the clock frequency only needs to be increased during the lighting of the discharge lamp La. Therefore, the timing at which the clock unit 45 increases the clock frequency is not limited to the timing at which the input of the report voltage Vcc3 starts (that is, at the start of the warm-up operation) as described above. It can be done before the end of the starting action (that is, the beginning of the stabilizing action). the

In addition, in the control integrated circuit 4 of the present embodiment, the period during which the drive unit 31 operates can be identified by the report voltage Vcc3, so the sequence may be set during the period when the report voltage Vcc3 is not input (that is, the period when the drive unit 31 is stopped). The control unit 41 and the adjustment control unit 44 do not generate an output to the oscillation unit 35 . According to this configuration, compared with the case where the sequence control unit 41 and the adjustment control unit 44 generate an output to the oscillation unit 35 even when the drive unit 31 is stopped, the power consumption during the stop of the drive unit 31 can be reduced. As a result, the requirements for durability and the like of the circuit elements of the startup unit 32 are eased, thereby making it possible to reduce the size of the driving integrated circuit 3 . the

(implementation mode 5)

The basic configuration of the present embodiment is common to that of Embodiment 4, and therefore the same reference numerals are assigned to the common parts and descriptions thereof are omitted. the

Compared with Embodiment 4, the present embodiment does not provide the dimming signal input unit 64. Instead, as shown in FIG. The cumulative lighting time of 46 counts gradually increases the duty ratio in stable operation to compensate for the decrease in the light beam of the discharge lamp La accompanying the passage of the cumulative lighting time and to make the output power to the discharge lamp La relative to that of the discharge lamp La. The ratio of the rated power (hereinafter referred to as "dimming ratio") gradually increases with 100% as the upper limit. Thereby, the luminous flux of the discharge lamp La can be kept substantially constant during the period from when the use of the discharge lamp La is started until the dimming ratio reaches 100%. More specifically, for example, as shown in FIG. 18 , when the cumulative lighting time is 0, the dimming ratio is set to 70%, and the dimming ratio is increased linearly with respect to the cumulative lighting time until the dimming ratio reaches 100%. Maintain the dimming ratio at 100% after the dimming ratio reaches 100%. In the example of FIG. 18 , the cumulative lighting time to bring the dimming ratio to 100% is longer than the rated life time of the discharge lamp La. As an operation of determining the dimming ratio (strictly speaking, adjusting the duty ratio of the output of the control unit 44) based on the accumulated lighting time, it may be performed in advance in a memory such as the storage unit 47 described later in the integrated circuit 4 for control. It may be realized by holding a data table showing the relationship between the cumulative lighting time and the dimming ratio and using the data table, or by calculation. the

Furthermore, the timer 46 also counts the accumulated usage time as the usage time of the discharge lamp lighting device itself. ), the stop control unit 42 sets the output to the stop executing unit 34 of the driving integrated circuit 3 at H level, and stops the operation of the driving unit 31 . Thereby, it is possible to prevent abnormal heat generation and the like due to the lifetime of the circuit element. the

More specifically, the configuration for counting the accumulated lighting time and the accumulated use time will be described. The control integrated circuit 4 has a storage unit 47 composed of a nonvolatile memory, and stores the cumulative lighting time and the cumulative usage time in the storage unit 47 during the period when the discharge lamp La is turned off. The timer unit 46 reads the accumulated lighting time and the accumulated usage time stored in the storage unit 47 at startup, for example, before starting the warm-up operation, and starts counting the accumulated lighting time and the accumulated usage time. As the cumulative lighting time, the length of time during which the report voltage Vcc3 is input may be counted, or the length of time during which stable operation is performed may be counted. As the accumulated usage time, for example, the length of time during which the report voltage Vcc3 is input is counted. In either case, when the power is turned off, the timer unit 46 writes the accumulated lighting time and the accumulated usage time during the counting into the storage unit 47 . The accumulated usage time is not reset since it indicates the usage time of the discharge lamp lighting device itself, but the accumulated lighting time needs to be reset (restored to 0) when the discharge lamp La is replaced. As the timing for resetting the cumulative lighting time, for example, the cumulative lighting time may be reset when a no-load state is detected, or a switch (not shown) that is operated when the discharge lamp La is replaced may be provided, and when the switch is operated Reset the accumulated lighting time. the

Here, before writing the cumulative lighting time or the cumulative usage time into the storage unit 47 , it is necessary to delete the cumulative lighting time or the cumulative usage time already held in the storage unit 47 . In addition, generally, power is consumed at the time of writing and erasing of the memory. Therefore, when erasing and writing are made consecutively, the time during which power consumption temporarily increases becomes longer. Therefore, the data used in the operation of the stop control unit 42 and the adjustment control unit 44, that is, data such as the accumulated lighting time and the accumulated use time that should be kept in the storage unit 47 during the period when the power is turned off (hereinafter referred to as " It is preferable to separate the timing of deleting temporary data ") from the timing of writing temporary data, since each period during which power consumption temporarily increases for deleting and writing to storage unit 47 can be shortened. As the above-mentioned temporary data, in addition to the cumulative lighting time and cumulative usage time, the number of times the power is turned on and off, the dimming ratio immediately before the discharge lamp La is turned off, and the like are conceivable. the

Furthermore, from the viewpoint of shortening the time spent on the above-mentioned processing of the storage unit 47, the processing such as deletion and writing to the storage unit 47 is preferably performed not during a period when the clock frequency is lowered, but when the clock frequency is lowered. in a higher period. the

Based on the above, in this embodiment, the timing for deleting the accumulated lighting time and the accumulated usage time is set as the start of the stabilization operation. Also, even if the clock unit 45 stops the supply of the report voltage Vcc3 before the writing into the storage unit 47 is completed, the clock frequency does not decrease until the writing into the storage unit 47 is completed. The above-mentioned operation of the clock unit 45 can be realized by the control of the timer unit 46, and can also be realized by making the clock unit maintain a high clock frequency for a predetermined time sufficient for writing into the storage unit 47 after the report voltage Vcc3 is stopped. structure to achieve. The present embodiment uses the above-mentioned structure, compared with the case where erasing and writing to the storage unit 47 are performed successively, and the case where erasing and writing to the storage unit 47 are performed during a period in which the clock frequency is low, the consumption is reduced. The time during which the power is temporarily increased is shortened, and the electrical stress acting on the drive power supply unit 5 and the like is reduced. the

(implementation mode 6)

The basic configuration of this embodiment is common to that of Embodiment 5, so the same reference numerals are assigned to the common parts, and illustration and description are omitted. the

This embodiment is provided with the power detection part 165 which outputs the DC voltage corresponding to the voltage which smoothed the output voltage of the rectification part DB, as shown in FIG. In addition, the stop execution unit 34 of the present embodiment judges a drop in the voltage input from the alternating current power supply AC (hereinafter referred to as “input power voltage”) based on the output of the power supply detection unit 165, and when it is judged that the input power voltage is low, performs the same operation as the stop operation. When the output of the control unit 42 is at the H level, the output is also at the L level, and the driving unit 31 and the reporting power supply unit 30 are stopped. the

More specifically, as shown in FIG. 20 , the power supply detection unit 165 outputs a DC voltage obtained by dividing the output voltage of the rectifier DB with a voltage dividing resistor and smoothing it with a capacitor. In addition, the stop execution unit 34 includes an input comparator CP4 to which a predetermined fifth reference voltage Vr5 is input to a non-inversion input terminal and an output voltage of the power supply detection unit 165 is input to an inversion input terminal, and a non-inversion input terminal. The input comparator CP5 connected to the stop control unit 42 and inputted with the fifth reference voltage Vr5 to the inverting input terminal, the logical sum circuit OR2 which outputs the logical sum of the outputs of the two input comparators CP4 and CP5, and the set The constant current source Ir2 charged to the delay capacitor C105 outside the driving integrated circuit 3 is composed of an n-channel type FET, connected in parallel to the delay capacitor C105, and inputted to the gate by the output of the logical sum circuit OR2. The switching element Q106 and the output comparator CP6 to which the delay capacitor C105 is connected to the non-inverting input terminal and the predetermined sixth reference voltage Vr6 is input to the inverting input terminal. The period in which the output of the output comparator CP6 is at the H level is a period in which the driving unit 31 and the reporting power supply unit 30 operate, that is, a period in which the reporting voltage Vcc3 is output. the

The operation of the stop execution unit 34 described above will be described. The stop execution unit 34 uses the control voltage Vcc1 output from the control power supply unit 33 as a power source, and starts charging the delay capacitor C105 at the time of startup together with the start of output of the control voltage Vcc1 from the control power supply unit 33. When the voltage across C105 reaches the sixth reference voltage Vr6, the output of the output comparator CP6 becomes H level to start the operation of the driving unit 31 and the output of the report voltage Vcc3. At this time, in the starting unit 32, the switch Element Q101 is fixed in an off state. That is, the charging time T2 (see FIG. 21 ) obtained by dividing the product of the capacity value of the delay capacitor C105 and the sixth reference voltage Vr6 by the output current of the constant current source Ir2 of the stop execution unit 34 matches the stop time T1. the

In addition, when the output voltage of the power supply detection unit 165 is lower than the fifth reference voltage Vr5, or when the output of the stop control unit 42 is at the H level, the output via any one of the input comparators CP4 and CP5 becomes H. level, the switching element Q106 is turned on, thereby rapidly discharging the delay capacitor C105 via the switching element Q106, the voltage across the delay capacitor C105 is lower than the sixth reference voltage Vr6, and the output of the output comparator CP6 becomes L voltage. level, thereby stopping the drive unit 31 and the report voltage Vcc3. Here, the time T3 (refer to FIG. 21 ) from when the switching element Q106 is turned off to when the output of the output comparator CP6 becomes L level (hereinafter referred to as "holding time") is sufficiently short. the

An example of the operation of this embodiment is shown in FIG. 21 . In the example of FIG. 21, when the output of the stop control unit 42 shown in FIG. 21(a) becomes L level, the output voltage of the power detection unit 165 shown in FIG. 21(b) is lower than the fifth reference voltage. Vr5, whereby the output of one input comparator CP4 shown in FIG. 21(c) is at H level, and therefore the output of the logical sum circuit 2 shown in FIG. 21(d) is also at H level. Finally, when the output voltage of the power supply detection unit 165 exceeds the fifth reference voltage Vr5, the output of the logical sum circuit OR2 becomes L level to turn off the switching element Q106, thereby starting charging of the delay capacitor C105. Furthermore, if the charging time T2 passes and the voltage across the delay capacitor C105 reaches the sixth reference voltage Vr6, the output of the output comparator CP6 becomes H level, and the operation of the drive unit 31 and the operation shown in FIG. 21(f) are started. Output reporting voltage Vcc3. Then, if the output voltage of the power detection unit 165 drops below the fifth reference voltage Vr5, the output of the output comparator CP6 becomes L level in a very short holding time T3. Here, the operation of the driving unit 31 and the report The output of the voltage Vcc3 is stopped, respectively. the

In addition, in the control integrated circuit 4 of the present embodiment, when the input of the report voltage Vcc3 is started, a series of operations from the warm-up operation to the stabilization operation are started. the

In addition, the structure of the power detection unit 165 and the stop execution unit 34 is not limited to the above, for example, as shown in FIG. The switching element is composed of npn type transistor whose voltage and emitter are grounded, and the collector of this switching element is connected to the non-inverting input terminal of the input comparator CP5 common to the stop control unit 42 . That is, the power supply detection unit 165 changes the output according to whether the output voltage of the rectification unit DB is divided by resistors and the voltage smoothed by the capacitor is higher or lower than the conduction voltage of the switching element. Each element constituting the power detection part 165 is selected so that when the output voltage of the rectification part DB is sufficiently high, the switching element of the power detection part 165 is turned on, and if the output voltage of the rectification part DB is insufficient and the input voltage is low, the power is turned on. The switching element of the detection unit 165 is turned off. In the example of FIG. 22 , the connection point between the power detection unit 165 and the stop execution unit 34 is connected to the output terminal (control voltage Vcc1) of the control power supply unit 33 via a resistor R51, and an additional voltage is added between the resistor R51 and the stop control unit 42. Resistor R52. If the voltage obtained by dividing the control voltage Vcc1 by these resistors R51 and R52 is higher than the fifth reference voltage Vr5, even if the output of the stop control unit 42 is at L level, if the input voltage is lowered, the switching element of the power detection unit 165 will be turned off. When it is turned off, the output of the stop execution unit 34 is set to L level to stop the drive unit 31 and the like. Alternatively, the operation may be as follows: if the voltage obtained by dividing the control voltage Vcc1 by the resistors R51 and R52 is lower than the fifth reference voltage Vr5, only when the output of the stop control unit 42 is H level and is the input voltage In the low state, the output of the input comparator CP5 of the stop execution unit 34 becomes H level and the output of the stop execution unit 34 becomes L level. In the configuration of FIG. 22 , by omitting input comparator CP4 and logical sum circuit OR2 on the side of power supply detection unit 165 in FIG. 20 , the overall circuit configuration is simplified compared with the example of FIG. 20 . Here, in the configuration of FIG. 22 , when the output voltage of the rectifying unit DB is sufficiently high, the input to the non-inverting input terminal of the comparator CP5 is fixed at the L level irrespective of the output of the stop control unit 42. The stop is performed by the output of the stop control unit 42, but if a resistor (not shown) is added between the power supply detection unit 165 and the input comparator CP5, the stop control can be performed even when the output voltage of the rectification unit DB is sufficiently high. The output of the section 42 is stopped. the

(implementation mode 7)

The basic configuration of the present embodiment is common to that of Embodiment 6, so the same reference numerals are assigned to the common parts, and illustration and description are omitted. the

As shown in FIG. 23 , in the preheating unit 23 of the present embodiment, a switching element Q3 is added between the primary winding of the transformer Tr1 and the ground potential. The switching element Q3 is controlled on and off by the sequence control unit 41, and is turned on at least during the warm-up operation, and is turned off at least during the steady operation. As a result, useless power consumption can be reduced compared to the case where the switching element Q3 is not provided. the

In addition, in this embodiment, the abnormality determination part 61 which detects the no-load state as an abnormal state is divided into the no-load detection part 61a which produces|generates the output which changes according to whether it is a no-load state, and the no-load detection part 61a based on the no-load detection part 61a. The output judges whether it is a no-load state, and an output corresponding to the judgment result is input to the no-load judging part 43b of the stop control part 42, and the no-load judging part 43b is integrated in the control integrated circuit 4. As the no-load detection part 61a, for example, a circuit that detects the impedance between the terminals to be connected to each end of the filament of the discharge lamp La can be used, and both the no-load detection part 61a and the no-load judgment part 43b can be realized by known techniques, so Detailed illustrations and descriptions are omitted. the

Furthermore, the output of the power detection unit 165 is input not to the stop execution unit 34 but to the integrated circuit 4 for control. In the integrated circuit 4 for control, there is provided an abnormality for judging whether the input power supply voltage is insufficient based on the output of the power detection unit 165. state (hereinafter referred to as “input voltage drop state”) and an output corresponding to the judgment result is input to the input voltage drop judging portion 43 c in the stop control portion 42 . It is also determined that the power supply from the alternating current power supply AC to the rectification unit DB is stopped (that is, the power supply is turned off) as the input power low state. the

In addition, the stop control unit 42 periodically refers to the output of the no-load determination unit 43b and the output of the input power reduction determination unit 43c, and if any of the no-load determination unit 43b and the input power reduction determination unit 43c determines that it is an abnormal state, then The output to the driving integrated circuit 3 is set to H level, and the sequence control unit 41 , the adjustment control unit 44 , and the timer unit 46 are respectively stopped. When an abnormal state is determined before the start of the warm-up operation, the operation of the drive unit 31 is not started by maintaining the output of the stop control unit 42 at the H level. In addition, when the stop is due to the determination of the no-load state, the timer unit 46 resets the accumulated lighting time, and discards the accumulated lighting time that has not been counted. the

(implementation mode 8)

The basic configuration of this embodiment is common to that of Embodiment 5, so the same reference numerals are assigned to the common parts, and illustration and description are omitted. the

In this embodiment, instead of the abnormality determination unit 61 , as shown in FIG. 24 , a life detection unit 66 is provided which detects a parameter changing at the end of the life of the discharge lamp La and outputs a voltage corresponding to the detected parameter. Specifically, the lifetime detection unit 66 of the present embodiment detects an asymmetric current generated in the discharge lamp La as the above-mentioned parameter, and outputs a voltage corresponding thereto. the

In addition, in the integrated circuit 4 for control, it is provided to judge whether it is an end-of-life state as an abnormal state in which the discharge lamp La is at the end of life based on the output of the life detection part 66, and an output corresponding to the judgment result is input to the stop control. The discharge lamp life judgment part 43d in the part 42. the

If described in detail, as shown in FIG. 25 , the life detection unit 66 includes a capacitor C106 connected in parallel to the inductor L1 of the resonance unit 22 via a resistor R111 and a filament of the discharge lamp La at one end, and a capacitor C106 connected at the other end to ground, and a resistor R113. circuit. In addition, the capacitor C106 is connected to the discharge lamp life judging part 43d via the diode D103 with the cathode facing the capacitor C106, and the connection point between the diode D103 and the discharge lamp life judging part 43d is connected to the output terminal of the control power supply part 33 via the resistor R112 (control Voltage Vcc1) on. the

Here, when the discharge lamp La is not at the end of its life, during the lighting of the discharge lamp La, the current (hereinafter referred to as "inflow current") Idc+ from the resonator 22 to the life detection part 66, and the current from the life detection part 66 to the The currents (hereinafter referred to as "outflow currents") Idc- of the resonance unit 22 are substantially equal to each other. Thus, the voltage across the capacitor C106 of the life detection unit 66, that is, the output voltage of the life detection unit 66 is maintained at a substantially constant voltage (hereinafter referred to as “normal voltage”), which is approximately equal to the control voltage Vcc1. Voltage divided by resistors R112 and R113. In addition, the connection point between the inductor L1 of the resonance unit 22 and the discharge lamp La is connected to the high-voltage-side output terminal of the DC power supply unit 1 via a resistor R114 . the

On the other hand, when the discharge lamp La reaches the end of its life, in the discharge lamp La, the consumption amount of the emitter coated on the filament varies among the filaments, and one of the above-mentioned currents Idc+ and Idc- becomes larger than the other. (That is, an asymmetric current is generated), and a difference corresponding to the difference between the current Idc+ and Idc- (the magnitude of the asymmetric current) is generated between the output voltage of the life detection unit 66 and the normal voltage. For example, when the outflow current Idc+ is larger than the inflow current Idc-, the output voltage of the life detection part 66 becomes higher than the above-mentioned normal voltage; The output voltage becomes lower than the above normal voltage. the

The discharge lamp life determination unit 43d compares the output voltage of the life detection unit 66 with a predetermined upper limit voltage higher than the normal voltage and a predetermined lower limit voltage lower than the normal voltage, and if the output voltage of the life detection unit 66 is below the upper limit voltage, If the lower limit voltage is higher than the lower limit voltage, it is determined not to be the end-of-life state, and if the output voltage of the life detection unit 66 exceeds the upper limit voltage or is lower than the lower limit voltage, it is determined to be the end-of-life state. For example, when the control voltage Vcc1 is 5V and the normal voltage is 2.5V, the upper limit voltage is set to 4V and the lower limit voltage is set to 1V. the

If the stop control unit 42 is judged to be the end-of-life state by the discharge lamp life judging unit 43d, the output to the driving integrated circuit 3 is set to H level, the driving unit 31 etc. of the driving integrated circuit 3 are stopped, and the sequence The control unit 41 and the adjustment control unit 44 stop, respectively. the

Furthermore, the voltage across the capacitor C106 of the life detection unit 66 varies depending on whether the filament of the discharge lamp La is connected to the resistor R111 of the life detection unit 66 , that is, whether it is in a no-load state. Therefore, the output of the lifetime detection part 66 can also be used for detection (judgment) of a no-load state. However, since it is also considered that the current from the DC power supply unit 1 also flows into the capacitor C106 of the life detection unit 66 via the resistor R114 and the preheating circuit 23 before the operation of the drive unit 31 starts, the life detection unit 66 When the output is used for the detection of the no-load state, it is necessary to make the time constant of the life detection part 66 shorter than the stop time T1 so that at least the leakage detection caused by the charging of the capacitor C106 under the above-mentioned current does not occur in the drive part 31. Occurs after the action starts. the

(implementation mode 9)

The basic configuration of the present embodiment is common to that of Embodiment 6, so the same reference numerals are assigned to the common parts, and illustration and description are omitted. the

The DC power supply unit 1 of this embodiment is a known so-called step-up chopper circuit (boost converter), as shown in FIG. 26 . Specifically, it includes a series circuit of an inductor L2, a diode D1, and an output capacitor C6 connected between the DC output terminals of the rectification unit DB (that is, between the DC output terminal on the high-voltage side of the rectification unit DB and the ground potential), and The series circuit of the switching element Q4 and the resistor R5 connected to the connection point of the inductor L2 and the diode D1 at one end and grounded at the other end, uses the voltage across the output capacitor C6 as the output voltage, and periodically turns on and off the switching element The duty cycle of Q4 controls the output voltage. Generally, when a switching power supply such as a boost converter is used, power consumption is reduced due to improvement in power factor. the

Furthermore, the present embodiment includes, for example, a DC power supply detection unit 167 configured with a voltage dividing resistor for dividing the output voltage of the DC power supply unit 1 , and outputting a higher voltage as the output voltage of the DC power supply unit 1 increases. In addition, as the power supply detection unit 165 , as in the example of FIG. 20 , a unit that outputs a higher voltage as the effective value of the output voltage of the rectification unit DB is higher is used. the

In addition, in the driving integrated circuit 3 of the present embodiment, a circuit for driving the switching element Q4 of the DC power supply unit 1 is provided. To describe in detail, in the driving integrated circuit 3, a voltage error amplifier OP4 that outputs a difference corresponding to the predetermined seventh reference voltage Vr7 and the output voltage of the DC power supply detection unit 167 is provided, and the output of the power supply detection unit 165 The multiplier 36a that multiplies the output of the error amplifier OP4, the output of the multiplier 36a is input to the inverting input terminal, and the output of the multiplier 36a is connected to the connection point between the switching element Q4 and the resistor R5 of the DC power supply unit 1 instead of the inverting input terminal. The comparator CP7, the flip-flop circuit 36b to which the output of the comparator CP7 is input to the reset terminal, and the switching element Q4 of the DC power supply unit 1 are connected via the resistor R4, and the DC power supply unit 1 is controlled by the output of the flip-flop circuit 36b. The switching element Q4 is turned on and off to drive the power drive portion 36c. the

Furthermore, the inductor L2 of the DC power supply unit 1 is provided with a secondary winding whose one end is grounded, and the other end of the secondary winding is connected to the zero current detection unit 36d provided in the driving integrated circuit 3 . The zero-current detection unit 36d is connected to the setting terminal of the flip-flop circuit 36c, and detects the completion of the energy discharge of the inductor L2 based on the voltage induced in the above-mentioned secondary winding, and when the completion of the energy discharge of the inductor L2 is detected A pulse is input to the set terminal of the flip-flop circuit 36b. the

As a result, the switching element Q4 of the DC power supply unit 1 is periodically turned on and off, and its duty ratio is feedback-controlled so that the output voltage of the DC power supply unit 1 becomes a predetermined target voltage. The target voltage is a voltage at which the output voltage of the DC power supply detection unit 167 becomes the seventh reference voltage Vr7. the

Furthermore, in the integrated circuit 3 for driving, it is provided to judge whether the output voltage of the DC power supply unit 1 is insufficient based on the output of the DC power supply detection unit 167 (hereinafter referred to as “lower DC voltage state”) and output a corresponding The DC voltage drop determination unit 37 of the resulting voltage. Specifically, as shown in FIG. 27 , the DC voltage drop determination unit 37 is provided with the output voltage of the DC power supply detection unit 167 input to the non-inverting input terminal and the seventh reference voltage input to the inverting input terminal. A comparator CP8 with a predetermined eighth reference voltage Vr8 lower than Vr7 and a switching element Q107 composed of an n-channel FET whose gate is connected to an output terminal of the comparator CP8. One end of the switching element Q107 is grounded and the other end receives the report voltage Vcc3 via the resistor R32. The eighth reference voltage Vr8 is set at 50% to 80% of the seventh reference voltage Vr7 corresponding to the target voltage. That is, when the output voltage of the DC power supply detection unit 167 is equal to or higher than the eighth reference voltage Vr8, the DC voltage drop determination unit 37 does not determine that the DC voltage is in a low state, but sets the output to L level. When the output voltage of the DC power supply detection unit 167 When it is lower than the eighth reference voltage Vr8, it is determined that the DC voltage is low, and the output is set to H level. For example, when the eighth reference voltage Vr8 is 80% of the seventh reference voltage Vr7, it is determined that the DC voltage is low when the output voltage of the DC power supply unit 1 is less than about 80% of the target voltage. the

In addition, the control integrated circuit 4 is provided with a determination input unit 144 that appropriately converts the output of the DC voltage drop determination unit 37 and inputs it to the stop control unit 42 . the

Furthermore, this embodiment is the same as Embodiment 8, and is provided with the life detection part 66 and the discharge lamp life judgment part 43d. the

The stop control unit 42 of this embodiment refers to the output of the discharge lamp life judgment unit 43d and the output of the judgment input unit 144 at any time, and if it is judged by the discharge lamp life judgment unit 43d that it is in the end-of-life state, it will send a signal to the driving lamp similarly to the eighth embodiment. The output of the integrated circuit 3 is set to H level, the driving unit 31 and the like of the driving integrated circuit 3 are stopped, and the sequence control unit 41 and the adjustment control unit 44 are respectively stopped. the

In addition, the stop control part 42 does not stop the drive part 31 and the sequence control part 41 immediately as mentioned above, but controls the sequence control part 41 to start If the restart time T5 (refer to FIG. 29 ) is specified for the operation, if the DC voltage is still judged to be low after the restart time T5 has elapsed, at this point, as when it is judged to be in the end-of-life state, an 3 is set to H level to stop the driving unit 31 and the like of the driving integrated circuit 3, and also stop the sequence control unit 41 and the adjustment control unit 44, respectively. the

The operation of this embodiment is shown in FIG. 28 and FIG. 29 . In FIG. 28 and FIG. 29, (a) shows the time change of the output voltage of the DC power supply detection part 167, (b) shows the time change of the output of the comparator CP8 of the DC voltage drop judging part 37, and (c) shows (d) shows the time change of the output of the sequence control unit 41, (e) shows the time change of the operating frequency, and (f) shows the response of the stop control unit 42 to the driving integrated circuit 3. The time variation of the output. FIG. 28 shows the operation when the DC voltage drop state (that is, the state in which the DC voltage drop judging unit is at the H level) ends within a time T4 shorter than the restart time T5, whereby the stop by the stop control unit 42 is not performed. . In addition, FIG. 29 shows the operation when the continuation time of the DC voltage low state reaches the restart time T5 and the stop by the stop control unit 42 is performed. In this embodiment, the stop execution unit 34 of the driving integrated circuit 3 also stops the power drive unit 36c when the output of the stop control unit 42 is at H level, and in FIG. After the power supply drive unit 36c is stopped, the output voltage of the DC power supply unit 1 and the output voltage of the DC power supply detection unit 167 drop. the

In addition, when the drive unit 31 and the power supply drive unit 36c are stopped immediately when it is judged that the DC voltage is in a low state, the DC voltage low state is caused by, for example, a momentary power failure, etc., even if it is eliminated in a short time, the discharge cannot be performed. Light up the lamp. On the other hand, in the present embodiment, when the DC voltage low state is judged to be in the low DC state as described above, the start operation is performed for the restart time T5, and the discharge lamp La can be blinked in the short DC voltage low state as described above. The discharge lamp La is turned on again. In addition, since the drive unit 31 and the power drive unit 36c are stopped when it is determined that the DC voltage is in a low state after the restart operation at the restart time T5 is completed, even if the output of the DC power detection unit 167 does not reflect Even when the output voltage of the DC power supply unit 1 is always 0 V, it is possible to avoid excessive electrical stress acting on the circuit elements and the discharge lamp La due to erroneous feedback control. the

In addition, the stop control unit 42 of this embodiment gives priority to the operation based on the judgment of the DC voltage low state when judging both the end-of-life state and the DC voltage low state, and does not An operation corresponding to the determination of the end-of-life state is performed. The reason is that if the DC voltage drop state occurs, it is considered that the lamp current temporarily becomes asymmetrical due to the flickering of the discharge lamp La at the same time, and it is misjudged as the end-of-life state. When the drive unit 31 and the power drive unit 36c are stopped, there is a possibility that the startup operation based on the determination of the DC voltage drop state as described above may not be performed substantially. In addition, for example, by sufficiently separating the operating frequency from the resonance frequency of the resonance circuit composed of the resonance portion 22 and the discharge lamp La to ensure a so-called slow-phase operation, it is possible to avoid erroneous judgments caused by the above-mentioned turning off. However, if this is the case, Then, circuit loss increases due to an increase in reactive current, which is not preferable. the

(implementation mode 10)

The basic configuration of this embodiment is common to that of Embodiment 9, so the same reference numerals are assigned to the common parts, and illustration and description are omitted. the

As shown in FIG. 30 , the zero current detection unit 36d of this embodiment includes an inverting input terminal connected to the secondary winding of the inductor L2 of the DC power supply unit 1 and a predetermined ninth voltage is input to the non-inverting input terminal. The input comparator CP9 of the reference voltage Vr9, the one-shot circuit OS that starts outputting a pulse of a predetermined width when the output of the input comparator CP9 inverts from L level to H level, and the negation of the output of the output one-shot circuit OS The circuit INV, the first logical product circuit AND1 that outputs the logical product of the output of the input comparator CP9 and the output of the negation circuit INV, the reserved capacitor C107 charged by the constant current source Ir3 that uses the control voltage Vcc1 as the power supply, and the n-channel The switching element Q108 is connected in parallel to the storage capacitor C107 and the output terminal of the first logical product circuit AND1 is connected to the gate, and the predetermined tenth reference voltage Vr10 is input to the inverting input terminal. In addition, the output comparator CP10 of the storage capacitor C107 and the logical product of the output of the output comparator CP10 and the output of the one-shot circuit OS are connected to the non-inverting input terminal as the output of the zero current detection part 36d. 2 logical product circuit AND2. the

The operation of the zero current detection unit 36d will be described with reference to FIG. 31 . Consider a case where the input voltage from the secondary winding of the inductor L2 of the DC power supply unit 1 to the zero current detection unit 36d fluctuates as shown in FIG. 31( b ). Then, the output of the input comparator CP9 becomes as shown in FIG. 31(c), and the output of the one-shot circuit OS becomes as shown in FIG. 31(e). The storage capacitor C107 is rapidly discharged via the switching element Q108 when the output of the first logical product circuit AND1 is at the H level, and therefore is input to the output of the comparator CP9 while the output of the first logical product circuit AND1 is at the L level. It is charged during the L level period and the H level period of the output of the one-shot circuit OS, and gradually increases the output voltage to the output comparator CP10 as shown in FIG. 31( d ). Here, the period during which the output of the zero-current detection unit 36d shown in (g) of FIG. During the period of the pulse width of the output of the one-shot circuit OS immediately before the output of the output comparator CP10 is inverted from the H level to the L level shown in (f) of FIG. 31 , the power drive unit 36c The output of is as shown in (a) in FIG. 31 . As long as the output of the output comparator CP10 is not at the H level, the output of the zero current detection part 36d does not become the H level, so after the input voltage to the zero current detection part 36d is lower than the ninth reference voltage Vr9, the voltage is kept. During the predetermined retention time T6 before the voltage across the capacitor C107 reaches the tenth reference voltage Vr10, the output of the zero current detection unit 36d does not become H level. In other words, as long as the period during which the input voltage to the zero-current detection unit 36d is lower than the ninth reference voltage Vr9 does not reach the above-mentioned holding time T6, the output of the flip-flop circuit 36b does not become H level. Therefore, the DC power supply unit 1 The switching element Q4 is not turned on. the

In addition, in the DC power supply unit 1, due to the parasitic impedance and the reverse recovery time of the diode D1, immediately after the switching element Q4 is turned on, the current from the output capacitor C6 (hereinafter referred to as "reverse current") flows to the detection resistor R3. In addition, in the driving integrated circuit 3, the input voltage to the inverting input terminal of the comparator CP7 connected to the reset terminal of the flip-flop circuit 36b falls when the input power supply voltage falls. Also, when the input power supply voltage becomes lower than the reverse current and the output of the comparator CP7 becomes H level, the switching element Q4 is turned off even though the inductor L2 does not store energy sufficiently. In this case, although the switching element Q4 can be turned on again in a short time, the switching element Q4 is turned off again in the same manner as above, and it is conceivable that the switching element Q4 is turned on in a short period by this repetition. disconnect. If switching element Q4 is turned on and off at a short cycle in this way, excessive electrical stress acts on switching element Q4. the

On the other hand, in this embodiment, as described above, as long as the duration of the period during which the input voltage to the zero current detection unit 36d is lower than the ninth reference voltage Vr9 does not reach the holding time T6, the DC power supply unit 1 is not turned on. The switching element Q4 is turned on, that is, the off state of the switching element Q4 continues for at least the retention time T6, so even if the input voltage of the zero current detection part 36d slightly fluctuates as in the vicinity of the right end of FIG. The switching element Q4 of 1 is turned on and off in a relatively short cycle, and its life is shortened. the

Furthermore, in this embodiment, the output of the zero-current detection unit 36d is connected to the setting terminal of the flip-flop circuit 36b via the logical sum circuit OR3, and the integrated circuit 3 for driving is provided with the output of the monitoring flip-flop circuit 36b. When the output of the flip-flop circuit 36b continues to be at L level for a predetermined time or longer, the restart unit 36e inputs a pulse to the set terminal of the flip-flop circuit 36 via the logical sum circuit OR3. the

Here, in Embodiment 5, when the cumulative use time reaches the device life time, the drive unit 31 is stopped. In contrast, in this embodiment, the drive unit 31 is not activated even if the cumulative use time reaches the device life time. etc., and perform other actions when the accumulated usage time reaches the device life time. It will be described in detail below. the

In the control integrated circuit 4 of this embodiment, as shown in FIG. 32 , a reporting unit 48 is provided, and the output is switched according to whether the accumulated usage time is longer than the life time of the device, so that the accumulated usage time counted by the timer unit 46 (that is, the use time of the discharge lamp lighting device itself) the output is at L level during the period shorter than the device life time, and the output is at H level during the period when the accumulated use time counted by the timer 46 is longer than the device life time. The device lifetime is set to 30,000 hours, for example. In addition, the report input unit 38 to which the output of the report unit 48 is input is provided in the driving integrated circuit 3 . the

In addition, the report input unit 38 maintains the switching element Q108 of the zero current detection unit 36d in the off state and fixes the output of the output comparator CP10 at the H level during the period in which the output of the report unit 48 is at the H level. The output of the one-shot circuit OS is used as the output of the zero current detection unit 36d. Thus, the above-described operation of maintaining the OFF state of the switching element Q4 for the time T6 is no longer performed, so the possibility that the switching element Q4 is turned on and off in a short cycle due to an abnormality of the alternating current power supply AC becomes high. The lifetime of this switching element Q4 becomes short. the

Here, if it is impossible to predict which of the power supply elements constituting the discharge lamp lighting device will reach the end of its life first, it is difficult to establish measures to prevent accidents at the end of the life of the discharge lamp lighting device. In addition, when the discharge lamp La is turned off based on the predetermined cumulative usage time as in Embodiment 5, the discharge lamp La is turned off at the same time in a plurality of discharge lamp lighting devices installed at the same time, which is uncomfortable for the user. Hope that happens. On the other hand, in the present embodiment, the above-mentioned operation easily causes failure of the switching element Q4 of the DC power supply unit 1, so the possibility of the switching element Q4 reaching the end of life earlier than other circuit elements becomes high, so it is easy to establish the known Take countermeasures such as current fuses (not shown). In addition, since the switching element Q4 fails at the end of its lifetime, there is unevenness, so even if the use of a plurality of discharge lamp lighting devices is started at the same time, the discharge lamp La does not end in the lifetime of these plurality of discharge lamp lighting devices. When the lights are turned off all at once. the

In addition, the operation when the cumulative usage time reaches the device life time is not limited to the above. For example, a configuration may be adopted in which the clock unit 45 changes the clock frequency during the period when the report voltage Vcc3 is not input, that is, during the stop of the drive unit 31, based on the output of the report unit 48, and after the cumulative use time reaches the device life time, the clock frequency is changed to The above-mentioned clock frequency is higher than that before the cumulative use time reaches the life time of the device. More specifically, for example, before the cumulative use time reaches the device life time, the clock frequency TA during the period when the report power supply cc3 is not input is made lower than the clock frequency TB during the stable operation, while the cumulative use time reaches the device life time. After the time reaches the device life time, the clock frequency TA during the period when the report power supply cc3 is not input is made the same as the clock frequency TB during the stable operation. In this case, since the electrical stress acting on the first switching element Q101 of the starting unit 32 increases during the stop of the driving unit 31 , there is a high possibility that the first switching element Q101 of the starting unit 32 will reach the end of its lifetime first. If this structure is adopted, the output of the reporting unit 48 is processed only in the integrated circuit 4 for control, so it is no longer necessary to provide the report input unit 38 in the integrated circuit 3 for driving, thereby enabling the miniaturization of the integrated circuit 3 for driving. change. the

(Embodiment 11)

The basic configuration of this embodiment is common to that of Embodiment 10, so the same reference numerals are assigned to the common parts, and illustration and description are omitted. the

In this embodiment, as shown in FIG. 33 , as the structure of the oscillation unit 35 , the structure shown in FIG. 11 in Embodiment 3 is adopted. In addition, in FIG. 33 , illustration of the adjustment control unit 44 and its peripheral circuits is omitted. the

In this embodiment, the reporting input unit 38 is connected to the reporting unit 48 through an inverting input terminal, and a predetermined eleventh reference voltage Vr11 is input to the non-inverting input terminal, and the output terminal is connected to the control operational amplifier through a resistor R33. The comparator C11 on the inverting input terminal of OP2 constitutes. Make the eleventh reference voltage Vr11 lower than the H-level output voltage value of the reporting unit 48 and higher than the L-level output voltage value of the reporting unit 48, and report the output of the input unit 38, that is, the output of the above-mentioned comparator C11. The output of the reporting unit 48 is inverted. In addition, with the connection as described above, the operating frequency shown in FIG. 34(c) is in the period when the output of the reporting unit 48 shown in FIG. 34(a) is H level (that is, the discharge lamp lighting device is judged to be at the end of its life. period) T9, T10, the frequency f4 is higher than the operating frequency f1, f2 of T7, T8 during the period when the output of the reporting unit 48 is at the L level (that is, the period when the discharge lamp lighting device is not judged to be at the end of its life). , f5. Thereby, the amplitude of the output voltage from the resonator 22 to the discharge lamp La shown in FIG. The amplitudes V1 , V3 in the periods T7 , T8 of the level are smaller than the amplitudes V2 , V4 . Furthermore, in the periods T9 and T10 when the output of the reporting unit 48 is at the H level, the sequence control unit 41 of this embodiment is longer than the duration of the preheating operation during the periods T7 and T8 when the output of the reporting unit 48 is at the L level. T7, T9 are long, and the durations T8, T10 of the starting operation are made short. the

According to the above configuration, during the period when the discharge lamp lighting device is judged to be at the end of its life, the life of the discharge lamp La is likely to be shortened by increasing the duration of the warm-up operation, and the life of the discharge lamp La is easily shortened by increasing the operating frequency. Since the startability is deteriorated, the user may know the end of life of the discharge lamp lighting device. As the duration T9 of the preheating operation during which the output of the reporting unit 48 is at the H level, specifically, for example, the output of the reporting unit 48 is set to twice the duration T7 of the preheating operation during the period of the L level. 3 times, the duration of the warm-up operation can be reliably excessive and the life of the discharge lamp La can be shortened. Furthermore, if the duration T9 of the warm-up operation during which the output of the reporting unit 48 is at the H level is prolonged to such an extent that a person can recognize it by seeing it, it will be easier for the user to know the end of life of the discharge lamp lighting device. . the

(implementation mode 12)

The basic structure of this embodiment is common to that of Embodiment 11, so the same reference numerals are assigned to the common parts, and illustration and description are omitted. the

In the driving integrated circuit 3 of the present embodiment, as shown in FIG. 35 , instead of the DC voltage drop determination unit 37 , it is provided to determine whether or not the output voltage Vdc of the DC power supply unit 1 is in an overvoltage state where the output voltage Vdc becomes abnormally high. It is an overvoltage protection unit 39 that lowers the output voltage of the DC power supply unit 1 in an overvoltage state. In addition, the report input unit 38 is connected to the overvoltage protection unit 39 , and the operation of the overvoltage protection unit 39 is changed according to the output of the report unit 48 . the

As shown in FIG. 36, the overvoltage protection unit 39 includes a comparator 12 to which the output of the DC power supply detection unit 167 is input to the non-inversion input terminal and a predetermined twelfth reference voltage Vr12 to the inversion input terminal, and The logical product of the output of the comparator CP12 and the output of the report input unit 38 is output to the logical product circuit AND3 in the reset terminal of the flip-flop circuit 36b. That is, when the cumulative use time has not reached the life time of the device, when the output voltage of the DC power supply detection part 167 exceeds the twelfth reference voltage Vr12, the switching element Q4 of the DC power supply part 1 is controlled to turn off the DC power supply part 1. The output voltage Vdc drops the overvoltage protection action, when the cumulative use time reaches the device life time, because the output of the report input part 38 becomes L level, the output of the logical product circuit AND3 is fixed at L level, and the above process is no longer performed. Voltage protection action. the

According to the above configuration, after the cumulative use time reaches the device life time, since the overvoltage protection operation is no longer performed, a high electrical stress is likely to act on the switching element Q4 of the DC power supply unit 1, so the same as in the tenth embodiment can be obtained. Effect. That is, since the switching element Q4 is more likely to reach the end of its life earlier than other circuit elements, it is easy to establish a known countermeasure such as using a current fuse (not shown), and the timing of failure due to the end of the life of the switching element Q4 Since there is unevenness, even if the use of a plurality of discharge lamp lighting devices starts at the same time, the discharge lamps La will not be turned off at the same time during the lifetime of these plurality of discharge lamp lighting devices. the

In addition, the overvoltage protection unit 39 is not limited to the above, and may be configured, for example, as shown in FIG. The thirteenth reference voltage Vr13 is input to the comparator CP12 via the multiplexer TG3 configured using a transfer gate circuit, and is input to the comparator CP12 of the overvoltage protection unit 39 while the output of the reporting unit 48 is at H level. The voltage at the inverting input terminal is set to a thirteenth reference voltage Vr13 higher than the twelfth reference voltage Vr12. According to this structure, the voltage input to the inverting input terminal of the comparator CP12 of the overvoltage protection unit 39 becomes high after the cumulative use time reaches the device life time, and the overvoltage protection operation is difficult to perform, thereby obtaining the same Effect. the

Here, in the above-mentioned various discharge lamp lighting devices, the rectification unit DB, the DC power supply unit 1, the switch unit 21, the resonator unit 22, the driving integrated circuit 3, and the control integrated circuit 4 are respectively mounted on, for example, as shown in FIG. on the rectangular printed wiring board 70 . In the example of FIG. 38 , a power supply connector CN3 to which a wire for connecting to an AC power supply AC is connected is provided on one end of the printed wiring board 70 in the longitudinal direction, and a power connector CN3 is provided on the other end of the printed wiring board 70 in the longitudinal direction. There are a pair of load connectors CN1 and CN2 electrically connected to the socket 81 (see FIG. 41 ) electrically and mechanically connected to the discharge lamp La. In addition, from the above-mentioned one end of the printed wiring board 70 toward the above-mentioned other end, the rectification part DB, the DC power supply part 1, the integrated circuit for driving 3, the integrated circuit for control 4, the switch part 21, and the resonance part 22 are arranged in order. 21 and the control integrated circuit 4 are arranged side by side in the short-side direction of the printed wiring board 70 . In addition, the output capacitor C6 of the DC power supply unit 1 is mounted on the surface of the printed wiring board 70 opposite to the surface on which the driving integrated circuit 3 and the controlling integrated circuit 4 are mounted. the

Furthermore, in the example of FIG. 38 , among the conductive patterns 71 and 72 provided on the printed wiring board 70 , the ground pattern 71 set to a ground potential is arranged on the integrated circuit for driving when viewed from the thickness direction of the printed wiring board 70 . Between the circuit 3 and the integrated circuit 4 for control, and the high-voltage side pattern 72 connected to the output end of the high-voltage side of the DC power supply unit 1 and the switch unit 21 . In addition, in the ground pattern 71, the portion where the drive integrated circuit 3 and the control integrated circuit 4 are connected is branched into a thinner portion than the portion where the DC power supply unit 1, the switch unit 21, and the resonance unit 22 are respectively connected. Two loops 71a, 71b partially overlapping with one of the driving integrated circuit 3 and the controlling integrated circuit 4 are respectively provided at the positions viewed from the thickness direction of the printed wiring board 70 . Therefore, as shown in FIG. 39 , the ground pattern 71 is not disposed between the driving integrated circuit 3 and the control integrated circuit 4 and the switch unit 21 when viewed from the thickness direction of the printed wiring board 70, or the ground pattern is not arranged. Compared with the case where the ground pattern 71 is branched or the case where the loops 71a and 71b are not provided, the radiation noise generated by the switch part 21 and the conduction noise propagating through the ground pattern 71 can reduce the impact on the driving integrated circuit 3 and the control integrated circuit 4. To improve the noise resistance. In addition, in order to suppress common mode noise, it is preferable that the ground pattern 71 is grounded via a capacitive impedance. the

The printed wiring board 70 as described above is housed in a case 73 as shown in FIGS. 40( a ) to 40 ( c ). Here, the signal input connector CN4 shown in FIG. 40( a ) is used for connection of an external sensor such as the brightness sensor 63 in the third embodiment. the

Furthermore, the said case 73 is accommodated and held in the fixture main body 80 shown in FIG. 41, and the lighting fixture 8 is comprised. The fixture main body 80 of FIG. 41 is a so-called Mt. In addition, the outer surface of the device main body 80 is made, for example, white so as to distribute the light of the discharge lamp La. In addition, when providing a sensor that needs to be exposed (or preferably exposed) like the brightness sensor 63 of Embodiment 3, it is sufficient to provide an exposure hole 80a for exposing the sensor as shown in FIG. 42 . . the

(implementation mode 13)

Hereinafter, a power supply device according to Embodiment 3 of the present invention will be described with reference to the drawings. In addition, in this embodiment, as will be described later, the load circuit 302 is constituted by an inverter unit 320 that converts the DC voltage from the DC power supply circuit 301 into a high-frequency voltage, and that a high-frequency voltage is applied from the inverter unit 320 . The voltage and the resonant part 321 etc. which make the discharge lamp La light by the resonant action are constituted, and are used to supply the light-on power to the discharge lamp La, but the load circuit 302 is not limited to this structure, and may be a load other than the discharge lamp La (for example, As long as it is an illumination light source, light-emitting diodes, etc.) can supply operating power. the

In this embodiment, as shown in FIG. 43 , a rectifier circuit DB composed of a diode bridge that rectifies the AC voltage from the AC power source AC to output a pulsating voltage boosts and smoothes the pulsating voltage from the rectifying circuit DB to output a DC voltage. The DC power supply circuit 301, the load circuit 302 that converts the DC voltage from the DC power supply circuit 301 into a high-frequency voltage and applies the high-frequency voltage to the discharge lamp La to light the discharge lamp La, and controls the DC power supply circuit 301 The power source control circuit 305 and the converter control circuit 306 controlling the converter unit 320 described later of the load circuit 302 constitute the control circuit 303 formed on the same semiconductor substrate, and the operation device for setting the operation of the control circuit 303 . The fixed circuit 304 constitutes. the

The DC power supply circuit 301 is a step-up chopper circuit composed of an inductor L301, a switching element Q301, a diode D301, and a smoothing capacitor C301. By turning ON/OFF, the pulsating voltage from the rectifier circuit DB is boosted, and the DC voltage smoothed by the boosted pulsating voltage is supplied to the load circuit 302 . In addition, on the input side of the DC power supply circuit 301, an input voltage detection unit 310 for detecting the input voltage of the DC power supply circuit 301 is provided, and on the output side, an output voltage detection unit 311 for detecting the output voltage of the DC power supply circuit 301 is provided. . In addition, the switching element Q301 is constituted by a MOSFET, and its gate terminal is connected to a 301st drive unit 350 described later via a resistor R301. In addition, a resistor R302 is connected to the source terminal of the switching element Q301, and the voltage drop amount of the resistor R302 is input to a non-inverting input of a second operational amplifier OP302 described later via a filter unit 355 composed of a resistor R305 and a capacitor C307. in the terminal. This filter unit 355 prevents the switching element Q301 from being switched off due to the influence of the peak current when the switching element Q301 is switched on. In addition, both the input voltage detection unit 310 and the output voltage detection unit 311 are composed of resistors and capacitors (see FIG. 47 for the input voltage detection unit 310 and FIG. 56 for the output voltage detection unit 311) and are well known, so detailed descriptions are omitted here. the

The load circuit 302 is composed of an inverter section 320 having a pair of switching elements Q302, Q303 connected in series, and switching the conduction of these switching elements Q302, Q303 alternately according to a drive signal from an inverter control circuit 306 described later. On/off, the DC voltage from the DC power supply circuit 301 is converted into a high-frequency voltage; the resonant part 321 is composed of capacitors C302, C303, and an inductor L302, and is applied with a high-frequency voltage from the converter part 320, through resonance The function is to light the discharge lamp La; the preheating part 322 is composed of the capacitors C304, C305, C306 and the transformer T301, and the high frequency voltage from the converter part 320 is applied to preheat the discharge lamp La; and the control power generation circuit 323, A high-frequency voltage is applied from the inverter unit 320 to generate a second control power supply Vcc302 to be described later. In addition, both the switching elements Q302 and Q303 are composed of MOSFETs, and resistors R303 and R304 are respectively inserted between the gate terminals of the respective switching elements Q302 and Q303 and the second drive unit 360 described later. the

The control circuit 303 is composed of a starting unit 330 that receives the output voltage of the DC power supply circuit 301 to activate the second control power supply Vcc302, and a control power supply that compares the power supply voltage of the second control power supply Vcc302 with the power supply voltage of the third reference voltage source Vref303 described later. The comparison unit 331, the first control power generation unit 332 for generating the first control power supply Vcc301 based on the comparison result of the control power comparison unit 331, and the third control unit for generating the third control power supply Vcc303 based on an output signal from the stop execution unit 334 described later. The power generation unit 333 and the stop execution unit 334 that controls the operations of the first drive unit 350 and the second drive unit 360 according to the determination result of the stop determination unit 342 described later are configured. the

The operation setting circuit 304 is composed of a sequence control unit 340 configured by a microcomputer to perform sequence control of a frequency setting unit 341 and a stop judging unit 342 described later, and output signals for setting the switching elements Q302 and Q303 of the inverter unit 320. The frequency setting part 341 of the frequency setting signal of the driving frequency, the stop judging part 342 of the stop signal that outputs the stop signal that makes the operation of the first drive part 350 and the second drive part 360 stop according to the sequence control of the sequence control part 340, and setting The cycle setting part 343 of the clock cycle of the operation setting circuit 304 is comprised. the

The DC power supply control circuit 305 is composed of the first drive unit 350 that outputs a drive signal for switching on/off the switching element Q301 of the DC power supply circuit 301 , and if the secondary winding flow through the inductor L301 of the DC power supply circuit 301 The zero current detection unit 351 that outputs a zero signal when the current through the inductor L301 becomes a predetermined current value or less, the RS flip-flop 352 that controls the operation of the first drive unit 350, and the voltage detected by the output voltage detection unit 311 and the first reference The first operational amplifier OP301 for comparing the power supply voltage of the voltage source Vref301, the multiplier 353 for multiplying the output voltage of the first operational amplifier OP301 by the detection voltage of the input voltage detection unit 310, and the The second operational amplifier OP302 is configured to compare the amount of voltage drop with the output voltage of the multiplier 353 . In addition, a peak current detection unit that outputs a peak signal when the current flowing through the switching element Q301 exceeds a predetermined current value is constituted by the first operational amplifier OP301, the second operational amplifier OP302, and the multiplier 353. the

The inverter control circuit 306 is composed of a second drive unit 360 that outputs a drive signal that alternately switches the on/off of the switching elements Q302 and Q303 of the inverter unit 320 , and a frequency setting unit based on the slave operation setting circuit 304 . The frequency setting signal output from 341 constitutes a frequency variable unit 361 for changing the frequency of the drive signal. the

Hereinafter, the operation of this embodiment will be described. First, the operation of the control circuit 303 will be described using FIGS. 44 and 45 . When the power of the present embodiment is turned on, the output voltage of the DC power supply circuit 301 is input to the load circuit 302 and the startup unit 330 of the control circuit 303 at the subsequent stage. Immediately after the power is turned on, the output voltage of the DC power supply circuit 301 is a smoothed voltage obtained by smoothing the AC voltage of the AC power supply AC with the smoothing capacitor C301, and a current is supplied to the diode D302 through the high withstand voltage resistor R306 by the smoothed voltage. And in the series circuit of Zener diode ZD301. When the voltage VG generated between both ends of the series circuit is input to the gate terminal of the switching element Q304 composed of a high withstand voltage MOSFET, the switching element Q304 is switched on, and the second control power supply Vcc302 is activated. And the power supply voltage of the 2nd control power supply Vcc302, and the detection voltage Va, Vb, Vc mentioned later rise with time (refer FIG. 45(a), FIG. 45(b)). the

The power supply voltage of the second control power supply Vcc302 is divided into detection voltages Va, Vb, Vc (Va>Vb>Vc) by a series circuit composed of resistors R307-R310. The detection voltage Va is input to the non-inverting input terminal of the fourth operational amplifier OP304 of the control power supply comparator 331, and compared with the power supply voltage of the third reference voltage source Vref303 input to the inverting input terminal. The detection voltages Vb and Vc are input to the non-inverting input terminal of the third operational amplifier OP303 via the first multiplexer circuit MP301 having a pair of transmission gate elements to which the respective voltages are input. The output signal of the third operational amplifier OP303 and the output signal of the stop execution unit 334 described later are input into the OR element OR301, and the series circuit connected in parallel with the diode D302 and Zener diode ZD301 is controlled by the output signal of the OR element OR301. On/off of the switching element Q305 constituted by MOSFET. Also, immediately after the power is turned on, the output signal of the stop execution unit 334 is at L (low) level, so ON/OFF of the switching element Q305 is controlled only by the output signal of the third operational amplifier OP303. the

At the beginning of the start-up of the second control power supply Vcc302, the detection voltage Vc is input to the non-inverting input terminal of the third operational amplifier OP303 by the first multiplexer circuit MP301, and the second reference input to the inverting input terminal The power supply voltage comparison of the voltage source Vref302. And, when the detection voltage Vc reaches the power supply voltage of the second reference voltage source Vref302, the output signal of the third operational amplifier OP303 is inverted, and the non-inverting input terminal of the third operational amplifier OP303 is transmitted by the first multiplexer circuit MP301. Input detection voltage Vb. At the same time, by inputting the output signal of the third operational amplifier OP303 into the gate terminal of the switching element Q305 via the OR element OR301, the switching element Q305 is switched on, and the switching element Q304 is switched off (see FIG. 45(b) , Figure 45(c)). the

When the switching element Q304 is switched off, the power supply voltage of the second control power supply Vcc302 and the detection voltages Va, Vb, and Vc drop. And, when the detection voltage Vb reaches the power supply voltage of the second reference voltage source Vref302, the output signal of the third operational amplifier OP303 is inverted, and the detection voltage Vc is again input to the third operational amplifier OP303 by the first multiplexer circuit MP301. in the non-inverting input terminal. Also, with the inversion of the output signal of the third operational amplifier OP303, the switching element Q305 is switched off and the switching element Q304 is switched on. Therefore, the power supply voltage and detection voltages Va, Vb, and Vc of the second control power supply Vcc302 turn to rise again. By repeating the above operation, the gate voltage of the switching element Q304 is repeatedly turned on/off as shown in FIG. 45(c). the

In addition, the power supply voltage of the second control power supply Vcc302 is input to the collector terminal of the switching element Q307 formed of a bipolar transistor in the first control power generation unit 332 . The first control power generation unit 332 is composed of a switching element Q307, a first constant current source Iref301 connected between the collector terminal and the base terminal of the switching element Q307, a Zener diode ZD302 connected in series with the first constant current source Iref301, And a switching element Q306 composed of a MOSFET connected in parallel with a Zener diode ZD302 is formed. The output signal of the fourth operational amplifier OP304 that controls the power supply comparator 331 is input to the gate terminal of the switching element Q306. Then, the power supply voltage of the second control power supply Vcc302 rises, and when the detection voltage Va exceeds the power supply voltage of the third reference voltage source Vref303, the switching element Q307 is switched on, the first control power supply Vcc301 rises, and the power supply voltage is supplied to the operating device. In the fixed circuit 304 (refer to FIG. 45(b), FIG. 45(d)). In addition, the power supply voltage of the third reference voltage source Vref303 is equal to the power supply voltage of the second reference voltage source Vref302. the

When the predetermined period T1 elapses from the rise of the first control power supply Vcc301, an H (high) level signal is output from the stop execution unit 334 (refer to FIG. The third control power supply Vcc303 is generated in the unit 333 (see FIG. 45(g)). In addition, by supplying the power supply voltage of the third control power supply Vcc303, the operation of the first drive unit 350 of the DC power supply control circuit 305 starts (see FIG. 45(f)). In addition, the power supply voltage of the third control power supply Vcc303 is also supplied to the inverter control circuit 306 , and the operation starts at the same timing as that of the first drive unit 350 . Then, the inverter unit 320 of the load circuit 302 starts to operate. Note that details of the operation setting circuit 304 will be described later. the

The inverter unit 320 starts to operate, whereby the power supply voltage of the second control power supply Vcc302 is supplied from the control power supply generation circuit 323 to the control circuit 303 . Therefore, the detection voltages Vb and Vc always exceed the power supply voltage of the second reference voltage source Vref302, and the switching element Q304 maintains the off state (see FIG. 45(b) and FIG. 45(c)). In addition, in the present embodiment, in order to reliably maintain the off state of the switching element Q304, the on/off of the switching element Q304 is controlled by the output signal of the third operational amplifier OP303 and the output signal of the stop executing unit 334 . That is, since the output signal of the stop execution unit 334 is always at the H level during the operation of the converter unit 320, even if the power supply voltage of the second control power supply Vcc302 is lowered and the output signal of the third operational amplifier OP303 is inverted, the output signal of the third operational amplifier OP303 can be maintained. The off state of the switching element Q304. the

In addition, when the operation of the inverter unit 320 is stopped, the supply voltage from the control power generation circuit 323 is lowered, so that the detection voltage Vb is lower than the power supply voltage of the second reference voltage source Vref302, and the switching element Q304 is repeatedly turned on again. /OFF operation (refer to FIG. 45(b), FIG. 45(c)). This on/off operation continues as long as the smoothed voltage output from the DC power supply circuit 301 has a sufficient magnitude. the

In addition, the control power generation circuit 323 may have any configuration as long as it can generate the second control power Vcc302 according to the switching operation of the inverter unit 320, as long as it is a power supply voltage of 10 V or higher so as to be able to drive the switching elements Q301 to Q303. can. the

Next, the frequency variable unit 361 will be described with reference to the drawings. As shown in FIG. 46, the frequency variable unit 361 is composed of a constant voltage circuit composed of a fifth operational amplifier OP305, a load impedance circuit composed of resistors R311 and R312 connected to the output terminal of the fifth operational amplifier OP305, and has The sixth operational amplifier OP306 to which the power supply voltage of the fourth reference voltage source Vref304 is input to the inverting input terminal, and the current mirror circuit CM which adjusts the current flowing through the capacitor C309 according to the current flowing into the load impedance circuit, have respective and first 5 The second multiplexer circuit MP302 of a pair of transmission gate elements connected to the reference voltage source Vref305 and the sixth reference voltage source Vref306 compares the output voltage of the second multiplexer circuit MP302 with the voltage across the capacitor C309 An oscillation circuit constituted by a seventh operational amplifier OP307 and a dead time generator 361a for generating a dead time for preventing the switching elements Q302 and Q303 of the converter unit 320 from being turned on at the same time. the

The frequency setting signal output from the frequency setting section 341 of the operation setting circuit 304 is input to the non-inverting input terminal of the fifth operational amplifier OP305 via a filter circuit composed of resistors R313, R314, R315 and a capacitor C308. . The frequency setting signal is, for example, a rectangular wave signal having a predetermined duty ratio as shown in FIG. 47( d ), and is converted into a DC signal corresponding to the duty ratio in the filter circuit. Here, since the output terminal of the fifth operational amplifier OP305 is connected to the output terminal of the sixth operational amplifier OP306 via a resistor 4311, by changing the duty ratio of the frequency setting signal, the output terminal of the fifth operational amplifier OP305 flows to the output terminal of the sixth operational amplifier OP305. 6 The magnitude of the current in the output terminal of the operational amplifier OP306 varies. Thus, by changing the duty ratio of the frequency setting signal, it is possible to change the current flowing through the capacitor C309 and change the driving frequency of the driving signal. the

In addition, the driving signals are respectively input to the high-side driving unit 360a and the low-side driving unit 360b of the second driving unit 360 via the dead time generation unit 361a, and the conduction/conduction of the switching elements Q302 and Q303 are controlled by the respective driving units 360a and 360b. disconnect. the

Next, the DC power supply control circuit 305 will be described using FIG. 43 . The DC power supply control circuit 305 repeatedly stores energy to the inductor L301 and releases energy from the inductor L301 by switching on/off the switching element Q301. The timing of the release of the energy of the device L301 is performed. Therefore, in the DC power supply control circuit 305, as shown in FIG. 43, a zero current detection unit 351 is provided. In the zero current detection unit 351, by detecting the timing when the secondary winding voltage of the inductor L301 drops to around 0V, it is judged that The timing at which energy is discharged from the inductor L301, that is, the timing at which the current flowing through the inductor L301 becomes equal to or less than a predetermined current value. When it is determined that energy has been released from the inductor L301 in the zero current detection unit 351 , an H level signal is input to the set terminal of the RS flip-flop 352 , and the switching element Q301 is switched on via the first drive unit 350 . Note that details of the zero current detection unit 351 will be described later. the

Also, when the switching element Q301 is turned on, the resistor R302 detects the current flowing through the switching element Q301, and the voltage drop in the resistor R302 is compared with the output voltage of the multiplier 353 in the second operational amplifier OP302. And, if the voltage drop in the resistor R302 exceeds the output voltage of the multiplier 353, that is, the current flowing through the switching element Q301 exceeds a predetermined value, an H level signal (peak signal) is input to the reset terminal of the RS flip-flop 352, and via The first drive unit 350 switches the switching element Q301 off. The predetermined value is determined by comparing the detection voltage of the output voltage detection 311 of the DC power supply circuit 301 with the power supply voltage of the reference voltage source Vref301 in the first operational amplifier OP1 and performing feedback control. the

Hereinafter, the sequential control in this embodiment will be described using the time chart shown in FIG. 47 . Each of the preceding preheating period for preheating the filament of the discharge lamp La, the starting period for applying a high voltage to the discharge lamp La by a resonance action in order to start the discharge lamp La, and the lighting period for lighting the discharge lamp La with a desired light output The process of period sequence control is generally performed conventionally, and in the present embodiment, the above-mentioned sequence control is performed by the operation setting circuit 304 . the

As shown in FIG. 47(a), when the first control power supply Vcc301 rises to supply a power supply voltage to the operation setting circuit 304, the input signal to the stop execution unit 334 becomes H level at the moment when the first control power supply Vcc301 rises. It becomes L level (see FIG. 47(b)). Then, during the predetermined period T1 before the output signal of the stop execution unit 334 becomes H level, the operations of the frequency variable unit 361 , the first drive unit 350 , and the second drive unit 360 are stopped. the

Here, when the microcomputer constituting the operation setting circuit 304 is supplied with a power supply voltage from the first control power supply Vcc301, the preset initial startup program operates and the functions of the microcomputer terminals are allocated. However, at this time, the impedance of the terminals becomes infinite case. Therefore, in this embodiment, a resistor R316 is connected between the first control power supply Vcc301 and the output terminal of the stop determination unit 42 to prevent the output from the microcomputer terminal from becoming unstable. the

When the predetermined period T1 elapses, as shown in FIG. 47(c), the stop signal from the stop execution unit 334 becomes H level, and the operation of the frequency variable unit 361, the first drive unit 350, and the second drive unit 360 starts. , the inverter unit 320 operates at the driving frequency set by the frequency setting unit 341 . Here, the frequency setting signal output from the frequency setting unit 341, as shown in FIG. The duty ratios are changed during the start-up period of time t3 and the lighting period after time t3. Therefore, the output signal of the fifth operational amplifier OP305 changes as shown in FIG. 47( e ) as the duty ratio of the frequency setting signal changes. Therefore, the driving frequency is sequentially changed to frequency f1 in the preheating period, frequency f2 in the start-up period, and frequency f3 in the lighting period (see FIG. 47( f )). Then, the discharge lamp La is lit through the preceding warm-up period and the start-up period. the

Here, the time constant of the filter circuit composed of resistors R313, R314, R315 and capacitor C308 provided at the input stage of the fifth operational amplifier OP305 is set so that the output voltage of the filter circuit is stabilized during the predetermined period T1. As a result, the output voltage of the fifth operational amplifier OP305 at the start of the advance warm-up period is stabilized (see FIG. 47( e )), so that the drive frequency can be stabilized. the

In addition, the advance warm-up period and the start-up period may be determined by the operation setting circuit 304, and generally only need to be clocked by a built-in oscillator or timer circuit incorporated in the microcomputer. In addition, in this embodiment, the program processing speed of a microcomputer is determined based on the clock cycle set by the cycle setting part 343 mentioned later. the

In addition, the duty ratio of the frequency setting signal output from the frequency setting unit 341 is 0% during the preceding warm-up period, and the duty ratio starts to increase during the start-up period after the operation of the inverter unit 320 is stabilized, so that the duty ratio can be increased. The current consumption in the control circuit 303 and the operation setting circuit 304 immediately after the operation of the inverter unit 320 is reduced, and the supply of the power supply voltage from each control power supply is stabilized. Furthermore, by setting the stop signal from the stop determination unit 342 at H level (ie, setting the input signal to the stop execution unit 334 at H level) when the operation of the inverter unit 320 is stopped, it is possible to prevent the current from flowing to the The resistor R316 can reduce the current consumption in the control circuit 300 when the operation of the inverter unit 320 is stopped. In addition, by processing the input and output signals of the microcomputer constituting the operation setting circuit 304 with a double value of H level/L level without using an A/D conversion circuit and a D/A conversion circuit, it is possible to greatly reduce the number of microcomputers. in the current consumption. In this case, the stress on the switching element Q304 of the activation unit 330 is also significantly reduced, so that the activation unit 330 can be miniaturized. the

Next, the stop execution unit 334 will be described using the drawings. As shown in FIG. 48, the stop execution unit 334 is configured to receive the output signal from the stop signal input unit 334a from the stop signal input unit 334a to which the detection voltage of the input voltage detection unit 310 and the stop signal voltage from the stop determination unit 342 are input. The stop time counting part 334b which counts the time to stop the operation of the frequency variable part 361, the 1st drive part 350, and the 2nd drive part 360 is comprised. the

The stop signal input unit 334a is composed of the eighth operational amplifier OP308 that receives the power supply voltage of the seventh reference voltage source Vref307 as the non-inverting input terminal and the detection voltage of the input voltage detection unit 310 as the inverting input terminal, and the non-inverting input terminal. The ninth operational amplifier OP309 to which the stop signal voltage from the stop judging unit 342 is input and the power supply voltage of the seventh reference voltage source Vref307 is input to the inversion input terminal, and the operational amplifiers OP308 and OP309 are input to the inversion input terminal. The OR element OR302 of the output signal constitutes. the

The stop time counting part 334b is constituted by a MOSFET, and a switching element Q308 to which an output signal from the stop signal input part 334a is input to a gate terminal, a capacitor C310 connected to a drain terminal of the switching element Q308, and a current is supplied to the capacitor C310. The second constant current source Iref302 and the tenth operational amplifier OP310 input the voltage across the capacitor C310 to the non-inverting input terminal and the power supply voltage of the eighth reference voltage source Vref308 to the inverting input terminal. The switching element Q308 is switched on/off according to the output signal from the stop signal input unit 334a. When the switching element Q308 is turned off, it is determined by the current flowing from the second constant current source Iref302 and the capacitance of the capacitor C310. The charge time charges capacitor C310. the

Here, the eighth operational amplifier OP308 outputs an H-level signal when the detected voltage of the input voltage detection unit 310 exceeds a predetermined voltage (the power supply voltage of the eighth reference voltage source Vref308). On the other hand, the ninth operational amplifier OP309 outputs an L level signal when the stop signal from the stop determination unit 342 is at L level, and outputs an H level signal when it is at H level. Therefore, switching element Q308 is switched off to charge capacitor C310 only when the detection voltage of input voltage detection unit 310 is equal to or lower than a predetermined voltage and the stop signal from stop determination unit 342 is at L level. And, when the charging voltage of the capacitor C310 exceeds a predetermined voltage (the power supply voltage of the eighth reference voltage source Vref308), an H-level signal is output from the tenth operational amplifier OP310, and the third control power supply generator 333 generates the third control power supply generator 333 as described above. 3 Control the power supply Vcc303, and the operation of the frequency variable unit 361, the first drive unit 350, and the second drive unit 360 starts. That is, the charging time of the capacitor C310 is the predetermined period T1, and the operation of the inverter unit 320 is stopped during this period. the

Hereinafter, the basic operation of the operation setting circuit 304 will be described using the flowchart shown in FIG. 49 . First, if the power supply voltage is supplied from the first control power supply Vcc301 (the first control power supply Vcc301 is turned on), (S301), the initial start-up program operates, initial setting is performed (S302), and the cycle setting part 343 starts to operate (S303). . The clock signal generated by the period setting unit 343 is used as the basic clock of the microcomputer constituting the operation setting circuit 304 , and in this embodiment, two clock signals of periods TA and TB (TA>TB) are used by switching as appropriate. The shorter the period of the clock signal, the larger the current consumption in the microcomputer, so here, the clock signal of period TA is first used. the

Next, information on the duty ratio of the frequency setting signal stored in advance is read (S304), and an output frequency setting signal is set (S305). Then, the count is started (S306), and the operation period is judged based on the counted time (S307). That is, if it reaches time t1, it is judged to be the preheating period, and the frequency setting signal is set so that the drive frequency becomes frequency f1 (S309), and when time t2 is reached, it is judged to be the start-up period, and the frequency setting signal is set to The driving frequency is set to frequency f2 (S310), and when time t3 is reached, it is determined to be a lighting period, and a frequency setting signal is set so that the driving frequency becomes frequency f3 (S312). In addition, the operation of the inverter unit 320 is stopped during a predetermined period T1 from activation of the operation setting circuit 304 to time t1 (S308). the

In addition, in this embodiment, although not shown in the figure, a conventionally known abnormality detection circuit is separately provided to detect abnormalities such as whether the discharge lamp La is normally installed or whether the life of the discharge lamp La has been reached. When an abnormality is detected in the abnormality detection circuit, the operation of the control circuit 303 is stopped. When performing life detection of the discharge lamp La in this way, it is particularly necessary to immediately operate the life detection during the lighting period of the discharge lamp La. the

Therefore, when shifting to the lighting period, the period of the clock signal is switched to the period TB in the period setting unit 343 ( S311 ). By thus switching the period of the clock signal to the period TB shorter than the period TA, the processing speed of the microcomputer is increased, and the lifetime detection operation is performed immediately. In addition, the timing of switching this cycle is not limited to the transition to the lighting period as described above, and may be the period from the preheating period to the transition to the lighting period, that is, as long as the operation of the inverter unit 320 is started. The power supply generating circuit 323 stably supplies the power supply voltage of the second control power supply Vcc302 to the control circuit 303 at any timing. the

In addition, when an abnormality is detected as described above and the operation of the control circuit 303 is stopped, when the period of the clock signal is the period TB, the period of the clock signal is switched to the period TA in the period setting unit 343, so that The consumption current in the operation setting circuit 304 is reduced. Therefore, the stress acting on the starting unit 330 can be reduced, and the supply of the power supply voltage from each control power supply can be stabilized when the operation of the inverter unit 320 is resumed. the

Next, the zero current detection unit 351 will be described with reference to the drawings. As shown in FIG. 50, the zero current detection unit 351 is configured by inputting the secondary winding voltage of the inductor L301 to the inversion input terminal and the power supply voltage of the ninth reference voltage source Vref309 to the non-inversion input terminal. 11 operational amplifier OP311, shielding unit 351a that stops the output of the zero signal from zero current detection unit 351 during a predetermined period after the energy stored in inductor L301 is released, and an output signal of eleventh operational amplifier OP311 that receives the output signal and only The one-shot pulse generator 351b is configured to generate one pulse with an arbitrary width. Furthermore, an OR element OR303 is provided between the zero current detection unit 351 and the setting terminal of the RS flip-flop 352 , and an output signal of the zero current detection unit 351 is input to one input terminal of the OR element OR303 . In addition, the output signal of the restart unit 354 is input to the other input terminal of the OR element OR303. the

The restart unit 354 counts the off time of the switching element Q301, and if the off time exceeds a predetermined period (for example, about 100 μs), the setting terminal of the RS flip-flop 352 is set by inputting an H level signal to the OR element OR303. An H level signal is input, and the switching element Q301 is switched on via the first drive unit 350 . In addition, since the one-shot pulse generation part 351b and the restart part 354 are conventionally known, detailed description is abbreviate|omitted here. the

The mask part 351a is composed of the AND element AND301 to which the output signal of the eleventh operational amplifier OP311 and the output signal of the one-shot pulse generating part 351b via the NOT element NOT301 are input, and the MOSFET to which the output signal of the AND element AND301 is input to the gate terminal. The switching element Q309, the capacitor C311 connected to the drain terminal of the switching element Q309, the third constant current source Iref303 that supplies current to the capacitor C311, the voltage across the capacitor C311 input to the non-inverting input terminal, and The inverted input terminal is composed of a twelfth operational amplifier OP312 to which the power supply voltage of the tenth reference voltage source Vref310 is input, and an AND element AND302 to which the output signal of the twelfth operational amplifier OP312 and the output signal of the one-shot pulse generator 351b are input. . the

Hereinafter, the operation of the zero current detection unit 351 will be described with reference to FIG. 51 . First, when the switching element Q301 is turned off, if the stored energy of the inductor L301 is released, that is, if the voltage of the secondary winding of the inductor L301 is lower than the power supply voltage of the ninth reference voltage source Vref309, the voltage from the eleventh operational amplifier OP 311 outputs an H level signal, and outputs a one-shot pulse from the one-shot pulse generator 351b (see FIG. 51( c ), FIG. 51( d ), and FIG. 51( f )). the

Normally, during the off period of the switching element Q301, since the switching element Q309 is in the off state, the capacitor C311 is charged by the third constant current source Iref303, and since the charging voltage exceeds the tenth reference voltage source Vref310, the calculation from the twelfth Amplifier OP312 outputs an H level signal. Then, by the output signal of the twelfth operational amplifier OP312 and the one-shot pulse of the one-shot pulse generator 351b, the output signal of the AND element AND1 becomes H level, and an H level signal is input to the setting terminal of the RS flip-flop 352 , the switching element Q301 is switched on via the first drive unit 350 (see FIG. 51( a )). In addition, after the one-shot pulse from the one-shot pulse generator 351b is generated, the switching element Q309 is switched on, so the capacitor C311 is discharged (see FIG. 51( e )). the

When the switching element Q301 is switched on, the current flowing through the switching element Q301 increases and the input voltage to the second operational amplifier OP302 rises. And, if the input voltage exceeds a predetermined value (the output voltage of the multiplier 353), an H level signal is input to the reset terminal of the RS flip-flop 352, and the switching element Q301 is switched off via the first drive unit 350 (refer to Figure 51(a), Figure 51(b)). When the switching element Q301 is switched off, the secondary winding voltage of the inductor L301 rises (see FIG. 51( c )). And, if the secondary winding voltage exceeds the power supply voltage of the ninth reference voltage source Vref309, an L level signal is output from the eleventh operational amplifier OP311, the switching element Q309 is switched off, and charging of the capacitor C311 starts (see FIG. 51( d), Figure 51(e)). the

A predetermined period T2 is required until the charging voltage of the capacitor C311 reaches the power supply voltage of the tenth reference voltage source Vref310, and the H level signal is not output from the twelfth operational amplifier OP312 during the predetermined period T2. Therefore, during the predetermined period T2, the output signal of the AND element AND2 is always at the L level, so the output signal of the eleventh operational amplifier OP311 is at the H level during this period. trigger pulse, and does not output an H level signal to the set terminal of the RS flip-flop 352 . Then, the mask unit 351a stops the zero signal (H level signal) from the zero current detection unit 351 during a predetermined period T2 after switching the switching element Q301 off. the

Here, as described in Problems to be Solved by the Invention, when the output voltage of the AC power supply AC temporarily drops, sufficient energy is not accumulated in the inductor L301 even if the switching element Q301 is switched on. Therefore, if the switching element Q301 is switched off in a state where the energy stored in the inductor L301 is insufficient, the energy stored in the inductor L301 is insufficient, so the stored energy is instantaneously released. This is detected by the zero current detection unit 351 and the switching element Q301 is switched on. The switching element Q301 is repeatedly turned on and off in a very short cycle, and the switching element Q301 may be damaged due to heat. the

Therefore, in the present embodiment, by providing the shield portion 351a as described above, when the output voltage of the AC voltage AC temporarily drops and sufficient energy is not stored in the inductor L301, during the predetermined period T2, The operation of outputting a zero signal from the zero-current detection unit 351 is stopped, and the switching element Q301 is prevented from being switched on instantaneously. Therefore, when an abnormality occurs in the output voltage of the alternating current power source AC, the switching element Q301 can be prevented from being switched on/off in a very short cycle, and thermal damage of the switching element Q301 due to an increase in switching loss can be prevented. Therefore, it is possible to realize a highly reliable device with few failures. the

(implementation mode 14)

Hereinafter, a power supply device according to Embodiment 14 of the present invention will be described with reference to the drawings. However, the basic configuration of the present embodiment is the same as that of the thirteenth embodiment, so the same reference numerals are assigned to the common parts and descriptions thereof are omitted. This embodiment is characterized in that, as shown in FIG. 52 , the zero-current detection unit 351 is not provided with the one-shot pulse generation unit 351 b , the AND element AND301 , and the NOT element NOT301 . Furthermore, the output signal of the eleventh operational amplifier OP311 is directly input to the AND element 302, and the output signal of the RS flip-flop 352 is input to the gate terminal of the switching element Q309. the

In addition, in the thirteenth embodiment, the filter unit 355 is provided in the input stage of the second operational amplifier OP302, but in this embodiment, a filter unit is provided between the output terminal of the second operational amplifier OP302 and the RS flip-flop 352. Device part 355. Furthermore, as shown in FIG. 53 , the filter unit 355 of the present embodiment is composed of a switching element Q310 composed of a MOSFET to which the output signal of the second operational amplifier OP302 is input through the NOT element NOT302 at the gate terminal, and connected to the switching element Q310. The capacitor C312 on the drain terminal of the capacitor C312 and the fourth constant current source Iref304 supplying current to the capacitor C312 are constituted. the

In the filter unit 355, when the output signal of the second operational amplifier OP302 is at H level, the switching element Q310 is switched off, and charging of the capacitor C312 is started. Then, when the charging voltage of the capacitor C312 exceeds a predetermined voltage, an H level signal is input to the reset terminal of the RS flip-flop 352 , and the switching element Q301 is switched off via the first driving unit 350 . Here, the time from the start of charging of the capacitor C312 to the predetermined voltage is defined as the filter period Tf. In addition, the filtering period Tf is determined by the current flowing from the third constant current source Iref303 and the capacitance of the capacitor C312. the

Hereinafter, the operation of the zero current detection unit 351 of this embodiment will be described with reference to FIG. 54 . First, when the switching element Q301 is turned off, if the stored energy of the inductor L301 is released, that is, if the voltage of the secondary winding of the inductor L301 is lower than the power supply voltage of the ninth reference voltage source Vref309, the calculation from the eleventh Amplifier OP311 outputs an H level signal (see FIG. 54(c) and FIG. 54(d)). Normally, during the off period of the switching element Q301, since the switching element Q309 is in the off state, the capacitor C311 is charged by the third constant current source Iref303, and since the charging voltage exceeds the tenth reference voltage source Vref310, the voltage from the twelfth operational amplifier OP312 outputs H level signal. Then, the output signal of the AND element AND1 becomes H level by the output signal of the eleventh operational amplifier OP311 and the output signal of the twelfth operational amplifier OP312, and the H level signal is input to the setting terminal of the RS flip-flop 352, and the output signal via the first The driving unit 350 switches the switching element Q301 on (see FIG. 54( a )). the

When the switching element Q301 is switched on, the current flowing through the switching element Q301 increases and the input voltage to the second operational amplifier OP302 rises. And, if the input voltage exceeds a predetermined value (the output voltage of the multiplier 353), after the filter period Tf elapses, an H-level signal is input to the reset terminal of the RS flip-flop 352, and the switching element is driven via the first drive unit 350. Q301 is switched off (see FIG. 54(a) and FIG. 54(b)). When switching element Q301 is turned off, the output signal of RS flip-flop 352 becomes L level, so switching element Q309 is turned off, and charging of capacitor C311 starts (see FIG. 54( e )). the

Similar to the thirteenth embodiment, the charging voltage of the capacitor C311 requires a predetermined period T2 until it reaches the power supply voltage of the tenth reference voltage source Vref310. Then, the mask unit 351a stops the zero signal (H level) from the zero current detection unit 351 during a predetermined period T2 after switching the switching element Q301 to OFF. the

In addition, the input voltage to the second operational amplifier OP302 becomes 0V after the delay time Toff elapses from the start of charging the capacitor C311 (see FIG. 54(b)). This delay time Toff is caused by the delay from when the drive signal output from the first drive unit 350 becomes L level to when the switching element Q301 is actually switched off. the

In addition, no problem particularly occurs when the filter period Tf is longer than the delay time Toff, but a problem may occur when the filter period Tf is shorter than the delay time Toff. That is, after the reset input of the RS flip-flop 352 by the H-level signal of the second operational amplifier OP302, the gate current of the switching element Q301 is superimposed at the timing when the drive signal output from the first drive unit 350 becomes L-level. In the input signal of the second operational amplifier OP302. If the secondary winding voltage of the inductor L301 is not switched to a positive voltage at this time, the momentary reset input is released, chattering occurs in the switching element Q301, and excessive stress may be applied to the switching element Q301. the

In order to prevent this situation, a one-shot pulse generator 351b is generally provided as in the thirteenth embodiment, generates a one-shot pulse at the timing when the energy stored in the inductor L301 is released, and switches the switching element Q301 on using the one-shot pulse. However, if the one-shot pulse generator 351b is used, there is a problem that the circuit configuration becomes complicated. the

Therefore, in the present embodiment, the predetermined period T2 of the shielding portion 351a is set to be longer than the filter period Tf. Therefore, even if the gate current of the switching element Q301 is superimposed on the input signal of the second operational amplifier OP302 as described above, since this timing is within the predetermined period T2, the capacitor C311 cannot be sufficiently charged. Therefore, since the H level signal is not output from the twelfth operational amplifier OP312, and the output signal of the AND element AND2 is always at the L level during the predetermined period T2, an H level signal is not input to the setting terminal of the RS flip-flop 352. , chattering can be prevented from occurring in the switching element Q301. the

Therefore, in this embodiment, there is no need to provide the one-shot pulse generator 351b as in the thirteenth embodiment, so the circuit configuration can be simplified, and a more reliable device with fewer failures can be realized. the

(implementation mode 15)

Hereinafter, a power supply device according to Embodiment 15 of the present invention will be described with reference to the drawings. However, the basic configuration of the present embodiment is the same as that of the thirteenth or fourteenth embodiment, so the same reference numerals are assigned to the common parts and descriptions thereof are omitted. In addition, the control circuit 303 of this embodiment comprises the DC power supply control circuit 305, the startup unit 330, the control power comparison unit 331, the first control power generation unit 332, and the third control power generation unit 333 on the same semiconductor substrate. . the

In this embodiment, as shown in FIG. 55 , it is provided in the DC power supply control circuit 305 and judges whether the output voltage of the DC power supply circuit 301 is lower than a predetermined voltage (hereinafter referred to as "target voltage") lower than the desired level. The voltage drop determination unit 356, the life detection circuit 307 for detecting the life of the discharge lamp La, and the operation setting circuit 304 are provided in the operation setting circuit 304. The first abnormality determination unit 344 that stops the operation, and the second abnormality determination unit that is provided in the operation setting circuit 304 and stops the operation of the DC power supply control circuit 305 and the inverter control circuit 306 based on the determination result of the voltage drop determination unit 356 345. In addition, the life detection circuit 307 is conventionally known as long as it can detect the life of the discharge lamp La, so a detailed description thereof will be omitted here. In addition, in order to ensure the startability of the discharge lamp La, the abnormality determination process is not performed in the first abnormality determination unit 345 during the preceding warm-up period and the start-up period. the

As shown in FIG. 56 , the voltage drop determination unit 356 uses the detection voltage of the output voltage detection unit 311 as input to the non-inverting input terminal and the 13th reference voltage input from the 11th reference voltage source Vref311 as the inverting input terminal. The operational amplifier OP313, the switching element Q311 composed of a MOSFET to which the output signal of the thirteenth operational amplifier OP313 is input to the gate terminal, and the resistor inserted between the drain terminal of the switching element Q311 and the third control power generation unit 333 R17 constitutes. the

In the voltage drop judging unit 356 , a predetermined low voltage lower than the target voltage is detected, and it is judged as an abnormality, and the judgment result is sent to the second abnormality judging unit 345 . Specifically, the detection voltage of the output voltage detection unit 311 is compared with the power supply voltage of the eleventh reference voltage source Vref311 in the thirteenth operational amplifier OP313, and if the detection voltage is lower than the power supply voltage of the eleventh reference voltage source Vref311, that is, if the DC When the output voltage of the power supply circuit 301 becomes a predetermined low voltage lower than the target voltage, an L level signal is output from the thirteenth operational amplifier OP313. Then, the switch element Q311 is switched off by the L level signal, and an H level signal is output from the third control power generation unit 333 to the second abnormality determination unit 345 via the resistor R317 to determine an abnormality. the

In addition, the power supply voltage of the eleventh reference voltage source Vref311 may be lower than the power supply voltage of the first reference voltage source Vref301 that determines the target voltage of the output voltage of the DC power supply circuit 301 . For example, the target voltage of the output voltage of the DC power supply circuit 301 is 400V, the power supply voltage of the first reference voltage source Vref301 is 2.5V, and it is judged that it is abnormal when the output voltage of the DC power supply circuit 301 drops to 80% of the target value. In this case, the power supply voltage of the eleventh reference voltage source Vref311 is 2.0V. the

Hereinafter, the operations of the voltage drop determination unit 356 and the second abnormality determination unit 345 will be described with reference to the drawings. First, if the output voltage of the DC power supply circuit 301 drops and the detection voltage of the output voltage detection unit 311 is lower than the power supply voltage of the eleventh reference voltage source Vref311, the output signal of the thirteenth operational amplifier OP313 becomes L level, and the second abnormality is detected. The judgment unit 345 receives an H level signal (see FIG. 57( a ), FIG. 57( b ), and FIG. 57( c )). In the second abnormality determination part 345, if an H level signal is input, it is determined that an abnormality has occurred in the DC power supply circuit 301, and control is performed to transfer from the lighting period to the starting time of the starting period (refer to FIG. 57( d), FIG. 57(e)). the

And, when the period during which the output voltage of the DC power supply circuit 301 is lower than the predetermined low voltage (corresponding to the predetermined period T3) is shorter than the start-up period, the second abnormality determination unit 345 controls to shift from the start-up period to the lighting period. As described above, even if the discharge lamp La flickers once the start-up period elapses, a sufficient start-up voltage is applied to the discharge lamp La as soon as the output voltage of the DC power supply circuit 301 recovers, so that the discharge lamp La can not be kept from being turned off. the

On the other hand, when the period during which the output voltage of the DC power supply circuit 301 is lower than the predetermined low voltage (corresponding to the predetermined period T4, for example, about 0.5 seconds) exceeds the start-up period (see FIG. 58(a), FIG. 58(b) ), Fig. 58(c)), the 2nd abnormal judging part 345 outputs the stop signal from the stop judging part 342 after the start-up period, the action of the 1st driving part 350 and the 2nd driving part 360 is stopped, and the stop state is maintained (refer to Figure 58(d), Figure 58(e), Figure 58(f)). That is, it is determined that there is a permanent abnormality in the input voltage of the DC power supply circuit 301, or that power consumption exceeding the design capability of the DC power supply circuit 301 occurs in the load circuit 302, or that a failure occurs in components constituting the output voltage detection 311. If it is not an abnormality that recovers immediately, but a failure that may not guarantee safety, the operation of the DC power supply control circuit 305 and the inverter control circuit 306 is stopped, and the stopped state is maintained. the

Next, abnormality determination processing in the operation setting circuit 304 will be described with reference to FIG. 59 . First, it shifts to the lighting period, and a frequency setting signal is set so that the driving frequency becomes frequency f3 (S401). Next, the output signal of the voltage drop determination unit 356 is input to the second abnormality determination unit 345 (S402), and the output signal of the life detection circuit 307 is input to the first abnormality determination unit 344 (S403). In addition, it may be input into the 1st abnormality determination part 344 first, and then input into the 2nd abnormality determination part 345. Next, at first, abnormality judgment processing is performed in the second abnormality judgment unit 345 (S404), and only when there is no abnormality in the abnormality judgment, abnormality judgment processing is performed in the first abnormality judgment unit 344 (S405). the

Here, in the present embodiment, if the in-phase operation is close to the resonance frequency of the resonance part 321, the reactive current is small, so the circuit loss can be reduced, but the discharge lamp La flickering due to the drop in the output voltage of the DC power supply circuit 301 is likely to occur. off. In this case, if the life judgment of the discharge lamp La, that is, the abnormality judgment process of the first abnormality judgment unit 344 is prioritized, the extinguishing of the discharge lamp La will be mistakenly judged as the end of the life of the discharge lamp La, and maintenance may occur. There is a problem of stopping the operation of the DC power supply control circuit 305 and the inverter control circuit 306 . the

Therefore, by prioritizing the abnormality determination process of the second abnormality determination unit 345 as described above, it is possible to prevent the erroneous determination that the discharge lamp La has reached the end of its life when the discharge lamp La is turned off, and maintain the control of the DC power supply control circuit 305 and the inverter. A situation where the operation of the circuit 306 stops occurs. the

If it is judged to be "abnormal" in the abnormality judgment process of the second abnormality judgment unit 345, the process shifts to the startup period (S406), and the frequency setting signal is set so that the drive frequency becomes frequency f2 (S407). Next, the time corresponding to the startup period is counted (S408), and then the output signal of the voltage drop determination part 356 is input to the second abnormality determination part 345 (S409). At this time, when it is judged as "no abnormality" in the abnormality judgment process (S410) of the second abnormality judgment part 345, it shifts to a lighting period, and sets the frequency setting signal so that the drive frequency becomes frequency f3. On the other hand, when it is determined that "there is an abnormality", the operations of the DC power supply control circuit 305 and the inverter control circuit 306 are stopped (S411). the

As described above, when the output voltage of the DC power supply circuit 301 temporarily drops, the operations of the DC power supply control circuit 305 and the converter control circuit 306 are temporarily shifted to the start-up period, and the output voltage of the DC power supply circuit 301 If it drops over a predetermined period of time, it is judged that it is not an abnormality that recovers immediately, but a failure that may not guarantee safety, and the stop of the operation of the DC power supply control circuit 305 and the converter control circuit 306 can be maintained, so it is possible to improve device security. the

(implementation mode 16)

Hereinafter, a power supply device according to Embodiment 16 of the present invention will be described with reference to the drawings. However, the basic configuration of the present embodiment is the same as that of the fourteenth or fifteenth embodiment, so the same reference numerals are assigned to the common parts and descriptions thereof are omitted. This embodiment, as shown in FIG. 60 , includes a voltage rise judging unit 357 provided in the DC power supply control circuit 305 and judging whether the output voltage of the DC power supply circuit 301 exceeds a first predetermined overvoltage higher than the target voltage, and a life detection circuit 307. , and the first abnormality determination unit 344. In addition, the life detection circuit 307 and the first abnormality determination unit 344 have the same configuration as that of the fifteenth embodiment. the

As shown in FIG. 61 , the voltage rise determination unit 357 includes a third multiplexer circuit MP303 having a pair of transmission gate elements respectively connected to the twelfth reference voltage source Vref312 and the thirteenth reference voltage source Vref313 , and a non-inverting The input terminal is configured with a 14th operational amplifier OP314 that receives the detection voltage of the output voltage detection unit 311 and receives the output signal of the third multiplexer circuit MP303 as the inverting input terminal. In addition, the power supply voltage (first predetermined overvoltage) of the thirteenth reference voltage source Vref313 is higher than the power supply voltage (second predetermined overvoltage) of the twelfth reference voltage source Vref312. The output signal of the 14th operational amplifier OP314 is input into the reset terminal of the RS flip-flop 352 and is input into one input terminal of the OR element OR304. Furthermore, the output signal of the RS flip-flop 352 is input to the other input terminal of the OR element OR304 , and the output signal of the OR element OR304 is input to the restart unit 354 . the

The restart unit 354 starts counting when the output signal of the OR element OR304 becomes L level, and outputs an H level signal when the counted time exceeds a predetermined period Tr. Then, by inputting the H level signal to the setting terminal of the RS flip-flop 352 via the OR element OR303, the switching element Q301 is switched on via the first drive unit 350, and the operation of the DC power supply control circuit 305 is resumed. . the

Hereinafter, the operation of the voltage rise determination unit 357 will be described with reference to FIG. 62 . If a first predetermined overvoltage higher than the target voltage is detected in the voltage rise determination unit 357 and determined to be abnormal, the operation of the DC power supply control circuit 305 is stopped. Specifically, the detection voltage of the output voltage detection unit 311 is compared with the power supply voltage of the 13th reference voltage source Vref313 in the 14th operational amplifier OP314, and if the detection voltage exceeds the power supply voltage of the 13th reference voltage source Vref313, the power supply voltage from the 14th reference voltage source Vref313 is compared. Operational amplifier OP314 outputs H level signal. Then, the H level signal is input to the reset terminal of the RS flip-flop 352, the switching element Q301 is switched off via the first drive unit 350, and the operation of the DC power supply control circuit 305 is stopped (see FIG. 62(a), Figure 62(b), Figure 62(c)). the

Here, the output voltage of the third multiplexer circuit MP303 is the power supply voltage of the thirteenth reference voltage source Vref313 when the output signal of the fourteenth operational amplifier OP314 is at L level, but if the output signal of the fourteenth operational amplifier OP314 H level, that is, when the output voltage of the DC power supply circuit 301 becomes the first predetermined overvoltage higher than the target voltage, the output voltage of the third multiplexer circuit MP303 is switched to the power supply voltage of the twelfth reference voltage source Vref312 . And, as the operation of the DC power supply control circuit 305 stops, the output voltage of the DC power supply circuit 301 drops, and if the detected voltage of the output voltage detection unit 311 is lower than the power supply voltage of the twelfth reference voltage source Vref312, that is, the second predetermined overvoltage, Then, the output signal of the fourteenth operational amplifier OP314 becomes L level (see FIG. 62(b)). At this point in time, since the output signal of RS flip-flop 352 is also at L level, the output signal of OR element OR304 is also at L level, and counting is started in restart unit 354 . And, if the counted time exceeds the predetermined period Tr, an H level signal is output from the restart part 354, and the operation of the DC power supply control circuit 305 is restarted by the H level signal (see FIG. 62(c), FIG. 62(d). )). the

Conventionally, when the output voltage of the DC power supply circuit 301 exceeds a predetermined overvoltage, the operation of the DC power supply control circuit 305 is stopped, and when the time counted by the restart unit 354 exceeds a predetermined period Tr, the operation is controlled to restart. In this case, it is necessary to set a predetermined period Tr (for example, 100 to 200 μs) in the restart unit 354 assuming the time required from stopping the operation of the DC power supply control circuit 305 until the output voltage stabilizes. Since the predetermined period Tr is determined by the capacity of the capacitor provided on the chip constituting the restart unit 354, in order to set the predetermined period Tr longer, the capacity of the capacitor has to be increased. Start section 354 oversizing problem. the

Therefore, in this embodiment, as described above, in the voltage rise determination unit 357, the power supply voltage of the thirteenth reference voltage source Vref313 is compared with the detection voltage of the output voltage detection unit 311 when the DC power supply control circuit 305 operates. , it is judged whether the output voltage of the DC power supply circuit 301 exceeds a first predetermined overvoltage higher than the target voltage. Then, when the operation of the DC power supply control circuit 305 is stopped, the power supply voltage of the twelfth reference voltage source Vref312 is compared with the detection voltage of the output voltage detection unit 311 to determine whether the output voltage of the DC power supply circuit 301 has dropped to near the target voltage. the

Therefore, when the operation of the DC power supply control circuit 305 stops, it is only necessary to count the predetermined period Tr by the restart unit 354 from the moment when the output voltage drops to near the target voltage. The predetermined period Tr can be significantly shortened compared to the conventional case where the restart unit 354 counts the time. Therefore, it is sufficient to set the capacitance of the capacitor for the predetermined period Tr to be small, so that the chip area can be reduced and the restart unit 354 can be miniaturized. the

As described above, in the present embodiment, the circuit can be miniaturized to realize a power supply device with fewer failures and higher reliability. In addition, in the present embodiment, the configurations of the voltage drop determination unit 356 and the second abnormality determination unit 345 described in the sixteenth embodiment may be combined. In this case, a power supply device with fewer failures and higher safety can be realized. the

Furthermore, this embodiment is provided with the preheating part 20 for preheating each filament of the discharge lamp La respectively at the time of start-up of the discharge lamp La. The preheating unit 20 includes a primary winding whose one end is connected to the connection point of the switching elements Q10 and Q20 of the power conversion unit 2 via the capacitor C6 and whose other end is grounded, and a series circuit connected to the capacitors C4 and C5 respectively to the discharge lamp La. The two secondary windings of the transformer Tr1 between the two ends of each filament. the

Furthermore, the present embodiment includes connecting the switching elements Q10 and Q12 of the power converting unit 2 via resistors R1 and R2, and switching the switching elements Q10 and Q12 of the power converting unit 2 on and off, thereby switching the switching elements Q10 and Q12 of the power converting unit 2 to each other. The drive unit 31 supplies AC power to the discharge lamp La, and the sequence control unit 41 controls the frequency of the AC power output from the power conversion unit 2 to the discharge lamp La by controlling the frequency of the drive unit 31 . the

The driving section 31 is provided in the driving integrated circuit 3 composed of a high withstand voltage integrated circuit (HVIC), and the sequence control section 41 is provided in the control integrated circuit 4 composed of an integrated circuit called a microcontroller (microcomputer). . As the control integrated circuit 4, as long as the input and output voltage values have only two levels and do not include the A/D converter and the D/A converter, the power consumption in the control integrated circuit 4 can be suppressed well. . the

In addition, the present embodiment includes a driving power supply unit 5 that is supplied with power from the power conversion unit 2 to output DC power as a power supply of the driving integrated circuit 3 after the operation of the driving unit 31 is started. The drive power supply unit 5 has an output side capacitor (not shown) and a charging circuit (not shown) connected to the connection point of the switching elements Q10, Q20 of the power conversion unit 2 to charge the output side capacitor. The voltage across the capacitor is used as the output voltage. The voltage across the output capacitor, that is, the output voltage of the drive power supply unit 5 is, for example, 10V when a sufficient time has elapsed from the start of the operation of the drive unit 31 to stabilize the voltage across the output capacitor. the

Furthermore, in the driving integrated circuit 3, before the operation of the driving unit 31 is started, the starting unit 32 which is supplied with electric power from the DC power supply unit 1 and outputs the DC power as the power supply for driving the power supply unit 5, and the driving unit 32 which is driven by the driver are respectively provided. The power supply unit 5 supplies power and generates, for example, 5V DC power as a power supply of the control integrated circuit 4 during a period in which the output voltage of the drive power supply unit 5 is equal to or higher than a predetermined reference voltage, and supplies it to the control power supply in the control integrated circuit 4. Section 33. the

If described in detail, as shown in FIG. 3 , the starting part 32 has one end connected to the output end of the high voltage side of the DC power supply part 1 and the other end connected to the output end of the drive power supply part 5 via the first switching element Q101. The impedance element Z1. That is, during the period in which the first switching element Q101 of the starting section 32 is turned on, the output voltage Vdc of the DC power supply section 1 is output to the driving power supply section 5 via the impedance element Z1 and the first switching element Q101, whereby the driving power supply section 5 to charge the output capacitor. The first switching element Q101 is composed of an n-channel high withstand voltage field effect transistor, and the gate of the first switching element Q101 is connected to the connection point between the DC power supply unit 1 and the impedance element Z1 through a resistor R101, and is connected to the connection point between the DC power supply unit 1 and the impedance element Z1 through a diode D101. The series circuit with the Zener diode ZD2 and the parallel circuit with the second switching element Q102 constituted by an n-channel field effect transistor are grounded. In addition, the starting unit 32 has four voltage-dividing resistors for dividing the output voltage (hereinafter referred to as “driving voltage”) Vcc2 of the drive power supply unit 5, respectively, and outputs voltages (voltage-dividing ratios) from the connection points of these voltage-dividing resistors. Three different detection voltages Va, Vb, Vc. Furthermore, the starting unit 32 includes a comparator CP1 whose output terminal is connected to the gate of the second switching element Q102 via a logical sum circuit OR1 to which a predetermined first reference voltage Vr1 is input to an inverting input terminal. Detection voltages Vb and Vc are input to non-inverting input terminals of the comparator CP1 via a multiplexer TG1 configured using a transfer gate circuit. The multiplexer TG1 is connected to the output terminal of the comparator CP1, and is configured to output the second lowest detection voltage (hereinafter referred to as "second detection voltage") Vb during the period when the output of the comparator CP1 is H level Input to the non-inverting input terminal of comparator CP1, during the period when the output of comparator CP1 is L level, the lowest detection voltage (hereinafter referred to as "third detection voltage") Vc is input to the comparator CP1 In the non-inverting input terminal. the

The operation of the activation unit 32 will be described using FIG. 4 . Immediately after the power supply is turned on, the output of the comparator CP1 is L level, the third detection voltage Vc is input to the non-inverting input terminal of the comparator CP1, and the second switching element Q102 is turned off, by The Zener voltage of the Zener diode ZD2 turns on the first switching element Q101. During the ON period of the first switching element Q101, the output side capacitor of the driving power supply unit 5 is charged by being supplied with the output power of the DC power supply unit 1 via the impedance element Z1 of the starting unit 32 and the first switching element Q101, whereby The drive voltage Vcc2 gradually rises. Finally, when the third detection voltage Vc reaches the first reference voltage Vr1, the output of the comparator CP1 becomes H level. Then, the input voltage to the non-inverting input terminal changes to the second detection voltage Vb higher than the third detection voltage Vc, and the second switching element Q102 is turned on and the first switching element Q101 is turned off. The supply of electric power to the driving power supply unit 5 by the unit 32 is stopped. At this point in time, the operation of the drive unit 31 has not yet started, and power is not supplied from the power conversion unit 2 to the drive power supply unit 5 , so the drive voltage Vcc2 starts to drop due to the discharge of the output capacitor. Finally, when the second detection voltage Vb reaches the first reference voltage Vr1, the output of the comparator CP1 becomes L level again, and the output voltage of the driving power supply unit 5 starts to rise. Then, when the third detection voltage Vc reaches the first reference voltage Vr1, Then, the output of comparator CP1 becomes H level again. Then, DC power as shown in FIG. 4( a ) is supplied from the DC power supply unit 1 , and the input from the stop execution unit 34 (described later) to the logical sum circuit OR1 shown in FIG. 4( e ) is L level. And during the period when the drive unit 31 is stopped, the above operation is repeated, the gate voltage of the first switching element Q101 fluctuates as shown in FIG. 4(c), and the driving voltage Vcc2 is shown in FIG. 3. The detection voltage Vc repeatedly changes up and down between an upper limit voltage such as the first reference voltage Vr1 and a lower limit voltage such that the second detection voltage Vb becomes the first reference voltage Vr1. the

Here, the drive integrated circuit 3 is provided with a stop execution unit 34 that controls the drive unit 31 and the start unit 32 respectively. The output of the stop execution unit 34 is input to the logical sum circuit OR1, and the drive unit 31 is stopped and the power supply from the start unit 32 to the drive power supply unit 5 is turned on while the output of the stop execution unit 34 is at L level. , but during the period when the output of the stop execution unit 34 is at H level, the second switching element Q102 is turned on and the first switching element Q101 is turned off regardless of the output of the comparator CP1, so that the output from the starting unit 32 to the The power supply to the drive power supply unit 5 is cut off. Among them, during the period in which the output of the stop execution unit 34 is at the H level, the slave power conversion is performed by the operation of the driving unit 31 (that is, the generation of the output for driving the switching elements Q10 and Q20 as shown in FIG. 4( f )). The power supply from the unit 2 to the drive power supply unit 5 . the

In addition, in the integrated circuit 3 for driving, there is provided a predetermined voltage as a power supply for the integrated circuit 4 for control during a period in which power is supplied from the driving power supply unit 5 and the output voltage of the driving power supply unit 5 is equal to or higher than a predetermined reference voltage. (hereinafter referred to as “control voltage”) direct current power of Vcc1 to the control power supply unit 33 that supplies the integrated circuit 4 for control. In detail, the control power supply unit 33 has the highest detection voltage (hereinafter referred to as “first detection voltage”) Va among the detection voltages output by the voltage dividing resistance of the input start unit 32 at the non-inverting input terminal. In addition, the comparator CP2 to which the first reference voltage Vr1 is input to the inverting input terminal, the series circuit of the constant current circuit Ir1 connected between the output terminal of the driving power supply unit 5 and the ground potential, and the Zener diode ZD3 are connected to the base. On the connection point of the constant current circuit Ir1 and the Zener diode ZD3 and the collector is connected to the output end of the drive power supply part 5 and the emitter is connected to the control integrated circuit 4 as the output end of the control power supply part 33. The transistor Q103 and the switching element Q104 composed of an n-channel field effect transistor connected in parallel to the Zener diode ZD3 and whose gate is connected to the output terminal of the comparator CP2 . That is, as shown in FIG. 4( d ), the control voltage Vcc1 is output to the control integrated circuit 4 only during the period in which the first detection voltage Va exceeds the first reference voltage Vr1 , and the control voltage Vcc1 is output when the first detection voltage Va is lower than the first reference voltage Vr1 . The driving voltage when the control voltage Vcc1 is not output during the period of the reference voltage Vr1 (that is, the output voltage of the control power supply unit 33 is substantially 0), and the first detection voltage Va is the first reference voltage Vr1 is the reference voltage. Here, the circuit that outputs the control voltage Vcc1 from the driving integrated circuit 3 to the control integrated circuit 4 is grounded via the noise canceling capacitor C51. the

In addition, the driving integrated circuit 3 is provided with an oscillation unit 35 that outputs a rectangular wave at a frequency corresponding to the output of the sequence control unit 41, and the driving unit 31 controls the power conversion unit to be turned on and off at the frequency of the output of the oscillation unit 35. 2 switching elements Q10, Q20. Further, the drive integrated circuit 3 is provided with a drive power supply unit 30 controlled by the stop execution unit 34 to output a predetermined report voltage Vcc3 during the operation of the drive unit 31 and to stop the output during the operation of the drive unit 31 . The drive power supply unit 30 may have the same circuit configuration as that of the control power supply unit 33, for example. The report voltage Vcc3 also outputs the operating state of the drive unit 31 to the control integrated circuit 4 for reporting to the control integrated circuit 4 . In addition, the oscillation unit 35 uses the above-mentioned report voltage Vcc3 as a power source. That is, the stop execution unit 34 stops the oscillation unit 35 and the drive unit 31 by stopping the power supply from the reporting power supply unit 30 to the oscillation unit 35 . the

As shown in FIG. 5 , the oscillating unit 35 has a non-inverting input terminal connected to the sequence control unit 41 via a resistor R103 and grounded through a parallel circuit of a resistor R104 and a control capacitor C103, and an output terminal connected to an inverting input terminal and via The two resistors R106 and R102 are grounded and the inverting input terminal is connected to the output terminal of the voltage follower OP1 composed of an operational amplifier, and the non-inverting input terminal is input with the specified second reference voltage Vr2 and the inverting input terminal is The control operational amplifier OP2 is connected to the output terminal of the voltage follower OP1 via a resistor R106. The output terminal of this operational amplifier 102 is connected to the gate of the switching element Qc for charging, and the switching element Qc for charging is connected to one output terminal of the current mirror circuit CM1 for charging to which the report voltage Vcc3 is input to each input terminal, respectively. Between the resistors R102, the other output end of the charging current mirror circuit CM1 is grounded via the oscillation capacitor C102. In addition, the oscillating unit 35 is provided with a first discharge switching element Qd composed of a p-channel field effect transistor connected to the above-mentioned one output terminal of the charging current mirror circuit CM1 via a gate at one input terminal. Voltage Vcc3, and the other input terminal is connected to the oscillation capacitor C102, and each output terminal is grounded to the current mirror circuit CM2 for discharge. Furthermore, the oscillation unit 35 has an inverting input terminal connected to the oscillation capacitor C102, and the non-inverting input terminal is input with the predetermined third reference voltage Vr3 and the ratio of the third to The comparator CP3 is one of the predetermined fourth reference voltage Vr4 whose reference voltage Vr3 is lower. The output terminal of the comparator CP3 is connected to the multiplexer TG2, and is configured to input the third reference voltage Vr3 to the non-inverting input terminal of the comparator CP3 while the output of the comparator CP3 is at H level. , the fourth reference voltage Vr4 is input to the non-inversion input terminal of the comparator CP3 while the output of the comparator CP3 is at the L level. In addition, a second discharge switching element Q105 is connected in parallel to the discharge current mirror circuit CM2. The second discharge switching element Q105 is composed of an n-type channel field effect transistor, and its gate is connected to the output of the comparator CP3. terminal. the

The operation of the oscillation unit 35 will be described. In the state where the oscillation capacitor C102 is not fully charged, the output of the comparator CP3 is at the H level, whereby the third reference voltage Vr3 is input to the non-inverting input terminal of the comparator CP3, and the switching element Q105 is turned on. Pass. During this period, the discharge of the oscillation capacitor C102 via the discharge current mirror circuit CM2 is suppressed by the conduction of the second discharge switching element Q105 connected in parallel to the discharge current mirror circuit CM2, and the charge current As the mirror circuit CM1 is charged, the voltage across the oscillation capacitor C102 gradually rises. Finally, when the voltage across both ends of the oscillation capacitor C102 reaches the third reference voltage Vr3, the output of the comparator CP3 becomes L level, the input voltage to the non-inverting input terminal of the comparator CP3 becomes the fourth reference voltage Vr4, and the second 2 The switching element Q105 for discharging is turned off. Then, the discharge current through the discharge current mirror circuit CM2 becomes larger than the charge current through the charge current mirror circuit CM1, whereby the voltage across the oscillation capacitor C102 gradually decreases. Then, when the voltage across the oscillation capacitor C102 reaches the fourth reference voltage Vr4, the output of the comparator CP3 becomes H level again, and the same operation is repeated thereafter. As a result, the voltage across the oscillation capacitor C102, that is, the input voltage to the inverting input terminal of the comparator CP3 repeatedly changes up and down between the third reference voltage Vr3 and the fourth reference voltage Vr4 as shown in FIG. 6(a). , the output of the comparator CP3 becomes a rectangular wave as shown in FIG. 6( b ). Furthermore, the oscillation unit 35 has an output shaping circuit 35 a that shapes the output of the comparator CP3 and outputs it to the drive unit 31 . The output shaping circuit 35a has a first rectangular signal generator (not shown) that generates a first rectangular signal by, for example, dividing the output of the comparator CP3 by two as shown in FIG. 6(c), and generates the first rectangular signal. A second rectangular signal generating unit (not shown) that outputs a second rectangular signal in which the signal is inverted, and a timing delay by turning on the first rectangular signal (inversion from L level to H level) define The dead time td is used to generate the first driving signal as shown in FIG. The drive signals are respectively output to a dead time generation unit (not shown) in the drive unit 31 . The driving unit 31 has a function of turning on one switching element Q10 of the power conversion unit 2 during the on period (H level period) of the first drive signal and during the off period (L level period) of the first drive signal. The first drive unit 31a that is turned off, and the other switching element Q20 of the power conversion unit 2 are turned on during the conduction period (H level period) of the second drive signal and are turned on when the second drive signal is turned off. period (L level period), the second drive unit 31b is turned off. That is, the dead time generation unit prevents the two switching elements Q10 and Q20 of the power conversion unit 2 from being simultaneously turned on. In the above configuration, since the oscillation capacitor C102 is not required to have a particularly high capacity value, the oscillation capacitor C102 can be configured in the control integrated circuit 4 . the

Here, the charging current and the discharging current of the oscillation capacitor C102 become smaller as the input voltage to the inverting input terminal of the control operational amplifier OP2 increases, that is, as the voltage across the control capacitor C103 increases. That is, the frequencies of the first drive signal and the second drive signal, that is, the frequency of the operation of the drive unit 31 and the frequency of the AC power output to the discharge lamp La (hereinafter referred to as "operation frequency") are equal to the two frequencies of the control capacitor C103. The higher the terminal voltage, the lower it will be.

The sequence control unit 41 of the control integrated circuit 4 changes the voltage across the control capacitor C103 shown in FIG. Here, after the preheating operations t1 to t2 for preheating the respective filaments of the discharge lamp La, the starting operations t2 to t3 for starting the lighting of the discharge lamp La are performed, and then, the transition is made to the stabilization operation t3 for maintaining the lighting of the discharge lamp La. ~t4. For example, the sequence control unit 41 is a unit that outputs a PWM signal as shown in FIG. 64( d ) to the control capacitor C103 via the resistor R103 , and changes the voltage across the control capacitor C103 according to the duty ratio of the PWM signal. Specifically, by stopping the above-mentioned PWM signal in the warm-up operation t1-t2 (in other words, making the above-mentioned duty ratio 0), and increasing the above-mentioned duty ratio in the steady-state operation t3-t4 compared with the start-up operation t2-t3, the control By increasing the voltage across the capacitor C103 in stages, that is, as shown in FIG. 64(f), the operating frequencies f1 to f3 are decreased in stages. That is, the operating frequency is set to be the highest operating frequency f1 in the preheating actions t1~t2, the operating frequency f2 lower than the preheating actions t1~t2 in the starting actions t2~t3, and f2 in the stable actions t3~t4 The operation frequency f3 is lower than that in the startup operations t2 to t3. In addition, the output of the sequence control part 41 is not limited to a PWM signal, What is necessary is just the signal which changes the voltage of both ends of the capacitor C103 for control. The operating frequencies f1 to f3 are made higher than the resonance frequency of the resonant circuit including the discharge lamp La connected between both ends of the switching element Q20 on the lower side of the power conversion unit 2, that is, the lower the operating frequencies f1 to f3 are, the lower the operating frequencies f1 to f3 are. 2 The power output to the discharge lamp La increases. That is, the output power to the discharge lamp La increases stepwise by the stepwise decrease of the operating frequencies f1 to f3 as described above. In addition, the timing t2 at which the startup operations t2 to t3 are started and the timing t3 at which the stabilization operations t3 to t4 are started are respectively determined by timing, for example, so that the duration of the warm-up operations t1 to t2 and the duration of the startup operations t2 to t3 are approximately constant. . the

In addition, the stop execution unit 34 does not start the operation of the drive unit 31 for a predetermined stop time T1 from the start of the output of the control voltage Vcc1 to the control integrated circuit 4 . Therefore, the timing to start the warm-up operations t1 to t2 is after the predetermined stop time T1 elapses from the start of output of the control voltage Vcc1 to the control integrated circuit 4 . The stop time T1 is lengthened to the extent that the control capacitor C103 can be fully discharged. Therefore, even if the restart is performed immediately after the stabilization operation t3-t4 is stopped, the subsequent warm-up operation t1-t4 is started. Since the control capacitor C103 is sufficiently discharged in the stop time T1 before t2, the output power from the power conversion unit 2 to the discharge lamp La does not become excessive at t1 at the start of the warm-up operation t1 to t2. the

Here, the control integrated circuit 4 is provided with a stop control unit 42 connected to the stop execution unit 34 . The circuit from the stop control unit 42 of the control integrated circuit 4 to the stop execution unit 34 of the drive integrated circuit 3 is connected to a circuit of the control voltage Vcc1 via a resistor R51. The stop control unit 42 normally sets the potential of the above-mentioned circuits to an L level equal to the ground potential, and instructs the drive unit to stop the drive unit 31 by setting the potential of the above-mentioned circuits to an H level equal to the control voltage Vcc1. 31 of the stops. That is, during the period in which the drive unit 31 is instructed to stop, no current flows through the resistor R51 and no power is consumed, and the power consumption is reduced compared to a configuration in which a current always flows through the resistor R51. . Furthermore, the stop execution unit 34 does not operate the drive unit 31 while the output of the stop control unit 42 is at the H level. In the example of FIG. 64 , the input to the stop execution unit 34 (that is, the output of the stop control unit 42 ) is maintained at the L level from the start of the output of the control voltage Vcc1 to the end of the stabilization operations t3 to t4 at t4, thereby maintaining When the warm-up operation t1 to t2 is started after the stop time T1 has elapsed since the output of the control voltage Vcc1 is started, but the input to the stop execution unit 34 becomes the H level and then changes to the L level after the output of the control voltage Vcc1 is started The warm-up operation t1 to t2 starts after the stop time T1 elapses after the input to the stop execution unit 34 becomes L level. That is, strictly speaking, when the control voltage Vcc1 is output from the control power supply unit 33 and the input to the stop execution unit 34 is at the L level for the stop time T1, the warm-up operation starts from t1 to t2, The stop for at least the stop time T1 is ensured between the actions t3-t4 and the subsequent start of the warm-up actions t1-t2. the

Furthermore, this embodiment includes a power supply detection unit 165 that outputs a DC voltage corresponding to a voltage that smoothes the output voltage of the rectification unit DB, and a DC power supply that is composed of, for example, a voltage dividing resistor that divides the output voltage of the DC power supply unit 1 . The higher the output voltage of the section 1 is, the DC power supply detection section 167 outputs a higher voltage. the

In addition, in the driving integrated circuit 3 of the present embodiment, a circuit for driving the switching element Q1 of the DC power supply unit 1 is provided. If described in detail, in the integrated circuit 3 for driving, an error amplifier OP4 corresponding to the difference between the predetermined seventh reference voltage Vr7 and the output voltage of the DC power supply detection unit 167 is provided, and the output of the power supply detection unit 165 is compared with the output voltage of the DC power supply detection unit 167. Comparison between the multiplier 36a that multiplies the output of the error amplifier OP4 and the output of the multiplier 36a that is input to the inverting input terminal and the non-inverting input terminal connected to the connection point between the switching element Q1 and the resistor R5 of the DC power supply unit 1 CP7, a flip-flop circuit 36b to which the output of the comparator CP7 is input to the reset terminal, and a switching element Q1 connected to the DC power supply unit 1 via a resistor R4 and turned on and off to drive DC according to the output of the flip-flop circuit 36b The power drive unit 36c of the switching element Q1 of the power supply unit 1 . the

Furthermore, the inductor L1 of the DC power supply unit 1 is provided with a secondary winding whose one end is grounded, and the other end of the secondary winding is connected to the zero current detection unit 36d provided in the driving integrated circuit 3 . The zero-current detection unit 36d is connected to the setting terminal of the flip-flop circuit 36c, detects the completion of the energy discharge of the inductor L1 based on the voltage induced in the above-mentioned secondary winding, and when the completion of the energy discharge of the inductor L1 is detected, the A pulse is input to a set terminal of the flip-flop circuit 36b. the

As a result, the switching element Q1 of the DC power supply unit 1 is periodically turned on and off, and the duty ratio thereof is feedback-controlled so that the output voltage of the DC power supply unit 1 becomes a predetermined target voltage. The target voltage is a voltage at which the output voltage of the DC power supply detection unit 167 becomes the seventh reference voltage Vr7. the

Furthermore, this embodiment is equipped with the life detection part 63 which detects the parameter which changes at the end of the life of the discharge lamp La, and outputs the voltage corresponding to the detected parameter. Specifically, the lifetime detection unit 63 of this embodiment detects the asymmetric current generated in the discharge lamp La as the above parameter, and outputs a voltage corresponding to it. the

In addition, in the control integrated circuit 4, it is provided to judge whether it is an end-of-life state as an abnormal state in which the discharge lamp La is at the end of life based on the output of the life detection part 63, and to input an output corresponding to the judgment result to the stop control part. 42 in the discharge lamp life judgment part 43. That is, the discharge lamp lifetime determination unit 43 is a load-side abnormality determination unit in the technical solution. the

In detail, as shown in FIG. 25 , the lifetime detection unit 63 includes a capacitor C106 whose one end is connected to the inductor L2 of the power conversion unit 2 via a resistor R111 and a filament of the discharge lamp La and whose other end is grounded, and a resistor R113. parallel circuit. In addition, the capacitor C106 is connected to the life judgment unit 43 via a diode D103 whose cathode faces the capacitor C106, and the connection point between the diode D103 and the life judgment unit 43 is connected to the output terminal (control voltage Vcc1) of the control power supply unit 33 via a resistor R112. . the

Here, when the discharge lamp La is not at the end of its life, during the lighting of the discharge lamp La, the current (hereinafter referred to as "inflow current") Idc+ from the power conversion unit 2 to the life detection unit 63 and the current from the life detection unit 63 The currents (hereinafter referred to as "outflow currents") Idc- to the power conversion unit 2 are substantially equal to each other. Thus, the voltage across the capacitor C106 of the life detection unit 63, that is, the output voltage of the life detection unit 63 is maintained at a substantially constant voltage (hereinafter referred to as “normal voltage”), which is approximately equal to the control voltage Vcc1. Voltage divided by resistors R112 and R113. In addition, the connection point between the inductor L2 of the power conversion unit 2 and the discharge lamp La is connected to the high-voltage-side output terminal of the DC power supply unit 1 via a resistor R114 . the

On the other hand, when the discharge lamp La reaches the end of its life, the consumption of the emitter coated on the filament in the discharge lamp La differs among the filaments, and one of the above-mentioned currents Idc+ and Idc- becomes larger than the other. Large (that is, an asymmetric current is generated), a difference corresponding to the difference between the above-mentioned current Idc+ and Idc- (the magnitude of the asymmetric current) occurs between the output voltage of the life detection unit 63 and the above-mentioned normal voltage. For example, when the outflow current Idc+ is larger than the inflow current Idc-, the output voltage of the life detection part 63 becomes higher than the above-mentioned normal voltage; The output voltage becomes lower than the above normal voltage. the

The life judgment part 43 compares the output voltage of the life detection part 63 with a predetermined upper limit voltage higher than the normal voltage and a predetermined lower limit voltage lower than the normal voltage, and if the output voltage of the life detection part 63 is below the upper limit voltage and the lower limit If the voltage is above the voltage, it is judged not to be the state at the end of life, and if the output voltage of the life detection part 63 exceeds the upper limit voltage or is lower than the lower limit voltage, it is judged to be the state at the end of life. For example, when the control voltage Vcc1 is 5V and the normal voltage is 2.5V, the upper limit voltage is set to 4V and the lower limit voltage is set to 1V. the

Furthermore, in the integrated circuit 3 for driving, it is provided to judge whether the output voltage of the DC power supply unit 1 is insufficient based on the output of the DC power supply detection unit 167 (hereinafter referred to as “lower DC voltage state”) and output a corresponding The DC voltage drop determination unit 37 of the resulting voltage. That is, the DC voltage drop determination unit 37 is a power supply side abnormality determination unit in the technical solution. Specifically, as shown in FIG. 27 , the DC voltage drop determination unit 37 is provided with the output voltage of the DC power supply detection unit 167 input to the non-inverting input terminal and the seventh reference voltage input to the inverting input terminal. A comparator CP8 with a predetermined eighth reference voltage Vr8 lower than Vr7 and a switching element Q107 composed of an n-channel FET whose gate is connected to an output terminal of the comparator CP8. One end of the switching element Q107 is grounded and the other end receives the report voltage Vcc3 via the resistor R32. The eighth reference voltage Vr8 is set at 50% to 80% of the seventh reference voltage Vr7 corresponding to the target voltage. That is, when the output voltage of the DC power supply detection unit 167 is equal to or higher than the eighth reference voltage Vr8, the DC voltage drop determination unit 37 does not determine that the DC voltage is in a low state, but sets the output to L level. When the output voltage of the DC power supply detection unit 167 When it is lower than the eighth reference voltage Vr8, it is determined that the DC voltage is low, and the output is set to H level. For example, when the eighth reference voltage Vr8 is 80% of the seventh reference voltage Vr7, it is determined that the DC voltage is low when the output voltage of the DC power supply unit 1 is less than about 80% of the target voltage. the

In addition, the control integrated circuit 4 is provided with a determination input unit 144 that appropriately converts the output of the DC voltage drop determination unit 37 and inputs it to the stop control unit 42 . the

The stop control unit 42 of the present embodiment refers to the output of the life judgment unit 43 and the output of the judgment input unit 144 at any time, and if it is judged by the life judgment unit 43 that it is in the end-of-life state, the output to the driving integrated circuit 3 is set to H level. , the driving unit 31 and the like of the driving integrated circuit 3 are stopped, and the sequence control unit 41 is also stopped. the

In addition, the stop control part 42 does not stop the drive part 31 and the sequence control part 41 immediately as mentioned above, but controls the sequence control part 41 to start If the restart time T5 (refer to Fig. 29) is specified for the operation to be performed, if the DC voltage low state is still judged after the restart time T5 has elapsed, at this point, the same as when the life-end state is judged, the IC for driving 3 is set to the H level to stop the driving unit 31 and the like of the driving integrated circuit 3 and also stop the sequence control unit 41 . the

FIG. 28 and FIG. 29 show the operation of the present embodiment when it is determined that the current is in a low state. In FIG. 28 and FIG. 29, (a) shows the time change of the output voltage of the DC power supply detection part 167, (b) shows the time change of the output of the comparator CP8 of the DC voltage drop judging part 37, and (c) shows (d) shows the time change of the output of the sequence control unit 41, (e) shows the time change of the operating frequency, and (f) shows the response of the stop control unit 42 to the driving integrated circuit 3. The time variation of the output. In the example of FIG. 28, the DC voltage drop state (that is, the state in which the DC voltage drop judging section is at the H level) ends within a time T4 shorter than the restart time T5, and the stop by the stop control section 42 is not performed. The stabilization operation is started after the restart time T5 has elapsed. Moreover, FIG. 29 has shown the operation|movement in the case where the stop by the stop control part 42 is performed by the continuation time of the DC voltage low state reaching restart time T5. In this embodiment, the stop execution unit 34 of the driving integrated circuit 3 also stops the power drive unit 36c when the output of the stop control unit 42 is at H level, and in FIG. After the power supply drive unit 36c is stopped, the output voltage of the DC power supply unit 1 and the output voltage of the DC power supply detection unit 167 drop. the

In addition, when the drive unit 31 and the power supply drive unit 36c are stopped immediately when it is judged that the DC voltage is low, the DC voltage drop is caused by, for example, a momentary power failure, and the discharge lamp cannot be operated even if it is eliminated in a short time. La lights up. the

On the other hand, in the present embodiment, when the DC voltage low state is judged to be in the low DC state as described above, the start operation is performed for the restart time T5, and the discharge lamp La can be blinked in the short DC voltage low state as described above. The discharge lamp La is turned on again. In addition, since the driving unit 31 and the power driving unit 36c are stopped when it is judged that the DC voltage is in a low state after the start operation of the restart time T5 is completed, even if the output of the DC power detection unit 167 is damaged due to a failure such as a short circuit, for example, Even when the output voltage of the DC power supply unit 1 is always 0 V without reflecting it, it is possible to avoid excessive electrical stress acting on the circuit elements or the discharge lamp La due to erroneous feedback control. the

In addition, if the DC voltage low state occurs, it is considered that the lamp current temporarily becomes asymmetric along with, for example, the flashing of the discharge lamp La at the same time, and it is mistakenly judged as the end-of-life state. When the driving unit 36c is stopped, there is a possibility that the start-up operation based on the determination of the DC voltage drop state as described above may not be performed substantially. In addition, for example, by sufficiently separating the operating frequency from the resonance frequency of the resonance circuit composed of the power conversion unit 2 and the discharge lamp La to ensure a so-called slow-phase operation, it is possible to avoid erroneous judgments due to flickering as described above. , the circuit loss increases due to an increase in reactive current, which is not preferable. the

Therefore, the stop control unit 42 of this embodiment gives priority to the operation based on the judgment of the DC voltage low state when judging both the end-of-life state and the DC voltage low state, and does not An operation corresponding to the determination of the end-of-life state is performed. Accordingly, it is possible to avoid a situation in which the drive unit 31 and the like are stopped due to misjudgment of the end-of-life state when the discharge lamp La is blinking. the

In addition, in the control integrated circuit 4 of this embodiment, a clock unit 45 that generates a clock signal that is a periodic electrical signal is provided. The higher the frequency of the clock signal, the greater the power consumption of the control integrated circuit 4. On the other hand, the faster the operating speed of the stop control unit 42 is, the faster the response to abnormality occurs. In this embodiment, the clock unit 45 adopts the clock frequency TB in the stable operations t3 to t4 as shown in FIG. The clock frequency TA is higher than that in other periods. Thus, by setting the clock frequency to the high frequency TB during the stabilization operations t3 to t4, a high response speed is ensured, and by setting the clock frequency to the low frequency TA during the stop of the drive unit 31, by suppressing The consumption of electric power reduces the electrical stress acting on the starting unit 32 and stabilizes the drive voltage Vcc2. Here, the clock frequency may be set to the higher frequency TB in the stabilization operations t3 to t4, and the timing for switching the clock frequency from the lower frequency TA to the higher frequency TB is not limited to that shown in FIG. 64(g). The clock frequency may be switched at another timing between the start time t3 of the stabilization operations t3-t4 and the start time t2 of the warm-up operations t1-t2 to the start time t3 of the stabilization operations t3-t4. the

In addition, a counting unit (not shown) may be provided for counting the number of restart operations based on the judgment of the DC voltage low state by the sequence control unit, and the number of times counted by the counting unit reaches a predetermined upper limit. After the number of times (for example, 5 times), even if it is determined that the DC voltage is low, the sequence control unit 41 does not start the startup operation, but the stop control unit 42 sets the output to H level to stop the driving unit 31 and the like. the

In addition, the load is not limited to the discharge lamp La, and any device may be used as long as it gradually increases the supplied electric power at the time of start-up. the

Furthermore, the zero current detection unit 36d may be configured as shown in FIG. 65 . If described in detail, the zero current detection unit 36d of FIG. 65 has an inverting input terminal connected to the secondary winding of the inductor L1 of the DC power supply unit 1, and a predetermined ninth reference is input to the non-inverting input terminal. The input comparator CP9 of the voltage Vr9, the one-shot circuit OS that starts outputting a pulse of a predetermined width when the output of the input comparator CP9 inverts from L level to H level, and the negation circuit that outputs the negation of the output of the one-shot circuit OS INV, the first logical product circuit AND1 that outputs the logical product of the output of the input-input comparator CP9 and the output of the negation circuit INV, the storage capacitor C107 charged by the constant current source Ir3 that uses the control voltage Vcc1 as the power supply, and the n-channel type The FET constitutes the switching element Q108 connected in parallel to the storage capacitor C107 and the output terminal of the first logical product circuit AND1 to the gate. The predetermined 10th reference voltage Vr10 is input to the inversion input terminal and The non-inverting input terminal is connected to the output comparator CP10 of the storage capacitor C107, and the second logical product that outputs the logical product of the output of the output comparator CP10 and the output of the one-shot circuit OS as the output of the zero current detection part 36d. Product circuit AND2. the

The operation of the zero-current detection unit 36d in FIG. 65 will be described with reference to FIG. 31 . Consider a case where the input voltage of the secondary winding of the inductor L1 of the DC power supply unit 1 to the zero current detection unit 36d fluctuates as shown in FIG. 31( b ). Then, the output of the input comparator CP9 becomes as shown in FIG. 31(c), and the output of the one-shot circuit OS becomes as shown in FIG. 31(e). The storage capacitor C107 is rapidly discharged via the switching element Q108 when the output of the first logical product circuit AND1 is at the H level, and therefore is input to the output of the comparator CP9 while the output of the first logical product circuit AND1 is at the L level. It is charged while the output of the one-shot circuit OS is at the H level during the L level period, and gradually increases the output voltage to the output comparator CP10. Here, the period during which the output of the zero-current detection unit 36d shown in (g) of FIG. During the period of the pulse width of the output of the one-shot circuit OS immediately before the output of the output comparator CP10 is inverted from the H level to the L level shown in (f) of FIG. 31 , the power drive unit 36c The output of is as shown in (a) in FIG. 31 . As long as the output of the output comparator CP10 is not at the H level, the output of the zero current detection part 36d does not become the H level, so after the input voltage to the zero current detection part 36d is lower than the ninth reference voltage Vr9, the voltage for holding During the predetermined retention time T6 before the voltage across the capacitor C107 reaches the tenth reference voltage Vr10, the output of the zero current detection unit 36d does not become H level. In other words, as long as the period during which the input voltage to the zero-current detection unit 36d is lower than the ninth reference voltage Vr9 does not reach the above-mentioned holding time T6, the output of the flip-flop circuit 36b does not become H level. Therefore, the DC power supply unit 1 The switching element Q1 is not turned on. the

In addition, in the DC power supply unit 1, due to the parasitic impedance and the reverse recovery time of the diode D1, the current from the output capacitor C6 (hereinafter referred to as "reverse current") flows to the detection resistor immediately after the switching element Q1 is turned on. R3. In addition, in the driving integrated circuit 3, if the input voltage to the inverting input terminal of the comparator CP7 connected to the reset terminal of the flip-flop circuit 36b is the voltage input from the alternating current power supply AC (hereinafter referred to as "input power supply voltage") ) falls and falls. Furthermore, when the input power supply voltage becomes lower than the reverse current and the output of the comparator CP7 becomes H level, the switching element Q1 is turned off even though energy is not sufficiently stored in the inductor L1. In this case, although switching element Q1 can be turned on again in a short time, switching element Q1 is turned off again in the same manner as above, and it is conceivable that switching element Q1 is turned on in a short period by this repetition. disconnect. If the switching element Q1 is turned on and off in a short period in this way, excessive electrical stress acts on the switching element Q1. the

On the other hand, in the configuration of FIG. 65, as described above, as long as the duration of the period during which the input voltage to the zero current detection unit 36d is lower than the ninth reference voltage Vr9 does not reach the retention time T6, the DC power supply unit 1 is not turned on. The switching element Q1 is turned on, that is, the off state of the switching element Q1 continues for at least the retention time T6, so even if the input voltage of the zero current detection part 36d slightly fluctuates as shown in the vicinity of the right end of FIG. The life of the switching element Q4 of the section 1 is shortened due to the short cycle of ON and OFF. the

Furthermore, in the example of FIG. 65, the output of the zero current detection part 36d is connected to the setting terminal of the flip-flop circuit 36b via the logical sum circuit OR3, and the output of the flip-flop circuit 36b is monitored in the integrated circuit 3 for driving. When the output of the flip-flop circuit 36b is at L level for a predetermined time (for example, 100 μs) or longer, the restart unit 36e inputs a pulse to the set terminal of the flip-flop circuit 36 via the logical sum circuit OR3. the

(Embodiment 18)

As shown in FIG. 66 , the stop execution unit 34 of the present embodiment judges that the input power supply voltage has dropped based on the output of the power supply detection unit 165. The output is set to L level to stop the drive unit 31 and the reporting power supply unit 30. the

Specifically, as shown in FIG. 20 , the power supply detection unit 165 is a means for outputting a DC voltage obtained by dividing the output voltage of the rectifier DB with a voltage dividing resistor and smoothing it with a capacitor. In addition, the stop execution unit 34 includes an input comparator CP4 to which a predetermined fifth reference voltage Vr5 is input to a non-inversion input terminal and an output voltage of the power supply detection unit 165 is input to an inversion input terminal, and a non-inversion input terminal. The input comparator CP5 connected to the stop control unit 42 and inputted with the fifth reference voltage Vr5 to the inverting input terminal, the logical sum circuit OR2 which outputs the logical sum of the outputs of the two input comparators CP4 and CP5, and the set The constant current source Ir2 charged to the delay capacitor C105 outside the driving integrated circuit 3 is composed of an n-channel type FET, connected in parallel to the delay capacitor C105, and inputted to the gate by the output of the logical sum circuit OR2. The switching element Q106 and the output comparator CP6 to which the delay capacitor C105 is connected to the non-inverting input terminal and the predetermined sixth reference voltage Vr6 is input to the inverting input terminal. The period in which the output of the output comparator CP6 is at the H level is a period in which the driving unit 31 and the reporting power supply unit 30 operate, that is, a period in which the reporting voltage Vcc3 is output. the

The operation of the stop execution unit 34 described above will be described. The stop execution unit 34 uses the control voltage Vcc1 output from the control power supply unit 33 as a power supply, whereby the charging of the delay capacitor C105 at the start is started simultaneously with the output of the control voltage Vcc1 from the control power supply unit 33. When the delay capacitor C105 When the voltage across both ends of the VCC reaches the sixth reference voltage Vr6, the output of the output comparator CP6 becomes H level, thereby starting the operation of the driving part 31 and the output of the report voltage Vcc3. At this time, in the starting part 32, the switching element Q101 is fixed in the OFF state. That is, the charging time T2 obtained by dividing the product of the capacity value of the delay capacitor C105 and the sixth reference voltage Vr6 by the output current of the constant current source Ir2 of the stop execution unit 34 coincides with the stop time T1. the

In addition, when the output voltage of the power supply detection unit 165 is lower than the fifth reference voltage Vr5, or when the output of the stop control unit 42 is at the H level, the output via any one of the input comparators CP4 and CP5 becomes H. The switching element Q106 is turned on, and the delay capacitor C105 is rapidly discharged through the switching element Q106. When the voltage across the delay capacitor C105 is lower than the sixth reference voltage Vr6, the output of the output comparator CP6 becomes L level. , the driving unit 31 and the reporting voltage Vcc3 are stopped. Here, the time T3 (refer to FIG. 21 ) from when the switching element Q106 is turned off to when the output of the output comparator CP6 becomes L level (hereinafter referred to as "holding time") is sufficiently short. the

An example of the operation of this embodiment is shown in FIG. 21 . In the example of FIG. 21, when the output of the stop control unit 42 shown in FIG. 21(a) becomes L level, the output voltage of the power detection unit 165 shown in FIG. 21(b) is lower than the fifth reference voltage. For voltage Vr5, the output of one input comparator CP4 shown in FIG. 21(c) is H level, and therefore the output of the logical sum circuit 2 shown in FIG. 21(d) is also H level. Finally, when the output voltage of the power supply detection unit 165 exceeds the fifth reference voltage Vr5, the output of the logical sum circuit OR2 becomes L level, the switching element Q106 is turned off, and the charging of the delay capacitor C105 starts. Furthermore, if the charging time T2 passes and the voltage across the delay capacitor C105 reaches the sixth reference voltage Vr6, the output of the output comparator CP6 becomes H level, and the operation of the drive unit 31 and the operation shown in FIG. 21(f) are started. Output reporting voltage Vcc3. Then, if the output of the power supply detection unit 165 drops below the fifth reference voltage Vr5, the output of the output comparator CP6 becomes L level in a very short holding time T3. Here, the operation of the driving unit 31 and the report voltage The output of Vcc3 is stopped respectively. the

In addition, in this embodiment, as shown in FIG. 67 , the sequence control unit 41 sets the duty ratio of the PWM signal ( FIG. 67( d )) output to the oscillation unit 35 from t1 to the start time of the warm-up operations t1 to t2 . At the end of the startup operations t2 to t3, t3 gradually increases continuously. As a result, the voltage across the control capacitor C103 shown in FIG. 67(e) increases linearly during the period t1 to t3, and the operating frequency shown in FIG. 67(f) changes from that of the warm-up operation t1 to t2. The operating frequency f1 at the start time t1 decreases linearly from the operating frequency f3 in the steady operations t3 to t4. the

(implementation mode 19)

The configuration of the present embodiment is common to that of Embodiment 2, and therefore the same reference numerals are assigned to the common parts, and detailed illustrations and descriptions are omitted. the

In this embodiment, as shown in FIG. 68, in the driving integrated circuit 3, it is provided to judge whether the output voltage Vdc of the DC power supply unit 1 is abnormally high in an overvoltage state, and when it is judged to be in the overvoltage state, the DC voltage is turned on. An overvoltage protection unit 39 for reducing the output voltage of the power supply unit 1 . the

In addition, in the integrated circuit 4 for control, there is provided a counting unit 46 counting the cumulative usage time as the cumulative time of using the power supply device, which is composed of a nonvolatile memory and keeps the cumulative usage time at least during the period when the power supply is turned off. The time storage unit 47, and the output is set to L level before the accumulated use time counted by the timer unit 46 reaches the predetermined device life time as the life of the power supply device, and the output is set to H after the cumulative use time reaches the device life time. level reporting section 48 . The cumulative usage time is counted, for example, during the period when the report voltage Vcc3 from the driving integrated circuit 3 is input (that is, the period during which the driving unit 31 operates). the

Furthermore, the report input unit 38 for inputting the output of the report unit 48 is provided in the driving integrated circuit 3 . The report input unit 38 is connected to the overvoltage protection unit 39 , and the operation of the overvoltage protection unit 39 changes according to the output of the report unit 48 . the

If described in detail, as shown in FIG. 36, the report input unit 38 is connected to the report unit 48 by an inverting input terminal and a prescribed eleventh reference voltage Vr11 is input to the non-inverting input terminal, and the output terminal is connected to the reporting unit 48 via a resistor R33. The comparator C11 connected to the inverting input terminal of the operational amplifier OP2 for control constitutes. The eleventh reference voltage Vr11 is made lower than the voltage value of the H-level output of the reporting unit 48 and higher than the voltage value of the L-level output of the reporting unit 48 . That is, the report input unit 38 is a so-called negated circuit, and the output of the report input unit 38 , that is, the output of the above-mentioned comparator C11 inverts the output of the report unit 48 . the

The overvoltage protection unit 39 includes a comparator CP12 to which the output of the DC power supply detection unit 167 is input to the non-inverting input terminal and a predetermined twelfth reference voltage Vr12 to the inverting input terminal, and the comparator CP12. The logical product of the output and the output of the report input section 38 is output to the logical product circuit AND3 in the reset terminal of the flip-flop circuit 36b. That is, when the cumulative use time has not reached the device life time, when the output voltage of the DC power supply detection part 167 exceeds the twelfth reference voltage Vr12, the switching element Q4 of the DC power supply part 1 is controlled to turn off the DC power supply part 1. In the overvoltage protection operation when the output voltage Vdc drops, the output of the logical product circuit AND3 is fixed at the L level by reporting that the output of the input unit 38 has become L level after the cumulative use time reaches the device life, and the above-mentioned overvoltage protection is not performed. action. the

According to the above configuration, high electrical stress tends to act on the switching element Q4 of the DC power supply unit 1 because the overvoltage protection operation is no longer performed after the accumulated usage time reaches the device life time. Therefore, the switching element Q4 is more likely to reach its lifetime earlier than the other voltage elements, so it is easy to establish a countermeasure such as using a known current fuse (not shown). In addition, the timing of failure due to the lifetime of the switching element Q4 is not accurate. Therefore, even if a plurality of power supply units are started to be used at the same time, the discharge lamps La will not be turned off all at once when the service life of the plurality of power supply units expires. the

In addition, the overvoltage protection unit 39 is not limited to the above, and instead of providing the logical product circuit AND3, for example, as shown in FIG. The thirteenth reference voltage Vr13 is input to the comparator CP12 through the multiplexer TG3 constituted by the transmission gate circuit, and is input to the comparator CP12 of the overvoltage protection unit 39 during the period when the output of the reporting unit 48 is H level. The voltage at the inverting input terminal is set to a predetermined thirteenth reference voltage Vr13 higher than the twelfth reference voltage Vr12. According to this configuration, the voltage input to the inverting input terminal of the comparator CP12 of the overvoltage protection unit 39 becomes high after the cumulative use time reaches the device life time, so that the overvoltage protection operation is difficult to perform, and the same can be obtained. Effect. the

Claims (10)

1. A discharge lamp lighting device, characterized in that, possesses: The DC power supply unit outputs DC power; The resonant part forms a resonant circuit together with the discharge lamp; The switch part includes at least one switch element, and the connection between the DC power supply part and the resonance part is switched along with the conduction and disconnection of the switch element; The drive unit supplies AC power to the discharge lamp from the resonance unit by turning on and off the switching element of the switch unit; The control unit controls the frequency of the AC power output from the resonator to the discharge lamp by controlling the frequency of the operation of the drive unit. action; The drive power supply unit is supplied with power from the switch unit after the operation of the drive unit is started, and outputs DC power; The starting part is supplied with electric power from the DC power supply part before the operation of the driving part is started, and supplies electric power to the driving power supply part; The control power supply unit is supplied with electric power from the drive power supply unit, and generates DC power as a power supply of the control unit and supplies it to the control unit while the output voltage of the drive power supply unit is equal to or higher than a predetermined reference voltage; and The storage unit is composed of a non-volatile memory and stores temporary data used in the operation of the control unit. The operation of the control unit refers to controlling the output from the resonance unit to the discharge lamp by controlling the frequency of the operation of the drive unit. Frequency action of alternating current; The operation frequency which is the frequency of the operation of the drive unit is determined corresponding to the voltage across the capacitor for control, and the capacitor for control changes the voltage across the capacitor according to the output of the control unit; When the discharge lamp is started, the control unit performs a start-up operation to start lighting the discharge lamp after a preheating operation of preheating each filament of the discharge lamp, and then changes the voltage across the control capacitor to shift to the sustaining operation. Stable operation of the lighting of discharge lamps; The drive unit does not start the operation of the drive unit within a predetermined stop time after the output of the electric power from the control power supply unit is started; The DC power supply unit converts the input power into DC power; The above-mentioned discharge lamp lighting device includes an input voltage drop judging unit for judging whether or not the input voltage is in a low input state in which the input voltage to the DC power supply unit is insufficient; The drive unit does not start the operation of the drive unit while the input voltage drop judging unit is judging that the input voltage is in a low state; The temporary data held in the storage unit is deleted during the operation of the drive unit. 2. The discharge lamp lighting device according to claim 1, wherein: The temporary data stored in the storage unit is read out before the operation of the drive unit is started. 3. A discharge lamp lighting device, characterized in that it has: The DC power supply unit outputs DC power; The resonant part forms a resonant circuit together with the discharge lamp; The switch part includes at least one switch element, and the connection between the DC power supply part and the resonance part is switched along with the conduction and disconnection of the switch element; The drive unit supplies AC power to the discharge lamp from the resonance unit by turning on and off the switching element of the switch unit; The control unit controls the frequency of the AC power output from the resonator to the discharge lamp by controlling the frequency of the operation of the drive unit. action; The drive power supply unit is supplied with power from the switch unit after the operation of the drive unit is started, and outputs DC power; The starting part is supplied with electric power from the DC power supply part before the operation of the driving part is started, and supplies electric power to the driving power supply part; The control power supply unit is supplied with electric power from the drive power supply unit, and generates DC power as a power supply of the control unit and supplies it to the control unit while the output voltage of the drive power supply unit is equal to or higher than a predetermined reference voltage; and The storage unit is composed of a non-volatile memory and stores temporary data used in the operation of the control unit. The operation of the control unit refers to controlling the output from the resonance unit to the discharge lamp by controlling the frequency of the operation of the drive unit. frequency of AC power; The operation frequency which is the frequency of the operation of the drive unit is determined corresponding to the voltage across the capacitor for control, and the capacitor for control changes the voltage across the capacitor according to the output of the control unit; When the discharge lamp is started, the control unit performs a start-up operation to start lighting the discharge lamp after a preheating operation of preheating each filament of the discharge lamp, and then changes the voltage across the control capacitor to shift to the sustaining operation. Stable operation of the lighting of discharge lamps; The drive unit does not start the operation of the drive unit within a predetermined stop time after the output of the electric power from the control power supply unit is started; The DC power supply unit converts the input power into DC power; The above discharge lamp lighting device includes: the input voltage drop judging unit judges whether or not the input voltage drop state is insufficient in the input voltage to the DC power supply; and a no-load judging unit, judging whether it is a no-load state in which no discharge lamp is connected to the resonance unit; The drive unit does not start the operation of the drive unit during the period when the input voltage drop determination unit determines that the input voltage is low, and during the period when the no-load determination unit determines that the no-load state is determined; The temporary data held in the storage unit is deleted during the operation of the drive unit. 4. The discharge lamp lighting device according to claim 3, wherein: The temporary data stored in the storage unit is read out before the operation of the drive unit is started. 5. A discharge lamp lighting device, characterized in that it has: The DC power supply unit outputs DC power; The resonant part forms a resonant circuit together with the discharge lamp; The switch part includes at least one switch element, and the connection between the DC power supply part and the resonance part is switched along with the conduction and disconnection of the switch element; The drive unit supplies AC power to the discharge lamp from the resonance unit by turning on and off the switching element of the switch unit; The control unit controls the frequency of the AC power output from the resonator to the discharge lamp by controlling the frequency of the operation of the drive unit. action; The drive power supply unit is supplied with power from the switch unit after the operation of the drive unit is started, and outputs DC power; The starting part is supplied with electric power from the DC power supply part before the operation of the driving part is started, and supplies electric power to the driving power supply part; The control power supply unit is supplied with electric power from the drive power supply unit, and generates DC power as a power supply of the control unit and supplies it to the control unit while the output voltage of the drive power supply unit is equal to or higher than a predetermined reference voltage; and a rectification unit, which performs full-wave rectification on the AC power input from the outside; The operation frequency which is the frequency of the operation of the drive unit is determined corresponding to the voltage across the capacitor for control, and the capacitor for control changes the voltage across the capacitor according to the output of the control unit; When the discharge lamp is started, the control unit performs a start-up operation to start lighting the discharge lamp after a preheating operation of preheating each filament of the discharge lamp, and then changes the voltage across the control capacitor to shift to the sustaining operation. Stable operation of the lighting of discharge lamps; The drive unit does not start the operation of the drive unit within a predetermined stop time after the output of the electric power from the control power supply unit is started; The DC power supply section includes a switching power supply having a series circuit composed of an inductor, a diode, and an output capacitor whose both ends are connected to the output voltage of the DC power supply section, and one end is connected to the above-mentioned A series circuit consisting of a switching element and a resistor at the connection point of the inductor to the above-mentioned diode and grounded at the other end; The above discharge lamp lighting device includes: a power drive unit, which turns on and off the switching elements of the DC power supply unit, so as to keep the output voltage of the DC power supply unit constant; and The DC power supply abnormality judgment part detects the output voltage of the DC power supply part and judges whether the DC power supply part is normal or abnormal; If the DC power supply abnormality judging unit judges that the DC power supply unit is abnormal during the stabilization operation, the control unit ends the stabilization operation and starts the restart operation again, and the DC power supply abnormality judgment unit still judges that the DC power supply unit is abnormal after the restart operation is completed. In case of abnormality, stop the drive unit. 6. The discharge lamp lighting device according to claim 5, wherein: The power drive unit sets the time from once the switching element of the DC power supply unit is turned off until it is turned on again to a predetermined retention time or more. 7. The discharge lamp lighting device according to claim 5 or 6, characterized in that: The timing unit counts the accumulated usage time, which is accumulated and counted at least during the operation of the drive unit, and is not reset; and The overvoltage protection unit controls the power drive unit so that the output voltage of the DC power supply unit drops when the output voltage of the DC power supply unit exceeds a predetermined voltage before the cumulative use time counted by the timer unit reaches a predetermined device life time. Voltage protection action; The overvoltage protection unit does not perform the overvoltage protection operation after the cumulative use time counted by the timer unit reaches the device life time. 8. A lighting device for a discharge lamp, characterized in that it comprises: The DC power supply unit outputs DC power; The resonant part forms a resonant circuit together with the discharge lamp; The switch part includes at least one switch element, and the connection between the DC power supply part and the resonance part is switched along with the conduction and disconnection of the switch element; The drive unit supplies AC power to the discharge lamp from the resonance unit by turning on and off the switching element of the switch unit; The control unit controls the frequency of the AC power output from the resonator to the discharge lamp by controlling the frequency of the operation of the drive unit. action; The drive power supply unit is supplied with power from the switch unit after the operation of the drive unit is started, and outputs DC power; The starting part is supplied with electric power from the DC power supply part before the operation of the driving part is started, and supplies electric power to the driving power supply part; The control power supply unit is supplied with electric power from the drive power supply unit, and generates DC power as a power supply of the control unit and supplies it to the control unit while the output voltage of the drive power supply unit is equal to or higher than a predetermined reference voltage; and a timing unit, the timing unit counts the accumulated usage time, and the accumulated usage time is accumulated and counted at least during the operation of the drive unit, and is not reset; The operation frequency which is the frequency of the operation of the drive unit is determined corresponding to the voltage across the capacitor for control, and the capacitor for control changes the voltage across the capacitor according to the output of the control unit; When the discharge lamp is started, the control unit performs a start-up operation to start lighting the discharge lamp after a preheating operation of preheating each filament of the discharge lamp, and then changes the voltage across the control capacitor to shift to the sustaining operation. Stable operation of the lighting of discharge lamps; The drive unit does not start the operation of the drive unit within a predetermined stop time after the output of the electric power from the control power supply unit is started; The control unit makes the duration of the warm-up operation longer than before the cumulative use time counted by the counting unit reaches the device life time after the cumulative use time counted by the counting unit reaches a predetermined device life time. 9. A discharge lamp lighting device, characterized in that it has: The DC power supply unit outputs DC power; The resonant part forms a resonant circuit together with the discharge lamp; The switch part includes at least one switch element, and the connection between the DC power supply part and the resonance part is switched along with the conduction and disconnection of the switch element; The drive unit supplies AC power to the discharge lamp from the resonance unit by turning on and off the switching element of the switch unit; The control unit controls the frequency of the AC power output from the resonator to the discharge lamp by controlling the frequency of the operation of the drive unit. action; The drive power supply unit is supplied with power from the switch unit after the operation of the drive unit is started, and outputs DC power; The starting part is supplied with electric power from the DC power supply part before the operation of the driving part is started, and supplies electric power to the driving power supply part; The control power supply unit is supplied with electric power from the drive power supply unit, and generates DC power as a power supply of the control unit and supplies it to the control unit while the output voltage of the drive power supply unit is equal to or higher than a predetermined reference voltage; and a timing unit, the timing unit counts the accumulated usage time, and the accumulated usage time is accumulated and counted at least during the operation of the drive unit, and is not reset; The operation frequency which is the frequency of the operation of the drive unit is determined corresponding to the voltage across the capacitor for control, and the capacitor for control changes the voltage across the capacitor according to the output of the control unit; When the discharge lamp is started, the control unit performs a start-up operation to start lighting the discharge lamp after a preheating operation of preheating each filament of the discharge lamp, and then changes the voltage across the control capacitor to shift to the sustaining operation. Stable operation of the lighting of discharge lamps; The drive unit does not start the operation of the drive unit within a predetermined stop time after the output of the electric power from the control power supply unit is started; After the accumulated usage time counted by the counting unit reaches a predetermined device life time, the control unit makes the duration of the activation operation shorter than before the cumulative use time counted by the counting unit reaches the device life time. 10. A lighting fixture comprising the discharge lamp lighting device according to any one of claims 1 to 9, and a fixture main body holding the discharge lamp lighting device.

Images