CN101853213B - Memory integration device and method - Google Patents
Memory integration device and method Download PDFInfo
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- CN101853213B CN101853213B CN200910133834A CN200910133834A CN101853213B CN 101853213 B CN101853213 B CN 101853213B CN 200910133834 A CN200910133834 A CN 200910133834A CN 200910133834 A CN200910133834 A CN 200910133834A CN 101853213 B CN101853213 B CN 101853213B
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- 230000010354 integration Effects 0.000 title claims description 42
- 238000000034 method Methods 0.000 title claims description 27
- 230000002093 peripheral effect Effects 0.000 claims abstract description 79
- 238000004088 simulation Methods 0.000 claims abstract description 10
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Abstract
A memory integrated device is connected with a host and a plurality of peripheral storage devices. The memory integrated device comprises an execution unit, a storage management unit and a storage simulation unit. The execution unit is used for respectively obtaining a plurality of block files from the peripheral storage devices, and the block files respectively occupy at least part of the residual storage space of the corresponding peripheral storage devices. The storage management unit is used for collecting the information of the headers of the block files. The storage simulation unit is used for simulating the virtual storage device according to the header information of the block files collected by the storage management unit, so that the host can identify the virtual storage device through enumeration, and the storage space of the virtual storage device is the sum of the at least partial residual storage spaces.
Description
Technical field
The invention relates to a kind of memory integration device and method, and particularly relevant for a kind of high efficiency memory integration device and method.
Background technology
Moving storage device, for example is the carry-on dish of USB etc., based on advantages such as its portability and conveniences, is used in large quantities in modern.Yet, moving the remaining a little residue storage area of storage device regular meeting after storing mass data, this remains the storage area and possibly be difficult to be utilized because capacity is big inadequately.Thus, will cause the residue storage area of mobile storage device to be utilized and do not slattern by idle.Be the integrated a plurality of mobile storage devices of method that adopt software processes traditionally.Yet; The method of above-mentioned employing software processes can be with the legacy data full formatization in a plurality of mobile storage device that is integrated; Simulate virtual mobile storage device then, this virtual mobile storage device can occupy whole storage areas of a plurality of mobile storage devices.Thus, original data can't keep, and a plurality of mobile storage device can't be by independent use, and the convenience that causes using subtracts greatly.
Summary of the invention
The invention relates to a kind of memory integration device and method; Set up a plurality of block files respectively at a plurality of peripheral storage devices; So can be under the situation of not destroying legacy data in the peripheral storage devices, the part at least of a plurality of peripheral storage devices be remained the storage area merge again and utilize.
According to a first aspect of the invention, propose a kind of memory integration device, connect a main frame and a plurality of peripheral storage devices.Memory integration device comprises performance element, storage management unit and stores analogue unit.The from then on a little respectively peripheral storage devices of execution units obtain a plurality of block files, and the part at least that these a little block files occupy corresponding peripheral storage devices separately remains the storage area.The storage management unit is in order to the information of the header of collecting these a little block files.Store analogue unit in order to header information according to these collected a little block files of storage management unit; The simulation virtual memory device; Make main frame be able to discern virtual memory device via enumerating, a little for this reason parts at least in the storage area of virtual memory device remain the sum total of storage area.
According to a second aspect of the invention, propose a kind of storer integrated approach, comprise the following steps.Part at least in a plurality of peripheral storage devices remains the storage area and sets up corresponding block file respectively.Collect the information of the header of these a little block files.With the simulation virtual memory device, make main frame be able to discern virtual memory device via enumerating according to the information of the header of these a little block files, the storage area of virtual memory device for those at least part remain sum totals of storage area.
According to a third aspect of the invention we, propose a kind of storer integrated approach, comprise the following steps.Obtain the header of a plurality of block files respectively from a plurality of peripheral storage devices, the part at least that these a little block files occupy corresponding peripheral storage devices separately remains the storage area.The information of header of collecting these a little block files is all here to judge whether all block files.All here when these a little block files, simulate corresponding virtual memory device, make main frame be able to discern virtual memory device via enumerating, a little for this reason parts at least in the storage area of virtual memory device remain the sum total of storage area.
According to a forth aspect of the invention, propose a kind of storer integrated approach, comprise the following steps.Obtain corresponding residue storage area respectively from a plurality of peripheral storage devices.With this a little residues storage area simulation virtual memory device, make main frame discern virtual memory device via enumerating, the storage area of virtual memory device remains the sum total of storage area for this reason a bit.
For letting the foregoing of the present invention can be more obviously understandable, hereinafter is special lifts a preferred embodiment, and cooperates appended graphicly, elaborates as follows.
Description of drawings
Fig. 1 illustrates the synoptic diagram of memory integration device, peripheral storage devices and main frame according to preferred embodiment of the present invention.
Fig. 2 illustrates the calcspar according to the memory integration device of preferred embodiment of the present invention.
Fig. 3 A illustrates the process flow diagram according to an example of the storer integrated approach of preferred embodiment of the present invention.
Fig. 3 B illustrates another the routine process flow diagram according to the storer integrated approach of preferred embodiment of the present invention.
Fig. 3 C illustrates the process flow diagram of an example again according to the storer integrated approach of preferred embodiment of the present invention.
[main element label declaration]
110: memory integration device
122~128: peripheral storage devices
130: main frame
200: performance element
202: the storage management unit
204: store analogue unit
206: data read/writing unit
208: encryption/decryption element
210: the bus driver unit
S310~S340, S410~S430, S510~S530: step
Embodiment
The present invention proposes a kind of memory integration device and method; Set up a plurality of block files respectively at a plurality of peripheral storage devices; So can be under the situation of not destroying legacy data in the peripheral storage devices; The storage area that at least partly remains to a plurality of peripheral storage devices merges utilization again, significantly promotes the service efficiency of storer.
Please with reference to Fig. 1, it illustrates the synoptic diagram of memory integration device, peripheral storage devices and main frame according to preferred embodiment of the present invention.Memory integration device 110 connects a plurality of peripheral storage devices 122~128 and a main frame 130.Memory integration device 110 remains the part at least of a plurality of peripheral storage devices 122~128 storage area and is modeled as virtual memory device, utilizes for main frame 130.Memory integration device 110 is type of being hub (Hub-like) device for example, or calculating punch etc.Peripheral storage devices 122~128 for example is USB (Universal Serial Bus, a USB) disk, or storage card etc.For example link up between memory integration device 110 and the main frame 130, so be not limited to this via the USB transmission interface.
Please with reference to Fig. 2, it illustrates the calcspar according to the memory integration device of preferred embodiment of the present invention.Memory integration device 110 comprises execution (executor) unit 200, storage management (managef) unit 202, stores simulation (emulator) unit 204, data read/writing unit 206, encryption/decryption element 208 and bus driver unit 210.In memory integration device 110; Performance element 200 is in order to respectively from a plurality of peripheral storage devices; Be peripheral storage devices 126 for example, obtain a plurality of block files, the part at least that these a little block files occupy corresponding peripheral storage devices separately remains the storage area.
Bus driver unit 210 is in order to link up with main frame 130 and to make main frame 130 be able to enumerate this virtual memory device.Bus driver unit 210 for example is the USB driver element, so is not limited to this, looks closely the transmission interface of 130 in memory integration device 110 and main frame and decides.
Please cooperate with reference to Fig. 3 A simultaneously, it illustrates the process flow diagram according to an example of the storer integrated approach of preferred embodiment of the present invention.In step S310, memory integration device 110 detects the peripheral storage devices whether new access is arranged constantly.If after the schedule time, do not detect the peripheral storage devices of new access, then as shown in Figure 1, the peripheral storage devices that memory integration device 110 connected still is peripheral storage devices 122~128.
When the peripheral storage devices that does not detect new access, then in step S320, performance element 200 remains the storage area in the part at least of a plurality of peripheral storage devices 122~128 and sets up corresponding block (chunk) file respectively.Wherein, the information of the header of these a little block files comprises identification code of corresponding peripheral storage devices (identification) and the size that at least partly remains the storage area, and those identification codes can be all here in order to judge whether all block files.In addition, because performance element 200 is set up the block file in the residue storage area of each peripheral storage devices, so do not have influence on original data in the peripheral storage devices 122~128.If desire to read original data in the peripheral storage devices 122~128, then can use peripheral storage devices 122~128 separately to reach purpose.
Then, in step S330, the information of the header of storage management unit 202 these a little block files of collection is with constituent apparatus descriptor (descriptor).In step S340; Storing analogue unit 204 accords with according to the storage management unit 202 collected unit describes that header information constituted; The simulation virtual memory device makes main frame 130 be able to via enumerating (enumeration) discern and stores the virtual memory device that analogue unit 204 is simulated.Wherein, Store analogue unit 204 and according to corresponding read/write algorithm the part at least of peripheral storage devices 122~128 is remained the storage area in fact and be modeled as virtual memory device, the storage area of this virtual memory device is the sum totals that a plurality of parts at least remain the storage area.The header of this block file can contain the information of algorithm.
Thus, the virtual memory device that main frame 130 can have big storage area to this carries out the operation of read/write, significantly promotes the service efficiency of storer.
Please with reference to Fig. 3 B, it illustrates another the routine process flow diagram according to the storer integrated approach of preferred embodiment of the present invention.When main frame 130 desires are carried out the operation of read/write to virtual memory device; In step S410; Performance element 200 obtains the header of a plurality of block files respectively from peripheral storage devices 122~128, and the part at least that these a little block files occupy corresponding peripheral storage devices separately remains the storage area.In step S420, the information of the header of storage management unit 202 these a little block files of collection is all here to judge whether all block files.In step S420, storage management unit 202 judges in fact whether all block files of the unit describe symbol that corresponds to virtual memory device are all here.
If all block files are all not here; Represent that then one of them is not connected to memory integration device 110 to peripheral storage devices 122~128 as yet at least; So get back to step S410; Performance element 200 obtains the header of a plurality of block files again respectively from peripheral storage devices 122~128, here up to all block files.If it is all here to correspond to all block files of unit describe symbol; That is peripheral storage devices 122~128 all is connected to memory integration device 110; Then in step S430; Store analogue unit 204 according to the unit describe symbol to simulate corresponding virtual memory device, make main frame 130 be able to discern this virtual memory device via enumerating.Thus, main frame 130 can carry out the operation of read/write according to the read/write algorithm in the information of the header that is contained in the block file to virtual memory device.
Please with reference to Fig. 3 C, it illustrates the process flow diagram of an example again according to the storer integrated approach of preferred embodiment of the present invention.After main frame 130 is able to discern virtual memory device, in step S510, data read/and writing unit 206 receives the read/write instruction from main frame 130.In step S520, data read/writing unit 206 is according to the read/write algorithm that corresponds to, and judges the peripheral storage devices that read/write instruction institute will transmit, and read/write instructed are sent to performance element 200.Afterwards, in step S530,200 pairs of performance elements the peripheral storage devices that will transmit carry out corresponding read.
For instance, behind the main frame 130 identification virtual memory devices, can send the read/write instruction to virtual memory device, this read/write instruction comprises the address of target data.Store analogue unit 204 part at least of peripheral storage devices 122~128 is remained the storage area when being modeled as virtual memory device, can the part at least of peripheral storage devices 122~128 be remained the storage area according to corresponding read/write algorithm and set different address respectively.For example set address 0~49 mapping to peripheral storage devices 122, set address 50~99 mappings to peripheral storage devices 124, set address 100~199 mappings to peripheral storage devices 126, reach and set address 200~249 mappings to peripheral storage devices 128 etc., so be not limited to this.Thus, it is 60 that tentation data read/write unit 206 parses target data address, then can judge the read/write instruction and correspond to peripheral storage devices 124.Then, 200 pairs of peripheral storage devices of performance element 124 are carried out corresponding read.
Because performance element 200 can carry out the operation of read/write simultaneously to a plurality of peripheral storage devices,, make the speed of data access increase so can improve the speed of peripheral storage devices I/O.Read when performance element 200 will be sent to data from the data that peripheral storage devices 122~128 is read/writing unit 206 after; Data read/writing unit 206 according to data read/write algorithm combination from the resulting data of each peripheral storage devices; Memory integration device 110 exports the data after the combination to main frame 130 according to data demand (data request) instruction from main frame 130 then.
In addition, encryption/decryption element 208 be coupled to data read/writing unit 206 and performance element 200 between, in order to the data of read/write instruction institute access are carried out the operation of encrypt/decrypt.Thus, promote the security of data confidentiality.
Memory integration device that the above embodiment of the present invention disclosed and method; Be that part at least respectively at a plurality of peripheral storage devices remains the storage area and sets up a plurality of corresponding block files; So can under the situation of not destroying legacy data in the peripheral storage devices, simulate virtual memory device for main frame identification and use.That is above-mentioned memory integration device and method merge utilization again to the storage area that at least partly remains of a plurality of peripheral storage devices, significantly promote the service efficiency of storer.And, promoted data security owing to can instruct the data of institute's access to carry out the operation of encrypt/decrypt to read/write.Further, the block file in each peripheral storage devices can be copied in the main frame and preserve, and makes the backup of data become easier.
In sum, though the present invention discloses as above with preferred embodiment, so it is not in order to limit the present invention.Have common knowledge the knowledgeable in the technical field under the present invention, do not breaking away from the spirit and scope of the present invention, when doing various changes and retouching.Therefore, protection scope of the present invention is as the criterion when looking appended the claim scope person of defining.
Claims (10)
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CN102541623B (en) * | 2011-12-20 | 2015-02-11 | 北京控制工程研究所 | Memory space simulation method for embedded processor |
CN107102823A (en) * | 2017-05-23 | 2017-08-29 | 郑州云海信息技术有限公司 | A kind of LUN integration methods between different RAID groups |
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CN1652084A (en) * | 2004-02-03 | 2005-08-10 | 株式会社日立制作所 | Computer system, management device, storage device and computer device |
CN1881174A (en) * | 2005-05-19 | 2006-12-20 | 宏正自动科技股份有限公司 | A kind of computer switcher and computer switching method |
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CN1652084A (en) * | 2004-02-03 | 2005-08-10 | 株式会社日立制作所 | Computer system, management device, storage device and computer device |
CN1881174A (en) * | 2005-05-19 | 2006-12-20 | 宏正自动科技股份有限公司 | A kind of computer switcher and computer switching method |
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