CN101835253B - UE (User Equipment) side uplink power control device and method in TD-SCDMA (Time Division-Synchronous Code Division Multiple Access) system - Google Patents

Abstract

The invention relates to UE (User Equipment) side uplink power control device and method in a TD-SCDMA (Time Division-Synchronous Code Division Multiple Access) system. The UE side uplink power control device comprises an interface module and an uplink power control processing module. The UE side uplink power control method comprises the following steps of: calculating open loop power PDPCH of each uplink time-slot code composite transmission channel CCTrCH of the current subframe when the uplink power control processing module controls the open loop power after receiving the power intensity of a received chip of a main public physical channel; regulating the transmitting power of a corresponding time slot in the next subframe according to the PDPCH; judging whether a downlink time-slot power control command is extracted or not; if so, entering closed-loop power control from the open-loop power control; calculating the closed-loop power of the uplink time slot CCTrCH; and regulating the transmitting power of the corresponding time slot in the next subframe according to the obtained closed-loop power. The invention not only reduces calculation amount, but also increases the power precision, thereby increasing the power control accuracy, improving the call quality and avoiding call drop.

Description

Device and method for UE side uplink power control in TD-SCDMA system

technical field

The present invention relates to a code division multiple access system, in particular to a method for realizing uplink power control of a UE (User Equipment, user equipment) side in a TD-SCDMA (Time Division-Synchronous Code Division Multiple Access, Time Division Synchronous Code Division Multiple Access) system Devices and methods.

Background technique

Power control is one of the most important requirements in cellular systems. In most systems, both the base station and the UE can dynamically adjust power in real time to improve system performance. The TD-SCDMA system is an interference-limited system. Due to the near-far effect, the capacity of the TD-SCDMA system is mainly limited by the interference between the UE and the base station in the system. Therefore, if the signal of each UE reaches the base station, the guaranteed The minimum signal-to-noise ratio required for communication quality and keep the system synchronous, then the capacity of the TD-SCDMA system will reach the maximum.

Power control is a measure taken to overcome the near-far effect. It is based on evaluating indicators such as the received signal strength or signal-to-noise ratio at the UE transmitter end, and timely changes the transmit power to compensate for the path loss and Fading, so as to maintain the communication quality without causing additional interference to other users in the same wireless resource. In addition, power control reduces the power of the UE transmitter, thus prolonging the battery life.

Taking the uplink closed-loop power control as an example, after the base station receives the uplink signal from the UE, it decides whether to increase or decrease the transmit power of the UE according to the set criteria, and the base station will generate a corresponding power control command (TPC) and transmit it through the downlink feedback channel For the UE, after receiving the TPC, the UE adjusts the transmit power of the uplink time slot with a closed-loop power control process.

For the TD-SCDMA system, the necessary condition for the good operation of the uplink closed-loop power control is: the downlink feedback channel needs to maintain a certain communication quality. If the communication quality of the downlink feedback channel degrades, the uplink closed-loop power control will be affected or even fail.

Similarly, if the uplink transmission power of the UE is too low, it may affect the uplink reception of the base station, increase the bit error rate, or even fail to receive; if the uplink transmission power of the UE is too high, it will interfere with the reception of other UEs by the base station, causing the reception The signal-to-noise ratio of the user decreases, and other users also need to increase the transmission power. Therefore, reasonable transmit power of UE is very important to improve system performance.

3GPP power control separates loop power control and closed loop power control into two parts. The power calculation in open-loop power control is a complex process, especially when it involves different coded transmission channels of different services (including HSDPA (High Speed Downlink Package Access, high-speed downlink packet access)), the power calculation is more complicated , using different calculation methods has a greater impact on the performance of the system.

Contents of the invention

The technical problem to be solved by the present invention is to provide a device and method for realizing uplink power control of UE side in TD-SCDMA system. The invention can improve the accuracy and call quality of the open-loop power control, avoid call drop, and simultaneously provide a solution to the uplink power control of multi-coding combined channels.

The invention discloses a device for realizing uplink power control on UE side in a TD-SCDMA system. The device includes an interface module and an uplink power control processing module.

The interface module is used to receive the downlink dedicated physical channel DPCH configuration, the uplink dedicated physical channel configuration and the received chip power intensity RSCP _PCCPCH of the main public physical channel PCCPCH issued by the upper layer and forward them to the uplink power control processing module;

The uplink power control processing module is used to start open-loop power control when RSCP _PCCPCH is received, for extracting the downlink time slot power control command TPC in the configuration when receiving DPCH configuration, for extracting the downlink time slot TPC From open-loop power control to closed-loop power control; used to calculate the open-loop/closed-loop power of each uplink time slot coded composite transport channel CCTrCH; used to adjust the transmit power of each uplink time slot in the next subframe.

The interface module includes an upper layer interface submodule and a measurement interface submodule, the

The upper layer interface sub-module: used to receive the DPCH configuration and the uplink dedicated physical channel configuration sent by the upper layer and forward them to the uplink power control processing module;

Measurement interface sub-module: used to receive RSCP _PCCPCH and forward it to the uplink power control processing module.

The uplink power control processing module includes an open-loop power control sub-module, a TPC extraction number sub-module and a closed-loop power control sub-module, wherein the

The open-loop power control sub-module is used to start the open-loop power control when receiving the RSCP _PCCPCH forwarded by the measurement interface module, and is used to calculate the open-loop power of each uplink time slot CCTrCH; The open-loop power adjusts the transmit power of each uplink time slot in the next subframe;

The TPC extraction number submodule is used to extract the downlink time slot TPC in the configuration when receiving the DPCH configuration forwarded by the upper layer interface module, and when extracting the downlink time slot TPC according to the corresponding subframe number and the The channel number of the subframe numbers the downlink time slot TPC, and is used to send the numbered downlink time slot TPC to the closed-loop power control submodule;

The closed-loop power control submodule is used to start the closed-loop power control when receiving the downlink time slot TPC, for mapping the downlink time slot TPC to the uplink time slot, and for calculating the closed-loop power of each uplink time slot CCTrCH; for Calculate the power control symbol of each uplink time slot and judge whether the power control symbol is positive or negative, and adjust the transmit power of each uplink time slot in the next subframe according to the judgment result and the closed-loop power of the CCTrCH of each uplink time slot.

The uplink power control processing module also includes a path loss calculation submodule, a spreading factor gain calculation submodule, a CCTrCH gain calculation submodule, and a power summation submodule, wherein the

The path loss calculation submodule is used to calculate the path loss L _PCCPCH of the wireless link according to the transmit power P _PCCPCH of the main common physical channel in the RSCP _PCCPCH and the uplink dedicated physical channel configuration;

The spreading factor gain calculation submodule is used to calculate the spreading factor gain 10*log[(γ ₁ ² +γ ₂ ² )*16];

A coding combination gain calculation submodule, used to calculate the coding combination gain 10*log[β _j ² ];

The power summation sub-module is used to calculate the CCTrCH open-loop/closed-loop power sum when there are at least two CCTrCHs in the uplink time slot.

The closed-loop power control sub-module includes a TPC mapping module, and the TPC mapping module is used for mapping the received downlink time slot TPC to the uplink time slot.

The present invention also discloses a method for realizing UE side uplink power control in a TD-SCDMA system, the method is as follows:

When the uplink power control processing module receives the RSCP _PCCPCH forwarded by the interface module, it enters open-loop power control, and uses the following formula to calculate the open-loop power P _DPCH of each uplink time slot CCTrCH of the current subframe:

${\mathrm{<span\; class="notranslate">\; P</span>}}_{\mathrm{<span\; class="notranslate">\; DPCH</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; PRX</span>}}_{\mathrm{<span\; class="notranslate">\; DPCHdes</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; L</span>}}_{\mathrm{<span\; class="notranslate">\; PCCPCH</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; log</span>}<span\; class="notranslate">\; [</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; \&gamma;</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&gamma;</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; 16</span>}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; log</span>}<span\; class="notranslate">\; [</span>{\mathrm{<span\; class="notranslate">\; \&beta;</span>}}_{\mathrm{<span\; class="notranslate">\; j</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; ]</span>$

Among them, PRX _DPCHdes is the transmission power of the uplink dedicated physical channel expected by the base station;

And adjust the transmission power of corresponding time slot in the next subframe according to the P _DPCH ; simultaneously judge whether to extract the downlink time slot TPC from the DPCH configuration forwarded by the interface module, if so, then enter the closed-loop power control from the open-loop power control, and calculate The closed-loop power of the uplink time slot CCTrCH is adjusted according to the obtained closed-loop power to adjust the transmission power of the corresponding time slot in the next subframe.

After the power control module enters the open-loop power control, it first calculates 10*log[(γ ₁ ² +γ ₂ ² )*16], 10*log[β _j ² ] and calculates the L _PCCPCH according to RSCP _PCCPCH and P _PCCPCH value.

When the method performs open-loop power control, if there is only one CCTrCH in the uplink time slot, the transmission power value of the uplink time slot in the next subframe is the open-loop power value of the CCTrCH; if the There are at least two CCTrCHs in the uplink time slot, then the transmission power value of the uplink time slot in the next subframe is the power sum P of all CCTrCH open-loop powers; the power sum P is obtained by the following method:

Step a: Find the maximum value P _max and the minimum value P _min among the open-loop powers of all CCTrCHs;

Step b: calculating the difference Pi between P _max and P _min ;

Step c: compare the size of the Pi with the preset threshold, if the Pi is greater than or equal to the threshold, then P=P _max ; otherwise, P=P _max +100*log(1+1/(10 ^{(Pi /100)} )).

After the uplink power control processing module is transferred to closed-loop power control, the following steps are specifically performed:

Step A: Number the extracted downlink time slot TPC according to the current subframe number and the code channel number of the subframe and map it to the uplink time slot;

Step B: Calculate the power control compliance of the CCTrCH in the uplink time slot. If it is positive, the transmission power value of the uplink time slot in the next frame is the closed-loop power value of the CCTrCH plus the power adjustment step; if it is negative, then The transmit power value of the uplink time slot in the next frame is the CCTrCH closed-loop power value minus the power adjustment step size; if it is zero, the transmit power value of the uplink time slot in the next frame is the CCTrCH closed-loop power value.

The closed-loop power calculation method of the uplink time slot CCTrCH is the same as the open-loop power calculation method.

If there are at least two CCTrCHs in the uplink time slot, the transmission power value of the uplink time slot in the next subframe is the sum of the power sum of all CCTrCH closed-loop powers in the corresponding time slot, or the power of all CCTrCH closed-loop powers in the corresponding time slot The sum plus/minus power adjustment step is the same as the calculation method of the power sum of the CCTrCH closed-loop power and the power sum of its open-loop power.

The present invention considers the influence of the uplink dedicated physical channel configuration on the power control effect when calculating the open-loop power, that is, there is a gain adjustment for the power, which not only reduces the calculation amount but also improves the power accuracy, thereby improving the accuracy of power control , improving the quality of the call and avoiding dropped calls. The method of the present invention is also applicable to the power adjustment of multiple CCTrCHs including HSDPA and HSUPA.

Description of drawings

Fig. 1 is the functional block diagram of device of the present invention;

Fig. 2 is the overall flowchart of the method of the present invention;

Fig. 3 is the flowchart of open-loop power control in the present invention;

Fig. 4 is a flowchart of closed-loop power control in the present invention.

Detailed ways

Below in conjunction with accompanying drawing and preferred embodiment, the present invention is described in further detail:

As shown in Figure 1, it is a schematic diagram of the UE side uplink power control device in the TD-SCDMA system according to the present invention. The uplink power control device includes an interface module and an uplink power control processing module, wherein the interface module includes an upper layer Interface sub-module and measurement interface sub-module; uplink power control processing module includes open-loop power control sub-module, TPC extraction number sub-module, closed-loop power control sub-module, path loss calculation sub-module, spreading factor gain calculation sub-module, coding combination A gain calculation submodule and a power summation submodule; wherein,

The upper layer interface sub-module is used to receive the DPCH configuration and uplink dedicated physical channel configuration sent by the upper layer and forward them to the uplink power control processing module;

Measurement interface sub-module: used to receive RSCP _PCCPCH and forward it to the uplink power control processing module;

The open-loop power control sub-module is used to start the open-loop power control when receiving the RSCP _PCCPCH forwarded by the measurement interface module, and is used to calculate the open-loop power of the CCTrCH in each uplink time slot; it is used to control the open-loop power of the CCTrCH in each uplink time slot. Power adjustment of the transmission power of each uplink time slot in the next subframe;

The TPC extraction number submodule is used to extract the downlink time slot TPC in the configuration when receiving the DPCH configuration forwarded by the upper layer interface module, and when the downlink time slot TPC is extracted, according to the corresponding subframe number and the subframe The channel number is numbered to the downlink time slot TPC, which is used to send the numbered downlink time slot TPC to the closed-loop power control submodule;

The closed-loop power control submodule is used to start the closed-loop power control when receiving the downlink time slot TPC, for mapping the downlink time slot TPC to the uplink time slot, and for calculating the closed-loop power of each uplink time slot CCTrCH; for Calculate the power control symbols of each uplink time slot according to the theorem of large numbers and judge whether the power control symbols are positive or negative, and adjust the transmission power of each uplink time slot in the next subframe according to the judgment result and the closed-loop power of each uplink time slot CCTrCH; This module includes a TPC mapping module, which is used to map the received downlink time slot TPC to the corresponding uplink time slot according to the principle of Section 5A2.2.2 of the GPP (3rdGeneration Partnership Project) specification "25.221" ;

The path loss calculation submodule is used to calculate the path loss L _PCCPCH of the wireless link according to the transmit power P _PCCPCH of the main common physical channel in the RSCP _PCCPCH and the uplink dedicated physical channel configuration;

The spreading factor gain calculation submodule is used to calculate the spreading factor gain 10*log[(γ ₁ ² +γ ₂ ² )*16];

A coding combination gain calculation submodule, used to calculate the coding combination gain 10*log[β _j ² ];

The power summation sub-module is used to calculate the power sum of the CCTrCH open-loop/closed-loop power when there are at least two CCTrCHs in the uplink time slot.

As shown in Figure 2, it is the overall flowchart of the method for realizing UE side uplink power control in the TD-SCDMA system according to the present invention; in this embodiment, it is assumed that there is only one CCTrCH on each uplink time slot, which specifically includes the following steps:

Step 201: If the upper-layer interface sub-module of the interface module receives the DPCH configuration issued by the upper layer (including: uplink time slot number, whether there is a TPC symbol in the time slot, the number of TPC symbols, PRX _DPCHdes , P _PCCPCH , uplink power control step length (Pstep_ul, spreading factor), uplink dedicated physical channel configuration (including: number of transmission channels, static parameters of transmission channels (including rate matching attributes, cyclic redundancy size, number of dynamic transmission formats), transmission channels The dynamic parameters of (transport block number, transport block size), the corresponding relationship between the transmission coding combination and the transmission channel coding index, including β, β _j ), the currently sent data configuration (transport format combination indication, transmission channel number, transmission block number, the size of the transmission block, etc.), then forward it to the uplink power control processing module; if the measurement interface sub-module of the interface module receives RSCP _PCCPCH , then forward it to the uplink power control processing module;

Step 202: If the uplink power control processing module receives RSCP _PCCPCH , the open-loop power control sub-module of the uplink power control processing module starts open-loop power control;

Step 203: The open-loop power control submodule calculates the open-loop power P _DPCH of each uplink time slot CCTrCH of the current subframe according to the calculation results of the path loss calculation submodule, the spreading factor gain calculation submodule, and the coding combination gain calculation submodule , adjust the transmission power of the corresponding time slot in the next subframe according to the P _DPCH ; at the same time, the TPC extraction numbering submodule extracts the downlink time slot TPC from the DPCH configuration, if extracted, then execute step 204; otherwise, continue to execute step 203;

The transmit power of the corresponding uplink time slot in the next frame is the open-loop power of CCTrCH;

Step 204: Number the downlink time slot TPC, and then send it to the closed-loop power control submodule;

Step 205: After the closed-loop power control sub-module receives the downlink time slot TPC, it starts the closed-loop power control;

Step 206: Map the downlink time slot TPC to the corresponding uplink time slot according to the principle of Section 5A2.2.2 of the GPP (3rd Generation Partnership Project, Third Generation Partnership Project) specification "25.221";

Step 207: Calculate the closed-loop power of the uplink time slot CCTrCH;

The calculation method is the same as that of the open loop.

Step 208: Calculate the power control symbol TPC(i,n) of the uplink time slot according to the theorem of large numbers;

TPC(i, n) represents the TPC mapped from the TPC of the downlink n-2 subframe to the TPC of the i-th time slot of the uplink n-th subframe;

Step 209: judge whether TPC(i, n) is positive or negative, if it is positive, execute step 210; if it is negative, execute step 211; if it is 0, execute step 212;

Step 210: The CCTrCH closed-loop power value plus the power adjustment step size is used as the transmit power value of the corresponding uplink time slot in the next frame;

Step 211: The CCTrCH closed-loop power value minus the power adjustment step is used as the transmit power value of the corresponding uplink time slot in the next frame;

Step 212: The CCTrCH closed-loop power value is the transmit power value for the corresponding uplink time slot in the next frame.

As shown in Figure 3, it is an open-loop power control flow chart when there are multiple CCTrCHs in the current uplink time slot in the method of the present invention; specifically includes:

Step 301: Calculate L _PCCPCH according to RSCP _PCCPCH and P _PCCPCH ;

L _PCCPCH = P _PCCPCH - RSCP _PCCPCH

Step 302: Calculate the initial open-loop power P _{DPCH_1} of each CCTrCH;

P _{DPCH_1} = PRX _DPCHdes + L _PCCPCH

Step 303: Calculate 10*log[(γ ₁ ² +γ ₂ ² )*16] and its influence on the initial open-loop power to obtain the intermediate power P _{DPCH_2} ;

${\mathrm{<span\; class="notranslate">\; P</span>}}_{\mathrm{<span\; class="notranslate">\; DPCH</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; P</span>}}_{\mathrm{<span\; class="notranslate">\; DPCH</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; log</span>}<span\; class="notranslate">\; [</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; \&gamma;</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&gamma;</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; 16</span>}<span\; class="notranslate">\; ]</span>$

Step 304: Calculate 10*log[β _j ² ] and its impact on the initial open-loop power to obtain the open-loop power P _DPCH of CCTrCH;

P _DPCH ＝P _{DPCH_2} +10*log[β _j ² ]

Step 305: Calculate the power sum of the open-loop power of the CCTrCH;

Step 306: Adjust the transmit power of the current time slot in the next frame according to the power sum.

In closed-loop power control, if there are multiple CCTrCHs in a certain uplink time slot, the closed-loop power calculation method is the same as that in open-loop power control, and will not be repeated here.

As shown in Figure 4, it is a flowchart of calculating CCTrCH power and P in the present invention, including:

Step 401: Find the maximum value P _max and the minimum value P _min among the open-loop/closed-loop powers of all CCTrCHs;

Step 402: Calculate the difference Pi between P _max and P _min ;

Step 403: compare the Pi with the preset threshold value 100, if the Pi is greater than or equal to 100, execute step 404; otherwise, execute step 405;

Step 404: P=P _max ;

Step 405: P=P _max +100*log(1+1/(10 ^(Pi/100) )).

In this case, if the uplink subframe is performing open-loop power control, its transmission power in the next frame is the power sum of all CCTrCH open-loop powers; if the uplink subframe is performing closed-loop power control, its transmit power in the next frame The transmit power of one frame is the power of all CCTrCH open-loop power plus/minus (determined according to the power control symbol) power adjustment step size.

The following is a specific example, assuming:

The downlink physical channel has 3 time slots, namely: time slot 4, time slot 5, and time slot 6. Each time slot has two channelization codes of 0 and 1, and the corresponding γ of the channelization code is 16. There is 1 TPC on channelization code 0.

The uplink physical channel has two time slots, namely: time slot 1 and time slot 2. Time slot 1 has a physical channel with a channelization code of 0 and a spreading factor of 8; time slot 2 has a physical channel with channelization The code is 0 and the spreading factor is 16.

P _PCCPCH =6dbm, UE maximum power: P _UE =24dbm, PRX _DPCHdes =-69dbm, Pstep_ul=1db, β=7.

Set RSCP _PCCPCH =-65dbm, then:

L _PCCPCH = P _PCCPCH - RSCP _PCCPCH

＝6-(-65)＝70(dbm)

P _{DPCH_1} = PRX _DPCHdes + L _PCCPCH

＝-69+70＝1dbm

Because the spreading factor of time slot 1 is 8, it can be seen from the 3GPP protocol 25223, $\mathrm{\&gamma;}=\sqrt{2}/4,$ so

${\mathrm{<span\; class="notranslate">\; P</span>}}_{\mathrm{<span\; class="notranslate">\; DPCH</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; twenty\; one</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; P</span>}}_{\mathrm{<span\; class="notranslate">\; DPCH</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; log</span>}<span\; class="notranslate">\; [</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; \&gamma;</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&gamma;</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; 16</span>}<span\; class="notranslate">\; ]</span>$

$<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; log</span>}<span\; class="notranslate">\; [</span>{<span\; class="notranslate">\; (</span>\sqrt{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; )</span>}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; 16</span>}<span\; class="notranslate">\; ]</span>$

$<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; dbm</span>}<span\; class="notranslate">\; )</span>$

Since the spreading factor of time slot 2 is 16, it can be seen from the 3GPP protocol 25223 that γ=1/4, so

${\mathrm{<span\; class="notranslate">\; P</span>}}_{\mathrm{<span\; class="notranslate">\; DPCH</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; twenty\; two</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; P</span>}}_{\mathrm{<span\; class="notranslate">\; DPCH</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; log</span>}<span\; class="notranslate">\; [</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; \&gamma;</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&gamma;</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; 16</span>}<span\; class="notranslate">\; ]</span>$

$<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; log</span>}<span\; class="notranslate">\; [</span>{<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; )</span>}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; 16</span>}<span\; class="notranslate">\; ]</span>$

$<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; dbm</span>}<span\; class="notranslate">\; )</span>$

When β=7, check 3GPP protocol 25223, we can know that β _j =8/8, so for time slot 1, P _DPCH 1=P _{DPCH_21} +10*log[β _j ² ]

＝4+10*log[(8/8)^2]

=4(dbm)

For slot 2, P _DPCH 2 = P _{DPCH_22} + 10*log[β _j ² ]

＝1+10*log[(8/8)^2]

=1(dbm)

That is, the open-loop power of slot 1 is 4dbm, and the open-loop power of slot 2 is 1dbm; it is assumed that no TPC of the downlink slot is received from subframe 1 to subframe 56, and RSCP received from subframe 1 to 56 If _{the PCCPCH} remains unchanged, from subframe 1 to subframe 56, the transmission power of time slot 1 is 4dbm, and the transmission power of time slot 2 is 1dbm.

Assuming that the TPC of the downlink time slot is received in subframe 57, the closed-loop power control is entered and the closed-loop power is calculated, and the value of β is assumed to remain unchanged at this time.

Because the TPC has a delay of 2 subframes for the uplink power, the transmit power in subframes 57 and 58 is consistent with the open-loop transmit power, that is, in subframes 57 and 58, the transmit power of time slot 1 is 4dbm, and The transmit power is 1dbm;

Assuming that in subframe 57, the TPCs received in time slot 4, time slot 5, and time slot 6 are: -1, -1, 1,

In 58 subframes, the TPCs received in time slot 4, time slot 5, and time slot 6 are: -1, 1, 1,

According to the mapping relationship of the protocol,

In 59 subframes, the uplink time slot 1 corresponds to the downlink time slot 4 of the 57 subframe, and the TPC of time slot 5 is -1, -1;

Uplink time slot 2 corresponds to the TPC of downlink time slot 4 in 57 subframes, and its power control coincidence is -1;

60 subframes, uplink time slot 1 corresponds to the TPC of downlink time slot 4 in 58 subframes, and its power control coincidence is -1;

The uplink time slot 2 corresponds to the TPC of the 58 subframe downlink time slot 6, and its power control coincidence is 1;

Using the large number calculation method, then

At frame 59, time slot 1 decreases by 1 power control step (assuming the power control step is 1dbm), and time slot 2 increases by 1 power control step. At this time

The closed-loop power of time slot 1=4-1=3 (dbm),

Closed-loop power of time slot 2=1+1=2(dbm)

At 60 subframes, time slot 1 decreases by 1 power control step, and time slot 2 increases by 1 power control step

Closed-loop power of time slot 1=3-1=2(dbm)

Closed-loop power of time slot 2=2+1=3(dbm)

In addition, it is assumed that there is a high-speed service corresponding to the uplink control channel in time slot 1. The channelization code is 2 and the spreading factor is 16, then the transmit power is 3dbm in the 59th subframe and 3dbm in the 60th subframe.

Then in the 59th and 60th subframes, there are 2 CCTrCHs in slot 1 that need to transmit information, and they need to be summed, then:

The power sum of 59 subframes is as follows:

Take the maximum value for 2 CCTrCHs: Pmax=max(3,3)=3

Take the minimum value for 2 CCTRCHs: Pmin=min(3,3)=3

Find the difference between the maximum value and the minimum value: Pi=Pmax-Pmin=3-3=0,

Since Pi is less than 100, P=P _max +100*log(1+1/(10 ^(Pi/100) ))

＝3+100*log(1+1/(10 ^(0/100) ))

=3+3=6(dbm)

The power sum of 60 subframes is as follows:

Take the maximum value for 2 CCTRCHs: Pmax=max(2,3)=3

Take the minimum value for 2 CCTRCHs: Pmin=min(2,3)=2

Find the difference between the maximum value and the minimum value: Pi=Pmax-Pmin=3-2=1

Since Pi is less than 100, P=P _max +100*log(1+1/(10 ^(Pi/100) ))

＝3+100*log(1+1/(10 ^(1/100) ))

=3+2.5=5.5(dbm)

In the 60th subframe, a decimal appears in the power calculation, but the protocol requires an accuracy of 0.5db. Therefore, the present invention expands the power calculation by 10 times without affecting the accuracy.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the protection scope of the present invention. It should be understood that those skilled in the art of the present invention can make corresponding equivalent changes or replacements according to the technical solutions and concepts of the present invention, and all these changes or replacements should belong to the appended rights of the present invention. the scope of protection required.

Claims (11)

1. A device for realizing UE side uplink power control in a TD-SCDMA system, characterized in that the device includes an interface module and an uplink power control processing module, the The interface module is used to receive the downlink dedicated physical channel DPCH configuration, the uplink dedicated physical channel configuration and the received chip power intensity RSCP _PCCPCH of the main public physical channel PCCPCH issued by the upper layer and forward them to the uplink power control processing module; The uplink power control processing module is used to start open-loop power control when RSCP _PCCPCH is received, for extracting the downlink time slot power control command TPC in the configuration when receiving DPCH configuration, for extracting the downlink time slot TPC From open-loop power control to closed-loop power control; used to calculate the open-loop/closed-loop power of each uplink time slot coded composite transport channel CCTrCH; used to adjust the transmit power of each uplink time slot in the next subframe. 2. The device for realizing UE side uplink power control in a TD-SCDMA system as claimed in claim 1, wherein said interface module comprises an upper layer interface submodule and a measurement interface submodule, said The upper layer interface sub-module: used to receive the DPCH configuration and the uplink dedicated physical channel configuration sent by the upper layer and forward them to the uplink power control processing module; Measurement interface sub-module: used to receive RSCP _PCCPCH and forward it to the uplink power control processing module. 3. The device for realizing UE side uplink power control in TD-SCDMA system as claimed in claim 2, is characterized in that, described uplink power control processing module comprises open loop power control submodule, TPC extraction numbering submodule and closed loop function control sub-module, wherein, the The open-loop power control sub-module is used to start the open-loop power control when receiving the RSCP _PCCPCH forwarded by the measurement interface sub-module, and is used to calculate the open-loop power of each uplink time slot CCTrCH; The open-loop power adjusts the transmit power of each uplink time slot in the next subframe; The TPC extraction numbering submodule is used to extract the downlink time slot TPC in the configuration when receiving the DPCH configuration forwarded by the upper layer interface submodule, and when extracting the downlink time slot TPC according to the corresponding subframe number and the The channel number of the subframe is used to number the downlink time slot TPC for sending the numbered downlink time slot TPC to the closed-loop power control submodule; The closed-loop power control submodule is used to start the closed-loop power control when receiving the downlink time slot TPC, for mapping the downlink time slot TPC to the uplink time slot, and for calculating the closed-loop power of each uplink time slot CCTrCH; for Calculate the power control symbol of each uplink time slot and judge whether the power control symbol is positive or negative, and adjust the transmit power of each uplink time slot in the next subframe according to the judgment result and the closed-loop power of the CCTrCH of each uplink time slot. 4. The device for realizing UE side uplink power control in TD-SCDMA system as claimed in claim 3, is characterized in that, described uplink power control processing module also comprises path loss calculation submodule, spreading factor gain calculation submodule, Encoding combination gain calculation submodule and power summation submodule, wherein, the The path loss calculation submodule is used to calculate the path loss L _PCCPCH of the wireless link according to the transmit power P _PCCPCH of the main common physical channel in the RSCP _PCCPCH and the uplink dedicated physical channel configuration; The spreading factor gain calculation sub-module is used to calculate the spreading factor gain The γ ₁ and γ ₂ are weighting factors; the values of the weighting factors γ ₁ and γ ₂ are determined by the spreading factor on the corresponding DPCH; Encoding combination gain calculation sub-module, used to calculate encoding combination gain

The β _j is the gain factor of the jth transmission format; The power summation sub-module is used to calculate the CCTrCH open-loop/closed-loop power sum when there are at least two CCTrCHs in the uplink time slot. 5. The device for realizing UE side uplink power control in a TD-SCDMA system as claimed in claim 3, wherein said closed-loop power control submodule comprises a TPC mapping module, and said TPC mapping module is used to convert received The downlink time slot TPC is mapped to the uplink time slot. 6. a method for realizing UE side uplink power control in TD-SCDMA system, is characterized in that, described method is: When the uplink power control processing module receives the received chip power intensity RSCP _PCCPCH forwarded by the interface module, it enters open-loop power control, and uses the following formula to calculate the open-loop power P _DPCH of each uplink time slot CCTrCH of the current subframe: ${\mathrm{<span\; class="notranslate">\; P</span>}}_{\mathrm{<span\; class="notranslate">\; DPCH</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; PRX</span>}}_{\mathrm{<span\; class="notranslate">\; DPCHdes</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; L</span>}}_{\mathrm{<span\; class="notranslate">\; PCCPCH</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; log</span>}<span\; class="notranslate">\; [</span><span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; \&gamma;</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&gamma;</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; 16</span>}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 10</span>}<span\; class="notranslate">\; *</span>\mathrm{<span\; class="notranslate">\; log</span>}<span\; class="notranslate">\; [</span>{\mathrm{<span\; class="notranslate">\; \&beta;</span>}}_{\mathrm{<span\; class="notranslate">\; j</span>}}^{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; ]</span>$ Wherein, PRX _DPCHdes is the transmission power of the uplink dedicated physical channel expected by the base station, the L _PCCPCH is the path loss of the wireless link, the β _j is the gain factor of the jth transmission format, and the γ ₁ and γ ₂ are Weighting factors, the values of the weighting factors γ ₁ and γ ₂ are determined by the spreading factor on the corresponding DPCH; And adjust the transmission power of corresponding time slot in the next subframe according to the P _DPCH ; simultaneously judge whether to extract the downlink time slot TPC from the DPCH configuration forwarded by the interface module, if so, then enter the closed-loop power control from the open-loop power control, and calculate The closed-loop power of the uplink time slot CCTrCH is adjusted according to the obtained closed-loop power to adjust the transmission power of the corresponding time slot in the next subframe. 7. the method for realizing UE side uplink power control in the TD-SCDMA system as claimed in claim 6 is characterized in that, after described uplink power control processing module enters open-loop power control, first calculates $10*\log [({\mathrm{\&gamma;}}_1^2+{\mathrm{\&gamma;}}_2^2)*16],10*\log \left[{\mathrm{\&beta;}}_j^2\right]$ And calculate the value of L _PCCPCH according to RSCP _PCCPCH and P _PCCPCH . 8. The method for realizing UE side uplink power control in a TD-SCDMA system as claimed in claim 6, characterized in that, when performing open loop power control, if there is only one CCTrCH in the uplink time slot, the The transmit power value of the uplink time slot in the next subframe is the open-loop power value of the CCTrCH; if there are at least two CCTrCHs in the uplink time slot, the transmit power value of the uplink time slot in the next subframe is all The power and P of the CCTrCH open-loop power; the power and P are obtained by the following method: Step a: Find the maximum value P _max and the minimum value P _min among the open-loop powers of all CCTrCHs; Step b: calculating the difference Pi between P _max and P _min ; Step c: compare the size of the Pi with the preset threshold, if the Pi is greater than or equal to the threshold, then P=P _max ; otherwise, P=P _max +100*log(1+1/(10 ^{(Pi /100)} )). 9. the method for realizing UE side uplink power control in the TD-SCDMA system as claimed in claim 6, is characterized in that, after described uplink power control processing module changes over to closed-loop power control, specifically perform the following steps: Step A: Number the extracted downlink time slot TPC according to the current subframe number and the code channel number of the subframe and map it to the uplink time slot; Step B: Calculate the power control compliance of the CCTrCH in the uplink time slot. If it is positive, the transmission power value of the uplink time slot in the next frame is the closed-loop power value of the CCTrCH plus the power adjustment step; if it is negative, then The transmit power value of the uplink time slot in the next frame is the CCTrCH closed-loop power value minus the power adjustment step size; if it is zero, the transmit power value of the uplink time slot in the next frame is the CCTrCH closed-loop power value. 10. The method for realizing UE side uplink power control in TD-SCDMA system according to claim 6 or 9, characterized in that, the closed-loop power calculation method of the uplink time slot CCTrCH is the same as the calculation method of the open-loop power. 11. The method for realizing UE side uplink power control in a TD-SCDMA system according to claim 9, wherein if there are at least two CCTrCHs in the uplink time slot, the uplink time slot will be in the next subframe The transmit power value is the power sum of all CCTrCH closed-loop powers in the corresponding time slot, or the power and plus/minus power adjustment step size for the power sum of all CCTrCH closed-loop powers in the corresponding time slot, and the calculation method for the power sum of the CCTrCH closed-loop power and its The power and calculation method of ring power is the same.

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