CN101833100A - Method for constructing fully-digital GNSS compatible navigation receiver - Google Patents

Abstract

The invention relates to a method for constructing a fully-digital GNSS compatible navigation receiver, which comprises four steps: I, constructing a receiving link in accordance with actual needs by taking the characteristics of satellite signals, performance indexes and current device level into comprehensive consideration; II, choosing a proper A/D chip and a proper time clock source to complete direct radio frequency sampling and constructing a sampling rate in accordance with bandwidth sampling requirements; III, constructing a filter decimation network to reduce the sampling rate, completing the down-conversion of the radio frequency, converting the frequency of the bandwidth satellite navigation signals near 1.2G and 1.5G two frequency points down to a low medium frequency under a condition of a high sampling rate, and finally outputting a sampling time clock and a GNSS medium frequency signal; and IV, constructing digital radio frequency front end and rear end medium frequency receiver interfaces for making the receiver compatible with other medium frequency receiver. The thought of using software radio realizes the collective receiving of full-range GNSS satellite navigation signals; and the medium frequency receivers can complete navigation solution and output measurement values, so multi-system and multi-frequency point compatible navigation is realized. The method has an application and development prospect in the technical field of communication.

Description

A construction method of an all-digital GNSS compatible navigation receiver

(1) Technical field:

The invention relates to a construction method of an all-digital GNSS compatible navigation receiver, which is related to the research direction of global satellite navigation system, satellite navigation receiver and software radio, and belongs to the technical field of communication.

(two) background technology:

In recent years, the construction of GNSS satellite navigation system has made great progress, and the demand for low-cost, high-performance, flexible and easy-to-use GNSS compatible receivers has greatly increased in various fields. Generally, navigation receivers adopt an analog multi-stage down-conversion structure, and digitization and signal processing are performed after down-conversion to intermediate frequency. This signal receiving method has poor flexibility and is easy to introduce errors. The GNSS receiver based on the idea of software radio does not need to re-replace equipment for signal structure and system upgrades, but only needs to provide users with a unified hardware platform, and update the navigation receiver with software upgrades, which has low cost and high function. The advantages of convenient upgrade and expansion.

The key idea of the software radio is to place the A/D as close as possible to the antenna, and use software to complete as many signal processing functions as possible. The GNSS receiver structure based on radio frequency direct sampling is just using this idea. It has the advantages of less required components, low cost, low power consumption, and easy to obtain high performance. It is an all-digital navigation receiver architecture. Compared with the traditional RF front-end of analog multi-stage down-conversion, the RF front-end of RF direct sampling does not require complex frequency mixing scheme design; for the new satellite signal system, only the appropriate sampling rate and band-pass filter need to be selected; The multi-frequency constellation GNSS receiver does not require a multi-channel RF front-end, which reduces device occupation and eliminates potential interference between channels; it does not introduce additional phase errors like superheterodyne receivers. Research at home and abroad shows that compared with the traditional receiver architecture, the digital RF front end has the same performance. For the sampling of one or several narrowband signals, the sampling rate can be selected relatively low, and the signal is down-converted by sampling; but for wideband signal sampling, such as the entire navigation band signal, the selected sampling rate is often relatively high, but At present, it is difficult for A/D and subsequent device levels to achieve very high clock rates. The all-digital navigation receiver needs to consider the sampling rate and the existing device level comprehensively.

The idea of software radio was first proposed by J.Mitola. The GNSS receiver design idea based on direct band-pass sampling technology was first proposed by Brown et al. in 1994. The receivers designed at that time were used to complete space survey tasks, such as gravity measurement and atmospheric monitoring. These tasks place new demands on receiver tracking performance as well as phase stability in L1 and L2 bands, consistency of pseudoranges, and carrier measurements. In order to meet this requirement, Brown et al. designed a fully digital front-end to replace the analog frequency conversion front-end composed of frequency mixer and frequency synthesizer in the current GPS receiver. The A/D sampling rate of 800MHz is proposed in this paper. Due to the limitations of semiconductor technology at that time, there were no commercial A/D devices available, and data collection was realized by a dedicated AD chip, which could only achieve 1-bit quantization at that time.

In 1999, Dennis M.Akos et al. proposed a front-end design method for GNSS receivers capable of receiving two or more mutually independent signals based on Brown et al., that is, using selective band-pass sampling Technology, only select useful signals of interest and fold them into the final Nyquist band. At that time, the TRW AMAD-7 chip was used, and the quantization bit was up to 4 bits, which realized the acquisition of GPS L1 signals and GLONASS L1 signals. In 2002, Akers and others built a complete GPS L1 and L3 band radio frequency direct sampling data acquisition system through the commercial MAX104 ADC evaluation board and FPGA development board, and completed the signal capture by processing the collected real GPS data. Once again, the superiority of the RF direct sampling technology is verified. The data acquisition board adopts a DMA transmission interface with a maximum rate of 132MB/s. In 2003, Mark L. Psiaki of Cornell University and others used commercial components to assemble a data acquisition system based on selective bandpass sampling technology that can receive L1C/A code and L2 band signals, and Using sampling clocks with different frequencies and different stability to collect actual GPS data, and then after processing these data, it compares and analyzes how to choose the sampling frequency and the influence of clock stability on the performance of the receiver. In 2004, Akers, Ziyaki and others made a comparison of the performance of the down-conversion front-end and the RF direct mining front-end, followed by Spain's Catalonia University of Technology, Australia's University of New South Wales, Sweden's Gavle University, Tampere University of Technology in Finland, L-3 Communications Integrated Systems Company in the United States and the Swiss Federal Institute of Technology in Lausanne have also done in-depth research on GNSS receivers based on radio frequency direct sampling technology.

Domestic research on radio frequency direct sampling started relatively late, and research institutions are mainly concentrated in colleges and universities. Such as University of Electronic Science and Technology, Beijing Institute of Technology, Beijing University of Aeronautics and Astronautics. University of Electronic Science and Technology of China's research mainly uses radio frequency direct sampling in wireless communication broadband digital receivers, which has complex functions and structures and is difficult to implement. Its method is not suitable for navigation signal processing. Beijing Institute of Technology and Beihang University have also developed a system similar to Akers in recent years and achieved good results.

The present invention is directly aimed at GNSS satellite navigation signals in two frequency bands near the 1.2G and 1.5G frequency points, occupying a frequency band of 187MHz. After calculation, it is impossible to complete direct bandpass sampling with a low sampling rate without aliasing. Based on the multi-rate digital signal processing technology of the wireless communication system, a decimation, filtering and separation network for satellite signals is designed. By choosing a suitable chip, the problem of the system handling high sampling rate is solved.

(3) Contents of the invention:

1. Purpose: The purpose of this invention is to provide a construction method of an all-digital GNSS compatible navigation receiver, which utilizes the idea of software radio to realize the integrated reception of full-band GNSS satellite navigation signals, and the navigation solution can be completed by the intermediate frequency receiver. Calculate and output observation values to realize multi-system multi-frequency point compatible navigation.

2. Technical solution:

A kind of construction method of all-digital GNSS compatible navigation receiver of the present invention, it mainly comprises following several steps:

Step 1: The ground receiving power of the satellite navigation signal is lower than the noise power. To directly sample it, the performance requirements of the analog-to-digital converter (A/D) are relatively high, and the front-end analog receiving link needs to be specially designed. Firstly, the present invention uses a three-stage low-noise amplifier (LNA) to amplify the noise power to meet the minimum signal power requirement of the A/D. After the first-stage LNA passes through a broadband pre-filter, the navigation frequency band signal is filtered out; after the third-stage LNA, the signal is divided into two channels through a splitter, and each passes through a band-pass filter to filter out the navigation frequency band with a bandwidth of 136MHz near 1.2G The signal and the navigation signal with a bandwidth of 51MHz around 1.5GHz; after the filter, it is combined by a combiner, and then the signal for A/D sampling is formed by automatic gain control (AGC). The noise figure of the entire front-end receiving circuit is determined by the noise figure (2dB) of the first-stage LNA. The input bandwidth of the A/D needs to be greater than the input signal bandwidth. A/D window jitter and sampling clock jitter must be as small as possible, otherwise it will affect the signal-to-noise ratio after sampling.

Step 2: For broadband navigation signals, an appropriate sampling rate f _s needs to be selected to ensure that the frequency spectrum of the sampled signals does not alias with each other. According to the principle of band-pass sampling, the sampling rate range of multiple band-pass signals is at least the sum of the bandwidths of all the band-pass signals, and at the highest is twice the frequency of the highest signal. The signal falling into the interval [-f _s /2, f _s /2] after sampling needs to meet the following three conditions: a. The spectrum of the signal after sampling does not cross the 0 axis; b. There is no aliasing between the signals after sampling; c. After sampling, the highest frequency of the signal in the interval does not exceed f _s /2. According to the above conditions, a function can be constructed to calculate the function value in Matlab with the above sampling rate range as the independent variable and record the sampling rate value that satisfies the conditions. After simulation, the minimum sampling rate that satisfies the conditions is about 536MHz. In the present invention, the sampling rate is selected as 744MHz, which can meet the requirements of the conditions. The selection of this sampling rate is also convenient for performance comparison with existing radio frequency modules.

Step 3: Since the selected sampling rate is difficult to handle for most of the current devices (such as FPGA (Field Programmable Gate Array), DSP (Digital Signal Processor)), a filter extraction network is designed to reduce the sampling rate and complete RF down-sampling. Frequency conversion, this part can be realized in FPGA. A/D mainly down-converts the broadband satellite navigation signals near the two frequency points of 1.2G and 1.5G to a low intermediate frequency at a high sampling rate, extracts the network through filtering, and combines the A/D half-rate output characteristics to complete the target frequency. Separation, downconversion and downsampling of point signals. The sampled signal can be separated by a low-pass filter to separate the 1.5G frequency band signal, and then double the sampling rate to reduce the sampling rate to half of 744MHz. This rate is adaptable to FPGA. The low-pass filter plus 2 The processing of doubling decimation is designed as a high-efficiency structure. First, polyphase decomposition is performed on the low-pass filter. According to the equivalent principle, the 2-times decimator can be placed in front of the filter to form a high-efficiency structure. At the same time, the A/D output rate is half of the sampling clock rate. The characteristics of the two decimators can be omitted, and only two filters need to be made in the FPGA, and the main clock becomes f _s /2 instead of the difficult 744MHz. Afterwards, the target navigation signal of interest in the 1.5G frequency band is multiplied by the corresponding carrier frequency to complete the down-conversion, and the target signal is filtered out by low-pass filtering. The goal at this time is to reduce the signal rate to 62MHz, and 6-fold extraction is required. It is realized by a two-stage cascade method of decimating by 3 first and then decimating by 2. The anti-aliasing filter before 3-fold decimation and the previous low-pass filter are combined into one, and the anti-aliasing filter before 2-fold decimation The device uses a half-band filter, and the extracted signal passes through a low-pass filter to filter out out-of-band noise. For the signal in the 1.2G frequency band, the frequency point of interest is down-converted to the baseband first, and the target signal is filtered out by low-pass filtering, and then extracted by 2 times. The same principle can be used to double the multiplication and filtering. After extraction, an efficient structure is formed. The subsequent part is similar to the processing of the 1.5G frequency band signal and will not be repeated here.

Step 4: From the introduction of Step 3, it can be seen that the filtering and extraction network can directly output the baseband navigation signal for the zero-IF receiver to process; the digital IF signal can be output by up-converting the baseband digital signal to the IF receiver for use by the digital IF receiver; The digital intermediate frequency signal is converted through D/A (D/A) to output the analog intermediate frequency signal, which can provide signals for the analog intermediate frequency receiver. The interface between the digital RF front-end part and the back-end IF receiver is flexible, and can be easily compatible with other IF receivers. The sampling rate and output intermediate frequency of the digital RF front end can be flexibly configured. The invention completes signal processing functions such as signal capture and tracking and ephemeris analysis through a digital intermediate frequency receiver, and information processing functions such as multi-frequency and multi-constellation compatible positioning and speed measurement, and outputs observation results to a PC upper computer.

3. Compared with the prior art, the present invention has beneficial effects:

1. By designing a digital RF front-end, the integrated reception of satellite signals in the navigation frequency band is realized, instead of only processing navigation signals of a certain navigation system or certain navigation signal frequencies.

2. Compared with the traditional analog multi-stage down-conversion RF front-end, the complex frequency mixing scheme design is omitted; for the multi-frequency multi-constellation GNSS receiver, the traditional multi-channel RF front-end is not required, which reduces the device occupation. Eliminates potential interference between channels; does not introduce additional phase errors like superheterodyne receivers.

3. The sampling rate and intermediate frequency points of each satellite signal are flexible and configurable.

4. For the new satellite signal system, only need to select the appropriate sampling rate and band-pass filter, which has good scalability.

5. Design a filter extraction network with multi-frequency point separation to complete the reduction of multi-frequency point sampling rate. The design considers the realizability of hardware and the occupancy of resources; considers the input and output signal-to-noise ratio of the extraction filter network; it achieves the same level as the traditional simulation Frequency conversion and narrowband bandpass direct sampling with the same performance.

(4) Description of drawings:

Figure 1. The overall design block diagram of the invention

Figure 2. Schematic diagram of the navigation frequency band

Figure 3. Schematic diagram of a three-stage series system

Figure 4. Schematic diagram of the radio frequency band near the navigation frequency band

Figure 5. Schematic diagram of multi-band bandpass sampling results

Figure 6. Schematic diagram of sampling rate selection results

Figure 7. Schematic diagram of the frequency band of the navigation signal after sampling

Figure 8. Overall block diagram of filter extraction network

Figure 9. module_1 module design block diagram

Figure 10. module_2 module design block diagram

(5) Specific implementation methods:

The overall block diagram of the present invention is shown in Fig. 1 . The satellite signal is first received by a broadband antenna (3db bandwidth 1.15-1.65GHz), and then amplified by a three-stage low-noise amplifier (LNA). After the first-stage LNA, it passes through a broadband pre-filter with a bandwidth range of about 1.2-1.5GHz. Large broadband; after the last level of LNA, followed by a splitter, divided into two channels, each passing through a bandpass filter, filtering out the navigation frequency band signal with a bandwidth of 136MHz near 1.2G and the navigation signal with a bandwidth of 51MHz near 1.5GHz; filter After being combined by a combiner, the frequency band after the combination is shown in Figure 2; the signal is then passed through the AGC to complete the gain control, and is sampled by the A/D chip with a sampling rate up to 1GHz, and the A/D outputs two channels with half the sampling clock rate. signal; the signal will pass through the filtering and extraction network implemented in FPGA to complete the downsampling rate and multi-frequency point signal separation; FPGA output contains data clock, in addition, it can also output baseband digital signal and digital intermediate frequency signal, which can be processed by D/A and filtering Output the analog intermediate frequency signal; finally, the intermediate frequency receiver receives the intermediate frequency digital signal output by the FPGA for navigation calculation, and the result is uploaded to the PC through the serial port.

1. Design of receiving link before A/D

Since the GNSS signal adopts the spread spectrum signal system, the signal is submerged in the noise, so the design of the receiving link before the A/D is special compared to the general wireless communication link, mainly considering the signal gain, noise figure, nonlinear characteristics, and filter characteristics, A/D dynamic range and input bandwidth and other factors.

(1) Signal gain

Since the GNSS navigation signals are covered by noise, to ensure that the A/D can sample the navigation signals, the signal must be amplified by an LNA amplifier circuit with a certain gain.

As shown in Figure 2, the total bandwidth of the two navigation bands is 187MHz, and the noise power N is approximately:

N＝-174+10log(187·10 ⁶ )＝-91dBmW

The maximum full-scale voltage of the selected A/D chip is 800mV, the received power of the lowest signal is about -0.9dBm, and the signal needs to be amplified by about 90dB. In the present invention, the link adopts three-stage amplification, each stage is amplified by 30dB, and the total gain is 90dB.

(2) Dynamic range and input bandwidth

The maximum signal input bandwidth of the A/D is 1.7GHz, and the maximum bandwidth of the target signal is about 1.6G, which can ensure the full-band reception of the signal.

The dynamic range of gain mainly considers three factors: a. The change of signal power caused by temperature, assuming that the temperature changes at -45°～85°, the change is about 2dB; b. The gain change of the antenna part is about 10dB; c. Due to the design The gain variation of the RF front-end chip caused by , process, temperature and power supply voltage changes is about 6dB; considering the 5dB margin, the gain dynamic range is 2+10+6+5=23dB, which is used as the AGC control range.

(3) Noise figure

For the three-stage series system shown in Figure 3, the total noise figure is expressed by the following formula:

$\mathrm{<span\; class="notranslate">\; f</span>}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="f"\; filenames="DEST\_PATH\_RE-HSB00000182517700011.png,HSA00000070791300022.png"\; state="\{\{state\}\}">f</figure-callout></span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="G"\; filenames="DEST\_PATH\_RE-HSB00000182517700011.png,HSA00000070791300022.png"\; state="\{\{state\}\}">G</figure-callout></span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}}<span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{{\mathrm{<span\; class="notranslate">\; G</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="G"\; filenames="DEST\_PATH\_RE-HSB00000182517700011.png,HSA00000070791300022.png"\; state="\{\{state\}\}">G</figure-callout></span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; +</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span>$

From the above expression, we can see that if the gain G ₁ of the first subsystem is very high, then the influence of the second and third subsystems is not particularly important, or is eliminated, and the noise figure F ₁ of the first subsystem has a significant impact on The noise figure F of the whole receiver has a decisive influence; if the gain of the first-stage subsystem is not very large, and the gain _G2 of the second-stage subsystem is very large, then the noise influence of the first and second-stage subsystems is very large, Determines the overall receiver noise figure. In most radio receivers, the noise performance of the overall system is dominated by the previous subsystems, because the noise of the early subsystems is amplified by the subsequent subsystems. In the present invention, the noise figure mainly depends on the noise figure of the first-stage LNA, which is about 2dB.

(4) Filter characteristics

Theoretically, there is no large interference signal in the GNSS frequency band, but there are strong interference signals outside the band. As shown in Figure 4, the 1.8GHz PCS signal is a strong interference signal for GNSS applications. Generally, the attenuation of the filter to the GNSS out-of-band signals at 0-900MHz and 1800-5000MHz should be more than 30dB. If a gain of nearly 100dB is generated without any filtering process, the ADC will be saturated and affect the normal operation of the circuit; and, after the out-of-band signal passes through the receiver link, it will affect the overall noise performance of the receiver. Therefore, this In the design, two stages of preselection filters are added to the receiver chain to suppress out-of-band signals.

The filter after LNA1 in Figure 1 mainly filters out signals outside the navigation frequency band; the filter after the splitter filters out broadband navigation signals in two frequency bands. When designing the parameters of the filter, it is necessary to meet the requirements of a good stop-band characteristic between the maximum bandwidth of 1.6G and the A/D input bandwidth of 1.7G.

(5) Jitter noise

Common sources of noise in ADCs include A/D converter quantization noise (or AC differential nonlinearity errors), converter internal thermal noise, and system jitter. The GNSS satellite signal carrier frequency is very high, so when the signal is sampled by the ADC, the sampling time is inconsistent, such as clock jitter and ADC window jitter, and the phase noise introduced will increase the noise floor of the ADC output signal and decrease the signal-to-noise ratio. System jitter is caused by both sampling clock jitter and window jitter

Window jitter, also known as aperture uncertainty, refers to the uncertainty of the aperture time. Window jitter represents random ADC sampling time variation, caused by thermal noise in the sample and hold circuit. Window jitter is the dominant source of error limiting the achievable signal-to-noise ratio. The data sheet for most ADC products comes with a description of their window jitter. Window jitter is usually described in terms of root mean square (rms), which represents the standard deviation of the window time.

Window jitter limits the maximum frequency at which a sinusoidal signal can be accurately sampled by the ADC. The window jitter brings uncertainty in the sampling signal time, reduces the noise level of the ADC, and increases the possibility of intersymbol interference. These effects are directly proportional to the rate at which the signal momentarily changes level, such as the slope of the signal. Therefore, the signal-to-noise ratio of higher frequency signals will be worse due to window jitter than that of lower frequency signals. According to the frequency of the input signal and the resolution of the ADC, the maximum allowable window jitter calculation formula is given. as follows:

${\mathrm{<span\; class="notranslate">\; \&sigma;</span>}}_{\mathrm{<span\; class="notranslate">\; a</span>}}<span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{{\mathrm{<span\; class="notranslate">\; 2</span>}}^{\mathrm{<span\; class="notranslate">\; N</span>}}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; max</span>}}}$

N is the number of quantization bits, and f _max is the maximum input carrier frequency. Here, N is 8 bits, and f _max is 1610 MHz, and the maximum allowable window jitter σ _a =0.77 ps can be obtained. The window jitter of the ADC is 0.4ps, which meets the requirements.

Clock jitter is a characteristic of the clock generator that provides the clock signal to the ADC. It is generated by oscillator phase noise and introduces additional ADC device sampling time errors. Most high-speed communication systems, including RF receivers and transmitters, use phase-locked loops for frequency synthesis. These systems are subject to clock jitter. Clock jitter is defined by the time range over which the phase of the sampled clock signal varies randomly, or the frequency range of phase noise. The external clock can be obtained through a frequency synthesis chip or an external signal source. The jitter of the external clock should be as small as possible, and at the same time, it should meet the electrical characteristic requirements of A/D.

2. Determination of sampling rate

The present invention is to sample the navigation signal of the whole frequency band, as shown in Figure 2, the target signal includes two frequency bands, we regard the signal near 1.2G as a passband, the center frequency is 1.232G, and the bandwidth is 136MHz; The signal is regarded as a passband with a center frequency of 1.5845G and a bandwidth of 51MHz.

The purpose of RF direct sampling is to sample high-frequency signals to intermediate frequencies at an appropriate sampling rate. Suppose there are M frequency band signals, and the carrier frequency is f _cj , j=1,...,M. The sampled IF frequency is:

${\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}}_{\mathrm{<span\; class="notranslate">\; ifj</span>}}<span\; class="notranslate">\; =</span>{\stackrel{<span\; class="notranslate">\; \&OverBar;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}}_{\mathrm{<span\; class="notranslate">\; ifj</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; cj</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}\mathrm{<span\; class="notranslate">\; round</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; cj</span>}}<span\; class="notranslate">\; /</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; j</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; ,</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; .</span><span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; m</span>}$

The intermediate frequency of the sampled signal will be located in the [-f _s /2, f _s /2] interval, and some carrier frequencies may be mixed to negative values. Due to symmetry, we take positive frequency as the intermediate frequency value.

As shown in Figure 5, when some frequency band signals are collected in the [-f _s /2, f _s /2] interval, several situations will be caused: the frequency band crosses the 0 axis like f _if2 ; the frequency band like f _if4 f _s /2 is spanned; the frequency bands alias with each other like f _if1 and f _if3 . These are things we don't want to see. From this, several constraints are derived:

${\mathrm{<span\; class="notranslate">\; a</span>}}_{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; ifj</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; )</span>}{{\mathrm{<span\; class="notranslate">\; B</span>}}_{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&Greater\; Equal;</span>\mathrm{<span\; class="notranslate">\; 1</span>}$

${\mathrm{<span\; class="notranslate">\; b</span>}}_{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; ifj</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; )</span>}{{\mathrm{<span\; class="notranslate">\; B</span>}}_{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&Greater\; Equal;</span>\mathrm{<span\; class="notranslate">\; 1</span>}$

${\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\frac{<span\; class="notranslate">\; |</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; ifj</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; ifk</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; |</span>}{{\mathrm{<span\; class="notranslate">\; B</span>}}_{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; B</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}<span\; class="notranslate">\; /</span>\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; \&Greater\; Equal;</span>\mathrm{<span\; class="notranslate">\; 1</span>}$

Here, j=1, . . . , M, k=(j+1), . . . , M, B represent the bandwidth of the jth frequency band. It is necessary to ensure that the above formulas are non-negative and all are greater than or equal to 1, so as to ensure that after sampling with fs, the frequency bands will not alias. Combining the above three formulas can be written as:

d(f _s )=min[a ₁ (f _s ),...., a _M (f _s ), b ₁ (f _s ),...., b _M (f _s ),

c ₁₂ (f _s ), c ₁₃ (f _s )...., c _{M-1, M} (f _s )]

Available sampling rates fs will be the set {f _s : d(f _s )≥1}. d(f _s ) will be piecewise linear. The range of fs must satisfy the following two formulas:

${\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; \&Greater\; Equal;</span>\underset{\mathrm{<span\; class="notranslate">\; j</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; m</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}{\mathrm{<span\; class="notranslate">\; B</span>}}_{\mathrm{<span\; class="notranslate">\; j</span>}}$

f _s ≤2max(f _cj )

According to the above range of fs, the graph of d(f _s ) can be drawn and the value of d(f _s )≥1 can be recorded, as shown in Figure 6. It can be seen that the minimum sampling rate that satisfies the conditions is about 536MHz. In the present invention, the sampling rate is selected as 744MHz, which also satisfies the conditions. In addition, this sampling rate is also selected for comparison with the performance of existing radio frequency modules.

3. Decimation filter network design

The frequency spectrum of the signal sampled at 744MHz is shown in Figure 7, and the signals of the two navigation frequency bands are all sampled to the low frequency band. After calculation, the B1 and L1 frequency points in the 1.5G spectrum are sampled to 87.42MHz, the B2 frequency point in the 1.2G frequency band is sampled to 280.86MHz, and the B3 frequency point is sampled to 219.48MHz. Other navigation signal frequency points after sampling It can be calculated according to the sampling rate.

The overall block diagram of the decimation filtering network of the present invention is shown in FIG. 8 . The main function is to complete the separation of 1.2G and 1.5G navigation frequency band signals and reduce the sampling rate, and the generated signals can be directly used by the back-end IF receiver.

The main function of module 1 (module_1) in Figure 8 is to filter out 1.5G frequency band signals, and its principle is shown in Figure 9 . In the upper picture of Figure 9, according to the spectrum relationship, a low-pass filter can be designed to filter out the 1.2G frequency band signal. After filtering, it can directly double the extraction; if the A/D outputs data at a rate of 744MHz, it is difficult for current devices to handle such For high-rate data, subsequent filtering and extraction are difficult to achieve. The two diagrams of Fig. 9 are equivalent in principle. In the lower figure of Figure 9, the low-pass filter is firstly decomposed into multiple phases, and then the decimator is front-mounted to form a high-efficiency decimation structure, and the multiplication and addition operations required for filtering are placed at the low decimation rate end. The A/D chip sampled in the present invention is specially designed for direct radio frequency sampling, and the output is two 1/2 rate signals, corresponding to points A and B in the figure. In fact, module_1 only contains 2 polyphase filters, eliminating the need for 2 extractors.

After the A/D output signal passes through module_1, there are only 1.5G frequency band signals, and the 1.2G signal is filtered out. In the subsequent processing, the signal of interest in the 1.5G frequency band will be mixed, and after mixing to the baseband (divided into I and Q two channels), it will first pass through a low pass to filter out-of-band noise, because the subsequent 3 Double decimation still requires an anti-aliasing filter in front, so here the two low-pass filters are combined into one. The subsequent 2-fold decimation uses a half-band filter followed by a FIR low-pass filter to filter out-of-band noise and signals at other frequencies. Finally, the IQ two-way signals are up-converted to intermediate frequency output respectively. The signal is extracted by 12 times, and the output sampling rate is 62MHz.

For the signal in the 1.2G frequency band, it is first mixed to the baseband (I, Q two channels), and the out-of-band noise is filtered out by low-pass, and the double extraction is performed first. The principle is similar to that of module_1, and the function of module_2 is shown in Figure 10. The upper picture in Figure 10 requires a multiplier to complete the frequency mixing, but the selected FPGA chip has a multiplier with a maximum clock rate of 500MHz. The idea here is still to place the multiplication filter at the low sampling rate end, and the low-pass The filter performs polyphase decomposition, and the decimator is moved forward by one stage to form a high-efficiency structure, as shown in the middle diagram of Figure 10. The lower figure in Figure 10 shows that after moving the multiplier to the decimator, you can see that A and B can directly use the output signal of A/D 1/2 rate. The decimation filter design after Module_2 is similar to the above and will not be repeated here.

For the processing of the 1.2G frequency band signal, the 1.5G low frequency band signal can also be filtered out by a high-pass filter, and then directly decimated by 2 times, but this form of high-pass filter plus decimator is difficult to form an efficient structure, so this method is not used. Through the design of the filter extraction network, the separation of the navigation frequency band signal is completed, the frequency is down-converted and the sampling rate is reduced, and the output of any sampling rate signal can be completed through fractional extraction and interpolation. By setting different frequencies of the up-conversion frequency, the flexibility of the intermediate frequency frequency point is completed. Configurable.

The decimation filter network is implemented in the FPGA in Figure 1, which lays the foundation for the future chip. In the design, attention should be paid to the design of the low-pass filter. Excessive noise aliasing must be prevented, and noise cannot be aliased in the band. Guaranteed output signal-to-noise ratio.

4. Interface with IF receiver and other functions

The present invention selects the digital intermediate frequency receiver as the terminal for receiving, demodulating and information processing of the navigation signal. It receives the digital intermediate frequency signal and can integrate multiple systems and frequency points. The analog RF front-end for performance comparison. In addition, the FPGA can directly output digital baseband signals for use by zero-IF receivers; it can also buffer the data first and store them in a PC through the bus for use by post-processing software.

Claims (1)

1. the construction method of a fully-digital GNSS compatible navigation receiver, it is characterized in that: these method concrete steps are as follows: step 1: the ground received power of satellite navigation signals is lower than noise power, to carry out Direct Sampling to it, analog to digital converter be the performance requirement of A/D than higher, the simulation of its front end receives link and needs particular design; At first, adopting three grades of low noise amplifiers is that LNA amplifies noise power, makes it satisfy the signal lowest power requirement of A/D; By a broadband prefilter, leach the navigation frequency band signals behind the first order LNA; Be divided into two paths of signals through shunt after the third level LNA,, leach the navigation frequency band signals of the bandwidth 136MHz of 1.2G near and the navigation signal of the bandwidth 51MHz of 1.5GHz near respectively by a bandpass filter; Closing the road through combiner behind the wave filter, is that AGC forms the signal for the A/D sampling by automatic gain control again; The noise figure of entire front end receiving circuit is by the noise figure 2dB decision of first order LNA; The input bandwidth of A/D need be greater than the input signal bandwidth; The window shake of A/D and the shake of sampling clock must be as far as possible little, otherwise will influence the signal to noise ratio (S/N ratio) after the sampling;

Step 2:, need to select suitable sample rate f for the broadband navigation signal _sWith the not mutual aliasing of the frequency spectrum that guarantees sampling back signal; By the bandpass sampling principle, the span of the sampling rate of a plurality of bandpass signals is minimum to be its all bandpass signal bandwidth sums, and the highest is the twice of highest signal frequency; Fall into [f after the sampling _s/ 2, f _s/ 2] signal spectrum was not crossed over 0 after Qu Jian signal need satisfy following three condition: a. sampling; B. aliasing not between the signal of sampling back; C. the sampling back highest frequency of signal in interval is no more than f _s/ 2; According to above condition, can make up a function, in Matlab, be that independent variable is asked functional value and the sample rates values that satisfies condition of record with above-mentioned sampling rate scope; Through emulation, the about 536MHz of minimum sampling rate that satisfies condition; Sampling rate is chosen as 744MHz, the requirement that can satisfy condition, it also is convenient selecting this sampling rate and existing radio-frequency module is made performance comparison;

Step 3: because the sampling rate of selecting is difficult to handle for present most devices, has therefore designed the filtering extraction network and reduced sampling rate and finish radio frequency down-conversion, this part at the scene programmable gate array be to realize among the FPGA; Modulus converter A/D is with near the broadband satellite navigation signal 1.2G and two frequencies of 1.5G, under high sampling rate, downconvert to Low Medium Frequency, by the filtering extraction network, in conjunction with A/D half rate output characteristics, finish separation, down coversion and the reduction sampling rate of target frequency signal; Get signal after the sampling and can isolate the 1.5G frequency band signals by a low-pass filter, carrying out twice then extracts and to make sampling rate be reduced to half of 744MHz, such speed can adapt to for FPGA, the Treatment Design that low-pass filter adds 2 times of extractions becomes efficient configuration, earlier low-pass filter is carried out heterogeneous decomposition, can be put into wave filter by 2 times of withdrawal devices of equivalence principle and form efficient configuration before, utilize the A/D output speed to be half characteristic of sampling clock speed simultaneously, two withdrawal devices can be saved, only need make two wave filters in FPGA, major clock has become f _s/ 2 rather than the 744MHz that is difficult to realize; In 1.5G frequency range interested target navigation signal times with corresponding carrier frequency finished down coversion thereafter, low-pass filtering leaches echo signal, the target of this moment is that signal rate is reduced to 62MHz, also need carry out 6 times of extractions, this is to realize by 3 times of two-stage cascade modes that extract back 2 times of extractions of elder generation, frequency overlapped-resistable filter before 3 times of extractions and low-pass filter are before merged into one and are realized, 2 times of preceding frequency overlapped-resistable filters of extraction adopt half-band filter, and the signal after having extracted is by a low pass filter filters out out-of-band noise; Signal for the 1.2G frequency range then at first is at after wherein interested frequency is down-converted to base band earlier, low-pass filtering leaches echo signal, 2 times of extractions then, utilize aforementioned principles multiplication and filtering all can be put into after 2 times of extractions equally, form structure efficiently, part thereafter and similar to the processing of 1.5G frequency band signals;

Step 4: by step 3 as can be known, the filtering extraction network can directly be exported the base band navigation signal and handle for zero intermediate frequency reciver; Can be by baseband digital signal be upconverted to intermediate frequency, the output digital medium-frequency signal uses for digital if receiver; Digital medium-frequency signal is exported analog if signal through digital to analog converter D/A, can be the analog intermediate frequency receiver signal is provided, the interface mode of digital RF fore-end and rear end intermediate-frequency receiver is flexible, can be easily compatible other intermediate-frequency receiver, the sampling rate of digital RF front end and output intermediate frequency can flexible configuration; Finish the signal processing function and the ephemeris parsings such as acquisition and tracking of signal by digital if receiver, the compatible positioning-speed-measuring information processing function of the many constellations of multifrequency, the output observed result is to the PC host computer.

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