CN101826872B - Phaselocked loop integrated circuit comprising modified LC voltage-controlled oscillator - Google Patents
Phaselocked loop integrated circuit comprising modified LC voltage-controlled oscillator Download PDFInfo
- Publication number
- CN101826872B CN101826872B CN2009102389691A CN200910238969A CN101826872B CN 101826872 B CN101826872 B CN 101826872B CN 2009102389691 A CN2009102389691 A CN 2009102389691A CN 200910238969 A CN200910238969 A CN 200910238969A CN 101826872 B CN101826872 B CN 101826872B
- Authority
- CN
- China
- Prior art keywords
- circuit
- circuit module
- electric capacity
- module
- controlled oscillator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Abstract
The invention relates to a phaselocked loop integrate circuit comprising an LC voltage-controlled oscillator, comprising a phaselocked loop body and the LC voltage-controlled oscillator in the phaselocked loop body. The voltage-controlled oscillator comprises a bias module (10), a negative resistance circuit module (20) and a resonant circuit module (30) which are connected in series in sequence, wherein the bias module (10) supplies bias current for the resonant circuit module (30) to ensure that the resonant circuit module (30) works in a circuit restricted area and phase noise and the bias current are in direct ratio, thereby better phase noise performance can be obtained by adjusting the bias current; the negative resistance circuit module (20) compensates the energy loss of the resonant circuit module (30); and the resonant circuit module (30) generates needed oscillation signals. By using the technical scheme of the invention, the resonant frequency can be improved, and high frequency resolution can be realized.
Description
Technical field the present invention relates to automatic control, the starting of oscillation, synchronous or stable of electro coupled oscillator or pulse generator, particularly relates to the automatic control of frequency or phase place with synchronously, relates in particular to the part one improved LC voltage controlled oscillator of phase-locked loop.
The background technology voltage controlled oscillator is one of most important module in the phase-locked loop; Be used to produce high performance oscillator signal; Obtain using very widely at wireless communication system, yet also there are some problems in voltage controlled oscillator in practical application, particularly along with CMOS technology develops to the deep-submicron direction; Because the height between frequency and the voltage is non-linear and supply voltage reduces the little voltage swing that causes, make that the voltage controlled oscillator design under the deep-submicron CMOS process becomes very difficult.
A problem of voltage controlled oscillator is because the frequency tuning range that technology, temperature and voltage fluctuation cause can't meet design requirement, and in order to increase the frequency tuning range of voltage controlled oscillator, main method is to adopt the tuning method of digital quenching frequency at present.This method is to become one group of overlapping curve to the wide frequency tuning range of voltage controlled oscillator, thereby can under lower gain, obtain the frequency tuning range of broad.The method of frequency tuning is to carry out tuningly to electric capacity, and two kinds of implementations are arranged: a kind of mode realizes frequency tuning through moscap electric capacity; A kind of in addition mode is to realize frequency tuning together through mim electric capacity and switch.The main advantage of Moscap frequency tuning is to need not switch; Height through control voltage just can be realized changes in capacitance; But under deep submicron process, supply voltage drops to 1.2V even littler, and the capacitance of moscap changes bigger with change in voltage in the supply voltage scope; This makes voltage controlled oscillator very responsive to the change of power supply, and substrate noise very easily is coupled.The frequency tuning that Mim electric capacity and switch are realized is a kind of method of extensive use; The tradition implementation method is shown in Fig. 6 (a), and every group of electric capacity needs two switches, and major defect is that to open resistance ratio bigger; Make the quality factor of capacitor cell descend, be unfavorable for the optimization of phase noise; A kind of method in addition is shown in Fig. 6 (b); Switch is connected across between two electric capacity, and the problem that faces is that switch can't be open-minded fully when opening, and when turn-offing, can't turn-off; The resistance of switch has a strong impact on the quality factor of electric capacity, is unfavorable for the low phase noise design; In order to eliminate the problem among Fig. 6 (b); People have proposed a kind of improvement circuit again shown in Fig. 6 (c); In the both sides of switching tube two mos pipes are arranged respectively, when opening, the nmos of both sides pipe Mn2 and Mn3 make that switching tube can be open-minded effectively; When breaking off, the pmos of both sides pipe Mp1 and Mp2 make switching tube to turn-off effectively.The main problem of Fig. 6 (c) is to need a bias voltage that is different from supply voltage, and this voltage must be very clean, needs an additional filter capacitor and bias-voltage generating circuit.In addition, when switching tube turn-offed, two pmos pipe Mp1 was not open-minded fully with Mp2, and parasitic capacitance influences the frequency of oscillation of resonant circuit to the unusual sensitivity of bias voltage.
An other problem of voltage controlled oscillator is to be subject to technology; Figure adjustment can't obtain the electric capacity less than minimum technique change; Thereby limited the frequency resolution of figure adjustment, in order to improve the frequency resolution of figure adjustment, traditional implementation method is as shown in Figure 7; When switch turn-offs, electric capacity be capacitor C 1 and C2 series connection with; During switch closure, electric capacity is C1.Switch is opened and the closed change that causes capacitance.The main shortcoming of this method is capacitor C 1 and C2 series connection, has potential adverse effect, in addition in order to obtain smaller capacitance variations; Need capacitor C 1 and C2 difference bigger, thereby total capacitance is bigger, capacitance is excessive; Under identical resonance frequency; Reduced the value of resonant inductance, little resonant inductance means high power consumption and low induction quality factor.
The development of modern communications has proposed more and more harsher requirement to the LC voltage controlled oscillator; Above-mentioned several kinds of structures are in frequency resolution; Frequency tuning ranges etc. all can't satisfy the requirement of transceiver to oscillator signal; Therefore, need a kind of solution of improved LC voltage-controlled oscillator circuit, can solve the problem in the above-mentioned correlation technique.
Not enough below prior art exists: in frequency resolution, frequency tuning range etc. all can't satisfy the requirement of transceiver to oscillator signal.
1, during the Moscap frequency tuning, because that the capacitance of moscap changes with change in voltage in the supply voltage scope is bigger, this makes voltage controlled oscillator very responsive to the change of power supply, and substrate noise very easily is coupled;
2, be subject to technology, figure adjustment can't obtain the electric capacity less than minimum technique change, has limited the frequency resolution of figure adjustment.
The technical problem that summary of the invention the present invention will solve is to avoid the weak point of above-mentioned prior art and proposes a kind of phase-locked loop intergrated circuit that improves the LC voltage controlled oscillator that contains.
The present invention solve the technical problem and can realize through adopting following technical scheme: propose a kind of phase-locked loop intergrated circuit that improves the LC voltage controlled oscillator that contains; Comprise phase-locked loop body and the LC voltage controlled oscillator that is contained in it; This voltage controlled oscillator comprises biasing module, the negative resistance circuit module resonant circuit module of order series connection again, and an end of said biasing module connects power supply V
DdThe other end is connected with the negative resistance circuit module, and negative resistance circuit module resonant circuit module is connected on two output outp and outn, and the other end of this resonant circuit module connects power supply ground; Said biasing module provides bias current for the resonant circuit module; Make the resonant circuit module be operated in the current limited district; When the resonant circuit module was operated in the current limited district, phase noise and bias current were directly proportional, thereby obtained better phase noise performance through the size of regulating bias current; Said negative resistance circuit module is used to compensate the energy loss of resonant circuit module; Said resonant circuit module produces needed frequency of oscillation.
To forming, its output is outp and outn to said negative resistance circuit module, is used to compensate the energy loss of resonant circuit module by pmos pipe Mp2 and Mp3 cross-couplings; Said Mp2 and Mp3 are p type mos field-effect transistor.
Said biasing module comprises biasing circuit and transistor MP1, and the output of biasing circuit is connected with the grid of MP1, and biasing circuit is that Mp1 provides gate bias voltage; Said transistor Mp1 provides bias current for the resonant circuit module; Said biasing circuit is formed by the cascade of two-stage auto bias circuit; Said Mp1 is a p type mos field-effect transistor.
In the said biasing circuit, Mp4 and Mp5 constitute the pair of electrical traffic mirroring, and the grid of Mp6 links together as the output of biasing circuit with drain electrode; Resistance R 2 all has an end ground connection with R3, and the R3 other end connects the source end of Mn4 and the grid end of Mn3 simultaneously; The R2 other end connects the source end of Mn2 and the grid end of Mn1 simultaneously; The drain electrode of Mn1 connects the grid of Mn2, and the grid of Mn3 connects the source electrode of R3 and Mn4, and drain electrode connects the grid of Mn4; Mn2, Mn1 and R2 have constituted a negative feedback, and the current source of automatic biasing is provided for Mp4; Mn3, Mn4 and R3 are the current source that Mp6 provides automatic biasing.
Said resonant circuit module comprises capacitive part and inductive part, and it two is connected in parallel between output node outp and the outn.
Said capacitive part comprises the digital coarse adjustment circuit that is connected in parallel, digital accurate adjustment circuit and analog tuner circuit, and three's a end links together as output outp, and an other end links together as output outn.
Said digital coarse adjustment circuit capacitance comprises m bar branch road arranged side by side; The value that electric capacity weighting value is different; Every branch road comprises two electric capacity and a switch, and the switch series downlink connection is between two electric capacity, and the end that two electric capacity does not connect switch is connected with output outp or outn respectively.
Said digital accurate adjustment circuit capacitance comprises n bar branch road arranged side by side; Electric capacity is got identical value; Every branch road comprises two electric capacity and a switch, and the switch series downlink connection is between two electric capacity, and the end that two electric capacity does not connect switch is connected with output outp or outn respectively.
The analog tuner circuit is formed by connecting two variable capacitance diodes back-to-back; The end that this two variable capacitance diode does not link together is connected with output outp or outn respectively; The end that two variable capacitance diodes interconnect is as the simulation control end, and two variable capacitance diodes all are reverse-bias state.
Compare with prior art, the beneficial effect of technical scheme according to the invention is:
1, the relative traditional structure of tuning capacity of digital coarse adjustment part has littler parasitic capacitance, can improve resonance frequency, reduces the complexity and the area that reduces domain of circuit design;
2, the relative traditional structure of tuning capacity of digital accurate adjustment part, the capacitance that when obtaining identical capacitance change, needs reduces over half, and it is littler that switch is opened the influence of resistance, is prone to realize high frequency resolution.
Description of drawings
Fig. 1 is the LC voltage controlled oscillator structural representation that the present invention contains the phase-locked loop intergrated circuit preferred embodiment that improves the LC voltage controlled oscillator;
Fig. 2 is the biasing circuit sketch map of the LC voltage controlled oscillator of the said embodiment of choosing;
Fig. 3 is 31 a circuit diagram of the LC voltage controlled oscillator capacitive part resonant circuit module 30 of the said embodiment of choosing;
Fig. 4 is the structural representation of the digital coarse adjustment circuit 311 of capacitive part 31 among Fig. 3;
Fig. 5 is the structural representation of the digital accurate adjustment circuit 312 of capacitive part 31 among Fig. 3;
Fig. 6 is a prior art tuning capacity cellular construction sketch map;
Fig. 7 is prior art high frequency resolution capacitance tuning unit;
Fig. 8 is the contrast sketch map of frequency tuning range of modified model LC pressuring controlling oscillator frequency tuning range and the prior art capacitance tuning unit of the preferred embodiment of the present invention.
Embodiment is done further to detail below in conjunction with the preferred embodiment shown in each accompanying drawing.
The present invention contains the phase-locked loop intergrated circuit that improves the LC voltage controlled oscillator; As shown in Figure 1; Comprise phase-locked loop body and the LC voltage controlled oscillator that is contained in it; This voltage controlled oscillator comprises biasing module 10, the negative resistance circuit module 20 resonant circuit modules 30 of order series connection again, and biasing module 10 is connected with negative resistance circuit module 20 1 ends, and negative resistance circuit module 20 resonant circuit modules 30 are connected between two output outp and the outn; Biasing module 10 provides bias current for resonant circuit module 30; Make resonant circuit module 30 be operated in the current limited district; When resonant circuit module 30 is operated in the current limited district; Phase noise and bias current are directly proportional, thereby obtain better phase noise performance through the size of regulating bias current; Negative resistance circuit module 20 is used to compensate the energy loss of resonant circuit module 30; Resonant circuit module 30 produces needed oscillator signal.
As shown in Figure 1, to forming, its output is outp and outn to negative resistance circuit module 20, is used to compensate the energy loss of resonant circuit module 30 by pmos pipe Mp2 and Mp3 cross-couplings; Mp2 and Mp3 are p type mos pipe.
As shown in Figure 1, biasing module 10 comprises biasing circuit 11 and transistor Mp1, and the output of biasing circuit 11 is connected with the grid of Mp1, and biasing circuit 11 provides gate bias voltage for Mp1; Mp1 is that resonant circuit module 30 provides bias current; Biasing circuit 11 is formed by the cascade of two-stage auto bias circuit; Said Mp1 is a p type pmos pipe.
Shown in Figure 2 is the sketch map of biasing circuit 11, and Mp4 and Mp5 constitute the pair of electrical traffic mirroring, and the grid of Mp6 links together as the output of biasing circuit 11 with drain electrode; Resistance R 2 all has a termination power ground with R3, and the R3 other end connects the source electrode of Mn4 and the grid of Mn3 simultaneously; The R2 other end connects the source electrode of Mn2 and the grid of Mn1 simultaneously; The end of the grid connecting resistance R2 of Mn1 and the source electrode of Mn2, drain electrode connects the grid of Mn2, and the grid of Mn3 connects the source electrode of R3 and Mn4, and drain electrode connects the grid of Mn4; Mn2, Mn3 and R2 have constituted a negative feedback, and the current source of automatic biasing is provided for Mp4; Mn3, Mn4 and R3 are the current source that Mp6 provides automatic biasing.
As shown in Figure 1, resonant circuit module 30 is connected in parallel between output node outp and the outn by capacitive part 31 and inductive part 32.
Fig. 3 is the circuit diagram of the capacitive part 31 of resonant circuit module 30; Comprise the digital coarse adjustment circuit 311 that is connected in parallel, digital accurate adjustment circuit 312 and analog tuner circuit 313; Three's a end links together and draws output outp, and an other end links together and draws output outn.Numeral coarse adjustment circuit 311 total m branch roads form side by side; The value that electric capacity weighting value is different; Each branch road comprises two electric capacity and a switch, and the switch series downlink connection is between two electric capacity, and the end that two electric capacity does not connect switch is connected with output outp or outn respectively; Numeral accurate adjustment circuit 312 total n branch roads form side by side; Electric capacity is got identical value; Each branch road comprises two electric capacity and a switch, and the switch series downlink connection is between two electric capacity, and the end that two electric capacity does not connect switch is connected with output outp or outn respectively; Analog tuner circuit 313 is in serial connected by two variable capacitance diodes; Two variable capacitance diodes are not chained together; Two ends are drawn respectively with output outp, outn and are connected; An other end of variable capacitance diode links together as the simulation control end, and each variable capacitance diode is reverse-bias state.
Below in conjunction with accompanying drawing, specify realization of the present invention with a concrete embodiment:
As shown in Figure 1; A kind of improved LC voltage controlled oscillator; Comprise biasing module 10, negative resistance circuit module 20 resonant circuit modules 30, biasing module 10 is connected with negative resistance circuit module 20 1 ends, and negative resistance circuit module 20 resonant circuit modules 30 are connected between two output outp and the outn; Biasing module 10 provides bias current for resonant circuit module 30; Make resonant circuit module 30 be operated in the current limited district; When resonant circuit module 30 is operated in the current limited district; Phase noise and bias current are directly proportional, thereby obtain better phase noise performance through the size of regulating bias current.
As shown in Figure 1, Mp2 and Mp3 constitute cross-couplings to negative resistance is provided, and replenish the energy loss of resonant circuit module 30.Mp2 and Mp3 are the pmos pipe, have low low frequency impulse noise.Cross-couplings realizes that to adopting the pmos pipe will reduce vibration output contact outp and outn quiescent output voltage, this makes variable capacitance diode be operated in the state of negative bias easily, can not cause the problem of forward conduction in addition.The shortcoming that the cross-couplings that is made up of pmos is right is to obtain under the identical negative resistance, relatively the nmos cross-couplings as far as, need bigger breadth length ratio, thereby cause parasitic capacitance bigger, be unfavorable for the selection of inductance value.
As shown in Figure 1, inductance L 1 is that tapped differential inductance and capacitive part have constituted resonant circuit module 30 together with inductance L 2, inductance centre tap ground connection, and the quiescent bias point of the resonance output of resonant circuit module 30 is a zero level.Quiescent bias point is the zero selection that has determined analog tuner electric capacity and digital tuning electric capacity; Analog tuner electric capacity mainly contains two kinds of selections, and the varactor of mos type and the transfiguration of diode-type are under deep submicron process; Because supply voltage reduces; The capacitance voltage curves of mos varactor is very precipitous, means that voltage controlled oscillator is that bigger, the big gain that gains is not suitable for low phase noise design; The capacitance voltage curves linearity of mos varactor is bad in addition, is not suitable for the phase-locked loop structures of fractional frequency division, because these shortcomings of mos electric capacity; The general variable capacitance diode of selecting is as analog tuner electric capacity, and variable capacitance diode has the better linearity degree, but variable capacitance diode has the problem of forward conduction; In order to overcome the forward conduction problem; Need additional use bigger capacitance and biasing circuit, capacitance means that varactor changes in capacitance value reduces, and tuned frequency reduces.
In the present invention, adopted the pmos cross-couplings right, differential inductance centre tap ground connection adopts variable capacitance diode as the analog tuner part, need not extra increase capacitance, and this just can reduce the capacitance of resonant circuit module 30.As shown in Figure 3, digital coarse adjustment circuit 311 and digital accurate adjustment circuit 312 all adopt mim electric capacity to add the implementation of switch, the different value of weighting value of the electric capacity of wherein digital coarse adjustment circuit 311, and the value of the electric capacity of digital accurate adjustment circuit 312 is got identical capacitance.
As shown in Figure 3, the tuning capacity that adopts in digital coarse adjustment circuit 311 among the present invention and the digital accurate adjustment circuit 312 does not advise adopting mos electric capacity, and mos electric capacity realizes that frequency tuning does not have switch control; Just can realize the adjustment of frequency through the switching of high-low level, but the subject matter of mos electric capacity is under deep submicron process, supply voltage descends; In whole supply voltage scope, the capacitance voltage curves steeper, electric capacity has not exceeded the scope of operating voltage with the zone of the variation of voltage; For example, under the 1.2V supply voltage, this zone is greater than ± 1.8V; If under low supply voltage; Adopt mos electric capacity as coarse tuning electric capacity, mean that the frequency of voltage controlled oscillator is very responsive to supply voltage, be very easy to the output that substrate noise is coupled to voltage controlled oscillator.
In this programme; Adopt the purpose of the electric capacity of 312 liang of groups of digital coarse adjustment circuit 311 and digital accurate adjustment circuit digital tuning mainly to be; Because the error of technology, temperature and supply voltage, the precision of digital coarse tuning does not reach designing requirement, does some local adjustment through digital fine tuning; Thereby improve the frequency accuracy of figure adjustment, this helps effectively to quicken the simulation locking process and optimize noiseproof feature.
Numeral coarse adjustment circuit 311 parts are as shown in Figure 4, adopt mim electric capacity to add the implementation of switch, and the effect of switch mainly can be open-minded effectively when opening, and it is as far as possible little to open resistance; When turn-offing, turn-off effectively, the pass resistance break is big as much as possible.Switching tube Mn1 breadth length ratio is enough big, makes that to open resistance very little, and four mos pipes of both sides are very little, make that parasitic capacitance is enough little.Open-minded when switching tube, two nmos of both sides manage Mn2 and Mn3 conducting, and the nmos plumber of both sides does at linear zone; The source electrode of switching tube and the magnitude of voltage of drain electrode are determined values; Be approximately zero, like this, the gate source voltage of switching tube is approximately maximum; Be inversely proportional to gate source voltage because open resistance, the increase of gate source voltage means opens reducing of resistance.And in traditional structure Fig. 6 (b), switch is connected across between two electric capacity, and the source electrode and the drain voltage of switching tube are in float value, makes the gate source voltage of switching tube reduce, thus make switching tube to open resistance ratio bigger, be unfavorable for Design of Low Noise.When switching tube turn-offs; Switching tube may not turn-off effectively; This is because the vibration of vibration node outp and outn is vibrated up and down in zero level, the situation less than no-voltage occurs, in case negative voltage is greater than the threshold value of switching tube; Switch possibly opened, and this situation that switch can not effectively turn-off just occurs.In order to solve the problem that switch can not effectively turn-off; Traditional solution is the circuit structure that adopts among Fig. 6 (c), and this method requires VP voltage very clean, and circuit of extra needs produces VP voltage; This voltage is different from supply voltage, and this voltage needs big electric capacity to carry out filtering.This has increased chip area.At last, floating of VP voltage follows the minimizing of parasitic capacitance that direct relation is arranged, thereby influences resonance frequency.In the present invention, the source electrode of two pmos pipe Mp1 and Mp2 connects power supply, links to each other with the source-drain electrode of switching tube respectively and drain.Characteristics of this structure are that the source electrode of pmos pipe is connected on the power supply, need not extra circuit and produce VP voltage, and need not provides a big filter capacitor for this part circuit separately.The another one characteristics are that base stage and the source electrode of pmos pipe Mp1 and Mp2 connects together; Be connected on the power supply; Make the quiescent bias point of n1 and n2 near power supply, make switching tube all the time at off state, Mp1 and Mp2 have avoided n1 and the floating empty situation of n2 point bias point to take place.The grid source value of Mp1 and Mp2 is in maximum, so the effective opening state of Mp1 and Mp2.Parasitic capacitance in n1 and n2 position is to depend on bias voltage, and bias voltage is high more, and then the parasitic capacitance of these points effectively reduces, thereby, when bias voltage is supply voltage, mean minimum parasitic capacitance.
In order to improve frequency resolution; The present invention has introduced digital fine tuning unit, and is as shown in Figure 5, is subject to technology; Can't obtain littler capacitance generally speaking, and the Circuits System electric capacity that often need disperse obtains to be higher than the frequency resolution of process technology limit than process stipulation.In order effectively to address this problem, Fig. 7 is a kind of traditional solution, and two capacitor C 1 are together in series with C2, the C2 parallel connection switch.When switch turn-offs, electric capacity be C1 and C2 series connection with, when switch conduction, electric capacity is C1, like this changes in capacitance be exactly C1 and C2 series connection with deduct C1, through the reasonable value of adjusting C1 and C2, just can obtain minimum capacity less than process stipulation.A shortcoming of this method is capacitor C 1 and C2 series connection, produces some unforeseen influences.In addition,, then need the difference of C1 and C2 bigger in order to obtain smaller frequency change, this means C1 and C2 with bigger, smaller capacitance variations is to be cost with big capacitance, this will increase chip area.At last, the introducing of switching tube M0 is introduced and is opened resistance, and phase noise is had adverse influence.In order to address this problem, the present invention adopts structure shown in Figure 5, and during low level, capacitor C 1 is open-minded; During high level, capacitor C 2 is turn-offed, capacitor C 1 and capacitor C 2 parallel connections; The value of capacitor C 1 and C2 is different, in this structure, if an electric capacity is C; Another one electric capacity is 1.2C, and the difference of electric capacity is 0.2C, and the summation of electric capacity is 2.2C.Comparatively speaking, structure shown in Figure 7, if an electric capacity is C, an electric capacity is 4*C, the later electric capacity that obtains of series connection has only 0.8*C like this, and is poor through C and 0.8*C are got, and can obtain the specific capacitance of 0.2C.The electric capacity of total needs is 5C, improves the relative traditional structure of structure, and total capacitance has reduced over half.Relative in addition traditional structure, the number of switching tube is reduced to one, when opening resistance and reduces, and helps to improve the resonance factor of resonant circuit, thereby helps phase noise performance.
Fig. 8 is the frequency tuning figure of an instance of the present invention, adopts tmsc 0.13 μ m technology, and resonance frequency is about 5GHz.After adopting the improvement structure; Resonance frequency than the high 8MHz of traditional structure about; This explanation improves structure can reduce parasitic capacitance effectively; It is bigger that the minimizing of parasitic capacitance means that inductance value can obtain, thereby improved frequency tuning capacitor cell is to help better noiseproof feature and wideer frequency tuning range.
The present invention is superior to the phase-locked loop frequency integrator of traditional structure, and the parasitic capacitance when capacitor cell can reduce the switch shutoff because the digital coarse tuning of introducing shakes reduces the complexity of circuit and reduces chip area.
Second advantage of the present invention is that the capacitor cell that is used for digital fine tuning can obtain the frequency resolution less than minimum technique change; And relative traditional structure; Can be under littler total electric capacity; Obtain bigger capacitance variations, the littler resistance of opening helps to improve frequency tuning range and phase noise performance.
Above-mentioned is preferred implementation procedure of the present invention, and common variation and replacement that those skilled in the art carries out on basis of the present invention are included within protection scope of the present invention.
Claims (6)
1. one kind contains the phase-locked loop intergrated circuit that improves the LC voltage controlled oscillator; Comprise phase-locked loop body and the LC voltage controlled oscillator that is contained in it; This voltage controlled oscillator comprises biasing module (10), negative resistance circuit module (20) the resonant circuit module (30) of order series connection again, and an end of said biasing module (10) connects power supply V
Dd, the other end is connected with negative resistance circuit module (20), and negative resistance circuit module (20) resonant circuit module (30) connects between two output outp and outn, and the other end of this resonant circuit module connects power supply ground;
Said biasing module (10) provides bias current for resonant circuit module (30); Make resonant circuit module (30) be operated in the current limited district; When resonant circuit module (30) is operated in the current limited district; Phase noise and bias current are directly proportional, thereby obtain better phase noise performance through the size of regulating bias current;
Said biasing module (10) comprises biasing circuit (11) and transistor Mp1, and the output of biasing circuit (11) and the grid of MP1 are connected, and biasing circuit (11) provides gate bias voltage for Mp1; Said transistor Mp1 is that resonant circuit module (30) provides bias current;
Said biasing circuit (11) is formed by the cascade of two-stage auto bias circuit; Said Mp1 is a p type mos field-effect transistor;
Said negative resistance circuit module (20) is used to compensate the energy loss of resonant circuit module (30);
Said resonant circuit module (30) produces needed frequency of oscillation, and it comprises capacitive part (31) and the inductive part (32) that is connected in parallel between output outp and the outn;
Said capacitive part (31) comprises digital coarse adjustment circuit (311), digital accurate adjustment circuit (312) and the analog tuner circuit (313) that is connected in parallel, and three's a end links together as output outp, and an other end links together as output outn.
2. the phase-locked loop intergrated circuit that improves the LC voltage controlled oscillator that contains as claimed in claim 1 is characterized in that:
To forming, its output is outp and outn to said negative resistance circuit module (20), is used to compensate the energy loss of resonant circuit module (30) by pmos pipe Mp2 and Mp3 cross-couplings;
Said Mp2 and Mp3 are p type mos field-effect transistor.
3. the phase-locked loop intergrated circuit that improves the LC voltage controlled oscillator that contains as claimed in claim 1 is characterized in that:
In the said biasing circuit (11), Mp4 and Mp5 constitute the pair of electrical traffic mirroring, and the grid of Mp6 and drain electrode link together as the output of biasing circuit (11);
Resistance R 2 all has an end ground connection with R3, and the R3 other end connects the source end of Mn4 and the grid end of Mn3 simultaneously; The R2 other end connects the source end of Mn2 and the grid end of Mn1 simultaneously; The drain electrode of Mn1 connects the grid of Mn2, and the grid of Mn3 connects the source electrode of R3 and Mn4, and drain electrode connects the grid of Mn4;
Mn2, Mn1 and R2 have constituted a negative feedback, and the current source of automatic biasing is provided for Mp4; Mn3, Mn4 and R3 are the current source that Mp6 provides automatic biasing.
4. the phase-locked loop intergrated circuit that improves the LC voltage controlled oscillator that contains as claimed in claim 1 is characterized in that:
Said digital coarse adjustment circuit (311) comprises m bar branch road arranged side by side; The different value of electric capacity weighting value of m bar branch road arranged side by side; Every branch road comprises two electric capacity and a switch; The switch series downlink connection is between two electric capacity, and the end that two electric capacity does not connect switch is connected with output outp or outn respectively.
5. the phase-locked loop intergrated circuit that improves the LC voltage controlled oscillator that contains as claimed in claim 1 is characterized in that:
Said digital accurate adjustment circuit (312) comprises n bar branch road arranged side by side; The electric capacity of n bar branch road arranged side by side is got identical value; Every branch road comprises two electric capacity and a switch, and the switch series downlink connection is between two electric capacity, and the end that two electric capacity does not connect switch is connected with output outp or outn respectively.
6. the phase-locked loop intergrated circuit that improves the LC voltage controlled oscillator that contains as claimed in claim 1 is characterized in that:
Analog tuner circuit (313) is formed by connecting two variable capacitance diodes back-to-back; The end that this two variable capacitance diode does not link together is connected with output outp or outn respectively; The end that two variable capacitance diodes interconnect is as the simulation control end, and two variable capacitance diodes all are reverse-bias state.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009102389691A CN101826872B (en) | 2009-12-31 | 2009-12-31 | Phaselocked loop integrated circuit comprising modified LC voltage-controlled oscillator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009102389691A CN101826872B (en) | 2009-12-31 | 2009-12-31 | Phaselocked loop integrated circuit comprising modified LC voltage-controlled oscillator |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101826872A CN101826872A (en) | 2010-09-08 |
CN101826872B true CN101826872B (en) | 2012-05-23 |
Family
ID=42690610
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009102389691A Active CN101826872B (en) | 2009-12-31 | 2009-12-31 | Phaselocked loop integrated circuit comprising modified LC voltage-controlled oscillator |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN101826872B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105611193A (en) * | 2014-11-13 | 2016-05-25 | 三星电子株式会社 | Depth sensing method, 3D image generation method, 3D image sensor, and apparatus including the same |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102570976A (en) * | 2011-12-20 | 2012-07-11 | 华中科技大学 | Memristor-based Van der pol oscillator circuit |
US9368975B2 (en) * | 2012-11-30 | 2016-06-14 | Qualcomm Incorporated | High power RF field effect transistor switching using DC biases |
CN103401554B (en) * | 2013-07-30 | 2016-02-10 | 江苏物联网研究发展中心 | A kind of broadband LC oscillator being applied to GNSS receiver |
US10056911B2 (en) * | 2015-12-21 | 2018-08-21 | Texas Instruments Incorporated | Continuous coarse-tuned phase locked loop |
CN108631758A (en) * | 2017-03-17 | 2018-10-09 | 中芯国际集成电路制造(上海)有限公司 | Switched-capacitor circuit, radio-frequency devices and the method for forming switched-capacitor circuit |
CN108259036B (en) * | 2018-01-09 | 2021-09-28 | 上海顺久电子科技有限公司 | VCO, frequency calibration method thereof, electronic device, and computer storage medium |
CN108683271B (en) * | 2018-06-08 | 2024-04-19 | 深圳市爱克信智能股份有限公司 | Wireless charging system |
CN109888446B (en) * | 2019-04-10 | 2024-05-21 | 曾运华 | Loss compensation type electrically-tunable active resonator and loss compensation method thereof |
CN112467991A (en) * | 2020-11-19 | 2021-03-09 | 中国科学技术大学 | Isolated power supply with adaptive gate voltage control circuit |
CN114448426B (en) * | 2022-01-28 | 2022-11-29 | 上海先楫半导体科技有限公司 | Direct current bias circuit and chip of crystal oscillator |
CN116112034A (en) * | 2023-02-17 | 2023-05-12 | 澳门大学 | Transmitting-receiving chip and radio frequency tag |
-
2009
- 2009-12-31 CN CN2009102389691A patent/CN101826872B/en active Active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105611193A (en) * | 2014-11-13 | 2016-05-25 | 三星电子株式会社 | Depth sensing method, 3D image generation method, 3D image sensor, and apparatus including the same |
Also Published As
Publication number | Publication date |
---|---|
CN101826872A (en) | 2010-09-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101826872B (en) | Phaselocked loop integrated circuit comprising modified LC voltage-controlled oscillator | |
CN100514840C (en) | Symmetrical Linear Voltage Controlled Oscillator | |
CN1964183B (en) | Oscillator and information device using same, voltage control oscillator and information equipment using the voltage control oscillator | |
US6870432B2 (en) | Unilateral coupling for a quadrature voltage controlled oscillator | |
US7061339B2 (en) | Enhanced architectures of voltage-controlled oscillators with single inductor (VCO-1L) | |
CN103187927B (en) | Dual-mode broadband voltage-controlled oscillator | |
US8044732B2 (en) | Continuously tunable inductor and method to continuously tune an inductor | |
CN101944880B (en) | VCO tuning curve compensation method and module thereof | |
CN103166573B (en) | Voltage controlled oscillator | |
CN106549636B (en) | A kind of numerical control LC voltage controlled oscillator with amplitude detection | |
CN102545783B (en) | LC voltage-controlled oscillator (LC-VCO) with wide frequency tuning range | |
CN102904527B (en) | The LC oscillator that a kind of voltage transitions frequency linearity compensates | |
CN104821825A (en) | Wide tuning range ring voltage-controlled oscillator | |
CN106788408A (en) | A kind of constant LC VCO of wide-voltage range tuning gain | |
CN1671051B (en) | Low Phase Noise Switched Capacitor Circuits and Related Methods for Suppressing Clock Feedthrough Effect | |
CN100578913C (en) | Variable capacitor used in voltage-controlled oscillator | |
CN112953464B (en) | A low-power, high-bandwidth, high-resolution, and low-phase-noise digitally controlled oscillator | |
US11139778B1 (en) | Apparatus, circuits and methods for clock generation | |
US11239795B2 (en) | Fully integrated oscillator for ultra low voltage applications with quadrupled voltage and low phase noise | |
CN100422898C (en) | Circuit arrangement for generating reference current and oscillator circuit with such circuit arrangement | |
Gagliolo et al. | Phase noise performances of a cross-coupled CMOS VCO with resistor tail biasing | |
CN105071773A (en) | Wake-flow feedback widely-tunable voltage-controlled oscillator | |
US9722536B2 (en) | Digital controlled oscillator and switchable varactor for high frequency low noise operation | |
JP2008118550A (en) | Voltage controlled oscillator | |
CN214480518U (en) | Low-power-consumption large-bandwidth high-resolution low-phase noise digital controlled oscillator |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |