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CN101800516A - Output buffer and its source driver - Google Patents

Output buffer and its source driver Download PDF

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CN101800516A
CN101800516A CN200910007088A CN200910007088A CN101800516A CN 101800516 A CN101800516 A CN 101800516A CN 200910007088 A CN200910007088 A CN 200910007088A CN 200910007088 A CN200910007088 A CN 200910007088A CN 101800516 A CN101800516 A CN 101800516A
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voltage signal
signal
operational amplifier
power
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黄立群
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Novatek Microelectronics Corp
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Abstract

The invention relates to an output buffer and a source driver using the same. The operational amplifier provides an output voltage signal according to the input voltage signal. The control circuit judges whether a reference signal corresponding to the input voltage signal meets a power saving condition, if so, the control circuit triggers a power saving operation event, and if not, the control circuit triggers a normal operation event. The power circuit provides a power-saving power signal to drive the operational amplifier in response to a power-saving operation event, and provides a normal power signal to drive the operational amplifier in response to a normal operation event, so that the operational amplifier provides an output voltage signal according to the input voltage signal, and the power of the normal power signal is higher than that of the power-saving power signal.

Description

输出缓冲器及应用其的源极驱动器 Output buffer and its source driver

技术领域technical field

本发明有关一种输出缓冲器,且特别是有关一种可选择性调整其操作功率耗损的输出缓冲器。The present invention relates to an output buffer, and more particularly to an output buffer whose operating power consumption can be selectively adjusted.

背景技术Background technique

一般来说,输出缓冲器被应用为输出级电路,用来提升输出电压信号的驱动能力,以有效地推动其后的负载。举例来说,在现今的液晶显示器的源极驱动器中,一般也会建置多个输出缓冲器,以用来提升欲输出的像素电压信号的驱动能力,以推动液晶显示面板的像素。Generally speaking, the output buffer is applied as an output stage circuit, which is used to enhance the driving capability of the output voltage signal to effectively drive the subsequent load. For example, in current source drivers of liquid crystal displays, a plurality of output buffers are generally built to enhance the driving capability of the pixel voltage signal to be output, so as to drive the pixels of the liquid crystal display panel.

然而,由于输出缓冲器必须要提升输出电压信号的驱动能力,因此,一般会提供高功率的电源信号至输出缓冲器,以使输出缓冲器具有充足的驱动能力。However, since the output buffer must increase the driving capability of the output voltage signal, generally, a high-power power signal is provided to the output buffer so that the output buffer has sufficient driving capability.

然而在一些操作情形中,输出缓冲器被用来输出电平较低的输出电压信号或驱动负载较轻的负载电路。在这些例子中,驱动输出缓冲器的电源信号中大部分的能量是被消耗于输出缓冲器本身,而仅有少部分的能量被用以提升输出电压信号的驱动能力。如此,将使得传统输出缓冲器具有耗电量高及电能使用效率低的缺点。In some operating situations, however, the output buffer is used to output a lower level output voltage signal or to drive a lighter load circuit. In these examples, most of the energy in the power signal driving the output buffer is consumed in the output buffer itself, and only a small part of the energy is used to enhance the driving capability of the output voltage signal. In this way, the traditional output buffer has the disadvantages of high power consumption and low power utilization efficiency.

发明内容Contents of the invention

本发明的目的是提供一种输出缓冲器及应用其的源极驱动器,其根据对应至输入电压信号的参考信号来弹性地选择能量较高的电源信号或能量较低的电源信号,以将其输入至输出缓冲器,使输出缓冲器能够更省电地根据输入电压信号产生输出电压信号。如此,相较于传统输出缓冲器,本发明相关的输出缓冲器具有耗电量较低及电能使用效率较高的优点。The object of the present invention is to provide an output buffer and a source driver using the same, which can flexibly select a power signal with higher energy or a power signal with lower energy according to a reference signal corresponding to an input voltage signal, so as to input to the output buffer, so that the output buffer can generate an output voltage signal based on the input voltage signal with more power saving. Thus, compared with the conventional output buffer, the output buffer of the present invention has the advantages of lower power consumption and higher power usage efficiency.

根据本发明的一方面,提出一种输出缓冲器,用以提供输出电压信号,输出缓冲器包括运算放大器、控制电路及电源电路。运算放大器用以根据输入电压信号提供输出电压信号。控制电路判断与输入电压信号对应的参考信号是否满足省电条件,当参考信号满足省电条件时,控制电路触发省电操作事件;当参考信号不满足省电条件时,控制电路触发正常操作事件。电源电路响应于省电操作事件提供省电电源信号驱动运算放大器,使运算放大器根据输入电压信号提供输出电压信号,电源电路还响应于正常操作事件提供正常电源信号驱动运算放大器,使运算放大器根据输入电压信号提供输出电压信号,正常电源信号的功率是高于省电电源信号的功率。According to one aspect of the present invention, an output buffer is provided for providing an output voltage signal, and the output buffer includes an operational amplifier, a control circuit and a power circuit. The operational amplifier is used for providing an output voltage signal according to the input voltage signal. The control circuit judges whether the reference signal corresponding to the input voltage signal meets the power-saving condition. When the reference signal meets the power-saving condition, the control circuit triggers a power-saving operation event; when the reference signal does not meet the power-saving condition, the control circuit triggers a normal operation event. . The power circuit provides a power saving power signal to drive the operational amplifier in response to a power saving operation event, causing the operational amplifier to provide an output voltage signal based on the input voltage signal, and the power circuit also provides a normal power signal to drive the operational amplifier in response to a normal operating event, causing the operational amplifier to respond to the input voltage signal. The voltage signal provides an output voltage signal, and the power of the normal power signal is higher than that of the power-saving power signal.

根据本发明的另一方面,提出一种输出缓冲器,用以提供输出电压信号,输出缓冲器包括运算放大器、控制电路、第一及第二电源电路。运算放大器用以根据输入电压信号提供输出电压信号。控制电路判断与输入电压信号对应的参考信号是否满足省电条件,当参考信号满足省电条件时,控制电路提供第一控制信号;当参考信号不满足省电条件时,控制电路提供第二控制信号。第一电源电路受控于第一控制信号导通,以提供第一电压信号驱动运算放大器,使运算放大器具根据输入电压信号提供输出电压信号。第二电源电路受控于第二控制信号导通,以提供第二电压信号驱动运算放大器,使运算放大器根据输入电压信号提供输出电压信号。其中第二电压信号的电平是高于第一电压信号。According to another aspect of the present invention, an output buffer is provided for providing an output voltage signal, and the output buffer includes an operational amplifier, a control circuit, a first power supply circuit and a second power supply circuit. The operational amplifier is used for providing an output voltage signal according to the input voltage signal. The control circuit judges whether the reference signal corresponding to the input voltage signal meets the power-saving condition, and when the reference signal meets the power-saving condition, the control circuit provides the first control signal; when the reference signal does not meet the power-saving condition, the control circuit provides the second control Signal. The first power circuit is turned on under the control of the first control signal to provide the first voltage signal to drive the operational amplifier, so that the operational amplifier provides an output voltage signal according to the input voltage signal. The second power supply circuit is controlled by the second control signal to be turned on to provide a second voltage signal to drive the operational amplifier, so that the operational amplifier provides an output voltage signal according to the input voltage signal. Wherein the level of the second voltage signal is higher than that of the first voltage signal.

根据本发明的再一方面,提出一种输出缓冲器,用以在操作期间中提供输出电压信号,输出缓冲器包括运算放大器、控制电路及电源电路。运算放大器用以根据输入电压信号提供输出电压信号。控制电路响应于第一及第二相位控制信号将操作期间分为第一及第二子期间,控制电路还判断与输入电压信号对应的参考信号是否满足省电条件。当参考信号满足省电条件时,控制电路于第一及第二子期间分别输出第一及第二控制信号。电源电路响应于第一及第二控制信号分别于第一子期间及第二子期间中提供第一电压信号及第二电压信号驱动运算放大器,使运算放大器具根据输入电压信号提供输出电压信号。According to yet another aspect of the present invention, an output buffer is provided for providing an output voltage signal during operation, and the output buffer includes an operational amplifier, a control circuit and a power circuit. The operational amplifier is used for providing an output voltage signal according to the input voltage signal. The control circuit divides the operation period into first and second sub-periods in response to the first and second phase control signals, and the control circuit also determines whether the reference signal corresponding to the input voltage signal meets the power saving condition. When the reference signal satisfies the power-saving condition, the control circuit outputs a first control signal and a second control signal in the first sub-period and the second sub-period respectively. The power supply circuit responds to the first and second control signals to provide the first voltage signal and the second voltage signal to drive the operational amplifier in the first sub-period and the second sub-period respectively, so that the operational amplifier can provide an output voltage signal according to the input voltage signal.

根据本发明的再一方面,提出一种源极驱动器(Source Driver),用以提供多笔像素电压信号驱动液晶显示面板,源极驱动器包括线性缓冲器、数字模拟(Digital ToAnalog,D/A)转换器及多个输出缓冲器。线性缓冲器包括多个线性缓冲单元,分别用以储存多笔输入像素数据。数字模拟转换器包括多个D/A转换单元,分别与多个线性缓冲单元对应,以分别转换所述输入像素数据以得到多笔模拟电压信号。各所述输出缓冲器包括运算放大器、控制电路及电源电路。运算放大器用以根据各多个模拟电压信号提供各多个像素电压信号。控制电路判断与各多个模拟电压信号对应的参考信号是否满足省电条件。当参考信号满足省电条件时,控制电路触发省电操作事件,当参考信号不满足省电条件时,控制电路触发正常操作事件。电源电路响应于省电操作事件提供省电电源信号驱动运算放大器,使运算放大器根据各多个模拟电压信号提供各多个像素电压信号,电源电路还响应于正常操作事件提供正常电源信号驱动运算放大器,使运算放大器根据各多个模拟电压信号提供各多个像素电压信号,正常电源信号的功率高于省电电源信号的功率。According to another aspect of the present invention, a source driver (Source Driver) is proposed to provide multiple pixel voltage signals to drive the liquid crystal display panel. The source driver includes a linear buffer, a digital analog (Digital To Analog, D/A) converter and multiple output buffers. The linear buffer includes a plurality of linear buffer units for storing multiple pieces of input pixel data respectively. The digital-to-analog converter includes a plurality of D/A conversion units, respectively corresponding to a plurality of linear buffer units, to respectively convert the input pixel data to obtain a plurality of analog voltage signals. Each of the output buffers includes an operational amplifier, a control circuit and a power supply circuit. The operational amplifier is used for providing each plurality of pixel voltage signals according to each plurality of analog voltage signals. The control circuit judges whether the reference signals corresponding to the plurality of analog voltage signals satisfy the power saving condition. When the reference signal meets the power saving condition, the control circuit triggers a power saving operation event, and when the reference signal does not meet the power saving condition, the control circuit triggers a normal operation event. The power circuit provides a power saving power signal to drive the operational amplifier in response to the power saving operation event, causing the operational amplifier to provide each of the plurality of pixel voltage signals in response to the respective plurality of analog voltage signals, and the power circuit also provides the normal power signal to drive the operational amplifier in response to the normal operation event. , so that the operational amplifier provides a plurality of pixel voltage signals according to the plurality of analog voltage signals, and the power of the normal power signal is higher than the power of the power-saving power signal.

根据本发明的再一方面,提出一种源极驱动器,用以提供n笔像素电压信号驱动液晶显示面板,n为大于1的自然数。源极驱动器包括线性缓冲器、数字模拟转换器及m个输出缓冲器,m为大于1的自然数。线性缓冲器包括n个线性缓冲单元,分别用以储存n笔输入像素数据。各该m个输出缓冲器分别用以提供与m个灰阶值对应的m笔灰阶像素电压信号,各m个输出缓冲器包括运算放大器、控制电路及电源电路。运算放大器用以根据对应的一笔模拟电压信号提供各m个灰阶像素电压信号。控制电路判断与各多个输入电压信号对应的参考信号是否满足省电条件。当参考信号满足省电条件时,控制电路触发省电操作事件,当参考信号不满足省电条件时,控制电路触发正常操作事件。电源电路响应于省电操作事件提供省电电源信号驱动运算放大器,使运算放大器根据各输入电压信号提供各n个灰阶像素电压信号,电源电路还响应于正常操作事件提供正常电源信号驱动运算放大器,使运算放大器根据各输入电压信号提供各n个灰阶像素电压信号,正常电源信号的功率高于省电电源信号的功率。数字模拟转换器包括n个数字模拟转换单元,分别响应于n笔输入像素数据选择m笔灰阶像素电压信号其中之一作为n笔像素电压信号输出。According to yet another aspect of the present invention, a source driver is provided for providing n pixel voltage signals to drive a liquid crystal display panel, where n is a natural number greater than 1. The source driver includes a linear buffer, a digital-to-analog converter and m output buffers, where m is a natural number greater than 1. The linear buffer includes n linear buffer units for storing n pieces of input pixel data respectively. Each of the m output buffers is used to provide m gray-scale pixel voltage signals corresponding to m gray-scale values, and each of the m output buffers includes an operational amplifier, a control circuit and a power supply circuit. The operational amplifier is used for providing m grayscale pixel voltage signals according to a corresponding analog voltage signal. The control circuit judges whether the reference signals corresponding to the plurality of input voltage signals satisfy the power saving condition. When the reference signal meets the power saving condition, the control circuit triggers a power saving operation event, and when the reference signal does not meet the power saving condition, the control circuit triggers a normal operation event. The power supply circuit provides a power-saving power supply signal to drive the operational amplifier in response to the power-saving operation event, so that the operational amplifier provides each n gray-scale pixel voltage signals according to each input voltage signal, and the power supply circuit also provides a normal power supply signal to drive the operational amplifier in response to a normal operation event. , so that the operational amplifier provides n gray-scale pixel voltage signals according to each input voltage signal, and the power of the normal power supply signal is higher than the power of the power-saving power supply signal. The digital-to-analog converter includes n digital-to-analog conversion units, each of which responds to n pieces of input pixel data and selects one of m pieces of grayscale pixel voltage signals as n pieces of pixel voltage signals to output.

附图说明Description of drawings

为让本发明的上述内容能更明显易懂,下面将配合附图对本发明的较佳实施例作详细说明,其中:In order to make the above content of the present invention more obvious and understandable, the preferred embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings, wherein:

图1绘示本发明第一实施例的输出缓冲器的方块图。FIG. 1 is a block diagram of an output buffer according to a first embodiment of the present invention.

图2绘示本实施例的输出缓冲器中的数字模拟转换器的示意图。FIG. 2 is a schematic diagram of the digital-to-analog converter in the output buffer of the present embodiment.

图3绘示本实施例的输出缓冲器的详细方块图。FIG. 3 is a detailed block diagram of the output buffer of this embodiment.

图4绘示输入电压信号Svi与参考信号Srf的关系曲线图。FIG. 4 is a graph showing the relationship between the input voltage signal Svi and the reference signal Srf.

图5绘示本发明第一实施例的输出缓冲器的另一方块图。FIG. 5 is another block diagram of the output buffer according to the first embodiment of the present invention.

图6绘示依照本发明第二实施例的输出缓冲器的方块图。FIG. 6 is a block diagram of an output buffer according to a second embodiment of the present invention.

图7绘示操作期间TP、子期间TP_s1与TP_s2的示意图。FIG. 7 shows a schematic diagram of the operation period TP, the sub-periods TP_s1 and TP_s2.

图8绘示应用本发明实施例的输出缓冲器的源极驱动器的方块图。FIG. 8 is a block diagram of a source driver applying an output buffer according to an embodiment of the present invention.

图9绘示应用本发明实施例的输出缓冲器的源极驱动器的另一方块图。FIG. 9 is another block diagram of a source driver applying an output buffer according to an embodiment of the present invention.

具体实施方式Detailed ways

本实施例的输出缓冲器根据对应至其输入电压信号的参考信号来选择性地以能量强度较低的电源信号驱动输出缓冲器执行输出电压信号的操作。According to the reference signal corresponding to the input voltage signal, the output buffer of this embodiment selectively drives the output buffer with a power signal with lower energy intensity to perform an operation of outputting the voltage signal.

第一实施例first embodiment

本实施例输出缓冲器用以根据对应至输入电压信号的参考信号来选择性地以省电电源信号及正常电源信号其中之一作为输出缓冲器的电源信号。请参照图1,其绘示本发明第一实施例的输出缓冲器的方块图。输出缓冲器1根据输入电压信号Svi提供输出电压信号Svo来驱动负载电路(未绘示)。输出缓冲器1包括运算放大器(Operational Amplifier)OP、控制电路CT及电源电路PC。运算放大器OP用以接收输入电压信号Svi,并对应地提供输出电压信号Svo。In this embodiment, the output buffer is used to selectively use one of the power-saving power signal and the normal power signal as the power signal of the output buffer according to the reference signal corresponding to the input voltage signal. Please refer to FIG. 1 , which shows a block diagram of an output buffer according to a first embodiment of the present invention. The output buffer 1 provides an output voltage signal Svo to drive a load circuit (not shown) according to the input voltage signal Svi. The output buffer 1 includes an operational amplifier (Operational Amplifier) OP, a control circuit CT and a power circuit PC. The operational amplifier OP is used for receiving the input voltage signal Svi and correspondingly providing the output voltage signal Svo.

控制电路CT判断与输入电压信号Svi对应的参考信号Srf是否满足省电条件。举例来说,参考信号Srf可为对应输入电压信号Svi的数字电压数据,在一个例子中,参考信号Srf为一笔6位(Bit)的数字电压信号,而输入电压信号Svi是由数字模拟(Digital to Analog,D/A)转换器DAC转换参考信号Srf而得到,如图2所示。The control circuit CT judges whether the reference signal Srf corresponding to the input voltage signal Svi satisfies the power saving condition. For example, the reference signal Srf can be digital voltage data corresponding to the input voltage signal Svi. In one example, the reference signal Srf is a 6-bit (Bit) digital voltage signal, and the input voltage signal Svi is composed of a digital analog ( Digital to Analog, D/A) converter DAC converts the reference signal Srf to obtain, as shown in Figure 2.

控制电路CT用以于参考信号Srf对应的数据值小于参考信号临界值时判断参考信号Srf满足省电条件,并于参考信号Srf对应的数据值大于或等于此参考信号临界值时判断参考信号不满足省电条件。The control circuit CT is used for judging that the reference signal Srf satisfies the power saving condition when the data value corresponding to the reference signal Srf is smaller than the threshold value of the reference signal, and judging that the reference signal is not Meet the power saving conditions.

当参考信号Srf满足省电条件时,由于此时运算放大器OP无须较大的电源电压供应,因此,控制电路CT便触发省电操作事件Evs,以使电源电路PC响应于省电操作事件Evs提供省电电源信号Sps来驱动运算放大器OP,进而使运算放大器OP根据输入电压信号Svi提供输出电压信号Svo驱动负载电路。When the reference signal Srf satisfies the power-saving condition, since the operational amplifier OP does not need a large power supply voltage supply at this time, the control circuit CT triggers the power-saving operation event Evs, so that the power supply circuit PC responds to the power-saving operation event Evs to provide The power-saving power signal Sps drives the operational amplifier OP, so that the operational amplifier OP provides an output voltage signal Svo according to the input voltage signal Svi to drive the load circuit.

当参考信号Srf不满足省电条件时,控制电路CT触发正常操作事件Evn,使电源电路PC响应于正常操作事件Evn提供正常电源信号Spn驱动运算放大器OP,进而使运算放大器OP根据输入电压信号Svi提供输出电压信号Svo驱动负载电路。其中正常电源信号Spn对应的功率高于省电电源信号Sps对应的功率。When the reference signal Srf does not satisfy the power-saving condition, the control circuit CT triggers the normal operation event Evn, so that the power supply circuit PC responds to the normal operation event Evn to provide a normal power supply signal Spn to drive the operational amplifier OP, and then the operational amplifier OP is driven according to the input voltage signal Svi Provide the output voltage signal Svo to drive the load circuit. The power corresponding to the normal power signal Spn is higher than the power corresponding to the power-saving power signal Sps.

在一个例子中,本实施例的输出缓冲器的详细方块图如图3绘示。控制电路CT1包括反相器Inv,其用以接收参考信号Srf的最高位位(Most Significant Bit,MSB)MSB[Srf],而参考信号临界值为32(即是(100000)2)。当MSB MSB[Srf]为数值0时,表示参考信号Srf的信号值小于数值32(即是参考信号临界值),此时控制电路CT1提供致能的控制信号Sc1以触发省电操作事件Evs。当MSB MSB[Srf]为数值1时,表示参考信号Srf的信号值大于或等于数值32(即是参考信号临界值),此时控制电路CT1提供致能的控制信号Sc2以触发正常操作事件Evn。In an example, a detailed block diagram of the output buffer of this embodiment is shown in FIG. 3 . The control circuit CT1 includes an inverter Inv for receiving the most significant bit (Most Significant Bit, MSB) MSB[Srf] of the reference signal Srf, and the threshold value of the reference signal is 32 (ie (100000) 2 ). When the value of MSB MSB[Srf] is 0, it means that the signal value of the reference signal Srf is less than the value 32 (that is, the threshold value of the reference signal). At this time, the control circuit CT1 provides the enabled control signal Sc1 to trigger the power saving operation event Evs. When the MSB MSB[Srf] is 1, it means that the signal value of the reference signal Srf is greater than or equal to the value 32 (that is, the critical value of the reference signal), and at this time the control circuit CT1 provides the enabled control signal Sc2 to trigger the normal operation event Evn .

电源电路PC1包括电源开关SW1及SW2,其一端分别接收省电电源信号Sps及正常电源信号Spn,另一端耦接至运算放大器OP1。当省电操作事件Evs被触发时,电源开关SW1受控于致能的控制信号Sc1导通,以提供省电电源信号Sps至运算放大器OP1,而电源开关SW1受控于消能的控制信号Sc2而形成断路,如此运算放大器OP1便可接收具有较低功率的电源信号Sps,以根据输入电压信号Svi,输出具有较大驱动力的输出电压信号Svo至下级的负载电路。The power circuit PC1 includes power switches SW1 and SW2, one end of which respectively receives the power-saving power signal Sps and the normal power signal Spn, and the other end is coupled to the operational amplifier OP1. When the power saving operation event Evs is triggered, the power switch SW1 is controlled by the enabling control signal Sc1 to provide the power saving power signal Sps to the operational amplifier OP1, and the power switch SW1 is controlled by the energy dissipating control signal Sc2 An open circuit is formed, so that the operational amplifier OP1 can receive the power signal Sps with lower power to output the output voltage signal Svo with higher driving force to the lower load circuit according to the input voltage signal Svi.

另一方面,当正常操作事件Evn被触发时,电源开关SW2受控于致能的控制信号Sc2导通,以提供正常电源信号Spn至运算放大器OP1,而电源开关SW2受控于消能的控制信号Sc1而形成断路,如此运算放大器OP1便可接收具有较高功率的电源信号Spn,以根据输入电压信号Svi,输出具有较大驱动力的输出电压信号Svo至下级的负载电路。On the other hand, when the normal operation event Evn is triggered, the power switch SW2 is controlled by the enable control signal Sc2 to conduct to provide the normal power signal Spn to the operational amplifier OP1, and the power switch SW2 is controlled by the energy dissipating control The signal Sc1 forms an open circuit, so that the operational amplifier OP1 can receive the power supply signal Spn with higher power, and output the output voltage signal Svo with greater driving force to the lower load circuit according to the input voltage signal Svi.

举例来说,参考信号Srf与输入电压信号Svi为线性对应关系,如图4所示。在一个例子中,当参考信号Srf对应的信号值大于或等于32时,电源电路PC1提供具有电压电平6伏特(Volt,V)的正常电源信号Spn来驱动输出缓冲器OP1。当参考信号Srf对应的信号值小于32时,电源电路PC1提供具有电压电平3V的省电电源信号Sps来驱动输出缓冲器OP1。For example, the reference signal Srf has a linear correspondence relationship with the input voltage signal Svi, as shown in FIG. 4 . In one example, when the signal value corresponding to the reference signal Srf is greater than or equal to 32, the power circuit PC1 provides the normal power signal Spn with a voltage level of 6 volts (Volt, V) to drive the output buffer OP1. When the signal value corresponding to the reference signal Srf is less than 32, the power circuit PC1 provides the power-saving power signal Sps with a voltage level of 3V to drive the output buffer OP1.

在本实施例中,虽仅以控制电路CT根据参考信号Srf判断其是否满足一个省电条件,并据以触发两种不同的操作事件(省电操作事件Evs及正常操作事件Evn)的情形为例做说明,然而,本实施例的控制电路CT并不局限于此。在其它例子中,控制电路亦可根据参考信号Srf来判断其是否满足两个或两个以上的判断条件,并据以触发三种或三种的操作事件。而本实施例的电源电路亦可响应于控制电路触发的三种或三种以上的操作事件来对应地驱动电源电路提供三个或三个以上对应至不同能量强度的能量信号至运算放大器,如此的相对应变化,亦属本发明的范畴。In this embodiment, although the control circuit CT judges whether it satisfies a power-saving condition according to the reference signal Srf, and triggers two different operation events (power-saving operation event Evs and normal operation event Evn) accordingly, the situation is as follows However, the control circuit CT of this embodiment is not limited to this. In other examples, the control circuit can also judge whether two or more judging conditions are satisfied according to the reference signal Srf, and trigger three or three kinds of operation events accordingly. The power supply circuit of this embodiment can also respond to three or more operation events triggered by the control circuit to correspondingly drive the power supply circuit to provide three or more energy signals corresponding to different energy intensities to the operational amplifier, so The corresponding changes also belong to the scope of the present invention.

在本实施例中,虽仅以反相器Inv作为实施控制电路CT1的手段,以根据参考信号Srf的MSB MSB[Srf]来触发省电操作事件Evs及正常操作事件Evn的情形,然而,本实施例的控制电路CT1并不局限于此。在其它例子中,控制电路可包括可编程逻辑电路,其响应于输入程序代码来执行其它逻辑操作以参考信号Srf触发省电操作事件Evs及正常操作事件Evn。In this embodiment, although only the inverter Inv is used as a means to implement the control circuit CT1, the power-saving operation event Evs and the normal operation event Evn are triggered according to the MSB MSB[Srf] of the reference signal Srf, however, this embodiment The control circuit CT1 of the embodiment is not limited thereto. In other examples, the control circuit may include a programmable logic circuit, which executes other logic operations in response to the input program code to trigger the power-saving operation event Evs and the normal operation event Evn with reference to the signal Srf.

在本实施例中,本发明是利用参考信号Srf作为触发省电操作事件Evs与正常操作事件Evn的基准,然而,本发明并不局限于此,在其它实施例中,本发明亦可利用其它相关于输入电压信号Svi的信号,譬如对应输入电压信号Svi的模拟电压信号。In this embodiment, the present invention uses the reference signal Srf as the reference for triggering the power-saving operation event Evs and the normal operation event Evn, however, the present invention is not limited thereto, and in other embodiments, the present invention can also use other A signal related to the input voltage signal Svi, such as an analog voltage signal corresponding to the input voltage signal Svi.

举例来说,本发明可直接利用输入电压信号Svi,来作为前述的参考信号Srf,亦即,控制电路CT2直接根据输入电压信号Svi来触发省电操作事件Evs与正常操作事件Evn,如图5所示。控制电路CT2例如包括比较器,其用以通过模拟电压比较操作判断参考信号(即是输入电压信号Svi)的电平是否高于临界电压信号Svt的电平。当参考信号的电平低于临界电压信号Svt的电平时,控制电路CT2判断参考信号满足省电条件以触发省电操作事件Evs,以使电源电路PC2提供较低功率的电源Sps至运算放大器OP;当参考信号的电平大于或等于临界电压信号Svt的电平时,控制电路CT2判断参考信号不满足省电条件以触发正常操作事件Evn,以使电源电路PC2提供功率较高的电源Spn至运算放大器OP。For example, the present invention can directly use the input voltage signal Svi as the aforementioned reference signal Srf, that is, the control circuit CT2 directly triggers the power-saving operation event Evs and the normal operation event Evn according to the input voltage signal Svi, as shown in FIG. 5 shown. The control circuit CT2 includes, for example, a comparator, which is used to determine whether the level of the reference signal (that is, the input voltage signal Svi) is higher than the level of the threshold voltage signal Svt through an analog voltage comparison operation. When the level of the reference signal is lower than the level of the critical voltage signal Svt, the control circuit CT2 judges that the reference signal meets the power saving condition to trigger the power saving operation event Evs, so that the power circuit PC2 provides a lower power power Sps to the operational amplifier OP ; When the level of the reference signal is greater than or equal to the level of the critical voltage signal Svt, the control circuit CT2 judges that the reference signal does not meet the power saving condition to trigger the normal operation event Evn, so that the power supply circuit PC2 provides a higher power supply Spn to the operation Amplifier OP.

在本实施例中虽仅以参考信号Srf与输入电压信号Svi具有线性对应关系的情形为例做说明,然而,本实施例的参考信号Srf与输入电压信号Svi并不局限于此。在其它例子中,参考信号Srf与输入电压信号Svi亦可通过其它数学关系彼此相关,或由电路设计者应其需要自行予以制定,如此的相对应变化,亦属本发明的范畴。In this embodiment, only the case where the reference signal Srf and the input voltage signal Svi have a linear correspondence relationship is taken as an example for illustration, however, the reference signal Srf and the input voltage signal Svi in this embodiment are not limited thereto. In other examples, the reference signal Srf and the input voltage signal Svi can also be related to each other through other mathematical relationships, or can be formulated by the circuit designer according to his needs. Such corresponding changes also belong to the scope of the present invention.

在本实施例中虽仅以省电电源信号Sps与正常电源信号Spn分别具有3V及6V的电压电平的情形为例做说明,然而,本实施例的省电电源信号Sps与正常电源信号Spn并不局限于此。在其它例子中,省电电源信号Sps与正常电源信号Spn的电平更可参照输入电压Svi信号电平、输入电压信号Svi的电平与参考信号Srf间的对应关系及负载电路等实际电路应用来弹性地进行各种不同的设计。In this embodiment, the case where the power-saving power signal Sps and the normal power signal Spn respectively have voltage levels of 3V and 6V are used as an example for illustration, however, the power-saving power signal Sps and the normal power signal Spn of this embodiment It is not limited to this. In other examples, the levels of the power-saving power signal Sps and the normal power signal Spn can refer to the signal level of the input voltage Svi, the corresponding relationship between the level of the input voltage signal Svi and the reference signal Srf, and actual circuit applications such as load circuits. To flexibly carry out various designs.

本实施例的输出缓冲器根据对应至输入电压信号的参考信号来选择性地以省电电源信号及正常电源信号其中之一作为输出缓冲器的电源信号。如此,本实施例的输出缓冲器可根据对应至输入电压信号的参考信号来弹性地选择对应的能量较高的能量信号或对应的能量较低的能量信号来执行根据输入电压信号产生输出电压信号的操作。这样一来,相较于传统输出缓冲器,本发明相关的输出缓冲器具有耗电量较低及电能使用效率较高的优点。The output buffer of this embodiment selectively uses one of the power saving power signal and the normal power signal as the power signal of the output buffer according to the reference signal corresponding to the input voltage signal. In this way, the output buffer of this embodiment can flexibly select a corresponding energy signal with higher energy or a corresponding energy signal with lower energy according to the reference signal corresponding to the input voltage signal to perform generating the output voltage signal according to the input voltage signal operation. In this way, compared with the conventional output buffer, the output buffer of the present invention has the advantages of lower power consumption and higher power usage efficiency.

第二实施例second embodiment

本实施例的输出缓冲器中的控制电路受控于第一相位控制信号及第二相位控制信号将操作期间分为第一子期间及第二子期间,并通过时分复用(Time DivisionMultiplexing)的方式来驱动输出缓冲器中的运算放大器。请参照图6,其绘示依照本发明第二实施例的输出缓冲器的方块图。本实施例的输出缓冲器3与第一实施例的输出缓冲器不同之处在于控制电路CT3接收相位控制信号Sph1及Sph2,以将输出缓冲器3根据输入电压信号Svi输出电压信号Svo的操作期间TP分为子期间TP_s1及TP_s2,如图7所示。The control circuit in the output buffer of this embodiment is controlled by the first phase control signal and the second phase control signal to divide the operation period into the first sub-period and the second sub-period, and through time division multiplexing (Time Division Multiplexing) way to drive the op amp in the output buffer. Please refer to FIG. 6 , which shows a block diagram of an output buffer according to a second embodiment of the present invention. The difference between the output buffer 3 of this embodiment and the output buffer of the first embodiment is that the control circuit CT3 receives the phase control signals Sph1 and Sph2 to output the voltage signal Svo from the output buffer 3 according to the input voltage signal Svi. TP is divided into sub-periods TP_s1 and TP_s2, as shown in FIG. 7 .

在一个例子中,电源电路PC3中包括电源开关SW1′及SW2′。当参考信号Srf满足省电条件时,控制电路CT2于子期间TP_s1及TP_S2中分别输出控制信号Sc1′及Sc2′,以触发省电操作事件。控制信号Sc1′在子期间TP_s1中导通电源开关SW1′,以提供省电电源信号Sps1驱动运算放大器OP3。控制信号Sc2′在子期间TP_s2中导通电源开关SW2′,以提供省电电源信号Sps2驱动运算放大器OP3。如此通过时分复用的方式来驱动运算放大器OP3。In one example, the power circuit PC3 includes power switches SW1' and SW2'. When the reference signal Srf satisfies the power saving condition, the control circuit CT2 outputs the control signals Sc1 ′ and Sc2 ′ respectively in the sub-periods TP_s1 and TP_S2 to trigger the power saving operation event. The control signal Sc1' turns on the power switch SW1' in the sub-period TP_s1 to provide the power-saving power signal Sps1 to drive the operational amplifier OP3. The control signal Sc2' turns on the power switch SW2' in the sub-period TP_s2 to provide the power-saving power signal Sps2 to drive the operational amplifier OP3. In this way, the operational amplifier OP3 is driven in a time-division multiplexing manner.

举例来说,省电电源信号Sps1的电压电平是低于输出电压信号Svo欲达到的电平,省电电源信号Sps2的电平是高于或等于输出电压信号Svo欲达到的电平。如此,可以电平较低的电源信号Sps1来驱动运算放大器OP3,以提供较低的驱动力来对负载电路进行预先充电的位能。之后再改用电平较高的电源信号Sps2来驱动运算放大器OP3,以提供较高的驱动力来驱动负载电路。如此,可提升输出缓冲器3对负载电路的充电速度。另外,由于在子期间TP_s1中由电平较低的电源信号来驱动运算放大器OP3,整体而言,亦可减少输出缓冲器3的耗电量。For example, the voltage level of the power-saving power signal Sps1 is lower than the desired level of the output voltage signal Svo, and the level of the power-saving power signal Sps2 is higher than or equal to the desired level of the output voltage signal Svo. In this way, the operational amplifier OP3 can be driven by the power signal Sps1 with a lower level, so as to provide a lower driving force to pre-charge the load circuit. Afterwards, the power signal Sps2 with a higher level is used to drive the operational amplifier OP3 to provide a higher driving force to drive the load circuit. In this way, the charging speed of the output buffer 3 to the load circuit can be increased. In addition, since the operational amplifier OP3 is driven by the power signal with a lower level in the sub-period TP_s1 , overall, the power consumption of the output buffer 3 can also be reduced.

在一个例子中,电源电路PC3中还包括电源开关SW3及SW4。相似于参考信号Srf满足省电条件时的操作,当参考信号Srf不满足省电条件时,控制电路CT2于子期间TP_s1及TP_S2中分别输出控制信号Sc3及Sc4,以触发正常操作事件。控制信号Sc3在子期间TP_s1中导通电源开关SW3,以提供正常电源信号Spn1驱动运算放大器OP3。控制信号Sc4在子期间TP_s2中导通电源开关SW4,以提供正常电源信号Spn2驱动运算放大器OP3。如此,当参考信号Srf不满足省电条件时,输出缓冲器3亦可通过时分复用的方式来驱动运算放大器OP3,以提升输出缓冲器3对负载电路的充电速度并降低其耗电量。In one example, the power circuit PC3 further includes power switches SW3 and SW4. Similar to the operation when the reference signal Srf satisfies the power saving condition, when the reference signal Srf does not satisfy the power saving condition, the control circuit CT2 outputs the control signals Sc3 and Sc4 in the sub-periods TP_s1 and TP_S2 respectively to trigger a normal operation event. The control signal Sc3 turns on the power switch SW3 in the sub-period TP_s1 to provide the normal power signal Spn1 to drive the operational amplifier OP3. The control signal Sc4 turns on the power switch SW4 in the sub-period TP_s2 to provide the normal power signal Spn2 to drive the operational amplifier OP3. In this way, when the reference signal Srf does not satisfy the power-saving condition, the output buffer 3 can also drive the operational amplifier OP3 in a time-division multiplexing manner, so as to increase the charging speed of the output buffer 3 to the load circuit and reduce its power consumption.

在本实施例中虽仅以在参考信号Srf满足省电条件时提供省电电源信号Sps1及Sps2来驱动运算放大器OP3,并在参考信号Srf不满足省电条件时提供正常电源信号Spn1及Spn2来驱动运算放大器OP3的情形为例做说明,然而,本实施例的输出缓冲器3并不局限于此。在其它例子中,输出缓冲器OP3亦可仅具有一个省电电源信号及一个正常电源信号。通过决定应用省电电源信号与正常电信号驱动运算放大器OP3的子期间长短亦可使输出缓冲器OP3具有不同的驱动能力。In this embodiment, the operational amplifier OP3 is driven only by providing the power-saving power supply signals Sps1 and Sps2 when the reference signal Srf meets the power-saving condition, and the normal power supply signals Spn1 and Spn2 are provided when the reference signal Srf does not meet the power-saving condition. The case of driving the operational amplifier OP3 is described as an example, however, the output buffer 3 of this embodiment is not limited thereto. In other examples, the output buffer OP3 may only have one power-saving power signal and one normal power signal. The output buffer OP3 can also have different driving capabilities by determining the length of the sub-period for driving the operational amplifier OP3 with the power-saving power signal and the normal electrical signal.

本实施例的输出缓冲器中的控制电路受控于第一及第二相位控制信号将操作期间分为第一子期间及第二子期间,以对输出缓冲器中的运算放大器进行时分复用控制。如此,相较于传统输出缓冲器,本发明相关的输出缓冲器具有耗电量较低及电能使用效率较高的优点。The control circuit in the output buffer of this embodiment is controlled by the first and second phase control signals to divide the operation period into a first sub-period and a second sub-period to time-multiplex the operational amplifier in the output buffer control. Thus, compared with the conventional output buffer, the output buffer of the present invention has the advantages of lower power consumption and higher power usage efficiency.

在一个例子中,本发明上述实施例的输出缓冲器可被应用于源极驱动器10中,用以提供n笔像素电压信号Vdp1′、Vdp2′、…、Vdpn′,如图8所示,其中n为大于1的自然数。源极驱动器10包括线性缓冲器12、D/A转换器14及输出级电路16。线性缓冲器12包括n个缓冲单元(未绘示),其分别用以接收并暂存储存n笔像素数据Dp1、Dp2、…、Dpn。D/A转换器14包括n个D/A单元(未绘示),其分别用以根据像素数据Dp1-Dpn转换得到n笔模拟电压信号Vdp1、Vdp2、…、Vdpn,其中n为大于1的自然数。In one example, the output buffer of the above embodiment of the present invention can be applied to the source driver 10 to provide n pixel voltage signals Vdp1', Vdp2', ..., Vdpn', as shown in FIG. 8, wherein n is a natural number greater than 1. The source driver 10 includes a linear buffer 12 , a D/A converter 14 and an output stage circuit 16 . The linear buffer 12 includes n buffer units (not shown), which are respectively used to receive and temporarily store n pieces of pixel data Dp1, Dp2, . . . , Dpn. The D/A converter 14 includes n D/A units (not shown), which are respectively used to convert and obtain n analog voltage signals Vdp1, Vdp2, ..., Vdpn according to the pixel data Dp1-Dpn, wherein n is greater than 1 Natural number.

输出级电路16包括n个前述的输出缓冲器(未绘示),n个输出缓冲器分别以n笔模拟电压信号Vdp1-Vdpn作为输入信号,以提供对应的n笔像素电压信号Vdp1′-Vdpn′。The output stage circuit 16 includes n aforementioned output buffers (not shown), and the n output buffers respectively use n analog voltage signals Vdp1-Vdpn as input signals to provide corresponding n pixel voltage signals Vdp1'-Vdpn '.

在另一个例子中,本发明上述实施例的输出缓冲器可被应用于另一种态样的源极驱动器20中,如图9所示。源极驱动器20包括线性缓冲器22、D/A转换器24及m个输出缓冲器26_1、26_2、…、26_m,其中m为大于1的自然数。线性缓冲器22包括n个缓冲单元(未绘示),其分别用以接收并暂存储存n笔像素数据Dp1、Dp2、…、Dpn。In another example, the output buffer of the above embodiments of the present invention can be applied to another source driver 20 , as shown in FIG. 9 . The source driver 20 includes a linear buffer 22 , a D/A converter 24 and m output buffers 26_1 , 26_2 , . . . , 26_m, wherein m is a natural number greater than 1. The linear buffer 22 includes n buffer units (not shown), which are respectively used to receive and temporarily store n pieces of pixel data Dp1, Dp2, . . . , Dpn.

输出缓冲器26_1-26_m分别用以接收对应至m个灰阶值的m笔输入模拟电压信号Vi1、Vi2、…、Vim,并据以提供分别与m个灰阶值对应的m笔灰阶像素电压信号Vgd1、Vgd2、…、Vgdm。D/A转换器24包括n个D/A单元(未绘示),各n个D/A单元根据各n笔像素数据Dp1-Dpn对应的灰阶值选择m笔灰阶像素电压信号Vgd1-Vgdm其中之一做为对应的像素电压信号输出。The output buffers 26_1-26_m are respectively used to receive m input analog voltage signals Vi1, Vi2, . Voltage signals Vgd1, Vgd2, . . . , Vgdm. The D/A converter 24 includes n D/A units (not shown), each of the n D/A units selects m grayscale pixel voltage signals Vgd1- One of Vgdm is output as a corresponding pixel voltage signal.

综上所述,虽然本发明已以较佳实施例揭露如上,然而其并非用以限定本发明。本发明所属技术领域中具有通常知识者,在不脱离本发明的精神和范围内,当可作各种等同的改变或替换。因此,本发明的保护范围当视后附的本申请权利要求所界定的为准。To sum up, although the present invention has been disclosed above with preferred embodiments, they are not intended to limit the present invention. Those skilled in the technical field to which the present invention belongs may make various equivalent changes or substitutions without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the appended claims of the application.

Claims (58)

1. an output buffer in order to an output voltage signal to be provided, is characterized in that, this output buffer comprises:
One operational amplifier is in order to provide this output voltage signal according to an input voltage signal;
One control circuit, judge whether a reference signal corresponding with this input voltage signal satisfies a power saving condition, when this reference signal satisfies this power saving condition, this control circuit triggers a power-save operation incident, when this reference signal did not satisfy this power saving condition, this control circuit triggered a normal running incident; And
One power circuit, provide a power saving power supply signal to drive this operational amplifier in response to this power-save operation incident, make this operational amplifier provide this output voltage signal according to this input voltage signal, this power circuit more provides a normal power source signal to drive this operational amplifier in response to this normal running incident, make this operational amplifier provide this output voltage signal according to this input voltage signal, the power of this normal power source signal is the power that is higher than this power saving power supply signal.
2. output buffer according to claim 1, it is characterized in that, this reference signal is to a digital voltage data that should input voltage signal, and this control circuit judges that this reference signal satisfies this power saving condition in this digital voltage data during less than a critical value.
3. output buffer according to claim 2 is characterized in that, this control circuit judges that according to the numerical value of the most significant bits of this digital voltage data whether this numerical data is less than this critical value.
4. output buffer according to claim 1, it is characterized in that, this reference signal is an analog voltage signal that corresponds to this input voltage signal, and this control circuit judges that this reference signal satisfies this power saving condition in the level of this analog voltage signal during less than a critical voltage.
5. output buffer according to claim 1 is characterized in that:
When this reference signal satisfied this power saving condition, this control circuit was exported one first control signal to trigger this power-save operation incident in an operating period; And
This power circuit is controlled by this first control signal provides one first voltage signal to drive this operational amplifier as this power saving power supply signal, makes this operational amplifier provide this output voltage signal according to this input voltage signal.
6. output buffer according to claim 5 is characterized in that:
When this reference signal did not satisfy this power saving condition, this control circuit was exported one second control signal to trigger this normal running incident in this operating period;
This power circuit is controlled by this second control signal provides one second voltage signal to drive this operational amplifier as this power saving power supply signal, makes this operational amplifier provide this output voltage signal according to this input voltage signal; And
The level of this first voltage signal is the level that is lower than this second voltage signal.
7. output buffer according to claim 1 is characterized in that:
This control circuit also is divided into an operating period during one first son in response to one first phase control signal and one second phase control signal and during one second son;
When this reference signal satisfied this power saving condition, this control circuit was in exporting one first control signal and one second control signal during this first son and during this second son respectively to trigger this power-save operation incident; And
This power circuit be controlled by first and this second control signal respectively at this first and this second son during provide one first voltage signal and one second voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
8. output buffer according to claim 1 is characterized in that:
This control circuit also is divided into an operating period during one first son in response to one first phase control signal and one second phase control signal and during one second son;
When this reference signal did not satisfy this power saving condition, this control circuit was in exporting one the 3rd control signal and one the 4th control signal during this first son and during this second son respectively to trigger this normal running incident; And
This power circuit be controlled by the 3rd and the 4th control signal respectively at this first and this second son during provide a tertiary voltage signal and one the 4th voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
9. an output buffer in order to an output voltage signal to be provided, is characterized in that, this output buffer comprises:
One operational amplifier is in order to provide this output voltage signal according to an input voltage signal;
One control circuit, judge whether a reference signal corresponding with this input voltage signal satisfies a power saving condition, when this reference signal satisfies this power saving condition, this control circuit provides one first control signal, when this reference signal did not satisfy this power saving condition, this control circuit provided one second control signal;
One first power circuit is controlled by this first control signal conducting, drives this operational amplifier so that one first voltage signal to be provided, and makes this operational amplifier tool provide this output voltage signal according to this input voltage signal; And
One second source circuit, be controlled by this second control signal conducting, to provide one second voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal, wherein the level of this second voltage signal is the level that is higher than this first voltage signal.
10. output buffer according to claim 9, it is characterized in that, this reference signal is to a digital voltage data that should input voltage signal, this control circuit judges that this reference signal satisfies this power saving condition in this digital voltage data during less than a critical value, and judges that this reference signal does not satisfy this power saving condition in this digital voltage data during more than or equal to this critical value.
11. output buffer according to claim 10 is characterized in that, this control circuit is to judge that according to the numerical value of the most significant bits of this digital voltage data whether this numerical data is less than this critical value.
12. output buffer according to claim 9, it is characterized in that, this reference signal is an analog voltage signal that corresponds to this input voltage signal, this control circuit judges that this reference signal satisfies this power saving condition in the level of this analog voltage signal during less than a critical voltage, and judges that this reference signal does not satisfy this power saving condition in the level of this analog voltage signal during more than or equal to this critical voltage.
13. an output buffer, is characterized in that this output buffer comprises in order to an output voltage signal to be provided in an operating period:
One operational amplifier is in order to provide this output voltage signal according to an input voltage signal;
One control circuit, be divided into this operating period during one first son and during one second son, this control circuit is also in exporting one first control signal and one second control signal respectively during this first son and during this second son in response to one first phase control signal and one second phase control signal; And
One power circuit, in response to this first and this second control signal respectively at this first son during and this second son during in provide one first voltage signal and one second voltage signal to drive this operational amplifier, make this operational amplifier tool provide this output voltage signal according to this input voltage signal.
14. output buffer according to claim 13, it is characterized in that, this control circuit judges also whether a reference signal corresponding with this input voltage signal satisfies a power saving condition, when this reference signal satisfied this power saving condition, this control circuit was in exporting this first control signal and this second control signal respectively during this first son and during this second son.
15. output buffer according to claim 14, it is characterized in that, this reference signal is to a digital voltage data that should input voltage signal, and this control circuit judges that this reference signal satisfies this power saving condition in this digital voltage data during less than a critical value.
16. output buffer according to claim 15 is characterized in that, this control circuit is to judge that according to the numerical value of the most significant bits of this digital voltage data whether this numerical data is less than this critical value.
17. output buffer according to claim 13, it is characterized in that, this reference signal is an analog voltage signal that corresponds to this input voltage signal, and this control circuit judges that this reference signal satisfies this power saving condition in the level of this analog voltage signal during less than a critical voltage.
18. output buffer according to claim 13 is characterized in that:
Wherein this control circuit judges also whether a reference signal corresponding with this input voltage signal satisfies a power saving condition, when this reference signal did not satisfy this power saving condition, this control circuit was in exporting this first control signal and this second control signal respectively during this first son and during this second son; And
This power circuit in response to this first and this second control signal respectively at this first son during and this second son during in provide a tertiary voltage signal and one the 4th voltage signal to drive this operational amplifier, make this operational amplifier tool provide this output voltage signal according to this input voltage signal.
19. a source electrode driver drives a display panels in order to many pixel voltage signals to be provided, and it is characterized in that this source electrode driver comprises:
One linear buffer device comprises a plurality of linear buffers unit, respectively in order to store many input pixel datas;
One digital simulation (D/A) transducer comprises a plurality of D/A converting units, and is corresponding with described linear buffer unit respectively, to change described input pixel data respectively to obtain many analog voltage signals; And
A plurality of output buffers, each described output buffer comprises:
One operational amplifier is in order to provide each described pixel voltage signal according to each described analog voltage signal;
One control circuit, judge whether a reference signal corresponding with each described analog voltage signal satisfies a power saving condition, when this reference signal satisfies this power saving condition, this control circuit triggers a power-save operation incident, when this reference signal did not satisfy this power saving condition, this control circuit triggered a normal running incident; And
One power circuit, provide a power saving power supply signal to drive this operational amplifier in response to this power-save operation incident, make this operational amplifier provide each described pixel voltage signal according to each described analog voltage signal, this power circuit also provides a normal power source signal to drive this operational amplifier in response to this normal running incident, make this operational amplifier provide each described pixel voltage signal according to each described analog voltage signal, the power of this normal power source signal is the power that is higher than this power saving power supply signal.
20. source electrode driver according to claim 19, it is characterized in that, this reference signal corresponds to this input pixel data, this control circuit judges that this reference signal satisfies this power saving condition in this input pixel data during less than a critical value, and judges that this reference signal does not satisfy this power saving condition in this input pixel data during more than or equal to this critical value.
21. source electrode driver according to claim 20 is characterized in that, this control circuit is to judge that according to the numerical value of the most significant bits of this digital voltage data whether this numerical data is less than this critical value.
22. source electrode driver according to claim 19 is characterized in that, this reference signal corresponds to this analog voltage signal, and this control circuit judges that this reference signal satisfies this power saving condition in the level of this analog voltage signal during less than a critical voltage.
23. source electrode driver according to claim 19 is characterized in that:
When this reference signal satisfied this power saving condition, this control circuit was exported one first control signal to trigger this power-save operation incident in an operating period; And
This power circuit is controlled by this first control signal provides one first voltage signal to drive this operational amplifier as this power saving power supply signal, makes this operational amplifier provide each described pixel voltage signal according to each described analog voltage signal.
24. source electrode driver according to claim 23 is characterized in that:
When this reference signal did not satisfy this power saving condition, this control circuit was exported one second control signal to trigger this normal running incident in this operating period;
This power circuit is controlled by this second control signal provides one second voltage signal to drive this operational amplifier as this power saving power supply signal, makes this operational amplifier provide each described pixel voltage signal according to each described analog voltage signal; And
The level of this first voltage signal is the level that is lower than this second voltage signal.
25. source electrode driver according to claim 19 is characterized in that:
This control circuit also is divided into an operating period during one first son in response to one first phase control signal and one second phase control signal and during one second son;
When this reference signal satisfied this power saving condition, this control circuit was in exporting one first control signal and one second control signal during this first son and during this second son respectively to trigger this power-save operation incident; And
This power circuit be controlled by first and this second control signal respectively at this first and this second son during provide one first voltage signal and one second voltage signal to drive this operational amplifier, make this operational amplifier provide each described pixel voltage signal according to each described analog voltage signal.
26. source electrode driver according to claim 19 is characterized in that:
This control circuit also is divided into an operating period during one first son in response to one first phase control signal and one second phase control signal and during one second son;
When this reference signal did not satisfy this power saving condition, this control circuit was in exporting one the 3rd control signal and one the 4th control signal during this first son and during this second son respectively to trigger this normal running incident; And
This power circuit be controlled by the 3rd and the 4th control signal respectively at this first and this second son during provide a tertiary voltage signal and one the 4th voltage signal to drive this operational amplifier, make this operational amplifier provide each described pixel voltage signal according to each described analog voltage signal.
27. a source electrode driver drives a display panels in order to n pixel voltage signal to be provided, n is the natural number greater than 1, it is characterized in that, this source electrode driver comprises:
One linear buffer device comprises n linear buffer unit, respectively in order to store n input pixel data;
In order to provide and m m the GTG pixel voltage signal that the GTG value is corresponding, m is the natural number greater than 1 respectively for m output buffer, this m output buffer, and each described output buffer comprises:
One operational amplifier provides each described GTG pixel voltage signal in order to the input voltage signal according to correspondence;
One control circuit, judge whether a reference signal corresponding with this input voltage signal satisfies a power saving condition, when this reference signal satisfies this power saving condition, this control circuit triggers a power-save operation incident, when this reference signal did not satisfy this power saving condition, this control circuit triggered a normal running incident; And
One power circuit, provide a power saving power supply signal to drive this operational amplifier in response to this power-save operation incident, make this operational amplifier provide this GTG pixel voltage signal according to this input voltage signal, this power circuit also provides a normal power source signal to drive this operational amplifier in response to this normal running incident, make this operational amplifier provide this GTG pixel voltage signal according to this input voltage signal, the power of this normal power source signal is the power that is higher than this power saving power supply signal; And
One digital simulation (D/A) transducer comprises n D/A converting unit, respectively in response to this n input pixel data, is used as this n pixel voltage signal output to select at least one GTG pixel voltage from this m GTG pixel voltage signal.
28. source electrode driver according to claim 27, it is characterized in that, this reference signal is to a digital voltage data that should input voltage signal, and this control circuit judges that this reference signal satisfies this power saving condition in this digital voltage data during less than a critical value.
29. source electrode driver according to claim 28 is characterized in that, this control circuit is to judge that according to the numerical value of the most significant bits of this digital voltage data whether this numerical data is less than this critical value.
30. source electrode driver according to claim 27, it is characterized in that, this reference signal is an analog voltage signal that corresponds to this input voltage signal, this control circuit judges that this reference signal satisfies this power saving condition in the level of this analog voltage signal during less than a critical voltage, and judges that this reference signal does not satisfy this power saving condition in the level of this analog voltage signal during more than or equal to this critical voltage.
31. source electrode driver according to claim 27 is characterized in that:
When this reference signal satisfied this power saving condition, this control circuit was exported one first control signal to trigger this power-save operation incident in an operating period; And
This power circuit is controlled by this first control signal provides one first voltage signal to drive this operational amplifier as this power saving power supply signal, makes this operational amplifier provide each described GTG pixel voltage signal according to this input voltage signal of correspondence.
32. source electrode driver according to claim 31 is characterized in that:
When this reference signal did not satisfy this power saving condition, this control circuit was exported one second control signal to trigger this normal running incident in this operating period;
This power circuit is controlled by this second control signal provides one second voltage signal to drive this operational amplifier as this power saving power supply signal, makes this operational amplifier provide each described GTG pixel voltage signal according to this input voltage signal of correspondence; And
The level of this first voltage signal is the level that is lower than this second voltage signal.
33. source electrode driver according to claim 27 is characterized in that:
This control circuit also is divided into an operating period during one first son in response to one first phase control signal and one second phase control signal and during one second son;
When this reference signal satisfied this power saving condition, this control circuit was in exporting one first control signal and one second control signal during this first son and during this second son respectively to trigger this power-save operation incident; And
This power circuit be controlled by first and this second control signal respectively at this first and this second son during provide one first voltage signal and one second voltage signal to drive this operational amplifier, make this operational amplifier provide each described GTG pixel voltage signal according to this input voltage signal of correspondence.
34. source electrode driver according to claim 27 is characterized in that:
This control circuit also is divided into an operating period during one first son in response to one first phase control signal and one second phase control signal and during one second son;
When this reference signal did not satisfy this power saving condition, this control circuit was in exporting one the 3rd control signal and one the 4th control signal during this one first son and during this second son respectively to trigger this normal running incident; And
This power circuit be controlled by the 3rd and the 4th control signal respectively at this first and this second son during provide a tertiary voltage signal and one the 4th voltage signal to drive this operational amplifier, make this operational amplifier provide each described GTG pixel voltage signal according to this input voltage signal of correspondence.
35. an output buffer, is characterized in that this output buffer comprises in order to an output voltage signal to be provided in an operating period:
One operational amplifier is in order to provide this output voltage signal according to an input voltage signal; And
One power circuit is coupled to this operational amplifier, is used for according to a reference signal, optionally provides one first supply voltage or a second source voltage to this operational amplifier;
Wherein this reference signal is to should input voltage signal.
36. output buffer according to claim 35 is characterized in that, also comprises:
One control circuit is exported one first control signal according to a power saving condition of this reference signal indication in an operating period, and exports one second control signal according to a normal condition of this reference signal indication in this operating period;
Wherein, this power circuit is controlled by this first control signal provides this first supply voltage to drive this operational amplifier, and be controlled by this second control signal this this operational amplifier of second source driven is provided, make this operational amplifier provide this output voltage signal according to this input voltage signal.
37. output buffer according to claim 35 is characterized in that, also comprises:
One control circuit, be divided into an operating period during one first son and during one second son in response to one first phase control signal and one second phase control signal, this control circuit according to a power saving condition of this reference signal indication in this first and this second child-operation during in export one first control signal and one second control signal respectively;
Wherein, this power circuit be controlled by first and this second control signal respectively at this first and this second son during provide this first voltage signal and this second voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
38. according to the described output buffer of claim 37, it is characterized in that, this power circuit be controlled by the 3rd and the 4th control signal respectively at this first and this second son during provide a tertiary voltage signal and one the 4th voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
39. a source electrode driver drives a display panels in order to many pixel voltage signals to be provided, and it is characterized in that this source electrode driver comprises:
One linear buffer device comprises a plurality of linear buffers unit, respectively in order to store many input pixel datas;
One digital simulation (D/A) transducer comprises a plurality of D/A converting units, and is corresponding with described linear buffer unit respectively, to change described input pixel data respectively to obtain many analog voltage signals; And
A plurality of output buffers, each described output buffer comprises:
One operational amplifier is in order to provide this output voltage signal according to an input voltage signal; And
One power circuit is coupled to this operational amplifier, is used for according to a reference signal, optionally provides one first supply voltage or a second source voltage to this operational amplifier;
Wherein this reference signal is to should input voltage signal.
40. according to the described output buffer of claim 39, it is characterized in that, also comprise:
One control circuit is exported one first control signal according to a power saving condition of this reference signal indication in an operating period, and exports one second control signal according to a normal condition of this reference signal indication in this operating period;
Wherein, this power circuit is controlled by this first control signal provides this first supply voltage to drive this operational amplifier, and be controlled by this second control signal this this operational amplifier of second source driven is provided, make this operational amplifier provide this output voltage signal according to this input voltage signal.
41. according to the described output buffer of claim 39, it is characterized in that, also comprise:
One control circuit, be divided into an operating period during one first son and during one second son in response to one first phase control signal and one second phase control signal, this control circuit according to a power saving condition of this reference signal indication in this first and this second child-operation during in export one first control signal and one second control signal respectively;
Wherein, this power circuit be controlled by first and this second control signal respectively at this first and this second son during provide this first voltage signal and this second voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
42. according to the described output buffer of claim 41, it is characterized in that, this power circuit be controlled by the 3rd and the 4th control signal respectively at this first and this second son during provide a tertiary voltage signal and one the 4th voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
43. a source electrode driver drives a display panels in order to n pixel voltage signal to be provided, n is the natural number greater than 1, it is characterized in that, this source electrode driver comprises:
One linear buffer device comprises n linear buffer unit, respectively in order to store n input pixel data;
In order to provide and m m the GTG pixel voltage signal that the GTG value is corresponding, m is the natural number greater than 1 respectively for m output buffer, this m output buffer, and each described output buffer comprises:
One operational amplifier is in order to provide this output voltage signal according to an input voltage signal; And
One power circuit is coupled to this operational amplifier, is used for according to a reference signal, optionally provides one first supply voltage or a second source voltage to this operational amplifier; And
One digital simulation (D/A) transducer comprises n D/A converting unit, respectively in response to this n input pixel data, is used as this n pixel voltage signal output to select at least one GTG pixel voltage from this m GTG pixel voltage signal;
Wherein this reference signal is to should input voltage signal.
44. according to the described output buffer of claim 43, it is characterized in that, also comprise:
One control circuit is exported one first control signal according to a power saving condition of this reference signal indication in an operating period, and exports one second control signal according to a normal condition of this reference signal indication in this operating period;
Wherein, this power circuit is controlled by this first control signal provides this first supply voltage to drive this operational amplifier, and be controlled by this second control signal this this operational amplifier of second source driven is provided, make this operational amplifier provide this output voltage signal according to this input voltage signal.
45. according to the described output buffer of claim 43, it is characterized in that, also comprise:
One control circuit, be divided into an operating period during one first son and during one second son in response to one first phase control signal and one second phase control signal, this control circuit according to a power saving condition of this reference signal indication in this first and this second child-operation during in export one first control signal and one second control signal respectively;
Wherein, this power circuit be controlled by first and this second control signal respectively at this first and this second son during provide this first voltage signal and this second voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
46. according to the described output buffer of claim 45, it is characterized in that, this power circuit be controlled by the 3rd and the 4th control signal respectively at this first and this second son during provide a tertiary voltage signal and one the 4th voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
47. an output buffer, is characterized in that this output buffer comprises in order to an output voltage signal to be provided in an operating period:
One operational amplifier is in order to provide this output voltage signal according to an input voltage signal; And
One power circuit is coupled to this operational amplifier, is used for according to this input voltage signal, optionally provides one first supply voltage or a second source voltage to this operational amplifier.
48. according to the described output buffer of claim 47, it is characterized in that, also comprise:
One control circuit is exported one first control signal according to a power saving condition of this input voltage signal indication in an operating period, and exports one second control signal according to a normal condition of this input voltage signal indication in this operating period;
Wherein, this power circuit is controlled by this first control signal provides this first supply voltage to drive this operational amplifier, and be controlled by this second control signal this this operational amplifier of second source driven is provided, make this operational amplifier provide this output voltage signal according to this input voltage signal.
49. according to the described output buffer of claim 47, it is characterized in that, also comprise:
One control circuit, be divided into an operating period during one first son and during one second son in response to one first phase control signal and one second phase control signal, this control circuit according to a power saving condition of this input voltage signal indication in this first and this second child-operation during in export one first control signal and one second control signal respectively;
Wherein, this power circuit be controlled by first and this second control signal respectively at this first and this second son during provide this first voltage signal and this second voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
50. according to the described output buffer of claim 49, it is characterized in that, this power circuit be controlled by the 3rd and the 4th control signal respectively at this first and this second son during provide a tertiary voltage signal and one the 4th voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
51. a source electrode driver drives a display panels in order to many pixel voltage signals to be provided, and it is characterized in that this source electrode driver comprises:
One linear buffer device comprises a plurality of linear buffers unit, respectively in order to store many input pixel datas;
One digital simulation (D/A) transducer comprises a plurality of D/A converting units, and is corresponding with described linear buffer unit respectively, to change described input pixel data respectively to obtain many analog voltage signals; And
A plurality of output buffers, each described output buffer comprises:
One operational amplifier is in order to provide this output voltage signal according to an input voltage signal; And
One power circuit is coupled to this operational amplifier, is used for according to this input voltage signal, optionally provides one first supply voltage or a second source voltage to this operational amplifier.
52. according to the described output buffer of claim 51, it is characterized in that, also comprise:
One control circuit is exported one first control signal according to a power saving condition of this input voltage signal indication in an operating period, and exports one second control signal according to a normal condition of this input voltage signal indication in this operating period;
Wherein, this power circuit is controlled by this first control signal provides this first supply voltage to drive this operational amplifier, and be controlled by this second control signal this this operational amplifier of second source driven is provided, make this operational amplifier provide this output voltage signal according to this input voltage signal.
53. according to the described output buffer of claim 51, it is characterized in that, also comprise:
One control circuit, be divided into an operating period during one first son and during one second son in response to one first phase control signal and one second phase control signal, this control circuit according to a power saving condition of this input voltage signal indication in this first and this second child-operation during in export one first control signal and one second control signal respectively;
Wherein, this power circuit be controlled by first and this second control signal respectively at this first and this second son during provide this first voltage signal and this second voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
54. according to the described output buffer of claim 53, it is characterized in that, this power circuit be controlled by the 3rd and the 4th control signal respectively at this first and this second son during provide a tertiary voltage signal and one the 4th voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
55. a source electrode driver drives a display panels in order to n pixel voltage signal to be provided, n is the natural number greater than 1, it is characterized in that, this source electrode driver comprises:
One linear buffer device comprises n linear buffer unit, respectively in order to store n input pixel data;
In order to provide and m m the GTG pixel voltage signal that the GTG value is corresponding, m is the natural number greater than 1 respectively for m output buffer, this m output buffer, and each described output buffer comprises:
One operational amplifier is in order to provide this output voltage signal according to an input voltage signal; And
One power circuit is coupled to this operational amplifier, is used for according to this input voltage signal, optionally provides one first supply voltage or a second source voltage to this operational amplifier; And
One digital simulation (D/A) transducer comprises n D/A converting unit, respectively in response to this n input pixel data, is used as this n pixel voltage signal output to select at least one GTG pixel voltage from this m GTG pixel voltage signal.
56. according to the described output buffer of claim 55, it is characterized in that, also comprise:
One control circuit is exported one first control signal according to a power saving condition of this input voltage signal indication in an operating period, and exports one second control signal according to a normal condition of this input voltage signal indication in this operating period;
Wherein, this power circuit is controlled by this first control signal provides this first supply voltage to drive this operational amplifier, and be controlled by this second control signal this this operational amplifier of second source driven is provided, make this operational amplifier provide this output voltage signal according to this input voltage signal.
57. according to the described output buffer of claim 55, it is characterized in that, also comprise:
One control circuit, be divided into an operating period during one first son and during one second son in response to one first phase control signal and one second phase control signal, this control circuit according to a power saving condition of this input voltage signal indication in this first and this second child-operation during in export one first control signal and one second control signal respectively;
Wherein, this power circuit be controlled by first and this second control signal respectively at this first and this second son during provide this first voltage signal and this second voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
58. according to the described output buffer of claim 57, it is characterized in that, this power circuit be controlled by the 3rd and the 4th control signal respectively at this first and this second son during provide a tertiary voltage signal and one the 4th voltage signal to drive this operational amplifier, make this operational amplifier provide this output voltage signal according to this input voltage signal.
CN200910007088A 2009-02-05 2009-02-05 Output buffer and its source driver Pending CN101800516A (en)

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104916244A (en) * 2014-03-10 2015-09-16 硅工厂股份有限公司 Source driver
CN105630055A (en) * 2015-12-30 2016-06-01 深圳市华星光电技术有限公司 Simulation buffer amplifier and control device and method used for input voltage grouping
CN106782388A (en) * 2016-12-30 2017-05-31 武汉华星光电技术有限公司 A kind of mobile phone drive system and method
WO2017120994A1 (en) * 2016-01-15 2017-07-20 深圳市华星光电技术有限公司 Voltage generation circuit and lcd tv
CN108107966A (en) * 2017-12-28 2018-06-01 北京北广科技股份有限公司 A kind of remote control High power amplifier circuits and its application method
CN108962119A (en) * 2018-08-01 2018-12-07 京东方科技集团股份有限公司 Level shifter and its driving method, display device
CN110491344A (en) * 2019-07-30 2019-11-22 武汉华星光电半导体显示技术有限公司 For driving the driving chip and display product of display panel

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104916244A (en) * 2014-03-10 2015-09-16 硅工厂股份有限公司 Source driver
CN114170950B (en) * 2014-03-10 2024-09-20 硅工厂股份有限公司 Source driver
CN105630055A (en) * 2015-12-30 2016-06-01 深圳市华星光电技术有限公司 Simulation buffer amplifier and control device and method used for input voltage grouping
WO2017120994A1 (en) * 2016-01-15 2017-07-20 深圳市华星光电技术有限公司 Voltage generation circuit and lcd tv
US9898994B1 (en) 2016-01-15 2018-02-20 Shenzhen China Star Optoelectronics Technology Co., Ltd Voltage generation circuit and liquid crystal television
CN106782388A (en) * 2016-12-30 2017-05-31 武汉华星光电技术有限公司 A kind of mobile phone drive system and method
CN106782388B (en) * 2016-12-30 2019-05-03 武汉华星光电技术有限公司 A kind of mobile phone drive system and method
CN108107966A (en) * 2017-12-28 2018-06-01 北京北广科技股份有限公司 A kind of remote control High power amplifier circuits and its application method
CN108962119A (en) * 2018-08-01 2018-12-07 京东方科技集团股份有限公司 Level shifter and its driving method, display device
CN110491344A (en) * 2019-07-30 2019-11-22 武汉华星光电半导体显示技术有限公司 For driving the driving chip and display product of display panel
CN110491344B (en) * 2019-07-30 2020-11-06 武汉华星光电半导体显示技术有限公司 Driving chip for driving display panel and display product

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