CN101800181A - Manufacturing method of flip-chip package structure - Google Patents
Manufacturing method of flip-chip package structure Download PDFInfo
- Publication number
- CN101800181A CN101800181A CN 200910004082 CN200910004082A CN101800181A CN 101800181 A CN101800181 A CN 101800181A CN 200910004082 CN200910004082 CN 200910004082 CN 200910004082 A CN200910004082 A CN 200910004082A CN 101800181 A CN101800181 A CN 101800181A
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- China
- Prior art keywords
- manufacture method
- leading section
- substrate
- golden
- gold
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Wire Bonding (AREA)
Abstract
The manufacturing method of the flip chip packaging structure of the invention is to adhere a liquid tin on a plurality of gold bumps of a chip in a sticking way, then combine the gold bumps and a plurality of first connecting pads of a corresponding substrate to combine the chip and the substrate, and finally form a protective glue layer between the substrate and the chip and cover the gold bumps. Therefore, the manufacturing method can reduce the production cost and can be applied to the process that the bump pitch is less than 60 microns. In addition, the manufacturing method of the invention ensures that the gold bumps and the first connecting pads have stronger bonding strength. Moreover, the manufacturing method of the invention can be applied to various processes, so the application is wider.
Description
Technical field
The invention relates to a kind of manufacture method of encapsulating structure, in detail, is the manufacture method about a kind of composite packing structure.
Background technology
Known technology is applied to the encapsulating structure of low pin number and palpus microminiaturization or thin typeization, generally is to adopt the crystal coated encapsulation method manufacturing.Yet in known crystal coated encapsulation method, the Solder Bumps cost that is used to electrically connect substrate and chip is higher, so the application of golden projection (gold stud bump) becomes the preferable selection of low-cost chip package.Wherein, known crystal coated encapsulation method is in bump pitch during less than 60 microns, just has certain restriction and difficulty for the binding of projection.
The golden bump bond method that known technology is more often used is following several: the hitching post salient point engages (SBB), eutectic alloy links (Eutectic Solder Bonding, ESC), non-conductive film (NCF)/non-conductive cream (NCP), anisotropic conductive film (ACF)/anisotropic conductive cream (ACP) and ultrasonic waves gold link (Gold toGold Interconnect to gold, GGI) technology, it is the technology of normal application with SBB technology and ESC technology again.
Wherein, golden projection must attach conductive silver glue in the SBB technology, with in conjunction with substrate and chip, but its bond strength a little less than, be only applicable to ceramic substrate or low thermal coefficient of expansion (CTE) substrate; ESC technology in direct heat pressing mode in conjunction with substrate and chip, but must be prior to pre-welding material (tin cream) is set on the connection pad on the substrate, and at present technology only can be applicable to bump pitch greater than 60 microns technology, and the price of substrate is also comparatively expensive, so production cost is higher, moreover general pre-welding material is a tin paste layer, because therefore its preponderance is difficult for being formed on the golden projection in the mode of attaching (dipping).
In sum, known crystal coated encapsulation method manufacturing have the projection bond strength weak, can't be applied to bump pitch less than 60 microns technology and production cost than problems such as height.
Therefore, be necessary to provide the manufacture method of the composite packing structure of a kind of innovation and tool progressive, to address the above problem.
Summary of the invention
The invention provides a kind of manufacture method of composite packing structure, this manufacture method may further comprise the steps: a substrate (a) is provided, and this substrate has a first surface, several first connection pads of this first surface; (b) provide a chip, this chip has several golden projections, and these golden projections are with respect to these first connection pads; (c) attaching a liquid tin should the gold projection in each; (d) in conjunction with corresponding these first connection pads and these golden projections; And (e) form a protection glue-line between this substrate and this chip and cover these golden projections.
The manufacture method of composite packing structure of the present invention, its be attach this liquid tin in the mode of attaching should the gold projection in each, need be prior on these first connection pads on this substrate pre-welding material not being set, can be directly with substrate on be coated with nickel-gold layer connection pad engage, so when can be applicable to wafer-class encapsulation, it is constant that it makes flow process, so production cost is lower.In addition, attaching this liquid tin in the mode of attaching should the gold projection in each, makes composite packing structure manufacture method of the present invention can be applicable to bump pitch less than 60 microns technology, and has stronger bond strength between these golden projections and these first connection pads.Moreover composite packing structure manufacture method of the present invention can be applicable to kinds of processes, so use more extensive.
Description of drawings
Fig. 1 shows the flow chart of composite packing structure manufacture method of the present invention;
Fig. 2 shows the schematic diagram of the present invention's one substrate;
Fig. 3 A to Fig. 4 shows the schematic diagram of this substrate of the present invention and a chips incorporate; Wherein
Fig. 3 B and Fig. 3 C show the schematic diagram of the golden projection of the other two kinds of aspects of the present invention;
Fig. 3 D show the present invention attach a scaling powder in each should the gold projection schematic diagram;
Fig. 3 E show the present invention attach a liquid tin in each should the gold projection schematic diagram; And
Fig. 5 shows the schematic diagram of composite packing structure of the present invention.
The primary clustering symbol description:
1 substrate
2 chips
3 liquid tins
4 scaling powders
5 protection glue-lines
6 soldered balls
11 first surfaces
12 first connection pads
13 second surfaces
14 circuit
15 second connection pads
21 gold medal projections
100 composite packing structures of the present invention
211 base portions
212 leading sections
Embodiment
Fig. 1 shows the flow chart of composite packing structure manufacture method of the present invention.Fig. 2 to Fig. 5 is the schematic diagram that forms composite packing structure of the present invention.Wherein, composite packing structure manufacture method of the present invention is can replace known hitching post salient point to engage (SBB), eutectic alloy binding (Eutectic Solder Bonding, ESC), non-conductive film (NCF)/non-conductive cream (NCP), anisotropic conductive film (ACF)/anisotropic conductive cream (ACP) and ultrasonic waves gold link (Gold to Gold Interconnect, GGI) technology to gold.
Cooperation is with reference to figure 1 and Fig. 2 to Fig. 5, and refer step S11 and Fig. 2 at first, provide a substrate 1, and this substrate 1 has a first surface 11, and this first surface 11 has several first connection pads 12.In the present embodiment, this substrate 1 comprises a second surface 13, several circuit 14 and several second connection pads 15 in addition, and this second surface 13 is with respect to this first surface 11.Wherein, these second connection pads 15 are to be arranged at this second surface 13, and these circuit 14 electrically connect these second connection pads 15 and these first connection pads 12.
Refer step S12 and Fig. 3 A provide a chip 2, and this chip 2 has several golden projections 21, and these golden projections 21 are with respect to these first connection pads 12.In the present embodiment, each golden projection 21 has a base portion 211 and a leading section 212, and wherein, the width of this base portion 211 is greater than the width of this leading section 212.Preferably, the thickness of this leading section 212 is 2/3rds of these gold projection 21 integral thickness.
In the present embodiment, this leading section 212 is stepped with these base portion 211 formation one, in other is used, this leading section 212 also can form one trapezoidal (shown in Fig. 3 B) with this base portion 211, perhaps, by the path length convergent of this base portion 211, make the radially side of this gold projection 21 be a parabolic curve (shown in Fig. 3 C) to this leading section 212.
Refer step S13, attaching a liquid tin 3 should gold projection 21 in each.In the present embodiment, step S13 may further comprise the steps: with reference to figure 3D, attaching a scaling powder 4 should gold projection 21 in each, and this scaling powder 4 is this leading section 212 of cover part at least.With reference to figure 3E, attach this liquid tin 3 in this gold projection 21 and this leading section 212 of cover part at least, and remove this scaling powder 4.Wherein, this scaling powder 4 and this liquid tin 3 make in (Dipping) mode that immerses and are built-up in these golden projections 21, attach height with control.And, because of the width of this base portion 211 width greater than this leading section 212, and the thickness of this leading section 212 is 2/3rds of these gold projection 21 integral thickness, make this scaling powder 4 and this liquid tin 3 only can be built-up in these leading sections 212 of these golden projections 21, so can guarantee to cover brilliant in conjunction with the time, this liquid tin 3 can not take place and electrically connect towards extending laterally because of extruding in these golden projections 21, and therefore, the size of flip chip structure can be more small.
This scaling powder 4 is built-up in these golden projections 21 under one first temperature conditions, in the present embodiment, this first temperature is 25 ℃.This liquid tin 3 is built-up in these golden projections 21 under one second temperature conditions, and this scaling powder 4 volatilizees and removes under this second temperature conditions.Wherein, one workbench (scheming not shown) is provided earlier in the present embodiment, includes a scolder in this workbench, continue this scolder of heating again to this second temperature (230 ℃), make this scolder become this liquid tin 3, attach this liquid tin 3 again in these golden projections 21.
Refer step S14 is in conjunction with corresponding these first connection pads 12 and these golden projections 21.Preferably, can hot pressing (Thermal bond) mode in step S14 in conjunction with corresponding these first connection pads 12 and these golden projections 21.
Refer step S15; form a protection glue-line 5 between this substrate 1 and this chip 2 and cover these golden projections 21 at least; to finish composite packing structure 100 of the present invention, wherein, this protection glue-line 5 can be sealing (molding compound) or primer (underfill).This composite packing structure 100 in addition, after the step that forms this protection glue-line 5, can comprise the step of a configuration soldered ball in addition, be used to form a soldered ball 6 on each second connection pad 15, so that can electrically connect with an external module or device (scheming not shown).
The manufacture method of composite packing structure of the present invention, it attaches this liquid tin in the mode of attaching should the gold projection in each, need be prior on these first connection pads on this substrate pre-welding material not being set, can be directly with substrate on be coated with nickel-gold layer connection pad engage, so can be applicable to wafer-class encapsulation (ChipScale Package, CSP, for example: in the time of hybrid (cover crystalline substance and routing encapsulation) wafer-class encapsulation), it is constant that it makes flow process, so production cost is lower.In addition, attaching this liquid tin in the mode of attaching should the gold projection in each, makes composite packing structure manufacture method of the present invention can be applicable to bump pitch less than 60 microns technology, and has stronger bond strength between these golden projections and these first connection pads.Moreover composite packing structure manufacture method of the present invention can be applicable to kinds of processes, so use more extensive.
Only the foregoing description only is explanation principle of the present invention and effect thereof, but not in order to restriction the present invention.Therefore, practise the foregoing description being made amendment and changing and still do not take off spirit of the present invention in the personage of this technology.Interest field of the present invention claims as described later is listed.
Claims (13)
1. the manufacture method of a composite packing structure may further comprise the steps:
(a) provide a substrate, this substrate has a first surface, several first connection pads of this first surface;
(b) provide a chip, this chip has several golden projections, and these golden projections are with respect to these first connection pads;
(c) attaching a liquid tin should the gold projection in each;
(d) in conjunction with corresponding these first connection pads and these golden projections;
(e) form a protection glue-line between this substrate and this chip and cover these golden projections at least.
2. manufacture method as claimed in claim 1, wherein in step (b), each golden projection has a base portion and a leading section, and the width of this base portion is greater than the width of this leading section.
3. manufacture method as claimed in claim 2, wherein the thickness of this leading section is 2/3rds of this gold projection integral thickness.
4. manufacture method as claimed in claim 2, wherein in step (b), it is one stepped that this leading section and this base portion form.
5. manufacture method as claimed in claim 2, wherein in step (b), it is one trapezoidal that this leading section and this base portion form.
6. manufacture method as claimed in claim 2 wherein in step (b), by the path length convergent of this base portion to this leading section, makes the radially side of this gold projection be a parabolic curve.
7. manufacture method as claimed in claim 2, wherein step (c) may further comprise the steps:
(c1) attaching a scaling powder should the gold projection in each, and this scaling powder is this leading section of cover part at least; And
(c2) attach this liquid tin in this gold projection and this leading section of cover part at least, and remove this scaling powder.
8. manufacture method as claimed in claim 7 wherein is to make this scaling powder and this liquid tin be built-up in these golden projections to immerse (Dipping) mode in step (c1) and (c2), attaches height with control.
9. manufacture method as claimed in claim 7, wherein in step (c1), this scaling powder is to be built-up in this gold projection under one first temperature conditions.
10. manufacture method as claimed in claim 9, wherein this first temperature is 25 ℃.
11. manufacture method as claimed in claim 7, wherein in step (c2), this liquid tin is to be built-up in this gold projection under one second temperature conditions, and this scaling powder volatilizees and removes under this second temperature conditions.
12. as the manufacture method of claim 11, wherein this second temperature is 230 ℃.
13. manufacture method as claimed in claim 1 in step (d), is in conjunction with corresponding these first connection pads and these golden projections in hot pressing (Therma l bond) mode wherein.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910004082 CN101800181A (en) | 2009-02-09 | 2009-02-09 | Manufacturing method of flip-chip package structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910004082 CN101800181A (en) | 2009-02-09 | 2009-02-09 | Manufacturing method of flip-chip package structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101800181A true CN101800181A (en) | 2010-08-11 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 200910004082 Pending CN101800181A (en) | 2009-02-09 | 2009-02-09 | Manufacturing method of flip-chip package structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101800181A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103325751A (en) * | 2013-06-09 | 2013-09-25 | 华进半导体封装先导技术研发中心有限公司 | Step-type micro convex point structure and preparation method thereof |
| CN108461388A (en) * | 2018-03-26 | 2018-08-28 | 云谷（固安）科技有限公司 | A kind of substrat structure, processing method and display device |
-
2009
- 2009-02-09 CN CN 200910004082 patent/CN101800181A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103325751A (en) * | 2013-06-09 | 2013-09-25 | 华进半导体封装先导技术研发中心有限公司 | Step-type micro convex point structure and preparation method thereof |
| CN108461388A (en) * | 2018-03-26 | 2018-08-28 | 云谷（固安）科技有限公司 | A kind of substrat structure, processing method and display device |
| CN108461388B (en) * | 2018-03-26 | 2020-11-06 | 云谷（固安）科技有限公司 | Substrate structure, processing method and display device |
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| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20100811 |