CN101783916B - Frequency multiplier de-interlacing method and controller thereof - Google Patents

Abstract

The invention discloses a frequency doubling deinterlacing method and a controller thereof, which can improve the afterimage phenomenon. The double frequency de-interlacing method includes the following steps: according to the i-th odd-numbered sequence and the i-th even-numbered sequence of the odd image field and the even image field, the input pixel column data is used to generate the i-th in the interpolated frame through directional de-interlacing operation across the edge of the image field Output pixel column data in i odd sequence, i is a natural number. According to the i-th even-numbered input pixel column data and the i+1 odd-numbered input pixel column data of the odd field, the i-th even-numbered output pixel in the interpolation frame is generated through the directional de-interlacing operation across the edge of the field Column data from which to generate the entire imputation frame.

Description

Frequency Doubling Deinterleaving Method and Its Controller

technical field

The present invention relates to a de-interlacing device and method, in particular to a double frame rate de-interlacing device and method.

Background technique

Frequency-doubled LCD TVs with a frame update frequency of 120 Hz have been released, which can effectively improve the flickering problem of traditional LCD TVs with a frame update frequency of 60 Hz. In the prior art, when a 60Hz input image is received, the conventional frequency doubling de-interlacing TV system copies each frame of the input image and inserts it between each frame and the next frame to achieve a 120Hz frequency. The frame update frequency.

However, when the input image contains a high-speed moving object, the conventional frequency doubling de-interlacing system will cause afterimages of the object to appear on the display screen due to continuous playback of two identical frames. In this way, how to improve the afterimage of the display screen of the traditional frequency-multiplier LCD TV while taking into account the production cost is one of the directions that the industry is constantly working on.

Contents of the invention

The technical problem to be solved by the present invention is to provide a frequency doubling deinterlacing method and its controller, which can improve the afterimage phenomenon.

In order to solve the above technical problems, the present invention provides the following technical solutions:

The present invention provides a frequency doubling deinterlacing method for generating an output image in response to an input image. The input image includes an odd field and an even field, and the output image includes an interpolation frame. The deinterleaving method includes the following steps. First, according to the i-th odd-sequence input pixel column data of the odd field and the i-th even-sequence input pixel column data of the even field, an interleaving operation (Edge OrientedDe-interlacing, EODI) across the field edge is generated. The i-th odd sequence in the supplementary frame outputs pixel column data, and i is a natural number. Next, according to the i-th even-numbered input pixel column and the i+1-th odd-numbered input pixel column data of the odd field, the i-th even-numbered output in the interpolation frame is generated through a directional de-interlacing operation across the edge of the field Pixel column data.

The present invention also provides a multiplier frequency deinterlacing controller for generating output images in response to input images. The input images include odd and even image fields, and the output images include interpolation frames. The de-interleave controller includes memory, memory control circuit and edge-oriented de-interleave operator. The memory receives and stores odd and even fields. The memory control circuit is used to read and output the i-th odd-sequence input pixel column data of the odd-field, the i+1-th odd-sequence input pixel column data of the odd-field, and the i-th even-sequence input pixel of the even-field Column data, i is a natural number. The edge-oriented de-interlacing operator executes the edge-oriented de-interleaving operation according to the i-th odd-numbered sequence input pixel column data and the i-th even-numbered sequence input pixel column data to generate the first operation pixel column data, and according to the i+1-th odd-numbered sequence The input pixel row data and the i-th even-sequence input pixel row data perform an edge-directed de-interlacing operation to generate a second operation pixel row data. Wherein, the first and second operation pixel row data are respectively used as the i-th odd-order output pixel row data in the interpolation frame and the i-th even-number-order output pixel row data in the interpolation frame.

The multiplier de-interlacing method and its controller used in the present invention generate four frames according to the corresponding odd image field and image field interpolation through the edge-oriented de-interlacing operator. Compared with the traditional method of directly displaying two first The image frame is used to achieve the de-interlacing system of the multiplier display, which can improve the afterimage of the picture. In addition, the present invention interpolates and generates multiplied frame frames according to the corresponding original field by directional de-interlacing operators across the edge of the field, compared to the traditional way of directly displaying two first frames to achieve de-interlacing of multiplied display The system is prone to picture sticking, and has the advantages of low cost and can improve picture sticking. Furthermore, the de-interlacing controller of the present invention further uses the mixer to interpolate to obtain the corresponding output image by referring to the image motion degree of the input image, and interpolates each frame in the output image by considering the motion degree of the input image, so as to further Further enhance the advantages of the display effect of the picture.

Description of drawings

FIG. 1 is a schematic diagram of an input image and an output image of the de-interlacing controller of the present embodiment.

2( a ) to 2 ( e ) are block diagrams of the multiplier de-interleaving controller according to the first embodiment.

FIG. 3( a ) is a partial flow chart of the multiplier de-interleaving operation method according to the first embodiment.

FIG. 3( b ) is a partial flow chart of the multiplier de-interleaving operation method according to the first embodiment.

FIG. 3( c ) is a partial flow chart of the multiplier de-interleaving operation method according to the first embodiment.

FIG. 3( d ) is a partial flow chart of the multiplier de-interleaving operation method according to the first embodiment.

FIG. 4 is a schematic diagram of operations performed by the edge-oriented de-interleaving operator 16 of the present embodiment.

5(a) to 5(e) are block diagrams of a multiplier de-interleaving controller according to a second embodiment.

FIG. 6 is a block diagram of the mixer 28 according to this embodiment.

FIG. 7( a ) is a partial flow chart of the multiplication frequency deinterleaving operation method according to the second embodiment.

FIG. 7( b ) is a partial flow chart of the multiplier de-interleaving operation method according to the second embodiment.

FIG. 7( c ) is a partial flow chart of the multiplier de-interleaving operation method according to the second embodiment.

FIG. 7( d ) is a partial flow chart of the multiplier de-interleaving operation method according to the second embodiment.

FIG. 7( e ) is a partial flow chart of the multiplier de-interleaving operation method according to the second embodiment.

FIG. 7( f ) is a partial flow chart of the multiplier de-interleaving operation method according to the second embodiment.

FIG. 8( a ) is a schematic diagram of an interpolation frame Frame in this embodiment.

FIG. 8( b ) is a schematic diagram of the interpolation frame Pre-Frame in this embodiment.

FIG. 9 is a diagram of a frequency multiplication deinterleaving method according to a preferred embodiment of the present invention.

[Description of main component symbols]

Ii: input image

Io: output image

Fd[s]: Odd field

Fd[s+1]: even field

Li[s]o(1) to Li[s]o(y), Li[s+1]e(1) to Li[s+1]e(y): input pixel column data

Lo[t-1]o(1) to Lo[t-1]o(y), Lo[t-1]e(1) to Lo[t-1]e(y), Lo[t]o( 1) to Lo[t]o(y), Lo[t]e(1) to Lo[t]e(y), Lo[t+1]o(1) to Lo[t+1]o(y ), Lo[t+1]e(1) to Lo[t+1]e(y), Lo[t+2]o(1) to Lo[t+2]o(y), Lo[t+ 2]e(1) to Lo[t+2]e(y): output pixel column data

10, 20: De-interleaving controller

12, 22: Memory

14, 24: Control circuit

16, 26: Edge-oriented de-interlacing operator

28: Mixer

LP1, LP2: Operation pixel column data

LP3: Interpolate pixel row data

Ma(-2) to Ma(2), Mb(-2) to Mb(2): large blocks

Detailed ways

The de-interlacing method of this embodiment is used to generate an output image in response to an input image, the input image includes an odd field (Field) and an even field, and the output image includes an interpolation frame. The de-interlacing method includes the following steps. First, according to the i-th odd-order input pixel column of the odd image field and the i-th even-numbered sequence input pixel column of the even image field, the edge-oriented de-interlacing operation (Edge Oriented De- interlacing, EODI) to find the i-th odd-order output pixel column in the interpolation frame, where i is a natural number. Then, according to the ith even-numbered input pixel column and the i+1 odd-numbered input pixel column of the odd field, the i-th even-numbered output pixel in the interpolation frame is generated through directional de-interlacing operation across the edge of the field List. Afterwards, change the value of i and repeat the above steps to obtain pixel data of all odd-numbered and even-numbered output pixel columns of the interpolation frame.

Please refer to FIG. 1 , which is a schematic diagram of an input image and an output image of the de-interlacing controller of this embodiment. The input image Ii is, for example, an interlace image, wherein odd fields include pixel data corresponding to odd scan lines, and even fields include pixel data corresponding to even scan lines. The de-interlacing controller proposed in this embodiment performs double-frequency (Doubled Frame Rate) de-interlacing (De-interlace) operation on the interlaced input image Ii to generate a progressive (Progressive) output image Io. Next, take the operation of the de-interlacing controller in this embodiment to generate frame frames Fm[t-1] to Fm[t+2] according to the corresponding fields in the input image Ii as an example, where t is greater than 1 of natural numbers.

first embodiment

The de-interlacing controller of this embodiment uses an edge-oriented de-interlacing operator to interpolate the pixel data of the odd field Fd[s] and the even field Fd[s+1] to obtain frames Fm[t-1] to Fm Pixel data of [t+2]. Please refer to FIG. 2(e), which is a block diagram of the de-interleaving controller according to the first embodiment. The de-interleave controller 10 includes a memory 12 , a control circuit 14 and an edge-oriented de-interleave operator 16 . The control circuit 14 is coupled to the memory 12 , and the edge-oriented de-interleaving unit 16 is coupled to the control circuit 14 .

The memory 12 is, for example, a Dynamic Random Access Memory (DRAM), which is used to store pixel row data in a plurality of odd and even fields. For example, when the operation of generating frames Fm[t−1] to Fm[t+1] is performed, the memory 12 at least stores the pixel row data in the odd field Fd[s] and the even field Fd[s+1]. When the operation of generating the frame Fm[t+2] is performed, the memory 12 at least stores pixel row data in the even field Fd[s+1] and the odd field Fd[s+2].

The control circuit 14 reads the pixel column data stored in the memory 12 in the odd field and the even field, and provides it to the edge-oriented de-interlacing operator 16 for interpolation to generate corresponding frames. Next, the operations of the de-interleaving controller 10 to interpolate and generate frames Fm[t−1] to Fm[t+2] will be further described. In the following paragraphs, the i-th odd-order pixel sequence data Lo[t-1]o(i), Lo[t]o( The operation of i), Lo[t+1]o(i) and Lo[t+2]o(i) is taken as an example, for each odd sequence in each frame Fm[t-1] to Fm[t+2] The operation of the pixel row data is described; and the pixel row data Lo[t-1]e(i) and Lo[t] of the i-th even sequence in each frame Fm[t-1] to Fm[t+2] are respectively used The operation of e(i), Lo[t+1]e(i) and Lo[t+2]e(i) is taken as an example, for each frame Fm[t-1] to Fm[t+2] The operation of even-order pixel column data will be described, i is a natural number less than or equal to N.

Please refer to Fig. 3(a), Fig. 2(a) and Fig. 1, in the operation of generating frame Fm[t-1] by interpolation, the control circuit 14 accesses the memory 12 to obtain the odd field Fd[s ] in the input pixel column data Li[s]o(1) to Li[s]o(N), N is a natural number greater than 1. Fig. 3 (a) is a partial flowchart of the deinterleaving method of the present embodiment, and Fig. 2 (a) only draws the input pixel column data Li[s]o(i) and Li[s]o(i+1) as Example to illustrate. First, as step (d), the control circuit 14 uses the input pixel row data Li[s]o(i) as the output pixel row data Lo[t−1]o(i). Then as in step (e), the control circuit 14 provides the input pixel column data Li[s]o(i) and Li[s]o(i+1) to the edge-oriented de-interlacing operator 16 to obtain the frame Fm[ The output pixel column data Lo[t-1]e(i) in t-1]. Then as in step (f), the de-interlacing controller 10 changes i to interpolate all the pixel column data in the frame Fm[t-1].

Please refer to Fig. 3(b), Fig. 2(b) and Fig. 1, in the operation of generating frame Fm[t] by interpolation, the control circuit 14 accesses memory 12 to obtain odd image field Fd[s] The input pixel column data Li[s]o(1) to Li[s]o(N) and the input pixel column data Li[s+1]e(1) to Li[ of the even image field Fd[s+1] s+1]e(N). Fig. 3 (b) is the partial flow chart of the deinterleaving method of the present embodiment, and Fig. 2 (b) only draws input pixel column data Li[s]o(i), Li[s]o(i+1), Li[s+1]e(i) is taken as an example for illustration. First, as in step (a), the control circuit 14 provides the input pixel row data Li[s]o(i) and Li[s+1]e(i) to the edge-oriented de-interlacing operator 16 to obtain the frame Fm Output pixel column data Lo[t]o(i) in [t]. Then as step (b), the control circuit 14 further provides the input pixel row data Li[s+1]e(i) and Li[s]o(i+1) to the edge-oriented de-interlacing operator 16 to obtain the image Output pixel column data Lo[t]e(i) in box Fm[t]. Then as in step (c), the de-interlacing controller 10 changes i to interpolate all pixel column data in the frame Fm[t].

Please refer to Fig. 3(c), Fig. 2(c) and Fig. 1, in the operation of generating frame Fm[t+1] by interpolation, control circuit 14 accesses memory 12 to obtain even field Fd[s+ 1] pixel column data Li[s+1]e(1) to Li[s+1]e(N). Fig. 3 (c) is the partial flow chart of the deinterleaving method of the present embodiment, and Fig. 2 (c) only draws input pixel column data Li[s+1]e(i) and Li[s+1]e(i +1) as an example to illustrate. First, as in step (g), the control circuit 14 provides the input pixel column data Li[s+1]e(i) and Li[s+1]e(i+1) to the edge-oriented de-interleaving operator 16 to obtain Output pixel column data Lo[t+1]o(i) in frame Fm[t+1]. Then in step (h), the control circuit 14 uses the input pixel row data Li[s+1]e(i) as the output pixel row data Lo[t+1]e(i). Then as in step (i), the de-interlacing controller 10 changes i to interpolate all pixel column data in the frame Fm[t+1].

Please refer to Fig. 3(d), Fig. 2(d) and Fig. 1, in the operation of generating frame Fm[t+2] by interpolation, the control circuit 14 accesses the memory 12 to obtain the even field Fd[s+ 1] in the input pixel row data Li[s+1]e(1) to Li[s+1]e(N) and in the odd image field Fd[s+2] (not shown in FIG. 1 ) Input pixel row data Li[s+2]o(1) to Li[s+2]o(N). Fig. 3 (d) is the partial flow chart of the deinterleaving method of the present embodiment, and Fig. 2 (d) only draws input pixel column data Li[s+2]o(i), Li[s+2]o(i +1) and Li[s+2]e(i) as examples. First, as in step (j), the control circuit 14 provides the input pixel row data Li[s+2]o(i) and Li[s+1]e(i) to the edge-oriented de-interleaving operator 16 to obtain the graph Output pixel column data Lo[t+2]o(i) in box Fm[t+2]. Then as in step (k), the control circuit 14 provides the input pixel column data Li[s+2]o(i+1) and Li[s+1]e(i) to the edge-oriented de-interleaving operator 16 to obtain Output pixel column data Lo[t+2]e(i) in frame Fm[t+2]. Then as in step (1), the de-interlacing controller 10 changes i to interpolate to obtain all pixel column data in the frame Fm[t+2].

FIG. 4 is a schematic diagram of the operation of the edge-oriented de-interleaving operator 16 according to a preferred embodiment of the present invention. The edge-oriented de-interlacing operator 16 receives the operation pixel row data LP1 and LP2, and interpolates to generate the interpolation pixel row data LP3. The interpolated pixel column data LP3 includes pixel data P3(1) to P3(y). Since the edge-oriented de-interlacing operator 16 interpolates and generates each pixel data P3(1) to P3(y), the operation system is substantially the same. Next, take the interpolation operation of the edge-oriented de-interlacing operator 16 to generate the pixel data P3(x) as an example, y is a natural number greater than 1, and x is a natural number less than or equal to y.

Edge-directed deinterleaving includes the following steps. First, a plurality of pixel data in the pixel row data LP1 is calculated to a plurality of pixel data in the pixel row data LP2 according to a plurality of direction index maps. For example, the direction index D includes the values {-2, -1, 0, 1, 2}, and the pixel data P1(x+2) to P1(x-2) in the operation pixel column data LP1 respectively pass 2. The direction indices D of -1, 0, 1 and 2 are mapped to the pixel data P2(x-2) to P2(x+2) in the operation pixel row data LP2.

Then, the pixel data P1(x-2) to P1(x+2) mapped to the aforementioned direction index D having a value of -2 to 2 are divided into corresponding large blocks Ma(-2) to Ma(2) ); and the pixel data P2(x+2) to P2(x-2) mapped to the aforementioned direction index D having values -2 to 2 are centered to divide the corresponding large blocks Mb(-2) to Mb (2). For example, each of the large blocks Ma(−2) to Ma(2) and Mb(−2) to Mb(2) includes 3 pixels in the horizontal direction. Then, block comparison is performed on the corresponding large blocks Ma(D) and MB(D) to find the corresponding block difference Diff(D), where D is equal to -2 to 2. For example, the block difference value Diff(-2) can be obtained through the equation operation:

Diff(-2)＝|P1(x-1)-P2(x+1)|+|P1(x-2)-P2(x+2)|+|P1(x-3)-P2(x+ 3)|

Next, use the direction index D corresponding to the smallest block difference as the detection direction; for example, the block difference Diff(-2) is the smallest block among the block difference Diff(-2) to Diff(2). For block differences, the direction index -2 will be used as the detection direction. Afterwards, the pixel data P3(x) is obtained by interpolation according to the pixel data P1(x-2) and P2(x+2) corresponding to the detection direction.

In the above embodiment, only the de-interlacing controller 10 is used to generate frames Fm[t-1] to Fm[t+1] according to the odd field Fd[s] and the even field Fd[s+1], and The operation of generating the frame Fm[t+2] based on the odd image field Fd[s+2] and the even image field Fd[s+1] is used as an example to illustrate, those who are familiar with this technique should be able to think about all the image frames production methods.

The de-interlacing controller of this embodiment generates four frames according to the corresponding odd field and field interpolation through the edge-oriented de-interlacing operator. In this way, compared with the conventional de-interlacing system that directly displays the two first frame frames to achieve double-frequency display, the de-interlacing controller of this embodiment can improve image afterimages.

second embodiment

The de-interlacing controller of the second embodiment employs an edge-oriented de-interlacing operator and a mixer to obtain the images of frames Fm[t-1] to Fm[t+2] through frequency-doubling interpolation with reference to the motion degree of the image in the input frame Ii data. Please refer to FIG. 5(e), which is a block diagram of the de-interleaving controller according to the second embodiment.

The difference between the de-interleave controller 20 of this embodiment and the de-interleave controller 10 of the first embodiment is that the memory control circuit 24 of this embodiment further includes a mixer 28, which is coupled to the edge-oriented de-interleave operator 26 and The control circuit 24 and the mixer 28 are used to refer to the image motion parameter M of the input image Ii, and interpolate the pixel row data Lx1 generated by the edge-oriented de-interlacing operator 26 and the input pixel row data Lx2 provided by the controller circuit 24. Output pixel column data Lout.

Please refer to FIG. 6 , which is a block diagram of the mixer 28 according to this embodiment. The mixer 28 is used for determining the weights of the pixel row data Lx1 and Lx2 according to the motion parameter M, so as to mix and generate the output pixel row data Lout. For example, the mixer 28 can mix and generate the output pixel row data Lout according to the following formula:

Lout＝Lx1×M+Lx2×(1-M)

Next, the operations of the de-interleaving controller 20 to interpolate and generate frames Fm[t−1] to Fm[t+2] will be further described. In the following description, pixel column data Lo[t-1]o(i'), Lo[ The operation of t]o(i'), Lo[t+1]o(i') and Lo[t+2]o(i') is taken as an example, for each frame Fm[t-1] to Fm[t +2] in the operation of each odd-order pixel column data; and output the pixel column data Lo[t-1] in the i'even-numbered sequence in each frame Fm[t-1] to Fm[t+2] respectively The operation of e(i'), Lo[t]e(i'), Lo[t+1]e(i') and Lo[t+2]e(i') is taken as an example, for each frame Fm[ t-1] to Fm[t+2], the operation of each even-order pixel column data will be described, and i' is a natural number less than or equal to N.

Please refer to FIG. 7(a), FIG. 5(a) and FIG. 1, the difference between the de-interleaving method of this embodiment and the de-interleaving method shown in FIG. 3(a) is that step (e) includes the step (e1) to (e3). First, as in step (e1), the edge-oriented de-interlacing operator 26 generates pixel row data Lx1 according to the input pixel row data Li[s]o(i'+1) and Li[s]o(i'). How the edge-oriented de-interleaving unit 26 performs processing according to the input data is the same as that of the edge-oriented de-interleaving unit 16, and will not be repeated here. In step (e2), the control circuit 24 provides the input pixel column data Li[s+1]e(i') to the mixer 28 as the pixel column data Lx2.

In step (e3), the mixer 28 respectively determines the weights of the pixel row data Lx1 and Lx2 according to the motion parameters M and (1-M), so as to mix and generate the pixel row data Lout. The generated output pixel row data Lout is output as output pixel row data Lo[t-1]e(i') in the frame frame Fm[t-1].

Please refer to FIG. 7(b), FIG. 7(c), FIG. 5(b) and FIG. 1, the difference between the de-interleaving method of this embodiment and the de-interleaving method shown in FIG. 3(b) lies in the steps (a) comprises steps (a1) to (a3), wherein step (b) comprises steps (b1) to (b3). In step (a1), the edge-oriented de-interlacing operator 26 generates pixel row data Lx1(t1) according to the input pixel row data Li[s]o(i') and Li[s+1]e(i'). In step (a2), the control circuit 24 provides the input pixel column data Li[s]o(i') to the mixer 28 as the pixel column data Lx2(t1). In step (a3), the weights of the pixel row data Lx1(t1) and Lx2(t2) are respectively determined according to the weight parameters M and (1-M), so as to mix and generate the pixel row data Lout, and use it as the output pixel row data Lo[t]o(i') output.

In step (b1), the edge-oriented de-interlacing operator 26 generates pixel row data Lx1(t2) according to the operation of the input pixel row data Li[s+1]e(i') and Li[s]o(i'+1) . In step (b2), the control circuit 24 provides the input pixel column data Li[s+1]e(i') to the mixer 28 as the pixel column data Lx2(t2). In step (b3), the weights of the pixel row data Lx1(t1) and Lx2(t2) are respectively determined according to the weight parameters M and (1-M), so as to mix and generate the pixel row data Lout, and use it as the output pixel row data Lo[t]e(i') output.

Please refer to Fig. 7(d), Fig. 5(c) and Fig. 1, the difference between the deinterleaving method of this embodiment and the deinterleaving method shown in Fig. 3(c) is that step (g) includes step (g1 ) to (g3). In step (g1), the edge-oriented de-interlacing operator 26 generates pixel row data Lx1 according to the input pixel row data Li[s+1]e(i') and Li[s+1]e(i'+1). In step (g2), the control circuit 24 provides the input pixel column data Li[s+2]o(i') to the mixer 28 as the pixel column data Lx2. In step (g3), the weights of the pixel row data Lx1 and Lx2 are respectively determined according to the weight parameters M and (1-M), so as to mix and generate the pixel row data Lout, and use it as the output pixel row data Lo[t+1] o(i') output.

Please refer to FIG. 7(e), FIG. 7(f), FIG. 5(d) and FIG. 1, the difference between the de-interleaving method of this embodiment and the de-interleaving method shown in FIG. 3(d) lies in the steps (j) includes steps (j1) to (j3), and step (k) includes steps (k1) to (k3). In step (j1), the edge-oriented de-interlacing operator 26 generates pixel row data Lx1(t3) according to the input pixel row data Li[s+2]o(i') and Li[s+1]e(i') . In step (j2), the control circuit 24 provides the input pixel column data Li[s+2]o(i') to the mixer 28 as the pixel column data Lx2(t3). In step (j3), the weights of the pixel row data Lx1(t3) and Lx2(t3) are respectively determined according to the weight parameters M and (1-M), to generate the pixel row data Lout by mixing, and use it as the output pixel row data Lo[t+2]o(i') output.

In step (k1), the edge-oriented de-interlacing operator 26 generates pixel row data Lx1( t4). In step (k2), the control circuit 24 provides the input pixel column data Li[s+1]e(i') to the mixer 28 as the pixel column data Lx2(t4). In step (k3), the weights of the pixel row data Lx1(t4) and Lx2(t4) are respectively determined according to the weight parameters M and (1-M), so as to mix and generate the pixel row data Lout, and use it as the output pixel row data Lo[t+2]e(i') output.

The de-interleaving controller 20 of this embodiment can use a motion estimation circuit (not shown) to generate the motion parameter M. Corresponding to the pixel data generated by the mixer 28 in the output image Io, the motion estimation circuit generates a motion parameter M correspondingly. For example, the motion estimation circuit sets the motion estimation area to estimate the motion corresponding to the yth pixel data P[t]o(x, y) corresponding to the xth row of pixels in the frame Fm[t-1] Parameters M[t]o(x, y). x is a natural number less than or equal to N. It is assumed that the data of each pixel row in each odd image field and even image field includes Z strokes of pixel data, and y is a natural number less than or equal to Z.

Please refer to FIG. 8( a ) and FIG. 8( b ), which are schematic diagrams of the motion estimation operation of the motion estimation circuit of this embodiment. The motion estimation circuit synthesizes the odd image field Fd[s] and the even image field Fd[s+1] into a frame Frame, and synthesizes the odd image field Fd[s-2] and the even image field Fd[s-1] The picture frame Pre_Frame.

The motion estimation circuit defines an area A in the frame Frame. For example, the area A includes pixel data Pr1 to Pr9, and the pixel data Pr1-Pr3 are respectively the pixel data P[ s+1]e(x, y-1), P[s+1]e(x, y) and P[s+1]e(x, y+1), pixel data Pr4 to Pr6 are odd images respectively Input the pixel data P[s]o(x, y-1), P[s]o(x, y) and P[s] in the pixel column data Li[s]o(x) in the field Fd[s] o(x, y+1), the pixel data Pr7 to Pr9 are respectively the pixel data P[s+ in the input pixel column data Li[s+1]e(x+1) in the even image field Fd[s+1] 1] e(x+1, y-1), P[s+1]e(x+1, y) and P[s+1]e(x+1, y+1).

Similarly, the motion estimation circuit defines a region B in the frame Pre_Frame, the region B includes pixel data Pre_Pr1-Pre_Pr9, and the pixel data Pre_Pr1-Pre_Pr3 are input pixel row data Li[s-1 in the even image field Fd[s-1] respectively Pixel data in ]e(x) P[s-1]e(x, y-1), P[s-1]e(x, y) and P[s-1]e(x, y+1 ), the pixel data Pre_Pr4-Pre_Pr6 are respectively the pixel data P[s-2]o(x, y-1 ), P[s-2]o(x, y) and P[s-2]o(x, y+1), the pixel data Pre_Pr7-Pre_Pr9 are input pixel columns in the even image field Fd[s-1] respectively Pixel data P[s-1]e(x+1, y-1), P[s-1]e(x+1, y) and P in data Li[s-1]e(x+1) [s-1]e(x+1, y+1).

The motion parameter M[t]o(x,y) corresponding to the pixel P[t]o(x,y) can be generated according to the following equation:

$\mathrm{<span\; class="notranslate">\; m</span>}<span\; class="notranslate">\; [</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; ]</span>\mathrm{<span\; class="notranslate">\; o</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; x</span>}<span\; class="notranslate">\; ,</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\frac{\underset{\mathrm{<span\; class="notranslate">\; j</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\overset{\mathrm{<span\; class="notranslate">\; 9</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; Prj</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; Pre</span>}<span\; class="notranslate">\; \_</span>\mathrm{<span\; class="notranslate">\; Prj</span>}<span\; class="notranslate">\; |</span>}{\mathrm{<span\; class="notranslate">\; Threshold</span>}}$

Threshold is a critical value. The operation of generating the motion parameter M corresponding to the pixel data generated by other interpolation in the frames Fm[t-1] to Fm[t+2] can be analogized according to the operation of generating the motion parameter M[t]o(x, y) get.

The conventional edge-oriented de-interlacing operator is only applied to the edge-oriented de-interlacing in the same field, but the de-interlacing controller of the embodiment of the present invention is based on the corresponding original field through cross-field edge-oriented de-interlacing operator Interpolation produces octave plot frames. In this way, compared to the traditional de-interlacing system that directly displays the two first frames to achieve frequency doubling display, which is prone to image sticking, the de-interlacing controller in this embodiment has low cost and can improve image sticking advantage of the situation.

Furthermore, the de-interlacing controller of this embodiment further utilizes the mixer to refer to the motion degree of the input image to interpolate to obtain the corresponding output image. In this way, the de-interlacing controller of this embodiment interpolates each frame in the output image by considering the motion degree of the input image, so as to further enhance the display effect of the image.

FIG. 9 is a frequency doubling de-interleaving method according to a preferred embodiment of the present invention. In step 910, according to the time adjacent odd and even fields, the odd field can appear before or after the time point of the even field, generating a plurality of de-interlaced frames by directional de-interlacing operation frequency doubling across field edges; in step 920, adaptively blending each de-interlaced frame with the temporally adjacent odd field and the even field to generate an image Compensated de-interlacing frames, for example, mixing each de-interlacing frame with the odd field and the even field using an image motion parameter to generate an image-compensated de-interlacing frame, for example, the image motion parameter is It is determined by a target pixel row data of the de-interlaced frame for image compensation and a plurality of adjacent pixel row data in a plurality of temporally adjacent fields, for example, image motion parameters are related to temporally adjacent positions The absolute value sum of the corresponding pixel difference values of the complex pixel column data.

In summary, although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Those skilled in the art of the present invention can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention should be determined by the claims.

Claims (17)

1. a frequency multiplier de-interlacing method produces an image output in order to respond an input image, and this input image comprises a Qi Tuchang and a bigraph field, and this image output comprises one first interpolation picture frame, it is characterized in that, this de-interlace method comprises:

I bar even number preface input picture element columns certificate according to this strange figure i bar odd number preface input picture element columns certificate and this bigraph field; Produce i bar odd number preface output picture element columns certificate in this first interpolation picture frame via striding the staggered computing of figure field edge oriented solution, i is a natural number;

Export picture element columns certificate according to this i bar even number preface input picture element columns certificate and this strange i+1 bar odd number preface input picture element columns certificate of scheming the field via an i bar even number preface of striding in this first interpolation picture frame of the staggered computing generation of figure field edge oriented solution; And

Change the value of i and repeat all odd number prefaces and the even number preface output picture element columns certificate of above-mentioned steps to obtain this first interpolation picture frame.

2. frequency multiplier de-interlacing method as claimed in claim 1 is characterized in that, the step of this i bar odd number preface output picture element columns certificate more comprises in this first interpolation picture frame of this generation:

Obtain one first computing picture element columns certificate according to this i bar odd number preface input picture element columns certificate and this i bar even number preface input picture element columns certificate via edge-oriented release of an interleave computing;

Import picture element columns certificate as one second computing picture element columns certificate with this i bar odd number preface; And

According to one first weight parameter and one second weight parameter come to determine respectively this first and the weight of this second computing picture element columns certificate, to produce this i bar odd number preface output picture element columns certificate in this first interpolation picture frame; This first weight parameter and this second weight parameter sum are 1, and this first and this second weight parameter system be relevant to the movement degree of this input image.

3. frequency multiplier de-interlacing method as claimed in claim 1 is characterized in that, the step of this i bar even number preface output picture element columns certificate more comprises in this first interpolation picture frame of this generation:

Obtain one first computing picture element columns certificate according to this i+1 bar odd number preface input picture element columns certificate and this i bar even number preface input picture element columns certificate via edge-oriented release of an interleave computing;

Import picture element columns certificate as one second computing picture element columns certificate with this i bar even number preface; And

According to one first weight parameter and one second weight parameter come to determine respectively this first and the weight of this second computing picture element columns certificate, to produce this i bar even number preface output picture element columns certificate in this first interpolation picture frame; This first weight parameter and this second weight parameter sum are 1, and this first and this second weight parameter system be relevant to the movement degree of this input image.

4. frequency multiplier de-interlacing method as claimed in claim 1 is characterized in that, more comprises:

Export picture element columns certificate with this i bar odd number preface input picture element columns certificate as an i bar odd number preface in the one second interpolation picture frame;

According to this i bar odd number preface input picture element columns according to and this i+1 bar odd number preface input picture element columns produce i bar even number preface output picture element columns certificate in this second interpolation picture frame according to coming via edge-oriented release of an interleave computing; And

Change the value of i and repeat all odd number prefaces and the even number preface output picture element columns certificate of above-mentioned steps to obtain this second interpolation picture frame.

5. frequency multiplier de-interlacing method as claimed in claim 1 is characterized in that, more comprises:

I+1 bar even number preface input picture element columns according to this i bar even number preface input picture element columns certificate and this bigraph field produces i bar odd number preface output picture element columns certificate in one the 3rd interpolation picture frame according to coming via edge-oriented release of an interleave computing;

Export picture element columns certificate with this i bar even number preface input picture element columns certificate as an i bar even number preface in the 3rd interpolation picture frame; And

Change the value of i and repeat all odd number prefaces and the even number preface output picture element columns certificate of above-mentioned steps to obtain the 3rd interpolation picture frame.

6. a frequency multiplier de-interlacing controller produces an image output in order to respond an input image, and this input image comprises a Qi Tuchang and a bigraph field, and this image output comprises one first interpolation picture frame, it is characterized in that, this release of an interleave controller comprises:

One internal memory is in order to receive and to store very figure and this bigraph field;

One control circuit, in order to the i bar odd number preface input picture element columns certificate that reads and export this strange figure field, the i+1 bar odd number preface input picture element columns certificate of this strange figure field and the i bar even number preface input picture element columns certificate of this bigraph field, i is a natural number; And

The one edge oriented solution arithmetic unit that interlocks; In order to according to this i bar odd number preface input picture element columns according to and this i bar even number preface input picture element columns produce one first computing picture element columns certificate according to carrying out edge-oriented release of an interleave computing, and according to this i+1 bar odd number preface input picture element columns according to and this i bar even number preface input picture element columns produce one second computing picture element columns certificate according to carrying out edge-oriented release of an interleave computing;

Wherein, this first and this second computing picture element columns according to respectively as i bar odd number preface output picture element columns in this first interpolation picture frame according to and this first interpolation picture frame in i bar even number preface output picture element columns certificate.

7. frequency multiplier de-interlacing controller as claimed in claim 6 is characterized in that, more comprises:

One blender; In order to determine this first computing picture element columns certificate and this i bar odd number preface to import the weight of picture element columns certificate respectively, to produce this i bar odd number preface output picture element columns certificate in this first interpolation picture frame according to one first weight parameter and one second weight parameter;

Wherein, This blender is more in order to determine this second computing picture element columns certificate and this i bar even number preface to import the weight of picture element columns certificate respectively according to one the 3rd weight parameter and one the 4th weight parameter, to produce this i bar even number preface output picture element columns certificate in this first interpolation picture frame; The movement degree that this first is 1 with this second weight parameter sum, this first weight parameter system is relevant to this input image, the 3rd with the 4th weight parameter sum be that the 1 and the 3rd weight parameter is the movement degree that is relevant to this input image.

8. frequency multiplier de-interlacing controller as claimed in claim 6; It is characterized in that this release of an interleave controller imports picture element columns certificate with this i bar odd number preface respectively and this i bar even number preface input picture element columns certificate is exported picture element columns certificate as an i bar even number preface in i bar odd number preface output picture element columns certificate and one the 3rd picture frame in the one second interpolation picture frame.

9. frequency multiplier de-interlacing controller as claimed in claim 8; It is characterized in that; This edge-oriented release of an interleave arithmetic unit in order to according to this i bar odd number preface input picture element columns according to and this i+1 bar odd number preface input picture element columns produce one the 3rd computing picture element columns certificate according to carrying out edge-oriented release of an interleave computing, and according to this i bar even number preface input picture element columns according to and this i+1 bar even number preface input picture element columns produce one the 4th computing picture element columns certificate according to carrying out edge-oriented release of an interleave computing;

10. frequency multiplier de-interlacing controller as claimed in claim 9; It is characterized in that the 3rd and the 4th computing picture element columns certificate is respectively in order to export picture element columns certificate as an i bar odd number preface in i bar even number preface output picture element columns certificate and the 3rd interpolation picture frame in this second interpolation picture frame.

11. frequency multiplier de-interlacing controller as claimed in claim 9 is characterized in that, more comprises:

One blender; In order to determine the 3rd computing picture element columns certificate and this i bar even number preface to import the weight of picture element columns certificate respectively according to one first weight parameter and one second weight parameter; To produce this i bar even number preface output picture element columns certificate in this second interpolation picture frame; This first weight parameter and this second weight parameter sum are 1, and this first and this second weight parameter system be relevant to the movement degree of this input image;

Wherein, This blender is more in order to determine the 4th computing picture element columns certificate and this i bar odd number preface to import the weight of picture element columns certificate respectively according to one the 3rd weight parameter and one the 4th weight parameter; Producing in the 3rd interpolation picture frame this i bar odd number preface output picture element columns certificate, the 3rd with the 4th weight parameter sum be the movement degree that the 1 and the 3rd weight parameter system is relevant to this input image.

12. a frequency multiplier de-interlacing method is characterized in that, comprising:

According to time adjacent a Qi Tuchang and a bigraph field, produce a plurality of release of an interleave picture frames via striding the staggered computing frequency multiplication of figure field edge oriented solution; And

Adaptability is carried out in each release of an interleave picture frame and this strange figure field and this bigraph field mixes to produce the release of an interleave picture frame of an image compensation.

13. frequency multiplier de-interlacing method as claimed in claim 12 is characterized in that, this adaptability blend step is with very figure field and this bigraph field utilize an image kinematic parameter to mix the release of an interleave picture frame that produces this image compensation with each release of an interleave picture frame.

14. frequency multiplier de-interlacing method as claimed in claim 12 is characterized in that, this strange figure system comes across before the time point of this bigraph field.

15. frequency multiplier de-interlacing method as claimed in claim 12 is characterized in that, this strange figure system comes across after the time point of this bigraph field.

16. frequency multiplier de-interlacing method as claimed in claim 13; It is characterized in that, this image kinematic parameter system by the adjacent a plurality of picture element columns in position in a target picture element columns certificate of the release of an interleave picture frame of this image compensation figure field adjacent with a plurality of times according to determine.

17. frequency multiplier de-interlacing method as claimed in claim 13 is characterized in that, this image kinematic parameter system is provided by a motion estimation circuit.

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