CN101739971A - Method for modulating waveform by grid driving signal and framework thereof - Google Patents

Abstract

A method and its framework of the grid driving signal modulation waveform, it presumes a waveform table and stores in a memorizer first, the waveform table is size and width of the scanning line waveform; a time schedule controller reads the waveform table from the memory, outputs a control signal according to the value of the waveform table to drive a switch to be switched on and off, simultaneously outputs a high voltage by a voltage source, converts the control signal into a gate driving voltage and sends the gate driving voltage to a gate driver, and the gate driving voltage can obtain the waveform preset in the waveform table after a high frequency part is filtered by a low pass filter; the grid driving voltage can also be used for filtering and amplifying a high-frequency part in the grid driver and then outputting the high-frequency part to each scanning line one by one; or filtered by the scan lines themselves.

Description

Method and Architecture of Gate Drive Signal Modulating Waveform

technical field

The present invention relates to a new gate drive signal generation technology in a thin film transistor liquid crystal display (TFT LCD), in particular to a method for modulating waveforms using a gate drive signal and its architecture.

Background technique

Press, at present, the gate signal for driving a thin-film transistor liquid crystal display (TFT LCD) is roughly composed of two parts, one of which is a timing controller that generates two complementary control signals, which are matched with the switching and discharging of metal-oxide-semiconductor field-effect transistors. The resistor forms a DC voltage that converts the oscillating voltage VGHP into a cycle driving voltage Vgh with discharge decay characteristics, and the driving voltage is directly provided to the gate driving circuit of the thin film transistor liquid crystal display. At the same time, the timing controller provides a control signal to control when the gate driving circuit should output the driving voltage and when it should be turned off; finally, the driving waveform seen on the gate of the thin film transistor is a chamfered square wave. In addition to the slightly complicated circuit, the adjustment of the driving waveform must take into account the above two control signals and the resistance value of the discharge chamfer, and the resistor for chamfering will consume power all the time, and the thin film transistor is driven by a square wave with chamfering The grid has a further disadvantage, that is, when the scanning line is very long, the scanning waveform at the end will be seriously deformed, resulting in uneven color of the image under the same gray scale.

Therefore, in view of the above problems, the present invention proposes a method for modulating the waveform of the gate drive signal and its structure, which can improve the uniformity of large sizes, reduce the power consumption of the drive circuit, and simplify the complexity of related circuits to make the waveform of the drive signal The adjustment is easier to effectively overcome the above-mentioned problems.

Contents of the invention

The main purpose of the present invention is to provide a method for modulating waveforms of gate drive signals and its architecture, which provides a waveform table for recording the size and width of scanning line waveforms, allowing the timing controller to read the waveform table and send a control signal, The gate driving voltage waveform required by the user is generated by simply switching the circuit, without the power consumption of the chamfering resistor, so that the waveform at the end of the scanning line has the slightest distortion.

Another object of the present invention is to provide a method for modulating the waveform of the gate drive signal and its structure, which uses the method of modulating the pulse width of the DC power supply to drive the control signal output by the timing controller to a switch to generate a voltage signal, and after filtering After that, the required waveform signal is generated and sent to the gate driver.

Another object of the present invention is to provide a method for modulating the waveform of a gate drive signal and its structure, which improves the structure of the gate driver, and arranges a low-pass filter in the gate driver so that it has the function of low-pass filtering. After receiving a plurality of control signals output by the timing controller and a voltage source, the signals are modulated into required waveforms.

In order to achieve the above purpose, the present invention provides a framework for modulating waveforms of gate drive signals, including: a timing controller that reads a waveform table and sends a control signal according to the waveform table; a switch that receives the control signal and a voltage The source controls the switch through the timing controller and outputs a voltage signal; and a low-pass filter filters the voltage signal and generates a gate driving voltage.

The present invention also provides a gate drive signal modulation waveform architecture, including: a timing controller, which reads a waveform table and sends a plurality of control signals according to the waveform table; and a gate driver, which receives the control signal and a voltage source , filter the high-frequency part of the control signal and amplify it into a gate driving voltage to drive a plurality of scanning lines one by one.

The present invention also provides a method for modulating a waveform of a gate drive signal, comprising the following steps: a voltage source outputs a voltage, and a timing controller reads a waveform table, and sends at least one control signal according to the waveform table; filtering the control signal After the high frequency part, a gate driving voltage is formed; and the gate driving voltage is output to a plurality of scanning lines.

The specific embodiments are described in detail below, so that it is easier to understand the purpose, technical content, characteristics and effects of the present invention.

Description of drawings

FIG. 1 is a block diagram of a first embodiment of a gate drive signal modulation waveform architecture of the present invention.

FIG. 2 is a block diagram of a second embodiment of the structure of the modulation waveform of the gate driving signal of the present invention.

FIG. 3 is a schematic diagram of input and output signals of the gate driver in FIG. 1 .

FIG. 4 is a schematic diagram of input and output signals of the gate driver in FIG. 2 .

[Description of main component symbols]

10 memory

12 wave tables

14 timing controller

15 voltage source

16 switches

18 low pass filter

19 voltage Vgh

20, 20' gate driver

22 scan lines

24 output buffers

26 switches

Detailed ways

The present invention provides a method for modulating a waveform of a gate driving signal and its structure. Taking a sinusoidal waveform driving signal as an example, two methods are used to modulate the voltage waveform sent by a gate driver to a scanning line.

Fig. 1 is the first implementation framework of gate drive signal modulation waveform in the present invention, comprises a memory 10, a timing controller 14, a switch 16, a low-pass filter 18 and a gate driver 20, and memory 10 is electronic Erasable read-only memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), in which there is stored a waveform table 12, which is used to record the relevant settings of the gate drive signal, including the gate driver 20 sent to the scan line The size and width of the waveform, for example, the program codes stored with 0 and 1 represent low and high waveforms respectively; the timing controller 14 reads the waveform table 12 and sends a control signal according to the content of the waveform table 12 to control the opening and closing of the switch 16 timing, when the switch 16 is closed, a voltage source 15 is input, and the voltage source 15 is a high-voltage direct current, and the voltage of the control signal and the voltage source 15 is combined at the switch 16 to form a drivable current and output a voltage signal, while the low The pass filter 18 filters the high frequency part of the voltage signal to generate a gate driving voltage, which is sent to a gate driver 20 to output signals to a plurality of scanning lines (not shown in the figure). The figure also includes a voltage Vgh 19, which provides the high voltage of the scanning line.

In this embodiment, the method for modulating the waveform of the gate drive signal is: when the user sets the timing controller 14 to read the parameters of the sinusoidal waveform in the waveform table 12, the control signal waveform output by the timing controller 14 is sinusoidal pulse width modulation Waveform (Sinusoidal Pulse Width. Modulation, SPWM), which forms a voltage signal after passing through the switch 16. This voltage signal passes through the low-pass filter 18 to filter out the high-frequency part to form a sine wave gate drive voltage. The gate drive voltage is sent to to the gate driver 20. The control signal includes a clock signal, a vertical start pulse (STV) and a sinusoidal pulse width modulation waveform (SPWM).

Another implementation structure of the present invention is shown in FIG. 2 , including a memory 10, a timing controller 14 and a gate driver 20'. The memory 10 is the same as the previous embodiment and is an electronically erasable read-only memory, and in A waveform table 12 is stored therein to record related settings of the gate driving signal, including the size and width of the waveform sent to the scanning line by the gate driver 20 ′. In this embodiment, the method of modulating the gate driving voltage waveform is as follows: the timing controller 14 reads the waveform table 12 in the memory 10, and sends a control signal to a gate driver 20' according to the settings in the waveform table 12, At the same time, the voltage source 15 inputs the voltage to the gate driver 20'; the gate driver 20' filters the high-frequency part of the control signal and amplifies it into a gate driving voltage, and outputs the gate driving voltage to a plurality of scanning lines 22 one by one. .

In this embodiment, the structure of the gate driver 20' is different from that of the gate driver 20 in FIG. 1. The gate driver 20 in FIG. An output buffer 26 is included in the control unit 24, and the signal of the gate driving voltage of the input gate driver 20 includes a clock signal, a vertical start pulse (vertical start pulse, STV) and a sinusoidal pulse width modulation waveform (SPWM) . The gate driver 20' in FIG. 2 is shown in FIG. 4. In addition to the output buffer 26, the control unit 24 also includes a switch 28, which has the same purpose as the switch 16 in FIG. 1. According to the waveform table 12, the The timing controller 14 controls the opening and closing timing of the switch 28 , and a clock signal, a vertical start pulse (vertical start pulse, STV) and a sinusoidal pulse width modulation waveform (SPWM) are control signals output by the timing controller 14 .

Since the gate driver 20' in the structure of FIG. To amplify the gate driving voltage, that is, to combine the functions of the switch 16 and the low-pass filter 18 in FIG. Therefore, the scanning line 22 can also be used for filtering. When the gate driving voltage is a sinusoidal pulse width modulation waveform and is input to the scanning line 22 by the gate driver 20', a sinusoidal signal can be formed and transmitted to the end of the scanning line 22, and the sinusoidal signal waveform is at the end of the scanning line 22. with minimal distortion. In summary, the gate drive signal modulation waveform method and its architecture provided by the present invention is a pre-established waveform table, which enables the timing controller to output a control signal representing the trigger waveform of the pulse width modulation after reading it, and uses a simple Switch the circuit to generate the scan line waveform required by the user; because only one control signal is generated by the timing controller, and no chamfering resistor is required, the power consumption of the chamfering electric group is reduced and the circuit is simplified, which not only reduces the cost, but also can Minimizes distortion of the waveform at the end of the scanline. The phase, magnitude and width of the drive signal can be changed by changing the parameters in the waveform table, making the setting easier.

The above-mentioned ones are only preferred embodiments of the present invention, and are not intended to limit the implementation scope of the present invention. Therefore, all equal changes or modifications based on the features and spirit described in the claims of the present invention shall be included in the protection scope of the present invention.

Claims (26)

1. A architecture for gate drive signal modulation waveforms, comprising: A timing controller reads a wave table and sends a control signal according to the wave table; a switch, receiving the control signal and a voltage source, controlling the switch through the timing controller and outputting a voltage signal; and A low-pass filter filters the voltage signal and generates a gate driving voltage. 2. The architecture for modulating waveforms of gate driving signals as claimed in claim 1, wherein the waveform table is stored in an EEPROM. 3. The architecture of gate driving signal modulation waveform as claimed in claim 1, wherein the voltage source is a high voltage direct current. 4. The architecture of gate driving signal modulation waveform as claimed in claim 1, wherein the program codes of 0 and 1 in the waveform table represent low and high waveforms respectively. 5 . The architecture for modulating waveforms of gate driving signals as claimed in claim 1 , wherein the waveform table allows the user to set the waveform size and width of the gate voltage. 6 . 6 . The structure of gate driving signal modulation waveform according to claim 1 , wherein the waveform of the control signal is a sinusoidal pulse width modulation waveform, and the gate driving voltage formed after passing through the low-pass filter is a sinusoidal wave. 7. The structure of the modulation waveform of the gate driving signal as claimed in claim 1, further comprising a DC high voltage, which is input after the low-pass filter. 8. The architecture of gate driving signal modulation waveform as claimed in claim 1, wherein the voltage signal is converted from the control signal by a voltage source. 9. The structure of the modulation waveform of the gate driving signal as claimed in claim 1, further comprising a gate driver outputting the gate driving voltage to a plurality of scan lines one by one. 10. A gate drive signal modulation waveform architecture comprising: A timing controller reads a wave table and sends a plurality of control signals according to the wave table; and A gate driver receives the control signal and a voltage source, filters the high frequency part of the control signal and amplifies it into a gate drive voltage to drive multiple scanning lines one by one. 11. The architecture of gate driving signal modulation waveform as claimed in claim 10, wherein the voltage source is a high voltage direct current. 12. The structure of gate driving signal modulation waveform as claimed in claim 10, wherein the control signal comprises a clock signal, a vertical start pulse and a sinusoidal pulse width modulation waveform. 13. The architecture for modulating waveforms of gate driving signals as claimed in claim 10, wherein the waveform table is stored in an EEPROM. 14. The architecture of gate driving signal modulation waveform as claimed in claim 10, wherein the scan line can filter the high frequency part of the control signal. 15. The architecture of gate driving signal modulation waveform as claimed in claim 10, wherein the waveform table is set by the user. 16. The architecture of gate driving signal modulation waveform as claimed in claim 10, wherein the waveform table sets the size and width of the scan line waveform. 17. A method of modulating a gate drive signal waveform, comprising the steps of: A voltage source outputs voltage, and a timing controller reads a wave table and sends at least one control signal according to the wave table; forming a gate drive voltage after filtering the high frequency part of the control signal; and The gate driving voltage is output to a plurality of scan lines. 18. The method for modulating the waveform of a gate driving signal as claimed in claim 17, wherein the timing controller reads the waveform table from an EEPROM. 19. The method for modulating the waveform of a gate driving signal as claimed in claim 17, wherein the waveform table is configured by the user to set the size and width of the waveform. 20. The method for modulating a waveform of a gate driving signal as claimed in claim 17, further comprising inputting a DC high voltage to supply a gate driver with a voltage output to the scan line. 21. The method for modulating the waveform of a gate driving signal as claimed in claim 17, further comprising driving a switch opening timing through the timing controller to convert the control signal to generate a voltage signal. 22. The method for modulating the waveform of a gate driving signal as claimed in claim 21, wherein the voltage signal is filtered by a low-pass filter to form the gate driving voltage and then transmitted to a gate driver. 23. The method for modulating the waveform of a gate drive signal as claimed in claim 17, wherein the step of filtering the high-frequency portion of the control signal to form the gate drive voltage is performed in a gate driver, and the gate drive voltage amplification. 24. The method for modulating the waveform of a gate driving signal as claimed in claim 17, wherein the step of filtering the high frequency part of the control signal is performed by the scan line. 25. The method for modulating the gate drive signal waveform according to claim 17, wherein when the gate drive voltage is a sinusoidal pulse width modulation waveform, a sinusoidal signal can be formed after being input into the scan line and transmitted to the end of the scan line . 26. The method for modulating a waveform of a gate driving signal as claimed in claim 17, wherein the driving signal comprises a clock signal, a vertical start pulse and a sinusoidal pulse width modulation waveform.

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