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CN101739112B - Low-voltage slow start circuit - Google Patents

Low-voltage slow start circuit Download PDF

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CN101739112B
CN101739112B CN 200910194277 CN200910194277A CN101739112B CN 101739112 B CN101739112 B CN 101739112B CN 200910194277 CN200910194277 CN 200910194277 CN 200910194277 A CN200910194277 A CN 200910194277A CN 101739112 B CN101739112 B CN 101739112B
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voltage
capacitor
input voltage
transistor mos1
low
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CN101739112A (en
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梁红涛
赖增茀
郑维
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Vtron Group Co Ltd
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Vtron Technologies Ltd
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Abstract

本发明公开了一种低电压缓启动电路,包括晶体管MOS1和控制回路,所述晶体管MOS1为N-channel MosFET,晶体管MOS1的漏极接主输入电压Vin1,晶体管MOS1的源极接输出电压Vout,晶体管MOS1的栅极接控制回路,控制回路的另一端与辅助输入电压Vin2相连,由于采用了有差值且差值大于晶体管MOS1的阈值电压的两路输入电压Vin1和Vin2,使得晶体管MOS1能够正常导通,又由于控制回路控制晶体管MOS1的导通时间,并使输出电压平滑上升,从而实现低电压缓启动和时序控制的功能,同时也解决了输出电压出现打嗝现象的问题。

Figure 200910194277

The invention discloses a low-voltage slow start circuit, comprising a transistor MOS1 and a control loop, the transistor MOS1 is an N-channel MosFET, the drain of the transistor MOS1 is connected to the main input voltage Vin1, and the source of the transistor MOS1 is connected to the output voltage Vout, The gate of the transistor MOS1 is connected to the control loop, and the other end of the control loop is connected to the auxiliary input voltage Vin2. Due to the use of two input voltages Vin1 and Vin2 with a difference and the difference is greater than the threshold voltage of the transistor MOS1, the transistor MOS1 can work normally. It is turned on, and because the control loop controls the conduction time of the transistor MOS1, and the output voltage rises smoothly, so as to realize the functions of low voltage slow start and sequence control, and also solve the problem of hiccups in the output voltage.

Figure 200910194277

Description

一种低电压缓启动电路A low voltage slow start circuit

技术领域 technical field

本发明涉及服务器电源领域,特别涉及一种低电压缓启动电路。The invention relates to the field of server power supplies, in particular to a low-voltage slow-start circuit.

背景技术 Background technique

在ATX(AT eXternal)电源运用于服务器系统时,多块单板在系统中上电,要求单板多路输出有上电缓启的功能,另还要有时序的先后控制和改善热插拔对电源内部的冲击,提出了缓启动电路的需求。一般缓启动电路多见于通信系统中,输入输出电压多为48V,其多采用控制P-channel MosFET(P沟道场效应管)来实现,当运用在更低电压如3V时,因MosFET(场效应管)的阈值电压多在3V左右,会出现MosFET处于微导通状态,这时MosFET功耗会较大,且易损坏。When the ATX (AT eXternal) power supply is used in the server system, multiple single boards are powered on in the system, and the multi-channel output of the single board is required to have the function of power-on slow start, and also to control the sequence of timing and improve hot swap The impact on the inside of the power supply raises the need for a slow start circuit. Generally, slow start circuits are more common in communication systems, and the input and output voltages are mostly 48V, which are mostly implemented by controlling P-channel MosFETs (P-channel field effect transistors). When used at lower voltages such as 3V, due to the The threshold voltage of the tube) is mostly around 3V, and the MosFET will be in a slightly turned-on state. At this time, the MosFET will consume a lot of power and be easily damaged.

发明内容 Contents of the invention

本发明所解决的问题在于提供一种低电压缓启动电路,解决现有缓启动电路运用于低压时MosFET易损耗、输出电压出现打嗝现象等问题及对时序控制的需求。The problem to be solved by the present invention is to provide a low-voltage slow-start circuit, which solves the problems of easy loss of MosFETs and hiccups in the output voltage when the existing slow-start circuit is applied to low voltage, and the demand for timing control.

为了解决上述问题,本发明提供了一种低电压缓启动电路,包括晶体管MOS1和控制回路,所述晶体管MOS1为N-沟道MosFET,晶体管MOS1的漏极接主输入电压Vin1,晶体管MOS1的源极接输出电压Vout,晶体管MOS1的栅极接控制回路,控制回路的另一端与辅助输入电压Vin2相连,用于控制晶体管MOS1的导通时间,并使输出电压Vout平滑上升,辅助输入电压Vin2高于主输入电压Vin1,且高出的电压值大于晶体管MOS1的阈值电压,所述控制回路包括时序电路和输出控制电路,时序电路和输出控制电路串接于辅助输入电压Vin2和晶体管MOS1的栅极之间,输出控制电路的另一端与辅助输入电压Vin2相连,所述时序电路包括电阻R1、R3和R4,电容C2和比较器U1,电阻R1与R4串接在辅助输入电压Vin2与地线之间,电阻R1与R4的接点与比较器U1的负端相接;电阻R3与电容C2串接在辅助输入电压Vin2与地线之间,电阻R3与电容C2的接点与比较器U1的正端相接,比较器U1的比较输出端接输出控制电路,所述输出控制电路包括电阻R2、R5和R6及电容C3,电阻R2、R5与R6串接在辅助输入电压Vin2与地线之间,电阻R2与R5的接点与时序电路相接,电阻R2起到限制电流的作用,电容C3正极接R5、R6的接点,负极接R6的另一端,电阻R5、R6与电容C3的共接端与晶体管MOS1的栅极相接。In order to solve the above problems, the present invention provides a low-voltage slow start circuit, including a transistor MOS1 and a control loop, the transistor MOS1 is an N-channel MosFET, the drain of the transistor MOS1 is connected to the main input voltage Vin1, and the source of the transistor MOS1 The pole is connected to the output voltage Vout, the gate of the transistor MOS1 is connected to the control loop, and the other end of the control loop is connected to the auxiliary input voltage Vin2, which is used to control the conduction time of the transistor MOS1, and to make the output voltage Vout rise smoothly, and the auxiliary input voltage Vin2 is high is higher than the main input voltage Vin1, and the higher voltage value is greater than the threshold voltage of the transistor MOS1, the control loop includes a sequential circuit and an output control circuit, and the sequential circuit and the output control circuit are connected in series to the auxiliary input voltage Vin2 and the gate of the transistor MOS1 Between, the other end of the output control circuit is connected to the auxiliary input voltage Vin2, the sequential circuit includes resistors R1, R3 and R4, capacitor C2 and comparator U1, the resistors R1 and R4 are connected in series between the auxiliary input voltage Vin2 and the ground wire Between, the junction of resistors R1 and R4 is connected to the negative terminal of comparator U1; the resistor R3 and capacitor C2 are connected in series between the auxiliary input voltage Vin2 and the ground wire, and the junction of resistor R3 and capacitor C2 is connected to the positive terminal of comparator U1 connected, the comparison output terminal of the comparator U1 is connected to the output control circuit, the output control circuit includes resistors R2, R5 and R6 and a capacitor C3, and the resistors R2, R5 and R6 are connected in series between the auxiliary input voltage Vin2 and the ground wire, The junction of resistors R2 and R5 is connected to the sequential circuit, the resistor R2 plays a role of limiting the current, the positive pole of capacitor C3 is connected to the junction of R5 and R6, the negative pole is connected to the other end of R6, the common terminal of resistors R5, R6 and capacitor C3 is connected to The gates of the transistor MOS1 are connected.

优选地,还包括保险丝F1,保险丝F1串接在主输入电压Vin1和晶体管MOS1的漏极之间。Preferably, a fuse F1 is further included, and the fuse F1 is connected in series between the main input voltage Vin1 and the drain of the transistor MOS1.

优选地,还包括电容C1,电容C1串接在晶体管MOS1的漏极和地之间。Preferably, a capacitor C1 is further included, and the capacitor C1 is connected in series between the drain of the transistor MOS1 and the ground.

优选地,当运用于多路时序控制时,各单路低电压缓启动电路的比较器共接同一负端电压。Preferably, when used in multi-channel timing control, the comparators of each single-channel low-voltage slow-start circuit are connected to the same negative terminal voltage.

优选地,电容C2是电容值在0.01uF~22uF之间的电容和/或陶瓷电容或钽电容和/或R1/R3/R4为10K。Preferably, the capacitor C2 is a capacitor with a capacitance value between 0.01uF-22uF and/or a ceramic capacitor or a tantalum capacitor and/or R1/R3/R4 is 10K.

优选地,电容C3是电容值在10uF~47uF之间的电容和/或钽电容。Preferably, the capacitor C3 is a capacitor and/or a tantalum capacitor with a capacitance value between 10uF˜47uF.

优选地,所述主输入电压Vin1的电压值在1V~10V之间,所述辅助输入电压Vin2的电压值在4V~12V之间,辅助输入电压Vin2的电压高于主输入电压Vin1,且高出3V以上。Preferably, the voltage value of the main input voltage Vin1 is between 1V and 10V, the voltage value of the auxiliary input voltage Vin2 is between 4V and 12V, and the voltage of the auxiliary input voltage Vin2 is higher than the main input voltage Vin1 and higher than Out of 3V or more.

由于该低电压缓启动电路采用了差值大于晶体管阈值电压的两路输入电压,且晶体管为N-channel MosFET,使得晶体管能够正常导通,又由于采用了控制回路,使得晶体管的导通时间和输出电压得到控制,从而解决了现有缓启动电路运用于低压时MOS管易损坏和输出电压出现打嗝现象等问题以及对时序控制的需求。Because the low-voltage slow start circuit uses two input voltages whose difference is greater than the threshold voltage of the transistor, and the transistor is an N-channel MosFET, the transistor can be turned on normally, and because of the control loop, the turn-on time of the transistor and The output voltage is controlled, thereby solving the problems that the MOS tube is easily damaged and the output voltage hiccups when the existing slow-start circuit is applied to low voltage, and the need for timing control.

附图说明 Description of drawings

图1是本发明低电压缓启动电路的第一实施例结构示意图;Fig. 1 is a schematic structural diagram of the first embodiment of the low voltage slow start circuit of the present invention;

图2是本发明低电压缓启动电路的第二实施例结构示意图;Fig. 2 is a schematic structural diagram of the second embodiment of the low voltage slow start circuit of the present invention;

图3是本发明低电压缓启动电路的第三实施例结构示意图;Fig. 3 is a schematic structural diagram of the third embodiment of the low-voltage slow-start circuit of the present invention;

图4是本发明低电压缓启动电路的第四实施例结构示意图;4 is a schematic structural diagram of a fourth embodiment of a low-voltage slow-start circuit of the present invention;

图5是本发明低电压缓启动电路的第五实施例结构示意图;Fig. 5 is a schematic structural diagram of a fifth embodiment of the low-voltage slow-start circuit of the present invention;

图6是本发明低电压缓启动电路的第五实施例缓启动时间示意图;Fig. 6 is a schematic diagram of the slow start time of the fifth embodiment of the low voltage slow start circuit of the present invention;

图7是本发明低电压缓启动电路的第六实施例结构示意图;7 is a schematic structural diagram of the sixth embodiment of the low-voltage slow-start circuit of the present invention;

具体实施方式 Detailed ways

本发明低电压缓启动电路采用分别接于晶体管漏极和栅极的主输入电压Vin1和辅助输入电压Vin2,且辅助输入电压比主输入电压高出的电压值大于晶体管的阈值电压,使得N型晶体管MOS1能够正常导通,又在晶体管漏极和辅助输入电压间串接一控制回路,控制晶体管的导通时间,实现了时序的控制,控制回路同时还能控制晶体管的栅极电压平滑上升,从而使输出电压平滑上升,解决了输出电压出现打嗝现象的问题The low-voltage slow start circuit of the present invention adopts the main input voltage Vin1 and the auxiliary input voltage Vin2 respectively connected to the drain and gate of the transistor, and the voltage value of the auxiliary input voltage higher than the main input voltage is greater than the threshold voltage of the transistor, so that the N-type Transistor MOS1 can be turned on normally, and a control loop is connected in series between the drain of the transistor and the auxiliary input voltage to control the turn-on time of the transistor and realize timing control. The control loop can also control the gate voltage of the transistor to rise smoothly. Thus, the output voltage rises smoothly, which solves the problem of hiccups in the output voltage

下面通过附图和实施例,对本发明的技术方案做进一步的详细描述。The technical solutions of the present invention will be described in further detail below with reference to the accompanying drawings and embodiments.

实施例一:Embodiment one:

如图1所示,低电压缓启动电路包括晶体管MOS1和控制回路,所述晶体管MOS1为N-channel MosFET,晶体管MOS1的漏极接主输入电压Vin1,晶体管MOS1的源极接输出电压Vout,晶体管MOS1的栅极接控制回路,控制回路的另一端与辅助输入电压Vin2相连,用于控制晶体管MOS1的导通时间,并使输出电压平滑上升,辅助输入电压Vin2高于主输入电压Vin1,且高出的电压值大于晶体管MOS1的阈值电压。As shown in Figure 1, the low-voltage slow start circuit includes a transistor MOS1 and a control loop, the transistor MOS1 is an N-channel MosFET, the drain of the transistor MOS1 is connected to the main input voltage Vin1, the source of the transistor MOS1 is connected to the output voltage Vout, and the transistor MOS1 is connected to the output voltage Vout. The gate of MOS1 is connected to the control loop, and the other end of the control loop is connected to the auxiliary input voltage Vin2, which is used to control the conduction time of the transistor MOS1 and make the output voltage rise smoothly. The auxiliary input voltage Vin2 is higher than the main input voltage Vin1, and high The output voltage value is greater than the threshold voltage of transistor MOS1.

其工作过程为:当电路上电时,控制回路输出的控制电压无法使晶体管MOS1导通,晶体管MOS1源极无输出,当电路上电完成后,控制回路输出的控制电压可以使晶体管MOS1导通,且晶体管MOS1源极的输出电压Vout平滑上升,输出电压Vout与输入电压有一定的间隔,从而实现低电压缓启动的功能。Its working process is: when the circuit is powered on, the control voltage output by the control loop cannot turn on the transistor MOS1, and the source of the transistor MOS1 has no output. When the circuit is powered on, the control voltage output by the control loop can turn on the transistor MOS1 , and the output voltage Vout of the source of the transistor MOS1 rises smoothly, and there is a certain interval between the output voltage Vout and the input voltage, so as to realize the function of low-voltage slow start.

实施例二:Embodiment two:

本实施例与上述实施例一的不同之处主要在于,本实施例在晶体管MOS1漏极和主输入电压Vin1之间接入保险丝F1,如图2所示,保险丝F1起保护电路的作用。The difference between this embodiment and the first embodiment above is that a fuse F1 is connected between the drain of the transistor MOS1 and the main input voltage Vin1 in this embodiment. As shown in FIG. 2 , the fuse F1 functions as a circuit protection.

实施例二中的其它技术特征与实施例一中的相同,在此不予赘述。Other technical features in the second embodiment are the same as those in the first embodiment, and will not be repeated here.

实施例三:Embodiment three:

本实施例与上述实施例一的不同之处主要在于,本实施例在晶体管MOS1漏极和地之间接入储能电容C1,如图3所示。The main difference between this embodiment and the first embodiment above is that this embodiment connects an energy storage capacitor C1 between the drain of the transistor MOS1 and the ground, as shown in FIG. 3 .

实施例三中的其它技术特征与实施例一中的相同,在此不予赘述。Other technical features in the third embodiment are the same as those in the first embodiment, and will not be repeated here.

实施例四:Embodiment four:

本实施例与上述实施例一、二、三的不同之处主要在于,本实施例中对实施例一中的控制回路进行了进一步限定,将控制回路具体由时序电路和输出控制电路来实现,同时综合实施例二、三的特征,在晶体管漏极接入储能电容和保险丝,如图4所示,低电压缓启动电路包括保险丝F1、电容C1、晶体管MOS1和控制回路,保险丝F1和电容C1串接在主输入电压Vin1和地之间,保险丝F1和电容C1的接点接晶体管MOS1的漏极,控制回路包括时序电路和输出控制电路,时序电路和输出控制电路串接于辅助输入电压Vin2和晶体管MOS1的栅极之间,输出控制电路的另一端与辅助输入电压Vin2相连。The difference between this embodiment and the above-mentioned embodiments 1, 2, and 3 is that the control loop in embodiment 1 is further limited in this embodiment, and the control loop is specifically realized by a sequential circuit and an output control circuit. Simultaneously, combining the characteristics of Embodiments 2 and 3, an energy storage capacitor and a fuse are connected to the drain of the transistor, as shown in Figure 4, the low-voltage slow start circuit includes a fuse F1, a capacitor C1, a transistor MOS1 and a control circuit, a fuse F1 and a capacitor C1 is connected in series between the main input voltage Vin1 and the ground, the junction of the fuse F1 and the capacitor C1 is connected to the drain of the transistor MOS1, the control circuit includes a timing circuit and an output control circuit, and the timing circuit and the output control circuit are connected in series to the auxiliary input voltage Vin2 Between and the gate of the transistor MOS1, the other end of the output control circuit is connected with the auxiliary input voltage Vin2.

其工作过程为:当辅助输入电压Vin2上电时,时序电路输出一个低电平给输出控制电路,输出控制电路输出一个控制电压给晶体管MOS1,此时晶体管无法导通,输出电压Vout为零;当辅助输入电压Vin2上电完成后,时序电路输出一个高电平给输出控制电路,输出控制电路输出另一个控制电压给晶体管MOS1,当晶体管栅极和漏极之间的电压差大于晶体管的阈值电压,且主输入电压Vin1上电完成时,晶体管源极有输出,输出电压Vout大于零。Its working process is: when the auxiliary input voltage Vin2 is powered on, the sequential circuit outputs a low level to the output control circuit, and the output control circuit outputs a control voltage to the transistor MOS1. At this time, the transistor cannot be turned on, and the output voltage Vout is zero; When the auxiliary input voltage Vin2 is powered on, the sequential circuit outputs a high level to the output control circuit, and the output control circuit outputs another control voltage to the transistor MOS1, when the voltage difference between the gate and drain of the transistor is greater than the threshold of the transistor voltage, and when the main input voltage Vin1 is powered on, the source of the transistor has an output, and the output voltage Vout is greater than zero.

实施例四中的其它技术特征与实施例一中的相同,在此不予赘述。Other technical features in the fourth embodiment are the same as those in the first embodiment, and will not be repeated here.

实施例五:Embodiment five:

本实施例与上述实施例四的不同之处主要在于,本实施例中对实施例四中的时序电路和输出控制电路进行了进一步限定,将时序电路和输出控制电路由实施例五中具体的元器件来实现,如图5所示为本发明低电压缓启动电路第三实施例的结构示意图,其具体结构为:The difference between this embodiment and the above-mentioned fourth embodiment mainly lies in that the sequential circuit and the output control circuit in the fourth embodiment are further limited in this embodiment, and the sequential circuit and the output control circuit are defined by the specific ones in the fifth embodiment components, as shown in Figure 5 is a schematic structural diagram of the third embodiment of the low-voltage slow start circuit of the present invention, its specific structure is:

时序电路包括电阻R1、R3和R4,电容C2和比较器U1,电阻R1与R4串接在辅助输入电压Vin2与地线之间,电阻R1与R4的接点与比较器U1的负端相接,提供一个固定的电压;电阻R3与电容C2串接在辅助输入电压Vin2与地线之间,电阻R3与电容C2的接点与比较器U1的正端相接,比较器U1的比较输出端接输出控制电路,通过调节C2来控制比较器U1翻转的时间;The sequential circuit includes resistors R1, R3 and R4, capacitor C2 and comparator U1. Resistors R1 and R4 are connected in series between the auxiliary input voltage Vin2 and the ground wire. The junction of resistors R1 and R4 is connected to the negative terminal of comparator U1. Provide a fixed voltage; resistor R3 and capacitor C2 are connected in series between the auxiliary input voltage Vin2 and the ground wire, the junction of resistor R3 and capacitor C2 is connected to the positive terminal of comparator U1, and the comparison output terminal of comparator U1 is connected to the output The control circuit controls the flipping time of the comparator U1 by adjusting C2;

输出控制电路包括电阻R2、R5和R6及电容C3,电阻R2、R5与R6串接在辅助输入电压Vin2与地线之间,电阻R2与R5的接点与比较器U1的比较输出端相接,电阻R2起到限制电流的作用,电容C3并联于电阻R6上,电阻R5、R6与电容C3的共接端与晶体管MOS1的栅极相接,RC3(R指电阻R2、R5串联再与电阻R6并联的等效电阻)充电控制MOS1的导通。The output control circuit includes resistors R2, R5, R6 and capacitor C3. The resistors R2, R5, and R6 are connected in series between the auxiliary input voltage Vin2 and the ground wire. The junction of the resistors R2 and R5 is connected to the comparison output terminal of the comparator U1. Resistor R2 acts to limit the current, capacitor C3 is connected in parallel to resistor R6, the common terminal of resistors R5, R6 and capacitor C3 is connected to the gate of transistor MOS1, RC3 (R refers to resistors R2 and R5 connected in series and then connected to resistor R6 Parallel equivalent resistance) charging controls the conduction of MOS1.

图5所示电路的具体工作过程为:当辅助输入电压Vin2上电时,电压通过R1与R4进行分压,比较器U1的负端电压高于正端电压,比较器U1的比较输出端输出Low(低电平),此时晶体管MOS1栅极和漏极间的压差未达到晶体管的导通阈值,则晶体管MOS1源极无输出;当辅助输入电压Vin2上电后,电容C2通过R3充电,当正端充电的电压高于负端电压时,比较器U1的比较输出端会翻转,由Low变High(高电平),此时辅助输入电压Vin2经由R2、R5与R6给C3充电,使得C3的电压平滑上升,当晶体管MOS1栅极和漏极之间的电压差高于晶体管MOS1的阈值电压,且主输入电压Vin1已上电完成时,电压输出端Vout会有输出。因电容C3使得晶体管MOS1的栅极平滑上升,那么晶体管源极也是平滑上升。整体过程为缓启动的过程。The specific working process of the circuit shown in Figure 5 is: when the auxiliary input voltage Vin2 is powered on, the voltage is divided by R1 and R4, the negative terminal voltage of comparator U1 is higher than the positive terminal voltage, and the comparison output terminal of comparator U1 outputs Low (low level), when the voltage difference between the gate and drain of the transistor MOS1 does not reach the conduction threshold of the transistor, the source of the transistor MOS1 has no output; when the auxiliary input voltage Vin2 is powered on, the capacitor C2 is charged through R3 , when the voltage charged at the positive terminal is higher than the voltage at the negative terminal, the comparison output terminal of the comparator U1 will turn over and change from Low to High (high level). At this time, the auxiliary input voltage Vin2 charges C3 through R2, R5 and R6. The voltage of C3 rises smoothly. When the voltage difference between the gate and drain of transistor MOS1 is higher than the threshold voltage of transistor MOS1 and the main input voltage Vin1 is powered on, the voltage output terminal Vout will output. Because the capacitor C3 makes the gate of the transistor MOS1 rise smoothly, the source of the transistor also rises smoothly. The overall process is a slow start process.

缓启动时间由两部分组成,如图6所示,一部分是比较器的延时翻转时间t1,另一部分为电容C3充电到晶体管导通阈值的时间t2,如图6中表示。其中,The slow start time consists of two parts, as shown in Figure 6, one part is the delayed flip time t1 of the comparator, and the other part is the time t2 when the capacitor C3 is charged to the transistor conduction threshold, as shown in Figure 6. in,

t1=R3*C2*ln[R1/(R1+R4)]t1=R3*C2*ln[R1/(R1+R4)]

ln表示以常数e为底的对数函数。ln represents the logarithmic function with the constant e as the base.

通过调节R3/C2/R1/R4的大小来控制t1的值,在使用时先设定R1/R4为固定值,根据上述等式,调节R3或C2,来改变t1的值。一般可固定R1/R3/R4为10K,调节C2电容值的大小来控制比较器延时翻转时间t1。通过调节C3电容值的大小来调节输出电压Vout的爬升时间t2,在时序控制中t2很短,忽略。由此,通过调节C2电容值的大小来实现输出电压Vout的时序控制。The value of t1 is controlled by adjusting the size of R3/C2/R1/R4. When in use, set R1/R4 as a fixed value first, and adjust R3 or C2 according to the above equation to change the value of t1. Generally, R1/R3/R4 can be fixed at 10K, and the capacitance value of C2 can be adjusted to control the delay time t1 of the comparator. The rise time t2 of the output voltage Vout is adjusted by adjusting the capacitance value of C3. In the timing control, t2 is very short and ignored. Thus, timing control of the output voltage Vout is realized by adjusting the value of the capacitance of C2.

实施例五中的其它技术特征与实施例四中的相同,在此不予赘述。Other technical features in the fifth embodiment are the same as those in the fourth embodiment, and will not be repeated here.

实施例六:Embodiment six:

当该低电压缓启动电路运用于单路时序控制时,按照实施例五连接即可,实施例六为该低电压缓启动电路运用于两路时序控制时的电路图,其连接方式如图7所示,即两个实施例五所示电路的组合,第二个单路低电压缓启动电路的主输入电压为Vin3,辅助输入电压接第一个单路低电压缓启动电路的辅助输入电压Vin2,比较器U2的负端接于比较器U1的负端,电容C2与C4取不同的值,即可完成输出电压Vout1与Vout2的上电时序排序,其它技术特征与实施例五中的相同。When the low-voltage slow-start circuit is used in single-way sequence control, it can be connected according to Embodiment 5. Embodiment 6 is a circuit diagram when the low-voltage slow-start circuit is used in two-way sequence control. The connection method is shown in Figure 7 As shown, that is, the combination of the two circuits shown in Embodiment 5, the main input voltage of the second single-channel low-voltage slow-start circuit is Vin3, and the auxiliary input voltage is connected to the auxiliary input voltage Vin2 of the first single-channel low-voltage slow-start circuit , the negative terminal of the comparator U2 is connected to the negative terminal of the comparator U1, and the capacitors C2 and C4 take different values to complete the power-on sequence sequencing of the output voltages Vout1 and Vout2, and other technical features are the same as those in the fifth embodiment.

以上所述的本发明实施方式,并不构成对本发明保护范围的限定。任何在本发明的精神和原则之内所作的修改、等同替换和改进等,均应包含在本发明的权利要求保护范围之内。The embodiments of the present invention described above are not intended to limit the protection scope of the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principle of the present invention shall be included in the protection scope of the claims of the present invention.

Claims (7)

1.一种低电压缓启动电路,其特征在于,包括晶体管MOS1和控制回路,所述晶体管MOS1为N-沟道MosFET,晶体管MOS1的漏极接主输入电压Vin1,晶体管MOS1的源极接输出电压Vout,晶体管MOS1的栅极接控制回路,控制回路的另一端与辅助输入电压Vin2相连,用于控制晶体管MOS1的导通时间,并使输出电压Vout平滑上升,辅助输入电压Vin2高于主输入电压Vin1,且高出的电压值大于晶体管MOS1的阈值电压,所述控制回路包括时序电路和输出控制电路,时序电路和输出控制电路串接于辅助输入电压Vin2和晶体管MOS1的栅极之间,输出控制电路的另一端与辅助输入电压Vin2相连,所述时序电路包括电阻R1、R3和R4,电容C2和比较器U1,电阻R1与R4串接在辅助输入电压Vin2与地线之间,电阻R1与R4的接点与比较器U1的负端相接;电阻R3与电容C2串接在辅助输入电压Vin2与地线之间,电阻R3与电容C2的接点与比较器U1的正端相接,比较器U1的比较输出端接输出控制电路,所述输出控制电路包括电阻R2、R5和R6及电容C3,电阻R2、R5与R6串接在辅助输入电压Vin2与地线之间,电阻R2与R5的接点与时序电路相接,电阻R2起到限制电流的作用,电容C3正极接R5、R6的接点,负极接R6的另一端,电阻R5、R6与电容C3的共接端与晶体管MOS1的栅极相接。1. A low-voltage slow-start circuit, characterized in that it comprises transistor MOS1 and a control loop, said transistor MOS1 is an N-channel MosFET, the drain of transistor MOS1 is connected to the main input voltage Vin1, and the source of transistor MOS1 is connected to the output Voltage Vout, the gate of the transistor MOS1 is connected to the control loop, and the other end of the control loop is connected to the auxiliary input voltage Vin2, which is used to control the conduction time of the transistor MOS1 and make the output voltage Vout rise smoothly. The auxiliary input voltage Vin2 is higher than the main input Voltage Vin1, and the higher voltage value is greater than the threshold voltage of the transistor MOS1, the control loop includes a sequential circuit and an output control circuit, the sequential circuit and the output control circuit are connected in series between the auxiliary input voltage Vin2 and the gate of the transistor MOS1, The other end of the output control circuit is connected to the auxiliary input voltage Vin2. The sequential circuit includes resistors R1, R3 and R4, capacitor C2 and comparator U1. The resistors R1 and R4 are connected in series between the auxiliary input voltage Vin2 and the ground wire. The resistor The junction of R1 and R4 is connected to the negative terminal of comparator U1; the resistor R3 and capacitor C2 are connected in series between the auxiliary input voltage Vin2 and the ground wire, and the junction of resistor R3 and capacitor C2 is connected to the positive terminal of comparator U1. The comparison output terminal of the comparator U1 is connected to an output control circuit, the output control circuit includes resistors R2, R5 and R6 and a capacitor C3, the resistors R2, R5 and R6 are connected in series between the auxiliary input voltage Vin2 and the ground wire, and the resistor R2 and The contact of R5 is connected to the sequential circuit, the resistor R2 plays the role of limiting the current, the positive pole of the capacitor C3 is connected to the contact of R5 and R6, the negative pole is connected to the other end of R6, the common terminal of the resistors R5, R6 and the capacitor C3 is connected to the transistor MOS1 The grids are connected. 2.根据权利要求1所述的低电压缓启动电路,其特征在于,还包括保险丝F1,保险丝F1串接在主输入电压Vin1和晶体管MOS1的漏极之间。2 . The low-voltage slow-start circuit according to claim 1 , further comprising a fuse F1 connected in series between the main input voltage Vin1 and the drain of the transistor MOS1 . 3.根据权利要求1或2所述的低电压缓启动电路,其特征在于,还包括电容C1,电容C1串接在晶体管MOS1的漏极和地之间。3. The low-voltage slow-start circuit according to claim 1 or 2, further comprising a capacitor C1 connected in series between the drain of the transistor MOS1 and the ground. 4.根据权利要求1所述的低电压缓启动电路,其特征在于,当运用于多路时序控制时,各单路低电压缓启动电路的比较器共接同一负端电压。4 . The low-voltage slow-start circuit according to claim 1 , wherein when used in multi-channel sequential control, the comparators of each single-channel low-voltage slow-start circuit are connected to the same negative terminal voltage. 5.根据权利要求1所述的低电压缓启动电路,其特征在于,电容C2是电容值在0.01uF~22uF之间的电容;5. The low-voltage slow-start circuit according to claim 1, wherein the capacitor C2 is a capacitor with a capacitance value between 0.01uF and 22uF; 和/或and / or 电容C2是陶瓷电容或钽电容;Capacitor C2 is a ceramic capacitor or a tantalum capacitor; 和/或and / or R1/R3/R4为10K。R1/R3/R4 is 10K. 6.根据权利要求1所述的低电压缓启动电路,其特征在于,电容C3是电容值在10uF~47uF之间的电容;6. The low-voltage slow-start circuit according to claim 1, wherein the capacitor C3 is a capacitor with a capacitance value between 10uF and 47uF; 和/或and / or 电容C3是钽电容。Capacitor C3 is a tantalum capacitor. 7.根据权利要求1或2所述的低电压缓启动电路,其特征在于,所述主输入电压Vin1的电压值在1V~10V之间,所述辅助输入电压Vin2的电压值在4V~12V之间,辅助输入电压Vin2的电压高于主输入电压Vin1,且高出3V以上。7. The low-voltage slow-start circuit according to claim 1 or 2, wherein the voltage value of the main input voltage Vin1 is between 1V and 10V, and the voltage value of the auxiliary input voltage Vin2 is between 4V and 12V Between, the auxiliary input voltage Vin2 is higher than the main input voltage Vin1 by more than 3V.
CN 200910194277 2009-12-01 2009-12-01 Low-voltage slow start circuit Expired - Fee Related CN101739112B (en)

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