CN101738508B - Probe tower and manufacturing method thereof - Google Patents
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- CN101738508B CN101738508B CN200810175434XA CN200810175434A CN101738508B CN 101738508 B CN101738508 B CN 101738508B CN 200810175434X A CN200810175434X A CN 200810175434XA CN 200810175434 A CN200810175434 A CN 200810175434A CN 101738508 B CN101738508 B CN 101738508B
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Abstract
Description
技术领域 technical field
本发明涉及一种探针塔,特别是一种在I/O区提供以空气为介质的非同轴式测试探针的探针塔,以及具有较佳阻抗匹配而使测试波形不失真的探针塔。The invention relates to a probe tower, in particular to a probe tower that provides non-coaxial test probes with air as the medium in the I/O area, and a probe tower that has better impedance matching so that the test waveform is not distorted. needle tower.
背景技术 Background technique
目前探针塔其上的测试探针分别配置在探针塔的I/O区与LCD区,其中I/O区所使用的测试探针较细,LCD区所使用的测试探针较粗,且目前在探针塔I/O区与LCD区的测试探针为固定设置,是将测试探针套管的部分先焊在PCB板上,再将测试探针针头放入测试探针的套管中,并利用PCB板上的导线,将I/O区与LCD区的接地互相连接,以达到将杂讯与漏电流排除的目的。现有技术的美国专利第6114869号、美国专利第6166553号、美国专利第6304092号、美国专利第6741072号,以及美国专利第6876215号皆揭露测试探针与探针塔相关的基本结构。At present, the test probes on the probe tower are respectively arranged in the I/O area and the LCD area of the probe tower. The test probes used in the I/O area are thinner, and the test probes used in the LCD area are thicker. And at present, the test probes in the probe tower I/O area and LCD area are fixed. The part of the test probe sleeve is welded on the PCB board first, and then the test probe needle is put into the test probe sleeve. In the tube, and use the wires on the PCB board to connect the ground of the I/O area and the LCD area to each other, so as to eliminate noise and leakage current. The prior art US Pat. No. 6,114,869, US Pat. No. 6,166,553, US Pat. No. 6,304,092, US Pat. No. 6,741,072, and US Pat. No. 6,876,215 all disclose basic structures related to test probes and probe towers.
而目前公知技术的探针塔在使用上有下列五项问题:And the probe tower of known technology has following five problems in use at present:
1.由于I/O区所使用的测试探针较细,故常常于校机时造成测试探针针头的部分折断的问题,且此型式的测试探针价格较昂贵。1. Since the test probes used in the I/O area are relatively thin, parts of the test probe needles are often broken during computer calibration, and this type of test probe is more expensive.
2.因探针塔其测试探针的固定方式为将测试探针针头部分放入测试探针套管中,故当测试探针套管部分损坏需更换时,必须将测试探针套管解焊,才能将测试探针套管取下更换,因此不易修复。2. Because the test probe of the probe tower is fixed by putting the test probe needle part into the test probe sleeve, when the test probe sleeve is damaged and needs to be replaced, the test probe sleeve must be removed. Only by welding can the test probe sleeve be removed and replaced, so it is not easy to repair.
3.另外由于探针塔其I/O区与LCD区测试探针使用的接触力太小,故常造成接触不良,而耗费校机时间。3. In addition, because the contact force used by the I/O area of the probe tower and the test probe in the LCD area is too small, it often leads to poor contact, which consumes time for calibration.
4.在探针塔的I/O区测试探针是采以铁弗龙为介质的同轴式设计,导致其成本过高。4. The test probe in the I/O area of the probe tower is a coaxial design with Teflon as the medium, resulting in high cost.
5.当测试探针使用以空气为介质的非同轴设计时,虽然成本大幅降低,但若进行测试时,受制于阻抗不匹配而导致波型失真的问题。5. When the test probe uses a non-coaxial design with air as the medium, although the cost is greatly reduced, it is subject to the problem of waveform distortion due to impedance mismatch during testing.
发明内容 Contents of the invention
为了解决上述问题,本发明揭露一种使用不同材质的本体且具有特征阻抗的探针塔,不但可解决测试探针于校机时,针头的部分容易折断的问题,再利用绝缘间隔环将测试探针固设于探针塔上,取代传统先将测试探针焊在PCB板,再将测试探针针头部分放入测试探针套管中,以解决公知技术中当测试探针套管部分损坏需更换时,必须将测试探针套管解焊,才能将测试探针套管取下更换的问题。此外使用绝缘间隔环可隔离测试探针与探针塔本体使其之间不会相互导通。此外将地针直接紧配嵌入探针塔本体中,通过探针塔的本体使用不同材质,除了可改善探针塔处理杂讯与漏电流的能力将增加,并可达到探针塔、测试载板与针测卡之间的阻抗匹配。此外在探针塔的I/O区的测试探针是使用以空气为介质的非同轴设计,可大幅降低测试探针的成本。In order to solve the above problems, the present invention discloses a probe tower with a characteristic impedance using a body made of different materials. The probe is fixed on the probe tower, instead of welding the test probe to the PCB board first, and then putting the test probe needle into the test probe sleeve to solve the problem of the test probe sleeve in the known technology. When the damage needs to be replaced, the test probe sleeve must be dissoldered before the test probe sleeve can be removed for replacement. In addition, the insulating spacer ring can be used to isolate the test probe and the probe tower body so that they are not connected to each other. In addition, the ground pins are directly fitted into the probe tower body. By using different materials for the probe tower body, the ability of the probe tower to handle noise and leakage current will be improved, and the probe tower and test load can be reached. Impedance matching between the board and the probe card. In addition, the test probes in the I/O area of the probe tower use a non-coaxial design with air as the medium, which can greatly reduce the cost of test probes.
本发明的主要目的在于提供一种用于晶片测试的探针塔,以达到降低杂讯的效果。The main purpose of the present invention is to provide a probe tower for wafer testing to achieve the effect of reducing noise.
本发明次一目的在于提供一种用于晶片测试的探针塔的制作方法,以达到降低杂讯的效果。Another object of the present invention is to provide a method for manufacturing a probe tower for wafer testing, so as to achieve the effect of reducing noise.
本发明再一目的在于提供一种用于晶片测试的探针塔,以达到减少漏电流的效果。Another object of the present invention is to provide a probe tower for wafer testing to achieve the effect of reducing leakage current.
本发明再一目的在于提供一种用于晶片测试的探针塔的制作方法,以达到减少漏电流的效果。Another object of the present invention is to provide a method for manufacturing a probe tower for wafer testing, so as to achieve the effect of reducing leakage current.
本发明再一目的在于提供一种用于晶片测试的探针塔,以形成探针塔、测试载板与针测卡之间的阻抗匹配,据此解决测试所导致波型失真的问题。Another object of the present invention is to provide a probe tower for wafer testing to form impedance matching between the probe tower, the test carrier board and the needle test card, thereby solving the problem of waveform distortion caused by the test.
本发明再一目的在于提供一种用于晶片测试的探针塔的制作方法,以形成探针塔、测试载板与针测卡之间的阻抗匹配,据此解决测试所导致波型失真的问题。Another object of the present invention is to provide a method for manufacturing a probe tower for wafer testing, so as to form an impedance matching between the probe tower, the test carrier board and the needle test card, thereby solving the problem of waveform distortion caused by the test. question.
本发明再一目的在于提供一种用于晶片测试的探针塔,通过在I/O区使用以空气为介质的非同轴式测试探针,以达到降低测试探针的成本。Another object of the present invention is to provide a probe tower for wafer testing, which reduces the cost of the test probes by using non-coaxial test probes with air as the medium in the I/O area.
本发明再一目的在于提供一种用于晶片测试的探针塔的制作方法,通过在I/O区使用以空气为介质的非同轴式测试探针,以达到降低测试探针的成本。Another object of the present invention is to provide a method for manufacturing a probe tower for wafer testing, by using non-coaxial test probes with air as the medium in the I/O area to reduce the cost of the test probes.
据此,本发明提供一种探针塔,用于晶片测试,包含:一圆形本体,配置有LCD测试区以及I/O测试区,且圆形本体具有一本体上座及一本体下座;多群探针孔,配置在LCD测试区及I/O测试区,同时垂直贯穿本体上座及本体下座;多群测试探针,配置在探针孔内,用以传递通过圆形本体的测试信号;多群接地孔与接地针是配置在I/O测试区,其中多群接地针以紧配方式嵌入于本体上座及本体下座其中之一的多群接地孔,并电性导通至圆形本体,用以将邻近的测试探针的杂讯及漏电流接地;以及多群间隔环,以绝缘材料制成,配置于探针孔的端部,用以固定测试探针于相等探针孔内,且提供相等测试探针及圆形本体的电性绝缘;其特征在于圆形本体在LCD测试区是使用玻璃纤维的材质,在I/O测试区是使用铝合金的材质,此外I/O测试区的测试探针是使用以空气为介质的非同轴设计,进而使得探针塔具有一特定默认值的特征阻抗。Accordingly, the present invention provides a probe tower for wafer testing, comprising: a circular body configured with an LCD test area and an I/O test area, and the circular body has a body upper seat and a body lower seat; Multiple groups of probe holes are arranged in the LCD test area and I/O test area, and vertically pass through the upper body and the lower body of the body; multi-group test probes are arranged in the probe holes to pass the test through the circular body Signal; multi-group ground holes and ground pins are arranged in the I/O test area, among which the multi-group ground pins are embedded in the multi-group ground holes of one of the upper body and the lower body of the body in a tight fit, and are electrically connected to the The circular body is used to ground the noise and leakage current of adjacent test probes; and a plurality of spacer rings, made of insulating material, are arranged at the ends of the probe holes to fix the test probes on equal probes. In the pinhole, and provide electrical insulation of equal test probes and circular body; it is characterized in that the circular body is made of glass fiber in the LCD test area, and aluminum alloy in the I/O test area. In addition The test probes in the I/O test area are non-coaxial with air as the medium, so that the probe tower has a specific default characteristic impedance.
接着,本发明又提供一种用于晶片测试的探针塔制作方法,包含:提供一圆形本体,圆形本体配置有LCD测试区以及I/O测试区,且圆形本体具有一本体上座及一本体下座,其中在LCD测试区的圆形本体是玻璃纤维的材质,而I/O测试区的圆形本体是铝合金的材质;提供多群探针孔,探针孔配置在LCD测试区及I/O测试区,同时垂直贯穿本体上座及本体下座;以及提供多群测试探针,测试探针配置在探针孔内,用以传递通过圆形本体的测试信号,其中测试探针是采用以空气为介质的非同轴设计,据此而使探针塔具有一预定值的特征阻抗;提供多群接地孔,配置在I/O测试区;提供多群接地针,以紧配方式嵌入于贯穿本体上座或本体下座的多群接地孔,并电性导通至圆形本体,用以将邻近的测试探针的杂讯及漏电流接地;以及提供多群间隔环,以绝缘材料制成,配置于探针孔的端部,用以固定测试探针于探针孔内,且提供测试探针及圆形本体的电性绝缘。Next, the present invention provides a probe tower manufacturing method for wafer testing, including: providing a circular body, the circular body is configured with an LCD test area and an I/O test area, and the circular body has a body upper seat And a body lower seat, in which the circular body in the LCD test area is made of glass fiber, and the circular body in the I/O test area is made of aluminum alloy; multiple groups of probe holes are provided, and the probe holes are arranged in the LCD The test area and the I/O test area vertically run through the upper seat and the lower seat of the body; and provide multiple groups of test probes, which are arranged in the probe holes to transmit test signals passing through the circular body. The probe adopts a non-coaxial design with air as the medium, so that the probe tower has a predetermined value of characteristic impedance; provide multiple groups of grounding holes, arranged in the I/O test area; provide multiple groups of grounding pins to The tight fitting method is embedded in the multi-group grounding hole that runs through the upper body or the lower body of the body, and is electrically connected to the circular body to ground the noise and leakage current of the adjacent test probes; and provide multi-group spacing rings , made of insulating material, arranged at the end of the probe hole, used to fix the test probe in the probe hole, and provide electrical insulation between the test probe and the circular body.
附图说明 Description of drawings
图1为一立体图,是本发明所提出的第一较佳实施例,为一种用于晶片测试的探针塔;Fig. 1 is a perspective view, is the first preferred embodiment that the present invention proposes, is a kind of probe tower that is used for wafer testing;
图2为一剖面图,是本发明所提出的图1的LCD测试区A-A剖面;Fig. 2 is a sectional view, is the LCD test area A-A section of Fig. 1 that the present invention proposes;
图3为一剖面图,是本发明所提出的图1的I/O测试区B-B剖面;Fig. 3 is a sectional view, is the I/O test area B-B section of Fig. 1 that the present invention proposes;
图4为一上视图,是本发明所提出的第一较佳实施例的I/O测试区的测试探针与接地针交错排列图示;Fig. 4 is a top view, which is an illustration of the staggered arrangement of test probes and ground pins in the I/O test area of the first preferred embodiment of the present invention;
图5为一剖面图,是图4的放大图示;Fig. 5 is a cross-sectional view, which is an enlarged illustration of Fig. 4;
图6为一流程图,是本发明所提出的第二较佳实施例,是一种用于晶片测试的探针塔制作方法;Fig. 6 is a flow chart, is the second preferred embodiment that the present invention proposes, is a kind of probe tower manufacturing method for wafer testing;
图7为一示意图,是本发明所提出的第三较佳实施例的具有探针塔的测试系统。FIG. 7 is a schematic diagram of a test system with a probe tower according to a third preferred embodiment of the present invention.
主要元件符号说明Explanation of main component symbols
探针塔 10、312Probe Tower 10, 312
圆形本体 11Round
本体上座 111
本体下座 112Body
盖板 113
LCD测试区 12
I/O测试区 13I/
探针孔 14Probe
测试探针 15
空气 150Air 150
接地孔 16
接地针 17
间隔环 18
测试系统 30
晶片测试承座 31
运动平台 311
针测卡 313
测试载板 32
测试台 33Test bench 33
待测晶片 34Wafer to be tested 34
具体实施方式 Detailed ways
由于本发明是揭露一种后段半导体工艺的集成电路元件的晶片测试,其中所利用的探针塔基本制作与半导体测试原理,已为相关技术领域具有通常知识者所能明了,故以下文中的说明,不再作完整描述。同时,以下文中所对照的图式,是表达与本发明特征有关的结构示意,并未亦不需要依据实际尺寸完整绘制,在先叙明。Since the present invention discloses a wafer test of integrated circuit components in a back-end semiconductor process, the basic manufacturing and semiconductor testing principles of the probe towers used have been understood by those with ordinary knowledge in the relevant technical field, so the following Description, no complete description. At the same time, the drawings compared in the following are schematic structural representations related to the features of the present invention, and are not and need not be completely drawn according to the actual size, and are described first.
请参考图1至图3,根据本发明所提供的第一较佳实施例,为一种用于晶片测试的探针塔10。探针塔10包含一圆形本体11、多群探针孔14、多群测试探针15、多群接地孔16(图1中接地孔16应未贯穿Pogo tower)、多群接地针17及多群间隔环18。此探针塔10是由LCD测试区12以及I/O测试区13所构成,其中LCD测试区12与I/O测试区13分布在圆形本体的四个象限区,且LCD测试区12相对I/O测试区13的分布面积比例为3:1,在圆形本体11上方与下方分别由本体上座111及本体下座112所组成。圆形本体11的本体上座111与本体下座112是电性导通。多群探针孔14配置在LCD测试区12及I/O测试区13,同时垂直贯穿本体上座111及本体下座112,如图2的虚线所示,且多群测试探针15相对配置在探针孔14内,以传递通过圆形本体11的测试信号。值得注意的是本发明的探针塔10与一般公知探针塔最大差别在于:Please refer to FIG. 1 to FIG. 3 , according to a first preferred embodiment of the present invention, it is a
(1)使用不同导电特性材质的圆形本体:(1) Circular bodies using materials with different conductive properties:
一般公知探针塔是使用相同导电特性材质,但本发明的探针塔10的圆形本体11在LCD测试区12是使用玻璃纤维的材质,具有非导电特性,而在I/O测试区13是使用铝合金(编号A6061T6)的材质,具有导电特性。Generally known probe towers use the same conductive material, but the
(2)使用以空气为介质的测试探针在I/O测试区:(2) Use air-based test probes in the I/O test area:
一般公知探针塔在I/O测试区的测试探针是以铁弗龙为介质的同轴式设计,因此成本较高,但是本发明的探针塔10在I/O测试区13的测试探针15是以空气150为介质的非同轴设计,如图5所示,也就是移除以铁弗龙为介质,只有间隔环18是使用铁弗龙的材质,故整个测试探针的成本降低。Generally, the test probe of the known probe tower in the I/O test area is a coaxial design with Teflon as the medium, so the cost is relatively high, but the test of the
同时将特征阻抗设定成与探针塔相互连接的测试载板及针测卡具有相同的阻抗匹配,在本实施例将特征阻抗设为75Ω(欧姆),因此可确保使用探针塔进行晶片的测试时,达到测试信号波型不失真的目的。再根据上述圆形本体不同的材料特性配合特征阻抗的计算公式而得到在I/O测试区的测试探针15与接地针17的外径分别为0.8厘米与2.8厘米。显然相较于公知探针塔在I/O测试区使用的测试探针外径0.6厘米,本发明的测试探针外径可避免容易折断的问题。At the same time, the characteristic impedance is set to have the same impedance matching with the test carrier board and the needle test card connected to the probe tower. In this embodiment, the characteristic impedance is set to 75Ω (ohm), so it can be ensured that the probe tower is used for chip inspection. During the test, the test signal waveform is not distorted. Then, according to the above-mentioned different material properties of the circular body and the calculation formula of the characteristic impedance, the outer diameters of the
在上述的实施例中,请再参考图3,多群接地孔16配置在I/O测试区13,其中接地孔16是以盲孔形式配置在本体上座111、或者本体下座112,或者同时配置在本体上座111以及本体下座112,此外本体上座111及本体下座112均同时嵌入有上述接地针17,同样地,多群接地针17以紧配方式嵌入上述多群接地孔16,并电性导通至圆形本体11,以将邻近的测试探针14的杂讯及漏电流接地,因而使得探针塔处理杂讯与降低漏电流的能力增加。此外,多群间隔环18以铁弗龙为绝缘材料,如图5所示,配置于探针孔14的端部,用以固定测试探针15于探针孔14内,且提供各测试探针15及圆形本体11的电性绝缘。In the above-mentioned embodiment, please refer to FIG. 3 again. Multiple groups of grounding
在上述的实施例中,I/O测试区13的测试探针15及接地针17是以互相交错方式排列,如图4与图5所示,其中每一群接地针17的数量是小于其邻近测试探针15的数量,譬如说,本实施例中每一群接地针的数量是5支。接地针17的群数小于I/O测试区13的测试探针15的群数,且接地针17的长度是短于本体上座111或本体下座112的厚度。In the above-mentioned embodiment, the test probes 15 and the ground pins 17 of the I/
在上述的实施例中,圆形本体11更进一步包含一对盖板113装置,分别配置在本体上座111上方及本体下座112的下方,如图5所示,用以档卡对应的间隔环18,并提供测试探针15与接地针17的固定交错位置,测试探针15的外径是经由测试探针15的阻抗计算而得到,经适当的强度设计下以避免测试探针于校机时,针头的部分容易折断的问题。In the above-mentioned embodiment, the
此外,根据本发明所提供的第二实施例,是一种用于晶片测试的探针塔的制作方法。此制作方法包含以下步骤:In addition, according to the second embodiment provided by the present invention, it is a method for manufacturing a probe tower for wafer testing. This production method includes the following steps:
(1)提供一圆形本体(步骤21),其中圆形本体配置有LCD测试区以及I/O测试区,且圆形本体具有一本体上座及一本体下座,其中在LCD测试区的圆形本体是玻璃纤维的材质,而I/O测试区的圆形本体是铝合金的材质,圆形本体的本体上座与本体下座是电性导通,LCD测试区与I/O测试区分布在圆形本体的四个象限区,且LCD测试区相对I/O测试区的分布面积比例为3:1;(1) Provide a circular body (step 21), wherein the circular body is configured with an LCD test area and an I/O test area, and the circular body has a body upper seat and a body lower seat, wherein the circular body in the LCD test area The shaped body is made of glass fiber, while the circular body of the I/O test area is made of aluminum alloy. The upper seat of the circular body and the lower seat of the body are electrically connected. In the four quadrants of the circular body, and the distribution area ratio of the LCD test area to the I/O test area is 3:1;
(2)提供多群探针孔(步骤22),其中探针孔配置在LCD测试区及I/O测试区,同时垂直贯穿本体上座及本体下座;(2) Provide multiple groups of probe holes (step 22), wherein the probe holes are arranged in the LCD test area and the I/O test area, and vertically penetrate the upper body and the lower body;
(3)提供多群测试探针(步骤23),将其配置在探针孔内,用以传递通过圆形本体的测试信号,其中测试探针是采用以空气为介质的非同轴设计,据此将探针塔设有一预定值的特征阻抗;(3) Provide multiple groups of test probes (step 23), which are arranged in the probe holes to transmit test signals passing through the circular body, wherein the test probes adopt a non-coaxial design with air as the medium, Accordingly, the probe tower is provided with a characteristic impedance of a predetermined value;
(4)提供多群接地孔(步骤24),配置在I/O测试区,其中接地孔是以盲孔形式配置在本体上座、或者本体下座,或者同时配置在本体上座以及本体下座;(4) Provide multiple groups of grounding holes (step 24), which are arranged in the I/O test area, wherein the grounding holes are arranged in the form of blind holes on the upper body or the lower body, or at the same time on the upper body and the lower body;
(5)提供多群接地针(步骤25),以紧配方式嵌入于本体上座及本体下座其中之一的多群接地孔,此外本体上座及该本体下座的接地孔均同时嵌入有上述接地针,并电性导通至圆形本体,用以将邻近的测试探针的杂讯及漏电流接地,以降低杂讯及漏电流的处理能力;以及(5) Provide multi-group grounding pins (step 25), which are embedded in the multi-group grounding holes of one of the upper body and the lower body in a tight fit. In addition, the grounding holes of the upper body and the lower body are embedded with the above-mentioned The ground pin is electrically connected to the circular body to ground the noise and leakage current of adjacent test probes to reduce the handling capacity of noise and leakage current; and
(6)提供多群间隔环(步骤26),以绝缘材料制成,配置于探针孔的端部,用以固定测试探针于探针孔内,且提供测试探针及圆形本体的电性绝缘。(6) Provide multiple groups of spacer rings (step 26), made of insulating material, configured at the end of the probe hole, in order to fix the test probe in the probe hole, and provide the test probe and the circular body Electrically insulated.
上述的实施例中,I/O测试区的测试探针及接地针是以互相交错方式排列。其中每一群接地针的数量是小于其邻近测试探针的数量且每一群接地针的数量为5支。接地针的群数小于I/O测试区的测试探针的群数,且接地针的长度是短于本体上座或本体下座的厚度。此外,圆形本体更进一步包含一对盖板装置,分别配置在本体上座上方及本体下座的下方,用以档卡对应之间隔环,并提供测试探针与接地针的固定交错位置。测试探针的外径是经由测试探针的阻抗计算而得到,经适当的强度设计下以避免测试探针于校机时,针头的部分容易折断的问题。In the above embodiments, the test probes and ground pins in the I/O test area are arranged in a staggered manner. The number of each group of grounding pins is less than the number of adjacent test probes, and the number of each group of grounding pins is 5. The number of groups of ground pins is smaller than the number of test probes in the I/O test area, and the length of the ground pins is shorter than the thickness of the upper body or the lower body. In addition, the circular body further includes a pair of cover devices, which are respectively arranged above the upper body seat and below the lower body seat, for blocking the corresponding spacer rings and providing a fixed staggered position for the test probes and the grounding pins. The outer diameter of the test probe is obtained by calculating the impedance of the test probe, and the appropriate strength is designed to avoid the problem that the needle part of the test probe is easily broken when the machine is calibrated.
请参考图7,根据本发明所提供的第三较佳实施例,为一种用于晶片测试的晶片测试系统30。此晶片测试系统30包含:一测试承座31、测试载板32以及测试台33,其中上述测试承座31至少具有一运动平台311、一探针塔312与一针测卡313,而此运动平台311是用以承载一待测晶片34并提供待测晶片34在运动平台311沿着X-Y-Z三轴的移动,针测卡313是进行此待测晶片34的晶片测试,并将此待测晶片34的电气测试信号经由探针塔312而输出至测试载板32以提供测试台33进行后续的信号分析与处理,而测试载板32是根据待测晶片34所需进行的测试类型而替换以作为测试台33与针测卡313的接口,测试台33将来自测试载板32接收的测试信号进行后续的信号分析与处理,同时经过运算统计后以产生晶片测试结果并予以输出。其中此探针塔312的技术特征与相关结构如第一实施例的探针塔10说明。Please refer to FIG. 7 , according to a third preferred embodiment of the present invention, it is a
以上所述仅为本发明的较佳实施例,并非用以限定本发明的权利范围;同时以上的描述,对于熟知本技术领域的专门人士应可明了及实施,因此其它未脱离本发明所揭示的精神下所完成的等效改变或修饰,均应包含在下述的申请专利范围中。The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the scope of rights of the present invention; at the same time, the above descriptions should be clear and implementable for those who are familiar with the technical field, so others do not depart from the disclosure of the present invention. Equivalent changes or modifications completed under the spirit of , shall be included in the scope of the following patent applications.
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| EP0999450A1 (en) * | 1999-08-23 | 2000-05-10 | Hewlett-Packard Company | Modular interface between test and application equipment |
| US20040061513A1 (en) * | 2002-09-30 | 2004-04-01 | Sweet Charles M. | Differential coaxial contact array for high-density, high-speed signals |
| WO2007146291A2 (en) * | 2006-06-09 | 2007-12-21 | Octavian Scientific, Inc. | Method and apparatus for fixed-form multi-planar extension of electrical conductors beyond the margins of a substrate |
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| EP0999450A1 (en) * | 1999-08-23 | 2000-05-10 | Hewlett-Packard Company | Modular interface between test and application equipment |
| US20040061513A1 (en) * | 2002-09-30 | 2004-04-01 | Sweet Charles M. | Differential coaxial contact array for high-density, high-speed signals |
| WO2007146291A2 (en) * | 2006-06-09 | 2007-12-21 | Octavian Scientific, Inc. | Method and apparatus for fixed-form multi-planar extension of electrical conductors beyond the margins of a substrate |
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