CN101727837A - Liquid crystal display and driving method thereof - Google Patents

Abstract

The invention discloses a liquid crystal display and a driving method thereof. A pixel of the liquid crystal display comprises a first pixel capacitor, a second pixel capacitor, a first transistor and a second transistor. The first end and the second end of the first pixel capacitor are respectively coupled to the first transistor and the common voltage. The first end and the second end of the second pixel capacitor are respectively coupled to the second transistor and the common voltage. The coupled voltage of the first pixel capacitor is different from the coupled voltage of the second pixel capacitor by modulating the common voltage, so that the color cast phenomenon can be improved.

Description

Liquid crystal display and its driving method

technical field

The invention relates to a liquid crystal display, and in particular to a halftone technology of a liquid crystal display.

Background technique

For the liquid crystal display wide viewing angle technology, the most popular at present is the vertically aligned mode (Vertically Aligned Mode, VA mode) color liquid crystal display. But when you look at the vertical alignment mode color LCD at an oblique angle, you will see that the skin of Asians is bluish or whitish. This phenomenon is called Color Wash-Out. Referring to FIGS. 1A and 1B , they show the transmittance-voltage curves of a vertical alignment mode color liquid crystal display, wherein the vertical axis is the transmittance, and the horizontal axis is the applied voltage. When the voltage increases, the transmittance of the positive viewing angle curve 102 also increases, showing a monotone function, while the transmittance of the partial viewing angle curve 104 has a bending phenomenon, so that the transmittance is the same for different gray scale potentials. This is a phenomenon unique to vertical alignment mode color LCD monitors, and it is also the cause of color shift. In order to solve this problem, H.Yoshidaet et al. of Fujitsu Display Technologies Corporation published an improved method, which is to divide a pixel unit into two different gamma characteristic curves to form two kinds of different transmittance- The area of voltage characteristics is improved by color mixing, which is called half-tone (Half-Tone) technology. Curve 106 in Figure 1B is a transmittance-voltage curve with a low critical voltage, and curve 108 is a transmittance-voltage curve with a high critical voltage, and the two are mixed to form a monotonous transmittance-voltage curve 110, which eliminates the color shift phenomenon .

Please refer to FIG. 2A and FIG. 2B. There are currently two types of halftone technology, CC type and TT type. Figure 2A shows the CC type and Figure 2B shows the TT type. The basic principle is to divide the original pixel unit into two areas, namely the first and second sub-pixels, so that they contain different gamma characteristic curves, so as to achieve the above-mentioned half-tone technology and eliminate the phenomenon of color shift. FIG. 2C shows the gamma characteristic curve of the CC type, and FIG. 2D shows the gamma characteristic curve of the TT type. Taking FIG. 2C as an example, under the gray scale voltage, the mixed gamma characteristic curve presented by the pixel unit is the sum of the first sub-pixel gamma characteristic curve and the second sub-pixel gamma characteristic curve.

As shown in FIG. 2A , the pixel unit is divided into two regions, and two different code characteristic curves of the sub-pixel capacitance 208 and the sub-pixel capacitance 214 are generated by means of capacitive voltage division. The potential of the sub-pixel capacitor 208 is directly written by the data line via the transistor 202 . The potential of the sub-pixel capacitor 214 is determined by dividing the voltage of the data line through the storage capacitor 210 in series. In other words, the potential of the sub-pixel capacitor 214 is determined by coupling when the sub-pixel capacitor 214 is in a floating state. This results in a shift in the potential of the sub-pixel capacitor 214 , which will cause problems such as reduced reliability, uneven images, and image retention.

Referring to FIG. 2B, the pixel unit is divided into two areas, and the system directly provides two different gamma characteristic curves to the sub-pixel capacitance 226 and the sub-pixel capacitance 228 by using transistors 218 and 220 and two scanning lines or two data lines. . This is the most direct method, but this will reduce the aperture ratio and make the system circuit complex (need to add another set of gamma characteristic curves), and at the same time result in doubling the logic gate drive or data line drive, and increase power consumption and other shortcomings.

Contents of the invention

The invention provides a liquid crystal display, which is used for improving the phenomenon of color shift.

The invention provides a driving method of a liquid crystal display. By modulating a common voltage, the first pixel capacitor and the second pixel capacitor have different coupling voltages, thereby improving the color shift phenomenon.

The invention provides a driving method of a liquid crystal display, comprising: providing a common voltage to a common electrode and modulating the common voltage in a first period. In addition, the first terminal of the first transistor is coupled through the first pixel capacitance, and the first terminal of the second transistor is coupled through the second pixel capacitance. Additionally, a voltage is coupled between the first terminal of the first transistor and the first terminal of the second transistor.

According to another aspect, the present invention provides a liquid crystal display including: a substrate, an opposite substrate, a bias electrode, a common electrode, a first pixel electrode, a second pixel electrode and a common electrode. The opposing substrate corresponds to a substrate. The bias electrode and the common electrode are disposed on the substrate. The first pixel electrode partially overlaps with the bias electrode and the common electrode to respectively form a first storage capacitor with a capacitance C _st1 and a third storage capacitor with a capacitance C _st3 . The second pixel electrode partially overlaps with the bias electrode and the common electrode to form a second storage capacitor with a capacitance _Cst2 and a fourth storage capacitor with a capacitance _Cst4 , respectively. The shared electrode is disposed on the opposite substrate and overlaps with the first pixel electrode and the second pixel electrode respectively to form a first pixel capacitor with a capacitance value _Clc1 and a second pixel capacitor with a capacitance value _Clc2 . in,

$\frac{{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; st</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; lc</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}}{{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="C\; st"\; filenames="H2008101667981E0000031.png,H2008101667981E0000061.png"\; state="\{\{state\}\}">C</figure-callout></span><figure-callout\; id="1"\; label="C\; st"\; filenames="H2008101667981E0000031.png,H2008101667981E0000061.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; st</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="1"\; label="C\; lc"\; filenames="H2008101667981E0000031.png,H2008101667981E0000061.png"\; state="\{\{state\}\}">C</figure-callout></span><figure-callout\; id="1"\; label="C\; lc"\; filenames="H2008101667981E0000031.png,H2008101667981E0000061.png"\; state="\{\{state\}\}">\; </figure-callout>}}_{\mathrm{<span\; class="notranslate">\; </span>}}}<span\; class="notranslate">\; \&NotEqual;</span>\frac{{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; st</span>}\mathrm{<span\; class="notranslate">\; 4</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; lc</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}{{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; st</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; st</span>}\mathrm{<span\; class="notranslate">\; 4</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; lc</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; .</span>$

The present invention uses the technique of modulating the common voltage to make the coupling voltages of the first pixel capacitor and the second pixel capacitor different, so that the color shift phenomenon can be improved.

Description of drawings

FIG. 1A is a graph of transmittance-voltage curve of a vertical alignment mode color liquid crystal display;

1B is a transmittance-voltage curve diagram of a vertical alignment mode color liquid crystal display including two sets of gamma curves;

FIG. 2A is a conventional CC-type pixel unit;

Figure 2B is a traditional TT-type pixel unit;

FIG. 2C is a gamma characteristic curve diagram of a conventional CC-type pixel unit;

FIG. 2D is a gamma characteristic curve diagram of a traditional TT-type pixel unit;

3A is a circuit diagram of a pixel of a liquid crystal display according to the first embodiment of the present invention;

FIG. 3B is a schematic diagram of a waveform of a modulated common voltage V _com according to the first embodiment of the present invention;

3C is a flowchart of a pixel driving method according to the first embodiment of the present invention;

3D is a schematic waveform diagram of the common voltage V _com , the coupling voltages ΔV _P1 and ΔV _P2 of even frames according to the first embodiment of the present invention.

3E is a schematic waveform diagram of common voltage V _com , coupling voltages ΔV _P1 and ΔV _P2 in odd frames according to the first embodiment of the present invention;

4A is a top view of a first pixel structure according to the first embodiment of the present invention;

Fig. 4B is a sectional view along T ₁ to T ₁ ' in Fig. 4A;

4C is a top view of a second pixel structure according to the first embodiment of the present invention;

Fig. 4D is a sectional view along T ₁ to T ₁ ' in Fig. 4C;

5 is a circuit diagram of a pixel of a liquid crystal display according to a second embodiment of the present invention;

6A is a top view of a pixel structure according to the second embodiment of the present invention;

Fig. 6B is a sectional view along _T2 to _T2 ' in Fig. 6A;

7 is a circuit diagram of a pixel of a liquid crystal display according to a third embodiment of the present invention;

8A is a circuit diagram of a pixel of a liquid crystal display according to a fourth embodiment of the present invention;

8B is another pixel circuit diagram of the liquid crystal display according to the fourth embodiment of the present invention.

[Description of main component symbols]

102, 104, 106, 108, 110: transmittance-voltage curve

441, 442: pixel electrodes

10, 11, 12, 13, 14: pixels

21, 22, 208, 214, 226, 228: sub-pixel capacitance

31, 32, 202, 218, 220: transistors

41, 42, 43, 44, 204, 210, 230, 232: storage capacitor

51, 52: sub-pixel

61, 62: Parasitic capacitance

410, 470: Substrate

411, 471: lower/upper glass

412, 472: Polarizer

420: Bias electrode

430: dielectric layer

450: liquid crystal layer

460: shared electrode

480: common electrode

491, 492: partial area of the pixel electrode

SL: scan line

DL: data line

BL: Bias line

V _com1 , V _com2 : Voltage reference potential for common voltage

V _com : common voltage

V ₀ ~V ₇ : gray level voltage

ΔV _P1 , ΔV _P2 : Cross-voltage

ΔV _com : modulation amount of common voltage

S301-S304: each step of the pixel driving method

Detailed ways

In order to make the above-mentioned features and advantages of the present invention clearer, a detailed description will be given below in conjunction with several embodiments shown in the accompanying drawings.

first embodiment

FIG. 3A is a circuit diagram of a pixel of a liquid crystal display according to a first embodiment of the present invention. The pixel 10 includes pixel capacitors 21 , 22 , transistors 31 , 32 and storage capacitors 41 , 42 . Second ends of the pixel capacitors 21 and 22 are coupled to the common electrode, and the common electrode is coupled to the common voltage V _com . The first terminal, the second terminal and the gate terminal of the transistor 31 are respectively coupled to the first terminal of the pixel capacitor 21 , the data line DL and the scan line SL, and there is a parasitic capacitance 61 between the first terminal and the gate terminal of the transistor 31 . The first terminal, the second terminal and the gate terminal of the transistor 32 are respectively coupled to the first terminal of the pixel capacitor 22 , the data line DL and the scan line SL, and there is a parasitic capacitance 62 between the first terminal and the gate terminal of the transistor 32 .

Then, the first terminal and the second terminal of the storage capacitor 41 are respectively coupled to the first terminal of the pixel capacitor 21 and the bias line BL. The first end and the second end of the storage capacitor 42 are respectively coupled to the first end of the pixel capacitor 22 and the bias line BL. In this embodiment, the bias line BL is the scan line coupled to the pixels in the previous column of the pixel 10 , but in other embodiments, the bias line BL can also be the second bias electrode.

FIG. 3B is a schematic waveform diagram of the modulated common voltage V _com according to the first embodiment of the present invention. In this embodiment, the common voltage V _com is modulated so that the cross-voltage ΔV _P1 coupled by the pixel capacitor 21 (that is, the voltage difference between the first end and the second end of the pixel capacitor 21 ) is different from that coupled by the pixel capacitor 22 . The output voltage ΔV _P2 (that is, the voltage difference between the first terminal and the second terminal of the pixel capacitor 22 ). Wherein, the common voltage V _com has, for example, two voltage reference potentials, namely a high reference potential V _com1 and a low reference potential V _com2 .

The aforementioned modulation of the common voltage V _com can, for example, change the common voltage from the high reference potential V _com1 to the low reference potential V _com2 , or change the common voltage V _com from the low reference potential V _com2 to the high reference potential V _com1 . More specifically, when the cross-voltages ΔV _P1 and ΔV _P2 are positive with respect to the common voltage V _com , the common voltage V _com can be modulated from a high reference potential V _com1 to a low reference potential V _com2 ; otherwise, when the cross-voltage When ΔV _P1 and ΔV _P2 are negative with respect to the common voltage V _com , the common voltage V _com can be modulated from the low reference potential V _com2 to the high reference potential V _com1 .

FIG. 3C is a flowchart of a pixel driving method according to the first embodiment of the present invention. FIG. 3D is a schematic waveform diagram of the common voltage V _com , the cross voltages ΔV _P1 and ΔV _P2 of even frames according to the first embodiment of the present invention. FIG. 3E is a schematic waveform diagram of the common voltage V _com and the cross voltages ΔV _P1 and ΔV _P2 in odd frames according to the first embodiment of the present invention. Referring to FIG. 3A, FIG. 3C, FIG. 3D and FIG. 3E together, in this embodiment, the first end of the transistor 31 is electrically connected to the first end of the pixel capacitor 21, and the gate end of the transistor 31 is electrically connected to the scanning Line SL. The first end of the transistor 32 is electrically connected to the first end of the pixel capacitor 22 , and the gate end of the transistor 32 is electrically connected to the scan line SL. In addition, the second end of the pixel capacitor 21 is electrically connected to the common electrode, and the second end of the pixel capacitor 22 is electrically connected to the common electrode. The operation of each component during the second cycle will be described below.

In the second cycle, first in step S301, the scan drive circuit of the liquid crystal display provides a scan drive signal with a high reference potential to the scan line SL to turn on the first end and the second end of the transistor 31, and turn on the transistor 32 the first end and the second end. Then in step S302 , the data driving circuit of the liquid crystal display provides a data signal to the data line DL to charge the pixel capacitors 21 and 22 . The operation of each component during the first cycle will be described below.

In the first period, in step S303, the scan drive circuit provides a scan drive signal with a low reference potential to the scan line SL, so that the transistors 31 and 32 are turned off, so as to insulate the first end and the second end of the transistor 31, and insulate the transistor 32 first end and second end. In this way, the voltages at the first terminals of the pixel capacitors 21 and 22 can be prevented from interfering with each other. In addition, since the voltages coupled to the two ends of the pixel capacitors 21 and 22 are not floating voltages, the problem of image sticking in the prior art can be improved.

In the first period, in step S304 , the common voltage V _com is modulated so that the cross voltage ΔV _P1 coupled to the pixel capacitor 21 and the cross voltage ΔV _P2 coupled to the pixel capacitor 22 are different from each other. In more detail, the common voltage V _com can be provided to the common electrode first, and the common voltage V _com can be modulated. Then, the pixel capacitor 21 is used to couple to the first terminal of the transistor 31 , and the pixel capacitor 22 is used to couple to the first terminal of the transistor 32 . Therefore, a cross voltage can be generated between the first terminal of the transistor 31 and the first terminal of the transistor 32 . That is, the sub-pixels 51 and 52 of the pixel 10 respectively have different data signal-transmittance curves.

In this embodiment, the pixels 10 are driven, for example, with positive polarity in even frames, and the pixels 10 are driven, for example, in negative polarity in odd frames. Among them, the cross-pressure ΔV _P1 and ΔV _P2 can be calculated according to the following formula (1) and formula (2):

$\mathrm{\&Delta;}{\mathrm{<figure-callout\; id="1"\; label="V\; p"\; filenames="H2008101667981E0000031.png,H2008101667981E0000061.png"\; state="\{\{state\}\}">V</figure-callout>}}_p=\frac{C_{\mathrm{lc}1}}{{\mathrm{<figure-callout\; id="1"\; label="C\; st"\; filenames="H2008101667981E0000031.png,H2008101667981E0000061.png"\; state="\{\{state\}\}">C</figure-callout>}}_{\mathrm{st}}+{\mathrm{<figure-callout\; id="1"\; label="C\; lc"\; filenames="H2008101667981E0000031.png,H2008101667981E0000061.png"\; state="\{\{state\}\}">C</figure-callout>}}_{\mathrm{lc}}+{\mathrm{<figure-callout\; id="1"\; label="C\; gs"\; filenames="H2008101667981E0000031.png,H2008101667981E0000061.png"\; state="\{\{state\}\}">C</figure-callout>}}_{\mathrm{gs}}}\&times;\mathrm{\&Delta;}{V}_{\mathrm{com}}$ ...Formula (1)

$\mathrm{\&Delta;}{V}_{p2}=\frac{C_{\mathrm{lc}2}}{C_{\mathrm{st}2}+C_{\mathrm{lc}2}+C_{\mathrm{gs}2}}\&times;\mathrm{\&Delta;}{V}_{\mathrm{com}}$ ...Formula (2)

In the formulas (1) and (2), C _lc1 and C _lc2 are the liquid crystal capacitance values of the pixel capacitors 21 and 22 respectively, C _st1 and C _st2 are the storage capacitance values of the storage capacitors 41 and 42 respectively, C _gs1 and C _gs2 are the parasitic capacitance values of the parasitic capacitances 61 and 62 respectively, and ΔV _com (V _com1 -V _com2 or V _com2 -V _com1 ) is the modulation value of the common voltage V _com . Generally speaking, the transistors 31 and 32 use components with the same specifications, so C _gs1 and C _gs2 are usually equal to each other. Furthermore, the values of C _gs1 and C _gs2 are small, so they can be ignored.

Then, in this embodiment, the pixel 10 can be designed such that C _lc1 =C _lc2 , and C _st1 ≠C _st2 . Therefore, modulating the common voltage V _com in step S304 can make the cross voltage ΔV _P1 different from the cross voltage ΔV _P2 . Therefore, the sub-pixels 51 and 52 of the pixel 10 can respectively have different data signal-transmittance curves, so as to improve the problem of color shift. In addition, in this embodiment, the sub-pixels 51 and 52 are coupled to the same scan line, which improves the prior art that each sub-pixel must be coupled to different scan lines. Not only that, compared with the prior art shown in FIG. 2A , this embodiment not only improves the reliability, but also improves problems such as image unevenness and image sticking. In addition, compared with FIG. 2B of the prior art, the number of scanning lines used in this embodiment is only half of that of the prior art, which not only can greatly save hardware cost, improve aperture ratio, simplify system circuit complexity, and reduce It needs to increase the operating frequency of the circuit, so it has the function of saving power.

的关系，通过在步骤S304调制公共电压V_com，可使跨压ΔV_P1不同于跨压ΔV_P2。Although the pixel 10 is designed as C _lc1 =C _lc2 and C _st1 ≠C _st2 in this embodiment, the present invention is not limited thereto. In other embodiments, as long as _Clc1 , _Clc2 , C _st1 and C _st2 have

By modulating the common voltage V _com in step S304 , the cross voltage ΔV _P1 can be different from the cross voltage ΔV _P2 .

FIG. 4A is a top view of a first pixel structure according to the first embodiment of the present invention. FIG. 4B is a cross-sectional view along T ₁ to T ₁ ′ in FIG. 4A . Referring to FIG. 3A , FIG. 4A and FIG. 4B , the structure of the pixel 10 includes a substrate 410 , a bias electrode 420 , a dielectric layer 430 , pixel electrodes 441 , 442 , a liquid crystal layer 450 and a common electrode 460 . In this embodiment, the substrate 410 is described as an example with the lower glass 411 and the polarizer 412 as examples. The bias electrode 420 is disposed on a partial area of the substrate 410 . For example, the bias electrode 420 can be designed to have a plurality of openings, and the positions of the openings correspond to the sub-pixels 51 and 52 respectively. The dielectric layer 430 is disposed on the bias electrode 420 . The pixel electrode 441 is disposed on a partial area of the dielectric layer 430 , and a partial area of the pixel electrode 441 overlaps with a partial area of the bias electrode 420 to form a storage capacitor 41 . The pixel electrode 442 is disposed on a partial area of the dielectric layer 430 , and a partial area of the pixel electrode 442 overlaps with a partial area of the bias electrode 420 to form a storage capacitor 42 .

In this embodiment, the bias electrode 420 , the pixel electrodes 441 , 442 and the common electrode 460 may be formed of opaque materials, such as aluminum. However, in other embodiments, the bias electrode 420 , the pixel electrodes 441 , 442 and the common electrode 460 may also be formed of transparent materials, such as indium tin oxide (ITO).

Then, the liquid crystal layer 450 is disposed on the pixel electrodes 441 and 442 . The shared electrode 460 is disposed on the liquid crystal layer 450 , and the shared electrode 460 corresponds to the pixel electrodes 441 and 442 to form the pixel capacitor 21 and the pixel capacitor 22 respectively. In addition, the substrate 470 may also be disposed on the common electrode 460 . The substrate 470 includes, for example, an upper glass 471 and a polarizer 472 .

It is worth mentioning that since the overlapping area of the pixel electrode 441 and the bias electrode 420 (an annular region with a width of a) is different from the overlapping area of the pixel electrode 441 and the bias electrode 420 (the width of which is b ring region), therefore the storage capacitance C _st1 of the storage capacitor 41 is different from the storage capacitance C _st2 of the storage capacitor 42 . In addition, in this embodiment, the areas of the pixel electrodes 441 and 442 are designed to be the same, so the liquid crystal capacitance _Clc1 of the pixel capacitor 21 is the same as the liquid crystal capacitance _Clc2 of the pixel capacitor 22 . In this way, when the common voltage V _com is modulated, the cross-voltages coupled by the pixel capacitors 21 and 22 will be different.

In this embodiment, although the areas of the pixel electrodes 441 and 442 are designed to be the same, in another embodiment, the areas of the pixel electrodes 441 and 442 may also be designed to be different, so that _Clc1 ≠ _Clc2 . For example, FIG. 4C is a top view of a second pixel structure according to the first embodiment of the present invention. FIG. 4D is a cross-sectional view along line T ₁ to T ₁ ′ of FIG. 4C . Those skilled in the art can replace the pixel structures in FIGS. 4A and 4B with the pixel structures in FIGS. 4C and 4D . It is worth mentioning that, in FIG. 4C and FIG. 4D , c is greater than d, that is, the area of the pixel electrode 441 is greater than the area of the pixel electrode 442 , so _Clc1 ≠ _Clc2 can be set.

In this embodiment, although the bias electrode 420 is formed of an opaque material with multiple openings, in other embodiments, the bias electrode 420 may also be formed of a transparent material without openings, or may be formed of a material with multiple openings. The opening is formed of a transparent material.

Those skilled in the art can design the pixel 10 as a transmissive pixel according to requirements, so as to be applied to a transmissive liquid crystal display. In addition, the pixel 10 can also be designed as a reflective pixel, so as to be applied to a reflective liquid crystal display. Moreover, the sub-pixel 51 of the pixel 10 may also be designed as a transmissive pixel, and the sub-pixel 52 of the pixel 10 may be designed as a reflective pixel, so as to be applied to a transflective-semi-reflective liquid crystal display.

second embodiment

FIG. 5 is a circuit diagram of a pixel of a liquid crystal display according to a second embodiment of the present invention. The pixel 11 of this embodiment is similar to the pixel 10 of the above-mentioned embodiment, and the components with the same numbers as those in FIG. 1 can refer to the above-mentioned embodiment. It should be noted that the pixel 11 in this embodiment also includes storage capacitors 43 and 44 . The first terminal and the second terminal of the storage capacitor 43 are respectively coupled to the first terminal and the second bias electrode of the transistor 31 . The first terminal and the second terminal of the storage capacitor 44 are respectively coupled to the first terminal and the second bias electrode of the transistor 32 . In this embodiment, the second bias electrode may be coupled to a ground voltage, for example. Therefore, when the common voltage V _com is modulated, the cross-voltage ΔV _P1 of the pixel capacitor 21 and the cross-voltage ΔV _P2 of the pixel capacitor 22 can be calculated according to the following formula (3) and formula (4):

$\mathrm{\&Delta;}{\mathrm{<figure-callout\; id="1"\; label="V\; p"\; filenames="H2008101667981E0000031.png,H2008101667981E0000061.png"\; state="\{\{state\}\}">V</figure-callout>}}_p=\frac{C_{\mathrm{st}3}+C_{\mathrm{lc}1}}{{\mathrm{<figure-callout\; id="1"\; label="C\; st"\; filenames="H2008101667981E0000031.png,H2008101667981E0000061.png"\; state="\{\{state\}\}">C</figure-callout>}}_{\mathrm{st}}+C_{\mathrm{st}3}+{\mathrm{<figure-callout\; id="1"\; label="C\; lc"\; filenames="H2008101667981E0000031.png,H2008101667981E0000061.png"\; state="\{\{state\}\}">C</figure-callout>}}_{\mathrm{lc}}+{\mathrm{<figure-callout\; id="1"\; label="C\; gs"\; filenames="H2008101667981E0000031.png,H2008101667981E0000061.png"\; state="\{\{state\}\}">C</figure-callout>}}_{\mathrm{gs}}}\&times;\mathrm{\&Delta;}{V}_{\mathrm{com}}$ ...Formula (3)

$\mathrm{\&Delta;}{V}_{p2}=\frac{C_{\mathrm{st}4}+C_{\mathrm{lc}2}}{C_{\mathrm{st}2}+C_{\mathrm{st}4}+C_{\mathrm{lc}2}+C_{\mathrm{gs}2}}\&times;\mathrm{\&Delta;}{V}_{\mathrm{com}}$ ...Formula (4)

In formulas (3) and (4), C _lc1 and C _lc2 are the liquid crystal capacitance values of pixel capacitors 21 and 22 respectively, and C _st1 , C _st2 , C _st3 and C _st4 are storage capacitors 41, 42, 43 and 44 respectively. C _gs1 and C _gs2 are the parasitic capacitance values of the parasitic capacitors 61 and 62 respectively, and ΔV _com (V _com1 -V _com2 or V _com2 -V _com1 ) is the modulation value of the common voltage V _com .

In this way, this embodiment can not only achieve similar effects to the above-mentioned embodiments, but also further stabilize the pixel voltage through the storage capacitors 43 and 44 in this embodiment, and make the circuit design more flexible. A pixel structure that can implement this embodiment is provided below for reference by those skilled in the art.

FIG. 6A is a top view of a pixel structure according to the second embodiment of the present invention. FIG. 6B is a cross-sectional view along line T ₂ to T ₂ ′ in FIG. 6A . Referring to FIG. 5 , FIG. 6A and FIG. 6B , the structure of the pixel 11 in this embodiment is similar to the structure of the pixel 10 in the above embodiment, and the components with the same numbers as in FIG. 4A and FIG. 4B can refer to the above embodiment. It should be noted that the structure of the pixel 11 in this embodiment further includes a common electrode 480 . The common electrode 480 is disposed between a partial region of the substrate 410 and the dielectric layer 430 . A partial area of the common electrode 480 overlaps a partial area 491 of the pixel electrode 441 to form a storage capacitor 43 , and a partial area of the common electrode 480 overlaps a partial area of the pixel electrode 442 to form a storage capacitor 44 .

Then, in this embodiment, the area of the partial region 491 is designed to be the same as the area of the partial region 492 , so C _st3 =C _st4 . However, in another embodiment, the area of the partial region 491 can also be designed to be different from the area of the partial region 492 , so that C _st3 ≠C _st4 . In this way, when the common voltage V _com is modulated, the cross-voltages coupled by the pixel capacitors 21 and 22 will be different.

third embodiment

Those skilled in the art can change the pixel structure according to requirements, for example, FIG. 7 is a pixel circuit diagram of a liquid crystal display according to the third embodiment of the present invention. The pixel 12 in this embodiment is similar to the pixel 10 in FIG. 3A described above, and the components with the same numbers as those in the above embodiment can refer to the above embodiments. It should be noted that the sub-pixels 51 and 52 of this embodiment are respectively located on both sides of the data line DL, which has the advantage of reducing the complexity of the wiring. In addition, the pixel 12 also designs the storage capacitor 42 to be connected in parallel with the pixel capacitor 22 . Therefore, effects similar to those of the above-mentioned embodiments can also be achieved.

Fourth embodiment

Those skilled in the art can also add different numbers of storage capacitors in parallel with each pixel capacitor according to requirements. For example, FIG. 8A is a circuit diagram of a pixel of a liquid crystal display according to a fourth embodiment of the present invention. The pixel 13 in this embodiment is similar to the pixel 12 in FIG. 7 above, and the components with the same numbers as those in the above embodiment can refer to the above embodiment. It should be noted that in this embodiment, a storage capacitor 43 connected in parallel with the pixel capacitor 21 is added. In this way, not only the effects similar to those of the above-mentioned embodiments can be achieved, but also the circuit design can be more flexible.

As another example, FIG. 8B is another pixel circuit diagram of the liquid crystal display according to the fourth embodiment of the present invention. The pixel 14 in this embodiment is similar to the pixel 13 in FIG. 8A described above, and the parts with the same numbers as those in the above embodiment can refer to the above embodiment. It should be noted that in this embodiment, a storage capacitor 44 connected in parallel with the pixel capacitor 22 is added. In this way, not only the effects similar to those of the above-mentioned embodiments can be achieved, but also the circuit design can be more flexible.

To sum up, the present invention utilizes the technique of modulating the common voltage to make the cross-voltages coupled to the pixel capacitors 21 and 22 different, so that the color shift phenomenon can be improved.

Although the present invention has been described by the above several embodiments, the present invention is not limited thereto, and any person of ordinary skill in the art can make various modifications to it without departing from the spirit and scope of the present invention and modifications, the scope of protection of the present invention is therefore defined by the appended claims.

Claims (21)

1. A method of driving a liquid crystal display, comprising:

supplying a common voltage to the shared electrode during a first period;

modulating the common voltage during the first period;

coupling a first terminal of a first transistor through a first pixel capacitor during the first period;

coupling a first terminal of a second transistor through a second pixel capacitor during the first period; and

during the first period, a voltage is generated between the first terminal of the first transistor and the first terminal of the second transistor.

2. The driving method of the liquid crystal display according to claim 1, further comprising:

providing a first scan signal to a scan line during the first period;

isolating a first terminal and a second terminal of the first transistor during the first period; and

isolating a first terminal and a second terminal of the second transistor during the first period.

3. The driving method of the liquid crystal display according to claim 2, further comprising:

supplying a second scan signal to the scan line during a second period;

turning on the first and second terminals of the first transistor during the second period; and

and turning on the first terminal and the second terminal of the second transistor in the second period.

4. The driving method of the liquid crystal display according to claim 2, further comprising:

supplying a data signal to a data line during the second period; and

and charging the first pixel capacitor and the second pixel capacitor in the second period.

5. The driving method of the liquid crystal display according to claim 1, further comprising:

electrically connecting the scan line to a gate of the first transistor; and

and electrically connecting the scanning line to the grid electrode of the second transistor.

6. The driving method of the liquid crystal display according to claim 1, further comprising:

the first end of the first transistor is electrically connected with one end of the first pixel capacitor; and

and the first end of the second transistor is electrically connected with one end of the second pixel capacitor.

7. The driving method of the liquid crystal display according to claim 1, further comprising:

the shared electrode is electrically connected with the other end of the first pixel capacitor; and

and the other end of the shared electrode is electrically connected with the other end of the second pixel capacitor.

8. A liquid crystal display, comprising:

a substrate and an opposite substrate corresponding to the substrate;

a bias electrode and a common electrode disposed on the substrate;

a first pixel electrode partially overlapped with the bias electrode and the common electrode to form a first pixel electrode having a capacitance value C_st1And has a capacitance value C_st3A third storage capacitor of (1);

a second pixel electrode partially overlapped with the bias electrode and the common electrode to respectively form a capacitor having a capacitance value of C_st2And a second storage capacitor having a capacitance value C_st4A fourth storage capacitor of (1); and

a common electrode disposed on the opposite substrate and overlapping the first pixel electrode and the second pixel electrode to form a first pixel capacitor having a capacitance value Clc1 and a second pixel capacitor having a capacitance value Clc 2;

wherein, <math><mrow><mfrac><mrow><msub><mi>C</mi><mrow><mi>st</mi><mn>3</mn></mrow></msub><mo>+</mo><msub><mi>C</mi><mrow><mi>lc</mi><mn>1</mn></mrow></msub></mrow><mrow><msub><mi>C</mi><mrow><mi>st</mi><mn>1</mn></mrow></msub><mo>+</mo><msub><mi>C</mi><mrow><mi>st</mi><mn>3</mn></mrow></msub><mo>+</mo><msub><mi>C</mi><mrow><mi>lc</mi><mn>1</mn></mrow></msub></mrow></mfrac><mo>&NotEqual;</mo><mfrac><mrow><msub><mi>C</mi><mrow><mi>st</mi><mn>4</mn></mrow></msub><mo>+</mo><msub><mi>C</mi><mrow><mi>lc</mi><mn>2</mn></mrow></msub></mrow><mrow><msub><mi>C</mi><mrow><mi>st</mi><mn>2</mn></mrow></msub><mo>+</mo><msub><mi>C</mi><mrow><mi>st</mi><mn>4</mn></mrow></msub><mo>+</mo><msub><mi>C</mi><mrow><mi>lc</mi><mn>2</mn></mrow></msub></mrow></mfrac><mo>.</mo></mrow></math>

9. the liquid crystal display according to claim 8, wherein an area where the first pixel electrode overlaps the bias electrode is different from an area where the second pixel electrode overlaps the bias electrode.

10. The liquid crystal display according to claim 8, wherein an area where the first pixel electrode overlaps the common electrode is different from an area where the second pixel electrode overlaps the common electrode.

11. The liquid crystal display according to claim 8, wherein an area where the common electrode overlaps the first pixel electrode is different from an area where the common electrode overlaps the second pixel electrode.

12. The liquid crystal display according to claim 8, wherein the bias electrode is integrally formed with the common electrode.

13. The liquid crystal display of claim 12, wherein a capacitance value C of the third storage capacitor_st3Is zero, and the capacitance value C of the fourth storage capacitor_st4Also zero.

14. The liquid crystal display according to claim 8, wherein the bias electrode has a first opening and a second opening.

15. The liquid crystal display according to claim 14, wherein the first pixel electrode corresponds to the first opening.

16. The liquid crystal display according to claim 14, wherein the second pixel electrode corresponds to the second opening.

17. The liquid crystal display according to claim 8, wherein the first pixel electrode has a third opening.

18. The liquid crystal display according to claim 17, wherein the third opening is positioned at a center position of the first pixel electrode.

19. The liquid crystal display according to claim 8, wherein the second pixel electrode has a fourth opening.

20. The liquid crystal display according to claim 19, wherein the fourth opening is positioned at a center of the second pixel electrode.

21. The liquid crystal display according to claim 8, wherein the first pixel electrode is a transparent electrode and the second pixel electrode is an opaque electrode.

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