CN101727397B - Block management and replacement method, flash memory storage system and controller thereof - Google Patents

Abstract

A block management and replacement method for a flash memory, a flash memory storage system and a controller thereof are provided. The method includes dividing a plurality of physical blocks of the flash memory into a plurality of physical units and grouping the physical units into a use area and a replacement area, wherein the physical blocks in each physical unit are accessible by using a multi-block-plane access command. The method also includes replacing the damaged physical unit in units of physical units and recording the undamaged physical blocks in the replaced physical unit when the physical blocks of the physical units of the used area are damaged, if a good physical unit exists in the replacement area. If there is no good physical unit in the replacement area, the damaged physical block is replaced by the physical block unit if there is a good physical block. Therefore, the access efficiency of the flash memory is improved, and the service life of the flash memory is prolonged.

Description

Block management and replacement method, flash memory storage system and controller thereof

technical field

The present invention relates to a block management and replacement method for flash memory and a flash memory storage system using the method and its controller, in particular to a block management and replacement method for flash memory chips with multiple block faces And a flash memory storage system and its controller using this method.

Background technique

The rapid growth of digital cameras, cell phone cameras, and MP3 players has led to a rapid increase in consumer demand for storage media. Because flash memory (Flash Memory) has the characteristics of data non-volatility, power saving, small size and no mechanical structure, it is suitable for portable applications and is most suitable for such portable battery-powered products. A solid state drive is a storage device that uses NAND flash memory as a storage medium.

Generally speaking, the flash memory die in the flash memory chip (chip) of the flash memory storage system will be divided into multiple physical units (physical units), and these physical units can generally be divided into one physical block or multiple physical blocks. composition. These physical units are defined as a data area and a spare area. Valid data written by the write command is stored in the physical units classified as the data area, and the physical units in the spare area are used to replace the physical units in the data area when the write command is executed. Specifically, when the flash storage system receives a write command from the host system and intends to write the physical unit in the data area, the flash storage system will extract the physical unit from the spare area and write the physical unit to be updated in the data area. Write the valid old data in the unit and the new data to be written to the physical unit extracted from the spare area and associate the physical unit with the new data written into the data area, and erase the physical unit in the original data area And associate it as a spare area. In order to allow the host system to smoothly access the physical units that store data in a rotating manner, the flash memory storage system will configure logical units for the host system to access, wherein the logical units are divided into one or more physical blocks according to the physical units to configure the size. That is to say, the flash memory storage system will establish a logical-physical address mapping table (logical-physical address mapping table), and record and update the mapping relationship between the logical unit and the physical unit of the data area in this table to reflect the physical Unit rotation, so the host system only needs to access the provided logical unit, and the flash memory storage system will read or write data to the corresponding physical unit according to the logical-physical address mapping table.

In addition, a part of the physical unit in the general flash memory chip (chip) is reserved as a replacement area, which is used to replace the damaged physical unit to continue operation when the physical unit in the data area or the spare area is damaged. In particular, in order to be able to use the flash memory chip with multiple block planes to improve the access speed, it generally uses multiple physical blocks belonging to different block planes and capable of executing multi-planes accessing commands. composed of physical units for access. In this example, if one of the physical blocks in the physical unit is damaged, the flash storage system will replace the damaged physical unit in units of the entire physical unit so that it can continue to store with multi-block plane access commands. Pick. This replacement operation can be performed until there is no available physical unit in the replacement area to replace the damaged physical unit, and at this time the flash memory storage system will be declared damaged and cannot be used anymore.

However, in fact, there are still undamaged physical blocks in the replaced damaged physical unit, so performing block management and replacement in the above-mentioned manner will result in a waste of the storable space of the flash memory storage system and shorten the lifetime of the flash memory storage system. life.

Contents of the invention

In view of this, the present invention provides a block management and replacement method, which can improve the data writing efficiency of the flash memory storage system and prolong the life of the flash memory storage system.

In addition, the present invention provides a controller, which uses the above-mentioned block management and replacement method to manage flash memory chips, which can improve the data writing efficiency of the flash memory storage system and prolong the life of the flash memory storage system.

Furthermore, the present invention provides a storage system, which uses the above-mentioned block management and replacement method to manage flash memory chips, which can improve the data writing efficiency of the flash memory storage system and prolong the life of the flash memory storage system.

The present invention proposes a block management and replacement method, which is suitable for flash memory storage systems, wherein the flash memory storage system has multiple physical blocks, and the block management and replacement method includes dividing the physical blocks into multiple physical units and grouping For the use area and replacement area, the physical blocks in each physical unit can be accessed by using multi-planes accessing commands. This block management and replacement method also includes when one of the physical blocks in the physical unit belonging to the use area is damaged, judging whether the number of undamaged physical units in the replacement area is greater than a predetermined threshold, wherein when there is no damage in the replacement area When the number of physical units in the general area is greater than the predetermined threshold, an undamaged physical unit is selected from the replacement area to replace a physical unit with a damaged physical block in the general area in units of physical units, and records are not included in the replaced physical unit. Damaged or damaged physical blocks. Moreover, when the number of undamaged physical units in the replacement area is not greater than the predetermined threshold, an undamaged physical block is selected from the replacement area to replace the damaged physical block in units of physical blocks.

In an embodiment of the present invention, the above-mentioned block management and replacement method further includes dividing the used area into a data area and a spare area, wherein the physical units belonging to the spare area are used to alternately store the physical units belonging to the data area data.

In an embodiment of the present invention, each of the above physical blocks has a redundant area, and the step of recording the undamaged physical blocks in the replaced physical unit includes redundancy in the undamaged physical blocks A mark is recorded in the area.

In an embodiment of the present invention, the step of recording the undamaged physical blocks in the replaced physical unit includes recording the undamaged physical blocks in a replacement table.

The present invention also provides a flash memory storage system and its controller. The flash memory storage system includes a flash memory chip, a connector and a controller, wherein the flash memory chip has multiple physical blocks. The controller is electrically connected to the above-mentioned flash memory chip and the connector, and the controller includes a microprocessor unit, a flash memory interface module coupled to the microprocessor unit, a buffer memory, a host interface module and a memory management module. In particular, the memory management module has a plurality of machine instructions executable by the microprocessor unit to implement the above block management and replacement method for the flash memory.

In an embodiment of the present invention, the above-mentioned flash memory storage system is a USB flash drive, a flash memory card or a solid state hard disk.

In an embodiment of the present invention, the above-mentioned physical block belongs to multiple block planes, and each physical unit is composed of at least two physical blocks belonging to different block planes.

In an embodiment of the present invention, the above-mentioned block plane belongs to a flash memory die.

In an embodiment of the present invention, the above-mentioned block planes belong to a plurality of flash memory dies.

In an embodiment of the present invention, the above-mentioned flash memory dies belong to a plurality of flash memory chips.

In an embodiment of the present invention, the above-mentioned flash memory chip belongs to a flash memory chip.

The method provided by the present invention can replace the damaged physical block in units of physical units when the replacement area still has physical units composed of physical blocks that can be accessed by multi-block plane access instructions and in the replacement area When there is no physical unit composed of physical blocks that can be accessed by multi-block surface access instructions, the damaged physical block is replaced by the physical block, so the access efficiency of the flash memory storage system can be effectively improved and the extension can be extended. Lifespan of flash storage systems.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, preferred embodiments are specifically cited below and described in detail with reference to the accompanying drawings.

Description of drawings

FIG. 1 is a schematic block diagram of a flash memory storage system according to an embodiment of the present invention.

FIG. 2 is a block diagram of a flash memory chip according to an embodiment of the present invention.

FIG. 3A is a general area and a replacement area of a flash memory chip according to an embodiment of the present invention.

FIG. 3B is a schematic diagram showing block replacement between a normal area and a replacement area according to an embodiment of the present invention.

FIG. 3C is a schematic diagram showing the operation of physical units in a general area according to an embodiment of the present invention.

FIG. 3D is a schematic diagram showing an example of writing to the physical unit in FIG. 3C according to an embodiment of the present invention.

Fig. 4 is a flow chart showing block management and replacement steps according to an embodiment of the present invention.

Description of reference symbols

100: Flash storage system

110: Controller

110a: Microprocessor unit

110b: memory management module

110c: Flash Interface Module

110d: buffer memory

110e: host interface module

120: connector

130: Flash memory chip

130a: The first block surface

130b: The second block surface

200: host system

210-1～210-M: logic unit

300: bus

302: General Area

312: Alternative Area

304: System area

306: data area

308: Spare area

310-(1), 310-(2), 310-(P), 310-(P+1), 310-(P+2), 310-(N): physical units

350: Replace Physical Unit

S401, S403, S405, S407, S409, S411, S413, S415, S417: block management and replacement steps

Detailed ways

FIG. 1 is a schematic block diagram of a flash memory storage system according to an embodiment of the present invention. Referring to FIG. 1 , the flash memory storage system 100 includes a controller (also called a controller system) 110 , a connector 120 and a flash memory chip 130 .

Generally, the flash storage system 100 is used together with the host system 200 so that the host system 200 can write data into the flash storage system 100 or read data from the flash storage system 100 . In this embodiment, the flash memory storage system 100 is a solid state drive (Solid State Drive, SSD). But it must be understood that, in another embodiment of the present invention, the flash memory storage system 100 may also be a memory card or a flash drive.

The controller 110 executes a plurality of instructions implemented in hardware or firmware to cooperate with the connector 120 and the flash memory chip 130 to perform operations such as data storage, reading, and erasing. The controller 110 includes a microprocessor unit 110a, a memory management module 110b, a flash memory interface module 110c, a cache memory 110d and a host interface module 110e.

The microprocessor unit 110 a cooperates with the memory management module 110 b , the flash memory interface module 110 c , the cache memory 110 d , and the host interface module 110 e to perform various operations of the flash memory storage system 100 .

The memory management module 110b is coupled to the microprocessor unit 110a. The memory management module 110b has a plurality of machine instructions executable by the microprocessor unit 110a to manage the flash chip 130, such as machine instructions for wear leveling, block management functions, and maintenance of logical-physical address mapping table functions. In particular, in the embodiment of the present invention, the memory management module 110b includes machine instructions capable of completing the steps of block management and replacement according to the present embodiment.

In this embodiment, the memory management module 110b is implemented in the controller 110 in a firmware format, such as writing relevant mechanical instructions in a programming language and storing them in a program memory (for example, a read only memory (Read Only Memory, ROM)) To implement the memory management module 110b. When the flash memory storage system 100 is in operation, a plurality of machine instructions of the memory management module 110b will be indirectly loaded into the buffer memory 110d, and executed by the microprocessor unit 110a or directly executed by the microprocessor unit 110a to complete The above-mentioned average wear function, bad block management function, maintenance logical-physical block mapping table function, etc. In particular, the controller 110 completes the block management and replacement steps according to the embodiment of the present invention by executing a plurality of machine commands of the memory management module 110b.

In another embodiment of the present invention, the mechanical instructions of the memory management module 110b may also be stored in a specific area of the flash memory chip 130 (for example, a system area dedicated to storing system data in the flash memory) in the form of firmware. Similarly, when the flash storage system 100 is operating, a plurality of machine instructions of the memory management module 110b will be loaded into the buffer memory 110d and executed by the microprocessor unit 110a. In addition, in another embodiment of the present invention, the memory management module 110b can also be implemented in the controller 110 in a hardware form.

The flash memory interface module 110c is coupled to the microprocessor unit 110a and used for accessing the flash memory chip 130 . That is, the data to be written into the flash memory chip 130 will be converted into a format acceptable to the flash memory chip 130 through the flash memory interface module 110c.

The buffer memory 110 d is coupled to the microprocessor unit 110 a and used for temporarily storing system data (such as a logical-physical address mapping table) or data read or written by the host system 200 . In this embodiment, the buffer memory 110d is a static random access memory (static random access memory, SRAM). However, it must be understood that the present invention is not limited thereto, Dynamic Random Access Memory (Dynamic Random Access memory, DRAM), magnetoresistive memory (Magnetoresistive Random Access Memory, MRAM), phase change memory (PhaseChange Random Access Memory, PRAM) ) or other suitable memory can also be applied to the present invention.

The host interface module 110 e is coupled to the microprocessor unit 110 a and is used for receiving and identifying commands sent by the host system 200 . That is, the commands and data transmitted by the host system 200 are transmitted to the microprocessor unit 110a through the host interface module 110e. In this embodiment, the host interface module 110e is a SATA interface. However, it must be understood that the present invention is not limited thereto, and the host interface module 110e can also be a USB interface, IEEE1394 interface, PCI Express interface, MS interface, MMC interface, SD interface, CF interface, IDE interface or other suitable data transmission interfaces . In particular, the host interface module 110e would correspond to the connector 120 . That is, the host interface module 110e must match with the connector 120 .

In addition, although not shown in this embodiment, the controller 110 may further include general functional modules for controlling the flash memory, such as an error correction module and a power management module.

The connector 120 is used for connecting the host system 200 through the bus 300 . In this embodiment, the connector 120 is a SATA connector. However, it must be understood that the present invention is not limited thereto, and the connector 120 can also be a USB connector, IEEE1394 connector, PCI Express connector, MS connector, MMC connector, SD connector, CF connector, IDE connector or other suitable connectors.

The flash memory chip 130 is electrically connected to the controller 110 and used for storing data. In this implementation, the flash memory chip 130 is a multi-level memory cell (Multi Level Cell, MLC) NAND flash memory. However, it must be understood that the present invention is not limited thereto. In another embodiment of the present invention, single level cell (Single Level Cell, SLC) NAND flash memory can also be applied to the present invention.

In this embodiment, the flash memory chip 130 includes a first block plane 130a and a second block plane 130b, and the first block plane 130a and the second block plane 130b respectively include a plurality of physical blocks. In particular, the first block plane and the second block plane may be physically or virtually separated from each other.

It is worth mentioning that although this embodiment is described with two block planes, the present invention is not limited thereto, and the present invention can also be applied to a flash memory chip with any number of block planes. In addition, in this embodiment, the first block surface 130a and the second block surface 130b of a flash memory die (not marked) of the flash memory chip 130 are used for description, but the present invention is also applicable to multiple flash memory chips. Die of flash memory chips. Similarly, although this embodiment is described with one flash memory chip, the present invention is also applicable to a flash memory storage system with multiple flash memory chips.

A physical block is the smallest unit of erasing in flash memory. That is, each physical block contains a minimum number of memory cells that are erased. Each physical block is usually divided into multiple page addresses (pages). A page address is usually the smallest unit of a program. However, it should be noted that due to some different flash memory designs, the smallest programming unit can also be a sector. That is to say, there are multiple sectors in one page address and one sector is the smallest unit for programming. In other words, the page address is the minimum unit for writing data or reading data. Each page address generally includes a user data area D and a redundant area R. The user data area is used to store user data, and the redundant area is used to store system data (eg, error correcting code (ECC)).

To correspond to the sector size of a disk drive, generally speaking, the user data area D is usually 512 bytes, and the redundancy area R is usually 16 bytes. That is, one page address is one sector. However, multiple sectors can also form a page address. In this embodiment, a page address of a flash memory block includes 4 sectors.

Generally speaking, a physical block can be composed of any number of page addresses, such as 64 page addresses, 128 page addresses, 256 page addresses and so on. In addition, the physical blocks in the first block plane 130a or the second block plane 130b can also be generally grouped into several zones (zones), and the memory is managed by the zone to operate independently of each other to increase the operation Execution parallelism and simplified management complexity.

In addition, the controller 110 configures multiple physical blocks in the first block plane 130a and the second block plane 130b as a physical unit for management, for example, a physical unit includes two physical blocks. Since the controller 110 maintains the logical-physical address mapping table in a larger unit (ie, physical unit) when managing in physical units, the space required for the buffer memory 110d can be saved.

In particular, in this embodiment, the controller 110 can simultaneously access specific physical blocks in the first block plane 130 a and the second block plane 130 b in a multi-plane accessing mode. That is to say, in the flash memory chip 130, the specific physical block in the first block plane 130a and the specific physical block in the second block plane 130b can be operated by multi-block plane access instructions simultaneously (for example, execute write entry, read and erase). Therefore, in this embodiment, the controller 110 further configures the physical blocks having a relationship of being operable at the same time as a physical unit. Specifically, in the circuit design of a specific flash memory chip, some block planes can access data by overlapping (or synchronizing) at least a part of the operation time to shorten the time required for accessing data. Therefore, these specific block planes that can access data in a partially synchronous manner are referred to as having a relationship of simultaneous operation, and the access mode that accesses data in a partially synchronous manner is called a multi-block plane access mode.

FIG. 2 is a block diagram of a flash memory chip according to an embodiment of the present invention. Referring to FIG. 2 , the physical blocks of the first block plane 130 a and the second block plane 130 b can form physical units 310 - 1 - 310 -N respectively.

3A-3D are schematic diagrams showing the operation of physical units in the first block plane 130 a and the second block plane 130 b according to an embodiment of the present invention.

It must be understood that words such as "extract", "remove", "exchange", "replace", "rotate", "segment", and "partition" are used to describe the physical operation of the flash memory chip 130 when describing the operation of the flash memory. A block is a logical concept. That is to say, the actual location of the physical block of the flash memory is not changed, but the physical block of the flash memory is logically operated. It is worth mentioning that the following operations are completed by the controller 110 executing mechanical instructions of the memory management module 110b.

FIG. 3A is a general area and a replacement area of a flash memory chip according to an embodiment of the present invention.

Referring to FIG. 3A , in the embodiment of the present invention, in order to efficiently program (ie, write) data, the controller 110 logically groups the physical units shown in FIG. 2 into a general area 302 and a replacement area 312 .

The physical units 310 - ( 1 )˜ 310 -(P) in the general area 302 are physical units normally used by the flash storage system 100 . That is, the controller 110 writes data into the physical units belonging to the general area 302 .

The physical units 310-(P+1)˜310-(N) in the replacement area 312 are replacement physical units. When the flash memory chip 130 leaves the factory, 4% of the physical blocks are reserved for replacement. That is to say, when the physical blocks in the general area 302 are damaged, the physical blocks reserved in the replacement area 312 can be used to replace the damaged ones. physical block. Therefore, if there are still available physical blocks in the replacement area 312 , the controller 110 can extract the available physical blocks from the replacement area 312 to replace the damaged physical blocks when a physical block is damaged. If there is no available physical block in the replacement area 312, the flash memory storage system 100 will be declared unusable when the physical block is damaged. Generally speaking, the controller 110 will set a predetermined threshold for judging whether the flash memory chip 130 can continue to be used. Extract physical blocks. In this embodiment, the predetermined threshold is set to 0. However, the present invention is not limited thereto, and the predetermined threshold may be set as an integer of 1 or greater.

In particular, in this embodiment, the controller 110 can replace damaged physical units or physical blocks from the replacement area 312 in units of physical units or physical blocks.

FIG. 3B is a schematic diagram showing block replacement between a normal area and a replacement area according to an embodiment of the present invention.

Referring to FIG. 3B , when a physical block in the general area 302 is damaged, the controller 110 of this embodiment can replace the damaged physical block in two ways. For example, assuming that the physical block a(1) of the first block plane 130a is damaged, in the first mode, the controller 110 will include the physical block a(P+1) of the first block plane 130a and The physical unit 310-(P+1) of the physical block b(P+1) of the second block plane 130b replaces the entire physical unit 310-1 (as shown in (a) of FIG. 3B ). That is to say, when the controller 110 needs to use the physical unit 310-(1), the controller 110 will use the physical unit 310-(P+1) by reading the replaced record. For example, the replacement record can be recorded in the redundant area of the physical block of the physical unit 310-1. In addition, in the second manner, the controller 110 only replaces the damaged physical block a(1) of the first block plane 130a with the physical block a(P+1). That is to say, when the controller 110 accesses the physical unit 310-(1), if the accessed address is the address of the original physical block a(1), the controller 110 will change to access the physical block a( P+1). Similarly, for example, the replacement record can be recorded in the redundant area of the physical block a(1).

It is worth mentioning that, according to this embodiment, when the controller 110 uses the first method to replace a damaged block, since there are still normal physical blocks in the replaced physical unit (for example, the physical block shown in FIG. 3B block b(1)), so the controller 110 according to the embodiment of the present invention will record this information specially. For example, in an embodiment of the present invention, this information will be recorded in a replacement table, or the redundant area of the physical block b(1) can also be used to record this information.

The controller 110 according to the embodiment of the present invention uses the above two methods to replace the damaged physical block, and its specific operation method will be described in detail below with reference to FIG. 4 .

In one embodiment of the present invention, when the flash memory storage system 100 is operating, the controller 110 further groups the physical units in the general area 302 of the flash memory chip 130 into a system area, a data area and a spare area. FIG. 3C is a schematic diagram showing the operation of physical units in a general area according to an embodiment of the present invention. Please refer to FIG. 3C, the system area 304 includes physical units 310-(1)~physical units 310-(S), the data area 306 includes physical units 310-(S+1)~physical units 310-(S+M), and The spare area 308 includes a physical unit 310-(S+M+1)˜physical unit 310-(P). In this embodiment, the above-mentioned S, M and P are positive integers, which represent the number of physical blocks configured in each area, which can be set by the manufacturer of the flash memory storage system according to the capacity of the flash memory used.

The physical units in the system area 304 are used to record system data, and the system data includes the number of areas on the first block plane 130a, the number of physical blocks in each area, the number of page addresses in each physical block, and recording logical addresses. The logical-physical address mapping table of the mapping relationship with the physical address, etc.

The physical units in the data area 306 are used to store user data, generally speaking, they are the blocks corresponding to the logical blocks accessed by the host system 200 .

The physical blocks in the spare area 308 are used to replace the physical units in the data area 306, so the physical blocks in the spare area 206a are empty or usable blocks, that is, no recorded data or marked as useless invalid data. That is to say, the physical blocks of the data area 306 and the spare area 308 store data written into the flash memory storage system 100 by the host system 200 in an alternate manner.

As mentioned above, the physical units of the flash memory chip 130 will be provided to the host system in turn to store data, so the controller 110 will provide the logical units 210-1-210-M to the host system 200 for data access, and through A logical-physical address mapping table is maintained to record the physical unit to which the logical unit is mapped.

FIG. 3D is a schematic diagram illustrating an example of executing a write instruction on a physical unit in FIG. 3C according to an embodiment of the present invention.

Please refer to FIG. 3D. For example, when the host system intends to write data to the logical unit 210-1, the controller 110 will know that the logical unit is currently the physical unit 310 in the mapping data area 306 through the logical-physical address mapping table. -(S+1). Therefore, the flash storage system 100 will update the data in the physical unit 310-(S+1), during which the controller 110 will extract the physical unit 310-(S+M+1) from the spare area 308 to replace the data Physical unit 310 -(S+1) of region 306 . However, when new data is written into physical unit 310-(S+M+1), all valid data in physical unit 310-(S+1) will not be moved to physical unit 310-(S+1) immediately. M+1) and erase physical unit 310-(S+1). Specifically, the controller 110 will copy the valid data before the page address to be written in the physical unit 310-(S+1) (ie, pages P0 and P1) to the physical unit 310-(S+M+1)( (a) of FIG. 3D ), and new data (that is, pages P2 and P3 of physical unit 310-(S+M+1)) are written into physical unit 310-(S+M+1) (as shown in FIG. 3D (b)). At this time, the physical unit 310 −(S+M+1) containing part of the valid old data and the written new data is temporarily associated as the replacement physical unit 350 . This is because the valid data in the physical unit 310-(S+1) may become invalid in the next operation (for example, write command), so all the valid data in the physical unit 310-(S+1) will be immediately Moving to the replacement physical unit 310-(S+M+1) may cause unnecessary moving. In this embodiment, the integrated content of the physical unit 310-(S+1) and the replacement physical unit 310-(S+M+1) is the complete content of the corresponding logical unit 210-1. The transient relationship of this parent-child relationship (ie, the physical unit 310-(S+1) and the replacement physical unit 310-(S+M+1)) may depend on the size of the buffer memory 110d in the controller 110, for example, in In this embodiment, five groups are used for implementation. The action of temporarily maintaining such a transient relationship can generally be referred to as opening (opening) the parent-child block.

Afterwards, when the contents of the physical unit 310-(S+1) and the replacement physical unit 310-(S+M+1) need to be actually merged, the controller 110 will combine the physical unit 310-(S+1) with the replacement physical unit 310-(S+1) The physical unit 310-(S+M+1) is merged into one physical unit, thereby improving the utilization efficiency of the block. This merging action can also be called closing (close) the parent-child block. For example, as shown in (c) of FIG. 3D, when closing the parent-child block, the controller 110 will copy the remaining valid data (ie, pages P4～PN) in the physical unit 310-(S+1) to the replacement Physical unit 310-(S+M+1), then erase physical unit 310-(S+1) and associate it as a spare area 308, meanwhile, associate a replacement physical unit 310-(S+M+1) as data block 306, and change the mapping of logical unit 210-1 to physical unit 310-(S+M+1) in the logical-physical address mapping table, thereby completing the action of closing the parent and child blocks.

It is worth mentioning that in this embodiment, each physical unit is composed of physical blocks belonging to different block planes. Therefore, when accessing a plurality of physical blocks in a physical unit, generally speaking, the controller 110 must execute a single-plane accessing command for each physical block in multiple ways. to complete writing or reading. This mode of sequentially accessing only one physical block is called a single-block plane access mode. However, as mentioned above, during the circuit layout (layout) of the memory cell manufacturing process, there will be a simultaneous operable relationship between physical blocks belonging to different block planes, so if the corresponding simultaneous operable relationship is based on this When the physical blocks are grouped into a physical unit, when accessing multiple physical blocks in the physical unit, the controller 110 can execute multi-block surface access instructions on the physical blocks at the same time to complete Write or read to improve access efficiency. This method of simultaneously accessing multiple physical blocks is called a multi-block plane access mode.

Therefore, in this embodiment, when a physical block of the flash memory chip 130 is damaged, the controller 110 will preferentially select a physical unit that can perform multi-block plane access from the replacement area 312 to replace the physical unit with the damaged physical block. unit (as shown in (a) of FIG. 3B ), thereby ensuring that the flash memory storage system 100 can still perform data access in a more efficient multi-block plane access mode after the bad block is replaced.

FIG. 4 is a flowchart showing block management and replacement steps according to an embodiment of the present invention, wherein these steps are completed by the microprocessor unit 110 a of the controller 110 executing mechanical instructions of the memory management module 110 b. It must be understood that the block management steps proposed by the present invention are not limited to the execution sequence shown in FIG. 4 , and those skilled in the art can change the sequence of the block management steps arbitrarily according to the spirit of the present invention.

Please refer to FIG. 4 , when the flash memory storage system 100 is connected to the host system 200 and powered on, the controller 110 will be initialized, wherein the first block plane 130a and the second block plane 130b can be used by using multiple The physical blocks accessed by the block-level access instruction are grouped into multiple physical units and divided into the use area 302 and the replacement area 312 (step S401), especially in this embodiment, the controller 110 will also The usage area 302 is divided into a system area 304 , a data area 306 and a spare area 308 .

Next, during the operation of the flash memory storage system 100, the controller 110 continuously determines whether there is a physical block damaged in the general area 302 (step S403). Specifically, in the example of writing data, the controller 110 will determine whether the writing status is normal, and in the example of reading data, the controller 110 will determine whether the read value of the data is correct, thereby determining the accessed Whether the physical block is damaged. If the controller 110 finds that a physical block is damaged, then in step S405, the controller 110 will judge whether the number of undamaged physical units in the replacement area 312 is greater than a predetermined threshold (in this embodiment, the predetermined threshold is 0, The predetermined threshold can be set by the user to other values, such as 1, 2 or other appropriate integer values), wherein the so-called undamaged physical unit means that all physical blocks in this physical unit are normal and can pass through multiple zones It is accessed by the block face access mode. Specifically, step S405 is to determine whether there are enough undamaged physical units in the replacement area 312 .

If the number of undamaged physical units in the replacement area 312 is greater than a predetermined threshold (that is, there are enough undamaged physical units in the replacement area 312), the controller 110 will select undamaged physical units in step S407. One of the physical units replaces the damaged physical unit in units of the entire physical unit, and in step S409 the controller 110 records related information in a replacement table (not shown). For example, in an embodiment of the present invention, the normal physical blocks in the replaced physical unit are recorded in the replacement table. For example, in another embodiment of the present invention, the replaced physical unit is recorded in the replacement table, and then a mark in the redundant area of each physical block is used to identify the usable physical block. In addition, in addition to using the above-mentioned replacement table, in another embodiment of the present invention, step S409 can also use only a mark recorded in the redundant area of the undamaged physical block to mark this be a normal physical block or record a mark in the damaged physical block redundant area to note that this is a damaged physical block, or mark both blocks, and when the controller 100 in the flash memory storage system The state of the physical block can be known by scanning and reading the redundant area of the physical block when the 100 is initialized every time it is powered on.

If the number of undamaged physical units in the replacement area 312 is not greater than the predetermined threshold (that is, there are not enough undamaged physical units in the replacement area 312), then in step S411, the controller 110 will pass the replacement Table records are used to determine whether there are undamaged physical blocks in the replacement area 312 .

If it is determined in step S411 that there are undamaged physical blocks in the replacement area 312, then in step S413 one of the undamaged physical blocks will be selected and the damaged physical block will be replaced in units of physical blocks , and in step S415, the controller 110 deletes the selected physical block from the record in the replacement table. If it is determined in step S411 that there is no undamaged physical block in the replacement area 312 , then in step S417 the controller 110 will send an error message to inform the host system 200 that the flash storage system 100 can no longer store data.

Although not shown in FIG. 4, those skilled in the art can easily understand that the block management and replacement steps in FIG. 4 will end the program in FIG. 4 when the damaged physical block cannot be replaced. The program in Fig. 4 will also end when the shutdown or power interruption command is issued.

To sum up, the present invention groups the physical blocks that can be accessed in the multi-block plane access mode into physical units when the flash memory storage system is initialized, thereby using the multi-block plane access mode to store the flash memory chip Access to improve access efficiency. In addition, when a physical block is damaged, when there are physical units that can be accessed in a multi-block plane access mode in the replacement area, the present invention uses the physical unit as a unit to replace the physical unit with the damaged physical block, Instead, it can continue to access in the multi-block surface access mode. In addition, the present invention will record the usable physical block in the replaced physical unit and when the physical block is damaged and the replacement area has no normal physical unit, the present invention will record the usable physical block to Replace damaged physical blocks, thereby extending the life of the flash storage system.

Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Those skilled in the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection is based on the claims of the present invention.

Claims (18)

1. A block management and replacement method, applicable to a flash memory storage system, wherein the flash memory storage system has a plurality of physical blocks, the block management and replacement method comprises: dividing the physical block into a plurality of physical units and grouping into a used area and a replacement area, wherein the physical blocks of each of the physical units can be accessed by using a multi-block plane access instruction; as well as When one of the physical blocks of one of the physical units in the physical unit belonging to the use area is damaged, then judging whether the number of undamaged physical units in the physical units of the replacement area is greater than a predetermined threshold, Wherein when the number of undamaged physical units in the replacement area is greater than the predetermined threshold, select an undamaged physical unit from the physical units in the replacement area, and replace the used area with the selected physical unit as a unit damaged physical units in and record undamaged or damaged physical blocks in said physical units that are replaced, and When the number of undamaged physical units in the replacement area is not greater than the predetermined threshold, select an undamaged physical block from the physical blocks in the replacement area, and replace it in units of the selected physical block A damaged physical block in a damaged physical unit in the used area. 2. The block management and replacement method according to claim 1, further comprising dividing the use area into a data area and a spare area, and using the physical units belonging to the spare area to store data to alternately belong to the data The physical unit of the zone. 3. The block management and replacement method according to claim 1, wherein each physical block has a redundant area, and the step of recording the undamaged physical block in the replaced physical unit is included in A mark is recorded in the redundant area of the undamaged physical block. 4. The block management and replacement method according to claim 1, wherein the step of recording the undamaged physical blocks in the replaced physical unit comprises recording the undamaged physical blocks in a replacement table piece. 5. A controller suitable for a flash memory storage system, wherein the flash memory storage system has a plurality of physical blocks, the controller comprising: a microprocessor unit; a host interface module coupled to the microprocessor unit; a flash interface, coupled to the microprocessor unit; a buffer memory coupled to the microprocessor unit; and a memory management module, coupled to the microprocessor unit, and has a plurality of machine instructions executable by the microprocessor unit to complete a plurality of block management and replacement steps for the flash memory storage system, the block management and replacement steps include: dividing the physical block into a plurality of physical units and grouping into a used area and a replacement area, wherein the physical blocks of each of the physical units can be accessed by using a multi-block plane access instruction; as well as When one of the physical blocks of one of the physical units in the physical unit belonging to the use area is damaged, then judging whether the number of undamaged physical units in the physical units of the replacement area is greater than a predetermined threshold, Wherein when the number of undamaged physical units in the replacement area is greater than the predetermined threshold, select an undamaged physical unit from the physical units in the replacement area, and replace the used area with the selected physical unit as a unit damaged physical units in and record undamaged or damaged physical blocks in said physical units that are replaced, and When the number of undamaged physical units in the replacement area is not greater than the predetermined threshold, select an undamaged physical block from the physical blocks in the replacement area, and replace it in units of the selected physical block A damaged physical block in a damaged physical unit in the used area. 6. The controller according to claim 5, further comprising dividing the use area into a data area and a spare area, wherein the physical units belonging to the spare area are used to store data to replace the physical units belonging to the data area. 7. The controller according to claim 5, wherein each of the physical blocks has a redundant area, and the step of recording the undamaged physical blocks in the replaced physical unit includes A mark is recorded in the redundant area of the physical block. 8. The controller according to claim 5, wherein the step of recording the undamaged physical blocks in the replaced physical unit comprises recording the undamaged physical blocks in a replacement table. 9. The controller as claimed in claim 5, wherein the flash memory storage system is a pen drive, a flash memory card or a solid state drive. 10. A flash storage system comprising: multiple physical blocks; a connector; and a controller electrically connected to the physical block and the connector, the controller executes a plurality of machine instructions of a memory management module to complete a plurality of block management and replacement steps, the block management and replacement Steps include: dividing the physical block into a plurality of physical units and grouping into a used area and a replacement area, wherein the physical blocks of each of the physical units can be accessed by using a multi-block plane access instruction; as well as When one of the physical blocks of one of the physical units in the physical unit belonging to the use area is damaged, then judging whether the number of undamaged physical units in the physical units of the replacement area is greater than a predetermined threshold, Wherein when the number of undamaged physical units in the physical block of the replacement area is greater than the predetermined threshold, then select an undamaged physical unit from the physical units of the replacement area, and use the selected physical unit as a unit replacing damaged physical units in the used area and recording undamaged or damaged physical blocks in said physical units being replaced, and When the number of undamaged physical units in the replacement area is not greater than the predetermined threshold, select an undamaged physical block from the physical blocks in the replacement area, and replace it in units of the selected physical block A damaged physical block in a damaged physical unit in the used area. 11. The flash memory storage system according to claim 10, further comprising dividing the use area into a data area and a spare area, wherein the physical units belonging to the spare area are used to store data to replace the physical units belonging to the data area unit. 12. The flash memory storage system as claimed in claim 10, wherein each of the physical blocks has a redundant area, and the step of recording the undamaged physical blocks in the replaced physical unit includes A mark is recorded in the redundant area of the damaged physical block. 13. The flash memory storage system of claim 10, wherein the step of recording the undamaged physical blocks in the replaced physical unit comprises recording the undamaged physical blocks in a replacement table. 14. The flash memory storage system as claimed in claim 10, wherein said physical block belongs to a plurality of block planes, and each said physical unit is composed of at least two physical blocks belonging to different said block planes . 15. The flash memory storage system of claim 14, wherein the block plane belongs to a flash memory die. 16. The flash storage system of claim 14, wherein the block planes belong to a plurality of flash dies. 17. The flash memory storage system of claim 16, wherein the flash memory die belongs to a plurality of flash memory chips. 18. The flash memory storage system as claimed in claim 16, wherein the flash memory die belongs to a flash memory chip.

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