CN101697269A - Pixel circuit and pixel driving method - Google Patents
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Abstract
本发明公开一种像素电路,该像素电路包括有机发光二极管、储存电容、驱动晶体管及第一至第四开关晶体管。驱动晶体管用以驱动有机发光二极管发亮,其第一源/漏极电性耦接至储存电容的一端,其第二源/漏极电性耦接至有机发光二极管,其栅极通过第一开关晶体管来接收数据电压。第一开关晶体管与第二开关晶体管的栅极开启电压互为反相,且两者的导通/截止状态由同一控制信号决定。类似地,第三开关晶体管与第四开关晶体管的栅极开启电压互为反相,且两者的导通/截止状态由同一控制信号决定。本发明还提供相关于上述像素电路的像素驱动方法。
The invention discloses a pixel circuit, which includes an organic light emitting diode, a storage capacitor, a driving transistor and first to fourth switching transistors. The driving transistor is used to drive the organic light emitting diode to light up. Its first source/drain is electrically coupled to one end of the storage capacitor, its second source/drain is electrically coupled to the organic light emitting diode, and its gate is connected through the first switching transistor to receive the data voltage. The turn-on voltages of the gates of the first switch transistor and the second switch transistor are opposite to each other, and the on/off states of the two are determined by the same control signal. Similarly, the turn-on voltages of the gates of the third switch transistor and the fourth switch transistor are opposite to each other, and the on/off states of the two are determined by the same control signal. The present invention also provides a pixel driving method related to the above pixel circuit.
Description
技术领域 technical field
本发明涉及有机发光二极管显示技术领域,且特别是有关于一种像素电路及像素驱动方法。The present invention relates to the technical field of OLED display, and in particular to a pixel circuit and a pixel driving method.
背景技术 Background technique
主动式矩阵有机发光二极管(Organic Light Emitting Diode,OLED)显示器的像素一般以晶体管搭配储存电容来储存电荷,以控制有机发光二极管的亮度表现。请参见图1,其为传统像素电路的示意图。像素电路10为二晶体管一电容(2T1C)架构,其包括P型驱动晶体管M1、P型开关晶体管Ms、储存电容Cst及有机发光二极管16。储存电容Cst的两端跨接于驱动晶体管M1的栅极与源极之间;驱动晶体管M1的源极电性耦接至电源电压VDD,驱动晶体管M1的漏极电性耦接至有机发光二极管16的正极,有机发光二极管16的负极电性耦接至另一电源电压VSS,驱动晶体管M1的栅极通过开关晶体管Ms电性耦接至数据线DL以从数据线DL接收数据电压Vdata;开关晶体管Ms的栅极电性耦接至扫描线Scan,以至于其导通/截止状态由扫描线Scan来控制。在此,通过提供不同的数据电压Vdata便可控制有机发光二极管16的亮度表现。The pixels of an active matrix OLED (Organic Light Emitting Diode, OLED) display generally use transistors and storage capacitors to store charges to control the brightness of the OLED. Please refer to FIG. 1 , which is a schematic diagram of a conventional pixel circuit. The
然而,对于主动式矩阵有机发光二极管显示器的各个像素电路,由于与工艺相关的晶体管临界电压偏移(Shift)、有机发光二极管材料衰减及/或操作时间等因素的影响,使得在主动式矩阵有机发光二极管显示器的工作过程中,必须通过数据电压Vdata的调整来对像素电路的像素电流进行有效补偿才可获得较佳的亮度表现,进而得到较佳的显示效果。因此,为实现有效补偿像素电路的像素电流的目的,有必要对像素电路的结构配置及像素电路驱动方法进行合理设计,否则在显示器的工作过程中易出现显示异常或是补偿效果失效。However, for each pixel circuit of an active matrix organic light emitting diode display, due to factors such as process-related transistor threshold voltage shift (Shift), organic light emitting diode material attenuation and/or operating time, etc. During the working process of the light-emitting diode display, the pixel current of the pixel circuit must be effectively compensated by adjusting the data voltage Vdata in order to obtain a better brightness performance and thus a better display effect. Therefore, in order to achieve the purpose of effectively compensating the pixel current of the pixel circuit, it is necessary to rationally design the structural configuration of the pixel circuit and the driving method of the pixel circuit, otherwise, abnormal display or compensation effect failure may easily occur during the working process of the display.
发明内容Contents of the invention
本发明的目的就是在提供一种像素电路,以抑制显示异常或是补偿效果失效的问题产生。The purpose of the present invention is to provide a pixel circuit to suppress the occurrence of abnormal display or failure of compensation effect.
本发明的再一目的是提供一种像素驱动方法,以抑制显示异常或是补偿效果失效的问题产生。Another object of the present invention is to provide a pixel driving method to prevent the occurrence of abnormal display or failure of compensation effect.
本发明一实施例提出的一种像素电路,包括有机发光二极管、储存电容、驱动晶体管、第一开关晶体管、第二开关晶体管、第三开关晶体管以及第四开关晶体管。驱动晶体管用以驱动有机发光二极管发亮,其第一源/漏极电性耦接至储存电容的第一端,其第二源/漏极电性耦接至有机发光二极管。第一开关晶体管的栅极因电性耦接关系而接收第一扫描信号,其第一源/漏极电性耦接至驱动晶体管的栅极,其第二源/漏极因电性耦接关系而接收数据电压。第二开关晶体管的栅极因电性耦接关系而接收第一扫描信号,其第一源/漏极电性耦接至第一预设电压,其第二源/漏极电性耦接至储存电容的第一端。第三开关晶体管的栅极因电性耦接关系而接收第二扫描信号,其第一源/漏极电性耦接至第二预设电压,其第二源/漏极电性耦接至储存电容的第二端。第四开关晶体管的栅极因电性耦接关系而接收第二扫描信号,其第一源/漏极电性耦接至驱动晶体管的栅极,其第二源/漏极电性耦接至储存电容的第二端。其中,第一开关晶体管与第二开关晶体管的栅极开启电压(Gate On Voltage)互为反相,且第三开关晶体管与第四开关晶体管的栅极开启电压互为反相。A pixel circuit provided by an embodiment of the present invention includes an organic light emitting diode, a storage capacitor, a driving transistor, a first switching transistor, a second switching transistor, a third switching transistor and a fourth switching transistor. The driving transistor is used to drive the organic light emitting diode to light up. Its first source/drain is electrically coupled to the first end of the storage capacitor, and its second source/drain is electrically coupled to the organic light emitting diode. The gate of the first switching transistor receives the first scanning signal due to the electrical coupling relationship, the first source/drain thereof is electrically coupled to the gate of the driving transistor, and the second source/drain thereof is electrically coupled to the gate of the driving transistor. relationship to receive the data voltage. The gate of the second switching transistor receives the first scanning signal due to the electrical coupling relationship, its first source/drain is electrically coupled to the first preset voltage, and its second source/drain is electrically coupled to The first terminal of the storage capacitor. The gate of the third switching transistor receives the second scanning signal due to the electrical coupling relationship, its first source/drain is electrically coupled to the second preset voltage, and its second source/drain is electrically coupled to The second terminal of the storage capacitor. The gate of the fourth switching transistor receives the second scanning signal due to the electrical coupling relationship, its first source/drain is electrically coupled to the gate of the driving transistor, and its second source/drain is electrically coupled to The second terminal of the storage capacitor. Wherein, the gate on voltages (Gate On Voltage) of the first switch transistor and the second switch transistor are opposite to each other, and the gate on voltages of the third switch transistor and the fourth switch transistor are opposite to each other.
在本发明的一实施例中,上述的第一开关晶体管为N型晶体管,第二开关晶体管为P型晶体管;进一步地,第三开关晶体管为P型晶体管,第四开关晶体管为N型晶体管。In an embodiment of the present invention, the above-mentioned first switch transistor is an N-type transistor, and the second switch transistor is a P-type transistor; further, the third switch transistor is a P-type transistor, and the fourth switch transistor is an N-type transistor.
本发明再一实施例提出的一种像素驱动方法,适于执行于主动式矩阵有机发光二极管显示器。其中,主动式矩阵有机发光二极管显示器包括数据线以及电性耦接至数据线的第一像素及第二像素。第一像素与第二像素中的每一个像素包括有机发光二极管、储存电容、驱动晶体管及第一开关晶体管;驱动晶体管用以驱动有机发光二极管发亮,驱动晶体管的第一源/漏极电性耦接至储存电容的第一端,驱动晶体管的第二源/漏极电性耦接至有机发光二极管,驱动晶体管的栅极电性耦接至第一开关晶体管的第一源/漏极,第一开关晶体管的第二源/漏极电性耦接至数据线。再者,像素驱动方法用以依序驱动第一像素及第二像素,且在驱动第一像素与第二像素中的每一个像素的过程中包括步骤:(a)在重置阶段,提供第一预设电压至储存电容的第一端,并提供第二预设电压至储存电容的第二端;(b)在写入阶段,导通第一开关晶体管使数据线上的数据电压通过第一开关晶体管传送至驱动晶体管的栅极,以及使储存电容的第一端通过驱动晶体管及有机发光二极管放电,并维持储存电容的第二端在第二预设电压;以及(c)于发光阶段,再提供第一预设电压至储存电容的第一端,使第一开关晶体管处于截止状态,并使储存电容的第二端与驱动晶体管的栅极相通,以至于驱动晶体管驱动有机发光二极管发亮。其中,数据线上的数据电压,在从第一像素的第一开关晶体管于写入阶段之后被截止的时刻至第二像素的第一开关晶体管于写入阶段被导通之前,发生瞬变(Transient)。A pixel driving method proposed by yet another embodiment of the present invention is suitable for implementation in an active matrix organic light emitting diode display. Wherein, the active matrix organic light emitting diode display includes a data line and a first pixel and a second pixel electrically coupled to the data line. Each of the first pixel and the second pixel includes an organic light emitting diode, a storage capacitor, a driving transistor, and a first switching transistor; the driving transistor is used to drive the organic light emitting diode to light up, and the first source/drain electrode of the driving transistor is electrically coupled to the first terminal of the storage capacitor, the second source/drain of the driving transistor is electrically coupled to the organic light emitting diode, the gate of the driving transistor is electrically coupled to the first source/drain of the first switching transistor, The second source/drain of the first switch transistor is electrically coupled to the data line. Moreover, the pixel driving method is used to sequentially drive the first pixel and the second pixel, and the process of driving each pixel in the first pixel and the second pixel includes the steps: (a) in the reset phase, providing the second pixel A preset voltage is supplied to the first terminal of the storage capacitor, and a second preset voltage is provided to the second terminal of the storage capacitor; (b) in the writing phase, the first switch transistor is turned on so that the data voltage on the data line passes through the second terminal a switching transistor is transmitted to the gate of the driving transistor, and the first end of the storage capacitor is discharged through the driving transistor and the organic light emitting diode, and the second end of the storage capacitor is maintained at a second preset voltage; and (c) in the light emitting stage , and then provide the first preset voltage to the first end of the storage capacitor, so that the first switching transistor is in the cut-off state, and the second end of the storage capacitor is connected to the gate of the driving transistor, so that the driving transistor drives the organic light emitting diode to emit light. Bright. Wherein, the data voltage on the data line transiently occurs from the moment when the first switching transistor of the first pixel is turned off after the writing phase to before the first switching transistor of the second pixel is turned on during the writing phase ( Transient).
在本发明的一实施例中,当第一像素与第二像素中的每一个像素更包括第二开关晶体管及第三开关晶体管,而第二开关晶体管电性耦接于第一预设电压与储存电容的第一端之间,且第三开关晶体管电性耦接于第二预设电压与储存电容的第二端之间时;前述在重置阶段,提供第一预设电压至储存电容的第一端,并提供第二预设电压至储存电容的第二端的步骤包括:使第一开关晶体管处于截止状态,并导通第二开关晶体管与第三开关晶体管。进一步地,第一开关晶体管与第二开关晶体管的导通/截止状态由同一控制信号决定。In an embodiment of the present invention, when each of the first pixel and the second pixel further includes a second switch transistor and a third switch transistor, and the second switch transistor is electrically coupled between the first preset voltage and the second switch transistor. Between the first terminals of the storage capacitor, and the third switching transistor is electrically coupled between the second preset voltage and the second terminal of the storage capacitor; the aforementioned first preset voltage is provided to the storage capacitor during the reset phase The step of providing the second predetermined voltage to the second end of the storage capacitor includes: making the first switch transistor in an off state, and turning on the second switch transistor and the third switch transistor. Further, the on/off states of the first switch transistor and the second switch transistor are determined by the same control signal.
在本发明的一实施例中,当第一像素与第二像素中的每一个像素进一步包括第四开关晶体管,且第四开关晶体管电性耦接于储存电容的第二端与驱动晶体管的栅极之间时;前述于写入阶段,导通第一开关晶体管使数据线上的数据电压通过第一开关晶体管传送至驱动晶体管的栅极,以及使储存电容的第一端通过驱动晶体管及有机发光二极管放电,并维持储存电容的第二端在第二预设电压的步骤包括:导通第一开关晶体管,截止第二开关晶体管,使第三开关晶体管处于导通状态以及使第四开关晶体管处于截止状态。进一步地,第三开关晶体管与第四开关晶体管的导通/截止由同一控制信号决定。In an embodiment of the present invention, when each of the first pixel and the second pixel further includes a fourth switching transistor, and the fourth switching transistor is electrically coupled to the second end of the storage capacitor and the gate of the driving transistor When between poles; in the aforementioned writing stage, the first switching transistor is turned on so that the data voltage on the data line is transmitted to the gate of the driving transistor through the first switching transistor, and the first end of the storage capacitor is passed through the driving transistor and the organic The step of discharging the light-emitting diode and maintaining the second terminal of the storage capacitor at the second preset voltage includes: turning on the first switching transistor, turning off the second switching transistor, making the third switching transistor in a conducting state and making the fourth switching transistor is closed. Further, the on/off of the third switch transistor and the fourth switch transistor are determined by the same control signal.
在本发明的一实施例中,前述于发光阶段,再提供第一预设电压至储存电容的第一端,使第一开关晶体管处于截止状态,并使储存电容的第二端与驱动晶体管的栅极相通,以至于驱动晶体管驱动有机发光二极管发亮的步骤包括:截止第一开关晶体管,导通第二开关晶体管,截止第三开关晶体管以及导通第四开关晶体管。In an embodiment of the present invention, in the light-emitting phase, the first preset voltage is provided to the first end of the storage capacitor, so that the first switching transistor is in an off state, and the second end of the storage capacitor is connected to the drive transistor. The step of connecting the gates so that the drive transistor drives the organic light emitting diode to light includes: turning off the first switch transistor, turning on the second switch transistor, turning off the third switch transistor and turning on the fourth switch transistor.
在本发明的一实施例中,当主动式矩阵有机发光二极管显示器更包括多路输出选择器(demultiplexer)且数据线电性耦接至多路输出选择器的输出端时,在写入阶段之前更包括步骤:致能多路输出选择器,以至于通过多路输出选择器将数据电压提供至数据线。In an embodiment of the present invention, when the active matrix organic light emitting diode display further includes a demultiplexer and the data line is electrically coupled to the output terminal of the demultiplexer, before the writing phase, the The method includes the step of: enabling the demultiplexer, so that the data voltage is provided to the data line through the demultiplexer.
本发明又一实施例提出的另一种像素驱动方法,适于执行于主动式矩阵有机发光二极管显示器。其中,主动式矩阵有机发光二极管显示器包括数据线以及电性耦接至数据线的第一像素及第二像素。第一像素与第二像素中的每一个像素包括有机发光二极管、储存电容、驱动晶体管及第一开关晶体管;驱动晶体管用以驱动有机发光二极管发亮,驱动晶体管的第一源/漏极电性耦接至储存电容的第一端,驱动晶体管的第二源/漏极电性耦接至有机发光二极管,驱动晶体管的栅极电性耦接至第一开关晶体管的第一源/漏极,第一开关晶体管的第二源/漏极电性耦接至数据线。像素驱动方法用以依序驱动第一像素及第二像素,且于驱动第一像素与第二像素中的每一个像素的过程中包括步骤:(I)于重置阶段,提供第一预设电压至储存电容的第一端,并提供第二预设电压至储存电容的第二端;(II)于写入阶段,使数据线通过第一开关晶体管将数据电压提供至驱动晶体管的栅极,以及使储存电容的第一端通过驱动晶体管及有机发光二极管放电,并维持储存电容的第二端在第二预设电压;以及(III)于发光阶段,再提供第一预设电压至储存电容的第一端,使第一开关晶体管处于截止状态,并使储存电容的第二端与驱动晶体管的栅极相通,以至于驱动晶体管驱动有机发光二极管发亮。其中,于驱动第二像素的过程中更包括步骤:于写入阶段,在数据线通过第一开关晶体管将数据电压提供至驱动晶体管的栅极之前,数据线通过第一开关晶体管将预充电压提供至驱动晶体管的栅极;预充电压,在从第一像素的第一开关晶体管于写入阶段之后被截止的时刻至第二像素的第一开关晶体管于写入阶段被导通之前,被提供至数据线;且预充电压大于提供至第二像素的驱动晶体管的栅极的数据电压与第二像素的驱动晶体管的临界电压之和。Another pixel driving method proposed by another embodiment of the present invention is suitable for implementation in an active matrix organic light emitting diode display. Wherein, the active matrix organic light emitting diode display includes a data line and a first pixel and a second pixel electrically coupled to the data line. Each of the first pixel and the second pixel includes an organic light emitting diode, a storage capacitor, a driving transistor, and a first switching transistor; the driving transistor is used to drive the organic light emitting diode to light up, and the first source/drain electrode of the driving transistor is electrically coupled to the first terminal of the storage capacitor, the second source/drain of the driving transistor is electrically coupled to the organic light emitting diode, the gate of the driving transistor is electrically coupled to the first source/drain of the first switching transistor, The second source/drain of the first switch transistor is electrically coupled to the data line. The pixel driving method is used to sequentially drive the first pixel and the second pixel, and includes steps in the process of driving each pixel in the first pixel and the second pixel: (1) in the reset phase, providing a first preset voltage to the first end of the storage capacitor, and provide a second preset voltage to the second end of the storage capacitor; (II) in the writing phase, make the data line provide the data voltage to the gate of the drive transistor through the first switch transistor , and discharge the first terminal of the storage capacitor through the driving transistor and the organic light emitting diode, and maintain the second terminal of the storage capacitor at the second preset voltage; and (III) provide the first preset voltage to the storage during the light-emitting phase The first end of the capacitor makes the first switching transistor in the cut-off state, and makes the second end of the storage capacitor communicate with the gate of the driving transistor, so that the driving transistor drives the organic light emitting diode to light up. Wherein, the process of driving the second pixel further includes a step: in the writing stage, before the data line supplies the data voltage to the gate of the drive transistor through the first switch transistor, the data line supplies the precharge voltage to the gate of the drive transistor through the first switch transistor. Provided to the gate of the drive transistor; the precharge voltage is switched from the moment when the first switching transistor of the first pixel is turned off after the writing phase to before the first switching transistor of the second pixel is turned on during the writing phase provided to the data line; and the precharge voltage is greater than the sum of the data voltage provided to the gate of the driving transistor of the second pixel and the threshold voltage of the driving transistor of the second pixel.
在本发明的一实施例中,当第一像素与第二像素中的每一个像素更包括第二开关晶体管及第三开关晶体管,而第二开关晶体管电性耦接于第一预设电压与储存电容的第一端之间,且第三开关晶体管电性耦接于第二预设电压与储存电容的第二端之间时;前述于重置阶段,提供第一预设电压至储存电容的第一端,并提供第二预设电压至储存电容的第二端的步骤包括:截止第一开关晶体管,并导通第二开关晶体管与第三开关晶体管。进一步地,第一开关晶体管与第二开关晶体管的导通/截止状态由同一控制信号决定。In an embodiment of the present invention, when each of the first pixel and the second pixel further includes a second switch transistor and a third switch transistor, and the second switch transistor is electrically coupled between the first preset voltage and the second switch transistor. Between the first terminals of the storage capacitor, and the third switching transistor is electrically coupled between the second preset voltage and the second terminal of the storage capacitor; the aforementioned first preset voltage is provided to the storage capacitor during the reset phase The step of providing the second predetermined voltage to the second end of the storage capacitor includes: turning off the first switch transistor, and turning on the second switch transistor and the third switch transistor. Further, the on/off states of the first switch transistor and the second switch transistor are determined by the same control signal.
在本发明的一实施例中,当第一像素与第二像素中的每一个像素进一步包括第四开关晶体管,且第四开关晶体管电性耦接于储存电容的第二端与驱动晶体管的栅极之间时;前述于写入阶段,使数据线通过第一开关晶体管将数据电压提供至驱动晶体管的栅极,以及使储存电容的第一端通过驱动晶体管及有机发光二极管放电,并维持储存电容的第二端在第二预设电压的步骤包括:导通第一开关晶体管,截止第二开关晶体管,使第三开关晶体管处于导通状态以及使第四开关晶体管处于截止状态。进一步地,第三开关晶体管与第四开关晶体管的导通/截止状态由同一控制信号决定。In an embodiment of the present invention, when each of the first pixel and the second pixel further includes a fourth switching transistor, and the fourth switching transistor is electrically coupled to the second end of the storage capacitor and the gate of the driving transistor When between poles; in the aforementioned writing phase, the data line is provided to the gate of the drive transistor through the first switch transistor to provide the data voltage to the gate of the drive transistor, and the first end of the storage capacitor is discharged through the drive transistor and the organic light emitting diode, and the storage is maintained. The step of setting the second terminal of the capacitor at the second preset voltage includes: turning on the first switch transistor, turning off the second switch transistor, making the third switch transistor in an on state and making the fourth switch transistor in an off state. Further, the on/off states of the third switch transistor and the fourth switch transistor are determined by the same control signal.
在本发明的一实施例中,前述于发光阶段,再提供第一预设电压至储存电容的第一端,使第一开关晶体管处于截止状态,并使储存电容的第二端与驱动晶体管的栅极相通,以至于驱动晶体管驱动有机发光二极管发亮的步骤包括:截止第一开关晶体管,导通第二开关晶体管,截止第三开关晶体管以及导通第四开关晶体管。In an embodiment of the present invention, in the light-emitting phase, the first preset voltage is provided to the first end of the storage capacitor, so that the first switching transistor is in an off state, and the second end of the storage capacitor is connected to the drive transistor. The step of connecting the gates so that the drive transistor drives the organic light emitting diode to light includes: turning off the first switch transistor, turning on the second switch transistor, turning off the third switch transistor and turning on the fourth switch transistor.
在本发明的一实施例中,当主动式矩阵有机发光二极管显示器更包括多路输出选择器且数据线电性耦接至多路输出选择器的输出端时,于驱动第二像素的过程中进一步包括步骤:致能多路输出选择器,以通过多路输出选择器将预充电压提供至数据线;以及再次致能多路输出选择器,以通过多路输出选择器将数据线的预充电压改变为数据电压。In an embodiment of the present invention, when the active matrix organic light emitting diode display further includes a demultiplexer and the data line is electrically coupled to the output end of the demultiplexer, during the process of driving the second pixel, further The method comprises the steps of: enabling the demultiplexer to provide a precharge voltage to the data line through the demultiplexer; and enabling the demultiplexer again to provide the precharge voltage of the data line through the demultiplexer voltage changes to the data voltage.
本发明实施例通过对像素电路结构及像素驱动方法进行特定设计,以至于:在像素驱动方法的重置阶段,数据线上的数据电压不会耦合至驱动晶体管的栅极,并且在写入阶段,储存电容的与驱动晶体管相电性耦接的一端的电位可正常放电至所需电位;以至于像素电路的像素电流可得到有效补偿,不会存在显示异常或是补偿效果失效的问题。In the embodiment of the present invention, the pixel circuit structure and the pixel driving method are specifically designed so that: in the reset phase of the pixel driving method, the data voltage on the data line will not be coupled to the gate of the driving transistor, and in the writing phase The potential of the end of the storage capacitor electrically coupled with the drive transistor can be normally discharged to the required potential; so that the pixel current of the pixel circuit can be effectively compensated, and there will be no problems of display abnormality or compensation effect failure.
为让本发明的上述和其他目的、特征和优点能更明显易懂,下文特举较佳实施例,并配合所附附图,作详细说明如下。In order to make the above and other objects, features and advantages of the present invention more comprehensible, preferred embodiments will be described in detail below together with the accompanying drawings.
附图说明 Description of drawings
图1绘示为传统像素电路的示意图;FIG. 1 is a schematic diagram of a conventional pixel circuit;
图2绘示出相关于本发明第一实施例的一种主动式矩阵有机发光二极管显示器的局部结构框图;FIG. 2 shows a partial structural block diagram of an active matrix organic light emitting diode display related to the first embodiment of the present invention;
图3绘示出相关于本发明第一实施例的像素驱动方法的扫描信号及数据电压的时序图;3 depicts a timing diagram of scanning signals and data voltages related to the pixel driving method of the first embodiment of the present invention;
图4绘示出相关于本发明第二实施例的一种主动式矩阵有机发光二极管显示器的局部结构框图;FIG. 4 shows a partial structural block diagram of an active matrix organic light emitting diode display related to the second embodiment of the present invention;
图5绘示出相关于本发明第二实施例的像素驱动方法的扫描信号及多路输出选择器控制信号的时序图。FIG. 5 is a timing diagram of scanning signals and demultiplexer control signals related to the pixel driving method according to the second embodiment of the present invention.
其中,附图标记Among them, reference signs
10:像素电路 20、40:主动式矩阵有机发光二极管显示器10:
22、42:数据驱动电路 1~Z:数据驱动电路的输出端22, 42: Data drive
43:预充电电路 Vdata:数据电压43: Pre-charging circuit Vdata: data voltage
PC_H:预充电 24、44:多路输出选择器PC_H: Precharge 24, 44: Multiplexer
DL、DLi~DLk:数据线DL, DLi~DLk: data lines
Scan、Scan(N-1)、Scan(N)、EM(N-1)、EM(N):扫描线Scan, Scan(N-1), Scan(N), EM(N-1), EM(N): scan line
Rn-1、Rn:像素行 i~k:像素列Rn-1, Rn: pixel row i~k: pixel column
VDD、VSS:电源电压 P(n-1)i~P(n-1)k及Pni~Pnk:像素电路VDD, VSS: power supply voltage P(n-1)i~P(n-1)k and Pni~Pnk: pixel circuit
Vref:参考电压 GND:接地电压Vref: reference voltage GND: ground voltage
M1:驱动晶体管 Ms、M2~M5:开关晶体管M1: Driving transistor Ms, M2~M5: Switching transistor
Cst:储存电容 A、B:储存电容的端点Cst: storage capacitor A, B: storage capacitor terminals
26、46:有机发光二极管 S1、S1′:重置阶段26, 46: OLED S1, S1′: reset phase
S2、S2′:写入阶段 S3、S3′:发光阶段S2, S2': Writing stage S3, S3': Lighting stage
DMUX:多路输出选择器控制信号DMUX: Demultiplexer control signal
Scan(N-1)、Scan(N)、EM(N-1)、EM(N):扫描信号Scan(N-1), Scan(N), EM(N-1), EM(N): scan signal
t1、t2:时刻t1, t2: time
具体实施方式 Detailed ways
参见图2及图3,图2绘示出相关于本发明第一实施例的一种主动式矩阵有机发光二极管显示器的局部结构框图,图3绘示出相关于本发明第一实施例的像素驱动方法的扫描信号及数据电压的时序图。Referring to FIG. 2 and FIG. 3, FIG. 2 shows a partial structural block diagram of an active matrix OLED display related to the first embodiment of the present invention, and FIG. 3 shows a pixel related to the first embodiment of the present invention Timing diagram of scan signal and data voltage of the driving method.
如图2所示,主动式矩阵有机发光二极管显示器20包括数据驱动电路22、多路输出选择器24、数据线DLi~DLk、扫描线Scan(N-1)及Scan(N)、扫描线EM(N-1)及EM(N)、以及多个像素电路P(n-1)i~P(n-1)k及Pni~Pnk;各个像素电路P(n-1)i~P(n-1)k及Pni~Pnk分别电性耦接至各自的扫描线Scan(N-1)及Scan(N)、扫描线EM(N-1)及EM(N)以及数据线DLi~DLk,且以矩阵方式排布于第Rn-1及Rn像素行以及第Ci~Ck像素列。数据驱动电路22用以提供数据电压Vdata,其具有多个输出端1~Z。各个数据线DLi~DLk通过多路输出选择器24电性耦接至数据驱动电路22的多个输出端1~Z中的一个以接收数据电压Vdata。在此需要说明的是,本实施例的主动式矩阵有机发光二极管20亦可不设置多路输出选择器24,相应地,各个数据线DLi~DLk分别直接耦接至数据驱动电路22的多个输出端1~Z中的对应者。As shown in FIG. 2 , the active
承上述,每一像素电路P(n-1)i~P(n-1)k及Pni~Pnk为5T1C架构且包括:有机发光二极管26、储存电容Cst、P型驱动晶体管M1,N型开关晶体管M2及M5以及P型开关晶体管M3及M4。其中,驱动晶体管M1用以驱动有机发光二极管26发亮,驱动晶体管M1的源极电性耦接至储存电容Cst的A端,驱动晶体管M1的漏极电性耦接至有机发光二极管26的阳极,有机发光二极管26的阴极电性耦接至电源电压VSS。开关晶体管M2的源极电性耦接至驱动晶体管M1的栅极,开关晶体管M2的漏极电性耦接至数据线DLi~DLk中的一个,开关晶体管M2的栅极电性耦接至扫描线EM(N-1)(或EM(N))以接收扫描信号EM(N-1)(或EM(N))。开关晶体管M3的源极电性耦接至电源电压VDD,开关晶体管M3的漏极电性耦接至储存电容Cst的A端,开关晶体管M3的栅极电性耦接至扫描线EM(N-1)(或EM(N))以接收扫描信号EM(N-1)(或EM(N))。开关晶体管M4的源极电性耦接至参考电压Vref,开关晶体管M4的漏极电性耦接至储存电容Cst的B端,开关晶体管M4的栅极电性耦接至扫描线Scan(N-1)(或Scan(N))以接收扫描信号Scan(N-1)(或Scan(N))。开关晶体管M5的源极电性耦接至驱动晶体管M1的栅极,开关晶体管M5的漏极电性耦接至储存电容Cst的B端,开关晶体管M5的栅极电性耦接至扫描线Scan(N-1)(或Scan(N))以接收扫描信号Scan(N-1)(或Scan(N))。从图2及图3中还可以得知,开关晶体管M2与M3的栅极相互电性耦接,栅极开启电压互为反相,并且开关晶体管M2与M3的导通/截止状态由同一控制信号EM(N-1)或EM(N)决定;类似地,开关晶体管M4与M5的栅极相互电性耦接,栅极开启电压互为反相,并且开关晶体管M4与M5的导通/截止状态由同一控制信号Scan(N-1)或Scan(N)决定。Based on the above, each pixel circuit P(n-1)i~P(n-1)k and Pni~Pnk has a 5T1C structure and includes: an organic light emitting diode 26, a storage capacitor Cst, a P-type driving transistor M1, an N-type switch Transistors M2 and M5 and P-type switching transistors M3 and M4. Wherein, the driving transistor M1 is used to drive the OLED 26 to light up, the source of the driving transistor M1 is electrically coupled to the terminal A of the storage capacitor Cst, and the drain of the driving transistor M1 is electrically coupled to the anode of the OLED 26 , the cathode of the organic light emitting diode 26 is electrically coupled to the power supply voltage VSS. The source of the switching transistor M2 is electrically coupled to the gate of the driving transistor M1, the drain of the switching transistor M2 is electrically coupled to one of the data lines DLi˜DLk, and the gate of the switching transistor M2 is electrically coupled to the scanning Line EM(N-1) (or EM(N)) to receive the scan signal EM(N-1) (or EM(N)). The source of the switch transistor M3 is electrically coupled to the power supply voltage VDD, the drain of the switch transistor M3 is electrically coupled to the A terminal of the storage capacitor Cst, and the gate of the switch transistor M3 is electrically coupled to the scanning line EM (N- 1) (or EM(N)) to receive the scan signal EM(N-1) (or EM(N)). The source of the switching transistor M4 is electrically coupled to the reference voltage Vref, the drain of the switching transistor M4 is electrically coupled to the terminal B of the storage capacitor Cst, and the gate of the switching transistor M4 is electrically coupled to the scan line Scan (N− 1) (or Scan(N)) to receive the scan signal Scan(N−1) (or Scan(N)). The source of the switching transistor M5 is electrically coupled to the gate of the driving transistor M1, the drain of the switching transistor M5 is electrically coupled to the terminal B of the storage capacitor Cst, and the gate of the switching transistor M5 is electrically coupled to the scan line Scan. (N-1) (or Scan(N)) to receive the scan signal Scan(N-1) (or Scan(N)). It can also be seen from FIG. 2 and FIG. 3 that the gates of the switching transistors M2 and M3 are electrically coupled to each other, the gate turn-on voltages are opposite to each other, and the on/off states of the switching transistors M2 and M3 are controlled by the same signal EM(N-1) or EM(N); similarly, the gates of the switch transistors M4 and M5 are electrically coupled to each other, the gate turn-on voltages are opposite to each other, and the conduction/conduction of the switch transistors M4 and M5 The cut-off state is determined by the same control signal Scan(N-1) or Scan(N).
下面将结合图2及图3详细描述主动式矩阵有机发光二极管显示器20的像素驱动方法,以下仅以像素驱动方法依序驱动像素电路P(n-1)i及像素电路Pni的过程为例进行举例说明。从图3中可以得知,于驱动像素电路P(n-1)i的过程中包括重置阶段S1′、写入阶段S2′及发光阶段S3′,类似地,于驱动像素电路Pni的过程中包括重置阶段S1、写入阶段S2及发光阶段S3。The pixel driving method of the active matrix organic light emitting
具体地,于重置阶段S1(S1′),Scan(N)(Scan(N-1))及EM(N)(EM(N-1))均为低电压电位;此时,开关晶体管M3及M4处于导通状态且开关晶体管M2及M5处于截止状态,电源电压VDD及参考电压Vref分别通过开关晶体管M3及M4提供至储存电容Cst的A端及B端,由于开关晶体管M2处于截止状态,数据线DLi上的数据电压Vdata不会耦合至驱动晶体管M1的栅极。Specifically, in the reset phase S1 (S1'), Scan(N) (Scan(N-1)) and EM(N) (EM(N-1)) are both low voltage potentials; at this time, the switching transistor M3 and M4 are in the on state and the switching transistors M2 and M5 are in the off state, the power supply voltage VDD and the reference voltage Vref are provided to the A terminal and the B terminal of the storage capacitor Cst through the switching transistors M3 and M4 respectively, since the switching transistor M2 is in the off state, The data voltage Vdata on the data line DLi is not coupled to the gate of the driving transistor M1.
于写入阶段S2(S2′),Scan(N)(Scan(N-1))为低电压电位且EM(N)(EM(N-1))为高电压电位;此时,开关晶体管M2及M4处于导通状态且开关晶体管M3及M5处于截止状态,提供至数据线DLi上的数据电压Vdata因开关晶体管M2导通而传送至驱动晶体管M1的栅极,储存电容Cst的A端的电位从VDD通过驱动晶体管M1及有机发光二极管26放电至Vdata+Vth1,储存电容Cst的B端的电位因开关晶体管M4处于导通状态而保持为Vref。其中Vth1为驱动晶体管M1的临界电压,像素电路P(n-1)i及Pni所需的数据电压Vdata分别于各自的写入阶段S2及S2′之前通过致能多路输出选择器24而被提供至数据线DLi上。In the writing phase S2 (S2'), Scan(N) (Scan(N-1)) is a low voltage potential and EM(N) (EM(N-1)) is a high voltage potential; at this time, the switching transistor M2 and M4 are in the on state and the switching transistors M3 and M5 are in the off state, the data voltage Vdata provided to the data line DLi is transmitted to the gate of the driving transistor M1 because the switching transistor M2 is on, and the potential of the A terminal of the storage capacitor Cst is changed from VDD is discharged to Vdata+Vth1 through the driving transistor M1 and the OLED 26 , and the potential of the terminal B of the storage capacitor Cst is maintained at Vref because the switching transistor M4 is turned on. Wherein Vth1 is the critical voltage of the driving transistor M1, the data voltage Vdata required by the pixel circuits P(n-1)i and Pni is obtained by enabling the demultiplexer 24 before the respective writing phases S2 and S2′ respectively. Provided to the data line DLi.
于发光阶段S3(S3′),Scan(N)(Scan(N-1))为高电压电位且EM(N)(EM(N-1))为低电压电位;此时,开关晶体管M3及M5处于导通状态且开关晶体管M2及M4处于截止状态,电源电压VDD再次通过开关晶体管M3提供至储存电容Cst的A端,储存电容Cst的B端因开关晶体管M5导通而与驱动晶体管M1的栅极相通,以至于驱动晶体管M1根据储存电容Cst上存储的电荷量产生像素电流来驱动有机发光二极管26发亮。In the light-emitting phase S3 (S3'), Scan (N) (Scan (N-1)) is a high voltage potential and EM (N) (EM (N-1)) is a low voltage potential; at this time, the switching transistor M3 and M5 is in the on state and the switching transistors M2 and M4 are in the off state, the power supply voltage VDD is provided to the A terminal of the storage capacitor Cst through the switching transistor M3 again, and the B terminal of the storage capacitor Cst is connected to the driving transistor M1 due to the switching transistor M5 being on. The gate is connected, so that the driving transistor M1 generates a pixel current according to the charge stored in the storage capacitor Cst to drive the OLED 26 to light up.
进一步地,从图3中可以得知,数据线DLi上的数据电压Vdata,在从像素电路P(n-1)i的开关晶体管M2于写入阶段S2′之后被截止的时刻t1至像素电路Pni的开关晶体管M2于写入阶段S2被导通之前的时刻t2之间,发生瞬变(Transient),例如从低电压电位跳变为高电压电位。Further, it can be seen from FIG. 3 that the data voltage Vdata on the data line DLi is transferred from the pixel circuit P(n-1)i to the pixel circuit at the time t1 when the switching transistor M2 of the pixel circuit P(n-1)i is turned off after the writing phase S2′. The switch transistor M2 of Pni undergoes a transient (Transient), such as jumping from a low voltage level to a high voltage level, between the time t2 before the writing phase S2 is turned on.
在此,由于数据电压Vdata在像素电路Pni的写入阶段S2之前已经改变为Vdata(n)(对应于写入像素电路Pni的数据电压),使得储存电容Cst的A端(亦即驱动晶体管M1的源极)的电位可正常由VDD变化至Vdata(n)+Vth1,从而先前技术中存在的显示异常或是补偿效果失效的问题可得到有效解决。Here, since the data voltage Vdata has been changed to Vdata(n) (corresponding to the data voltage written into the pixel circuit Pni) before the writing phase S2 of the pixel circuit Pni, the terminal A of the storage capacitor Cst (that is, the drive transistor M1 The potential of the source electrode) can normally change from VDD to Vdata(n)+Vth1, so that the problems of display abnormality or compensation effect failure in the prior art can be effectively solved.
参见图4及图5,图4绘示出相关于本发明第二实施例的一种主动式矩阵有机发光二极管显示器的局部结构框图,图5绘示出相关于本发明第二实施例的像素驱动方法的扫描信号及多路输出选择器控制信号的时序图。Referring to FIG. 4 and FIG. 5, FIG. 4 shows a partial structural block diagram of an active matrix OLED display related to the second embodiment of the present invention, and FIG. 5 shows a pixel related to the second embodiment of the present invention Timing diagram of scanning signals and demultiplexer control signals of the driving method.
如图4所示,主动式矩阵有机发光二极管显示器40包括数据驱动电路42、预充电电路43、多路输出选择器44、数据线DLi~DLk、扫描线Scan(N-1)及Scan(N)、扫描线EM(N-1)及EM(N)、以及多个像素电路P(n-1)i~P(n-1)k及Pni~Pnk;各个像素电路P(n-1)i~P(n-1)k及Pni~Pnk分别电性耦接至各自的扫描线Scan(N-1)及Scan(N)、扫描线EM(N-1)及EM(N)以及数据线DLi~DLk,且以矩阵方式排布于第Rn-1及Rn像素行以及第Ci~Ck像素列。数据驱动电路42用以提供数据电压Vdata,其具有多个输出端1~Z;预充电电路43用以提供预充电压PC_H。各个数据线DLi~DLk通过多路输出选择器14电性耦接至数据驱动电路12的多个输出端1~Z中的一个以及预充电电路43以选择性接收数据电压Vdata及预充电压PC_H。As shown in FIG. 4 , the active matrix organic light emitting
承上述,每一像素电路P(n-1)i~P(n-1)k及Pni~Pnk为5T1C架构且包括:有机发光二极管46、储存电容Cst、P型驱动晶体管M1,N型开关晶体管M2及M5以及P型开关晶体管M3及M4。其中,驱动晶体管M1用以驱动有机发光二极管46,驱动晶体管M1的源极电性耦接至储存电容Cst的A端,驱动晶体管M1的漏极电性耦接至有机发光二极管46的阳极,有机发光二极管46的阴极电性耦接至电源电压VSS。开关晶体管M2的源极电性耦接至驱动晶体管M1的栅极,开关晶体管M2的漏极电性耦接至数据线DLi~DLk中的一个,开关晶体管M2的栅极电性耦接至扫描线EM(N-1)(或EM(N))以接收扫描信号EM(N-1)(或EM(N))。开关晶体管M3的源极电性耦接至电源电压VDD,开关晶体管M3的漏极电性耦接至储存电容Cst的A端,开关晶体管M3的栅极电性耦接至扫描线EM(N-1)(或EM(N))以接收扫描信号EM(N-1)(或EM(N))。开关晶体管M4的源极电性耦接至参考电压Vref,开关晶体管M4的漏极电性耦接至储存电容Cst的B端,开关晶体管M4的栅极电性耦接至扫描线Scan(N-1)(或Scan(N))以接收扫描信号Scan(N-1)(或Scan(N))。开关晶体管M5的源极电性耦接至驱动晶体管M1的栅极,开关晶体管M5的漏极电性耦接至储存电容Cst的B端,开关晶体管M5的栅极电性耦接至扫描线Scan(N-1)(或Scan(N))以接收扫描信号Scan(N-1)(或Scan(N))。从图4及图5中还可以得知,开关晶体管M2与M3的栅极相互电性耦接,栅极开启电压互为反相,并且开关晶体管M2与M3的导通/截止状态由同一控制信号EM(N-1)或EM(N)决定;类似地,开关晶体管M4与M5的栅极相互电性耦接,栅极开启电压互为反相,并且开关晶体管M4与M5的导通/截止状态由同一控制信号Scan(N-1)或Scan(N)决定。Based on the above, each pixel circuit P(n-1)i~P(n-1)k and Pni~Pnk has a 5T1C structure and includes: an organic light emitting diode 46, a storage capacitor Cst, a P-type driving transistor M1, an N-type switch Transistors M2 and M5 and P-type switching transistors M3 and M4. Wherein, the driving transistor M1 is used to drive the organic light emitting diode 46, the source of the driving transistor M1 is electrically coupled to the terminal A of the storage capacitor Cst, and the drain of the driving transistor M1 is electrically coupled to the anode of the organic light emitting diode 46. The cathode of the LED 46 is electrically coupled to the power supply voltage VSS. The source of the switching transistor M2 is electrically coupled to the gate of the driving transistor M1, the drain of the switching transistor M2 is electrically coupled to one of the data lines DLi˜DLk, and the gate of the switching transistor M2 is electrically coupled to the scanning Line EM(N-1) (or EM(N)) to receive the scan signal EM(N-1) (or EM(N)). The source of the switch transistor M3 is electrically coupled to the power supply voltage VDD, the drain of the switch transistor M3 is electrically coupled to the A terminal of the storage capacitor Cst, and the gate of the switch transistor M3 is electrically coupled to the scanning line EM (N- 1) (or EM(N)) to receive the scan signal EM(N-1) (or EM(N)). The source of the switching transistor M4 is electrically coupled to the reference voltage Vref, the drain of the switching transistor M4 is electrically coupled to the terminal B of the storage capacitor Cst, and the gate of the switching transistor M4 is electrically coupled to the scan line Scan (N− 1) (or Scan(N)) to receive the scan signal Scan(N−1) (or Scan(N)). The source of the switching transistor M5 is electrically coupled to the gate of the driving transistor M1, the drain of the switching transistor M5 is electrically coupled to the terminal B of the storage capacitor Cst, and the gate of the switching transistor M5 is electrically coupled to the scan line Scan. (N-1) (or Scan(N)) to receive the scan signal Scan(N-1) (or Scan(N)). It can also be seen from FIG. 4 and FIG. 5 that the gates of the switching transistors M2 and M3 are electrically coupled to each other, the gate turn-on voltages are opposite to each other, and the on/off states of the switching transistors M2 and M3 are controlled by the same signal EM(N-1) or EM(N); similarly, the gates of the switch transistors M4 and M5 are electrically coupled to each other, the gate turn-on voltages are opposite to each other, and the conduction/conduction of the switch transistors M4 and M5 The cut-off state is determined by the same control signal Scan(N-1) or Scan(N).
下面将结合图4及图5详细描述主动式矩阵有机发光二极管显示器40的像素驱动方法,以下仅以像素驱动方法依序驱动像素电路P(n-1)i及像素电路Pni的过程为例进行举例说明。从图5中可以得知,于驱动像素电路P(n-1)i的过程中包括重置阶段S1′、写入阶段S2′及发光阶段S3′,类似地,于驱动像素电路Pni的过程中包括重置阶段S1、写入阶段S2及发光阶段S3。The pixel driving method of the active matrix organic light emitting
具体地,于重置阶段S1(S1′),Scan(N)(Scan(N-1))及EM(N)(EM(N-1))均为低电压电位;此时,开关晶体管M3及M4处于导通状态且开关晶体管M2及M5处于截止状态,电源电压VDD及参考电压Vref分别通过开关晶体管M3及M4提供至储存电容Cst的A端及B端,由于开关晶体管M2处于截止状态,数据线DLi上的数据电压Vdata不会耦合至驱动晶体管M1的栅极。Specifically, in the reset phase S1 (S1'), Scan(N) (Scan(N-1)) and EM(N) (EM(N-1)) are both low voltage potentials; at this time, the switching transistor M3 and M4 are in the on state and the switching transistors M2 and M5 are in the off state, the power supply voltage VDD and the reference voltage Vref are provided to the A terminal and the B terminal of the storage capacitor Cst through the switching transistors M3 and M4 respectively, since the switching transistor M2 is in the off state, The data voltage Vdata on the data line DLi is not coupled to the gate of the driving transistor M1.
于写入阶段S2(S2′),Scan(N)(Scan(N-1))为低电压电位且EM(N)(EM(N-1))为高电压电位;此时,开关晶体管M2及M4处于导通状态且开关晶体管M3及M5处于截止状态,数据线DLi首先通过开关晶体管M2提供预充电压PC H至驱动晶体管M1的栅极,储存电容Cst的A端的电位从VDD通过驱动晶体管M1及有机发光二极管46放电至PC_H+Vth1;之后,当数据线DLi上的预充电压PC_H被改变为数据电压Vdata,数据线DLi再通过开关晶体管M2向驱动晶体管M1的栅极提供数据电压Vdata,而储存电容Cst的A端的电位继续从PC_H+Vth1通过驱动晶体管M1及有机发光二极管46放电至Vdata+Vth1;储存电容Cst的B端的电位因开关晶体管M4处于导通状态而保持为Vref。其中Vth1为驱动晶体管M1的临界电压,像素电路P(n-1)i及Pni所需的预充电压PC_H及数据电压Vdata通过两次致能多路输出选择器44而被依序提供至数据线DLi上。In the writing phase S2 (S2'), Scan(N) (Scan(N-1)) is a low voltage potential and EM(N) (EM(N-1)) is a high voltage potential; at this time, the switching transistor M2 and M4 are in the on state and the switching transistors M3 and M5 are in the off state, the data line DLi first provides the precharge voltage PC H to the gate of the driving transistor M1 through the switching transistor M2, and the potential of the A terminal of the storage capacitor Cst is passed from VDD through the driving transistor M1 and the organic light emitting diode 46 are discharged to PC_H+Vth1; after that, when the precharge voltage PC_H on the data line DLi is changed to the data voltage Vdata, the data line DLi provides the data voltage Vdata to the gate of the driving transistor M1 through the switching transistor M2 , and the potential of the terminal A of the storage capacitor Cst continues to discharge from PC_H+Vth1 to Vdata+Vth1 through the driving transistor M1 and the organic light emitting diode 46; the potential of the terminal B of the storage capacitor Cst remains at Vref because the switching transistor M4 is in the on state. Where Vth1 is the critical voltage of the driving transistor M1, the precharge voltage PC_H and the data voltage Vdata required by the pixel circuits P(n-1)i and Pni are sequentially provided to the data by enabling the
其中,于驱动像素电路Pni的过程中,预充电压PC_H在从像素电路P(n-1)i的开关晶体管M2于写入阶段S2′之后被截止的时刻t1至像素电路Pni的开关晶体管M2于写入阶段S2被导通之前的时刻t2之间,被提供至数据线DLi;且预充电压PC_H的幅值大于提供至像素电路Pni的驱动晶体管M1的栅极的数据电压Vdata(n)与像素电路Pni的驱动晶体管M1的临界电压Vth1之和。在此,在此,由于预充电压PC_H的提供,使得储存电容Cst的A端(亦即驱动晶体管M1的源极)的电位可正常由VDD最终变化至Vdata(n)+Vth1,从而现有技术中存在的显示异常或是补偿效果失效的问题可得到有效解决。Wherein, in the process of driving the pixel circuit Pni, the precharge voltage PC_H is transferred from the switching transistor M2 of the pixel circuit P(n-1)i to the switching transistor M2 of the pixel circuit Pni at the time t1 when the switching transistor M2 of the pixel circuit P(n-1)i is turned off after the writing phase S2′ During the time t2 before the writing phase S2 is turned on, it is supplied to the data line DLi; and the magnitude of the precharge voltage PC_H is greater than the data voltage Vdata(n) supplied to the gate of the driving transistor M1 of the pixel circuit Pni and the sum of the threshold voltage Vth1 of the driving transistor M1 of the pixel circuit Pni. Here, due to the provision of the precharge voltage PC_H, the potential of the terminal A of the storage capacitor Cst (that is, the source of the driving transistor M1) can normally change from VDD to Vdata(n)+Vth1, so that the existing The problem of abnormal display or failure of compensation effect existing in the technology can be effectively solved.
于发光阶段S3(S3′),Scan(N)(Scan(N-1))为高电压电位且EM(N)(EM(N-1))为低电压电位;此时,开关晶体管M3及M5处于导通状态且开关晶体管M2及M4处于截止状态,电源电压VDD再次通过开关晶体管M3提供至储存电容Cst的A端,储存电容Cst的B端因开关晶体管M5导通而与驱动晶体管M1的栅极相通,以至于驱动晶体管M1根据储存电容Cst上存储的电荷量产生像素电流来驱动有机发光二极管46发亮。In the light-emitting phase S3 (S3'), Scan (N) (Scan (N-1)) is a high voltage potential and EM (N) (EM (N-1)) is a low voltage potential; at this time, the switching transistor M3 and M5 is in the on state and the switching transistors M2 and M4 are in the off state, the power supply voltage VDD is provided to the A terminal of the storage capacitor Cst through the switching transistor M3 again, and the B terminal of the storage capacitor Cst is connected to the driving transistor M1 due to the switching transistor M5 being on. The gate is connected, so that the driving transistor M1 generates a pixel current according to the charge stored in the storage capacitor Cst to drive the organic light emitting diode 46 to light up.
综上所述,本发明实施例通过对像素电路结构及像素驱动方法进行特定设计,从而:在像素驱动方法的重置阶段,数据线上的数据电压不会耦合至驱动晶体管的栅极,并且在写入阶段,储存电容的与驱动晶体管相电性耦接的一端的电位可正常放电至所需电位;以至于像素电路的像素电流可得到有效补偿,不会存在显示异常或是补偿效果失效的问题。In summary, the embodiments of the present invention specifically design the pixel circuit structure and the pixel driving method, so that: in the reset phase of the pixel driving method, the data voltage on the data line will not be coupled to the gate of the driving transistor, and In the writing phase, the potential of the end of the storage capacitor electrically coupled to the driving transistor can be normally discharged to the required potential; so that the pixel current of the pixel circuit can be effectively compensated, and there will be no abnormal display or compensation effect failure The problem.
此外,本领域技术人员还可对本发明上述实施例提出的像素电路、像素驱动方法以及其所适用的主动式矩阵有机发光二极管显示器的结构作适当变更,例如适当变更像素电路的晶体管的数目、主动式矩阵有机发光二极管显示器的像素数目、各个晶体管的种类(P型或N型)、将各个晶体管的源极与漏极的电连接关系互换等等。In addition, those skilled in the art can make appropriate changes to the pixel circuit, the pixel driving method and the structure of the active matrix organic light emitting diode display to which it is applied, such as appropriately changing the number of transistors in the pixel circuit, the active The number of pixels of the matrix organic light emitting diode display, the type of each transistor (P-type or N-type), the electrical connection relationship between the source and drain of each transistor is interchanged, and so on.
当然,本发明还可有其它多种实施例,在不背离本发明精神及其实质的情况下,熟悉本领域的技术人员当可根据本发明作出各种相应的改变和变形,但这些相应的改变和变形都应属于本发明所附的权利要求的保护范围。Certainly, the present invention also can have other multiple embodiments, without departing from the spirit and essence of the present invention, those skilled in the art can make various corresponding changes and deformations according to the present invention, but these corresponding Changes and deformations should belong to the scope of protection of the appended claims of the present invention.
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