CN101657891A - Convex die attachment method - Google Patents
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- CN101657891A CN101657891A CN200880011809A CN200880011809A CN101657891A CN 101657891 A CN101657891 A CN 101657891A CN 200880011809 A CN200880011809 A CN 200880011809A CN 200880011809 A CN200880011809 A CN 200880011809A CN 101657891 A CN101657891 A CN 101657891A
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- C09J163/00—Adhesives based on epoxy resins; Adhesives based on derivatives of epoxy resins
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Abstract
Description
相关申请的交叉引用Cross References to Related Applications
本申请依据35U.S.C§119(e)要求享有于2007年3月13日提交的标题为“凸面管芯连接方法”(Convex Die Attachment Method)的美国临时专利申请第No.60/894,574号的优先权,其公开内容通过引用被并入本文。This application claims benefit under 35 U.S.C § 119(e) of U.S. Provisional Patent Application No. 60/894,574, filed March 13, 2007, entitled "Convex Die Attachment Method" priority, the disclosure of which is incorporated herein by reference.
发明领域 field of invention
本发明涉及电子封装。更具体地,本发明涉及用于组装电子封装件的一种方法,该方法采用在将管芯放置在基片上之前,将无流式底部填充材料(no-flow underfill)施加到管芯。The present invention relates to electronic packaging. More particularly, the present invention relates to a method for assembling an electronic package that employs the application of a no-flow underfill material to the die prior to placing the die on a substrate.
发明背景Background of the invention
在传统的制造工序中,在一般以硅为半导体材料的单个大“晶片”上大量地构成包含电气元件的个别管芯。个别管芯有作为电气连接的小金属焊盘。该等个别管芯随后从晶片中被切出来,并使用从焊盘导出的小导线连接到外壳。这些导线连接到在外壳的外侧上的引脚,而引脚随后被连接到基片,比如印刷电路板(PCB)。In conventional manufacturing processes, individual dies containing electrical components are formed in large numbers on a single large "wafer," typically silicon, as the semiconductor material. Individual dies have small metal pads that serve as electrical connections. The individual dies are then cut out of the wafer and connected to the housing using small wires leading from the pads. These wires connect to pins on the outside of the housing, which are then connected to a substrate, such as a printed circuit board (PCB).
一种叫做“倒晶封装芯片”(flip-chip)、用于芯片制造的较新工序是有优势的,因为它不需要任何引线键合,并且经常被用于半导体装置,比如IC芯片。倒晶封装芯片是简单地被翻转(flipped over)的管芯,以使该管芯包含电路的一面最接近装配基片。在处理晶片的最后步骤中,焊料球或“凸块”被置入在管芯焊盘上,该焊料球或“凸块”被用于直接地连接到对应的、在基片上的接合连接器的电路。A newer process for chip fabrication called "flip-chip" is advantageous because it does not require any wire bonding and is often used in semiconductor devices such as IC chips. A flip chip is a die that is simply flipped over so that the side of the die containing the circuitry is closest to the mounting substrate. In the final step of processing the wafer, solder balls or "bumps" are placed on the die pads, which are used to connect directly to the corresponding bonding connectors on the substrate circuit.
倒装芯片的处理和常规IC制造类似,但有一些轻微的修改。在晶片被制造后,一小焊料点马上被置入在每个焊盘上。个别的管芯随后从晶片中被切出来(被切片)。通过将芯片翻转以使焊料球被向下放置到下面的电子设备或电路板上的连接器,该倒装芯片被连接到基片。焊料随后被重新融化(回流),以在管芯上的电路和基片之间产生电连接。Flip chip processing is similar to conventional IC manufacturing with some slight modifications. Immediately after the wafer is fabricated, a small solder dot is placed on each pad. Individual dies are then cut (diced) from the wafer. The flip chip is connected to the substrate by flipping the chip so that the solder balls are placed down to the underlying electronics or connectors on the circuit board. The solder is then re-melted (reflowed) to create an electrical connection between the circuitry on the die and the substrate.
回流的焊料凸块在管芯的接触区域和基片的接触区域之间产生机械的和电气的连接。然而,由于焊料的性质,该机械连接是相对弱的,并且易于在管芯的自然热循环过程中变形或裂开。另外,管芯表面的底面保持外露、通过回流的焊料凸块在安装基片的表面离开地被悬挂。一种通常被称为底部填充材料(underfill)的电气绝缘的粘合剂,一般通过注射施加入此空间,并被固化,以提供更强的机械连接、提供热桥,以及确保焊料接合点不会由于管芯和基片之间的热膨胀系数的差异而受压。The reflowed solder bumps create mechanical and electrical connections between the contact areas of the die and the contact areas of the substrate. However, due to the nature of the solder, this mechanical connection is relatively weak and prone to deformation or cracking during the die's natural thermal cycling. In addition, the underside of the die surface remains exposed, suspended away from the surface of the mounting substrate by the reflowed solder bumps. An electrically insulating adhesive, often called an underfill, is typically injected into this space and cured to provide a stronger mechanical connection, provide thermal bridging, and ensure that the solder joint does not can be stressed due to the difference in coefficient of thermal expansion between the die and the substrate.
底部填充材料经管芯和基片之间的毛细作用而流动,并因此需要可观的时间以及需要从多个点施加,以确保在管芯和基片之间没有未被填充的空隙。底部填充材料一般是基于环氧树脂的,并且具有合适的粘性以恰当地流动且在固结/固化之后机械地强固。在施加注射后,底部填充材料就被加热,以驱逐出任何溶剂,并/或使底部填充复合材料固化。这可以在焊料回流过程之前,或者作为焊料回流过程的一个部分被完成。The underfill material flows by capillary action between the die and the substrate, and thus requires considerable time and needs to be applied from multiple points to ensure that there are no unfilled voids between the die and the substrate. The underfill material is generally epoxy based and has the right viscosity to flow properly and is mechanically strong after consolidation/curing. After the shot is applied, the underfill is heated to drive out any solvents and/or to cure the underfill composite. This can be done prior to, or as part of, the solder reflow process.
底部填充材料常常不完全地填充元件之间的空间,以至在管芯下留有空气。在来自回流炉的热量引起残存空气膨胀并胀破底部填充材料或管芯时,可能引起该部分的灾难性的故障。The underfill material often does not completely fill the space between components, leaving air under the die. Catastrophic failure of the part can result when the heat from the reflow oven causes the trapped air to expand and burst the underfill or die.
在和其它的自动工序中相比,用注射器手动地施加底部填充材料是花费时间且劳动密集性的步骤。消除此步骤的一个尝试涉及到,在基片上放置管芯之前,用底部填充材料在合适的位置涂覆基片。这通常被称为无流式底胶充填,并图1A-1C中显示。晶片被制作完成后,一小焊料点就被置入在每个焊盘上。个别管芯随后从晶片中被切出来(被切片)。包含焊料凸块20的管芯10随后被倒转到准备对齐并放置在基片上的位置,如图1A所示。图1B示出了处于倒转位置的管芯10,准备对齐并放置在基片40上,其中该基片40已经被涂有底部填充复合材料30。管芯10被对齐以使焊料凸块30与基片40上的连接器50对齐。在图1C中,倒装芯片10被放置并连接到基片40,以使焊料球20被向下放置到在下面的电子设备或者电路板60的连接器50上,且焊料被回流。虽然此工序使底部填充材料的施加自动化,但是仍然存在的问题是,底部填充材料在基片上的润湿不均匀,以及焊料凸块妨碍了空气从元件之间脱逸,以至在管芯和基片之间存在残存空气60。Applying the underfill material manually with a syringe is a time-consuming and labor-intensive step compared to other automated processes. One attempt to eliminate this step involves coating the substrate with an underfill material in place before placing the die on the substrate. This is commonly referred to as no-flow primer fill and is shown in Figures 1A-1C. After the die is fabricated, a small solder dot is placed on each pad. Individual dies are then cut (diced) from the wafer. Die 10 containing
发明概述Summary of the invention
在本发明的第一方面,提供了用于组装微电子装置的一种方法,该方法包含使用凸面管芯连接工艺将管芯粘着到基片的步骤。In a first aspect of the invention, there is provided a method for assembling a microelectronic device, the method comprising the step of attaching a die to a substrate using a convex die attach process.
在本发明的第二方面,提供了一种用于形成电子组件的方法,该方法包括:In a second aspect of the invention there is provided a method for forming an electronic assembly, the method comprising:
a)提供在其上有底部填充材料的管芯;a) providing a die with an underfill material thereon;
b)捡起并翻转管芯;b) pick up and flip the die;
c)加热底部填充材料直到它至少轻微地液化并形成一凸面,以及c) heating the underfill material until it at least slightly liquefies and forms a convex surface, and
d)将管芯放置在基片上。d) Placing the die on the substrate.
在本发明的一个实施方式中,该管芯包括微电子元件。在本发明的另一个实施方式中,该管芯包括外部电连接。在本发明的又一个实施方式中,该管芯包括焊料凸块,以及在本发明的另一个实施方式中,底部填充材料大致上围绕焊料凸块。在本发明的一个另外的实施方式中,该基片包括用于与焊料凸块连接的焊盘。In one embodiment of the invention, the die includes microelectronic elements. In another embodiment of the invention, the die includes external electrical connections. In yet another embodiment of the invention, the die includes solder bumps, and in another embodiment of the invention, the underfill material substantially surrounds the solder bumps. In a further embodiment of the invention, the substrate includes pads for connection to solder bumps.
在本发明的另一个实施方式中,方法的步骤a)包括:In another embodiment of the present invention, step a) of the method comprises:
a1)提供晶片;a1) Provide wafers;
a2)在所述晶片上形成焊料凸块;a2) forming solder bumps on said wafer;
a3)使用包含环氧树脂和溶剂的底部填充材料涂覆所述具有凸块的晶片;a3) coating the wafer with bumps with an underfill material comprising epoxy resin and a solvent;
a4)干燥所述底部填充材料以大致上移除全部的溶剂;a4) drying the underfill material to remove substantially all of the solvent;
a5)将晶片切成个别的管芯。a5) Dicing the wafer into individual dies.
在本发明的另外的实施方式中,干燥底部填充材料以大致上移除上全部的溶剂的步骤是在真空下进行的和/或底部填充材料被加热以干燥底部填充材料。In other embodiments of the present invention, the step of drying the underfill material to remove substantially all of the solvent is performed under vacuum and/or the underfill material is heated to dry the underfill material.
在本发明的一个实施方式中,捡起管芯并将管芯翻转的步骤包括:使用加热的管芯接合器捡起管芯,该加热的管芯接合器通过所述管芯的主体提供加热步骤的热量。在本发明的一个变化的实施方式中,底部填充材料经由导向该管芯的热空气流被加热。In one embodiment of the invention, the step of picking up the die and flipping the die includes picking up the die using a heated die bonder that provides heating through the body of the die step heat. In a variant embodiment of the invention, the underfill material is heated via a flow of hot air directed towards the die.
在本发明的另一个实施方式中,将涂覆后的管芯定位和放置在基片上的步骤包括:In another embodiment of the invention, the step of positioning and placing the coated die on the substrate comprises:
d1)将管芯上的焊料凸块与基片上对应的焊盘对准;d1) Aligning the solder bumps on the die with the corresponding pads on the substrate;
d2)将管芯放置在基片上;d2) placing the die on the substrate;
d3)允许底部填充材料润湿基片并实质上填充管芯和基片之间的空间;d3) allowing the underfill material to wet the substrate and substantially fill the space between the die and the substrate;
d4)加热组件以凝固底部填充材料。d4) Heating the assembly to solidify the underfill material.
在本发明的一个实施方式中,底部填充材料是通过加热组件来固化的。在本发明的另一个实施方式中,加热组件以固化底部填充材料的步骤包括:将基片加热到足以使焊料回流的温度。In one embodiment of the invention, the underfill material is cured by heating the assembly. In another embodiment of the present invention, the step of heating the assembly to cure the underfill material includes heating the substrate to a temperature sufficient to reflow the solder.
在本发明的另一个实施方式中,底部填充复合材料包含环氧树脂、溶剂、固化剂,并可选择地包括焊剂(flux)。在本发明的又一个实施方式中,固化剂包含热潜伏固化剂。在本发明的另一个实施方式中,环氧树脂包含固态双酚A或双酚F环氧树脂。在本发明的又一个实施方式中,环氧树脂的熔点低于大约100℃。在本发明的另外的实施方式中,溶剂包含二氯甲烷。In another embodiment of the present invention, the underfill composite comprises epoxy resin, solvent, curing agent, and optionally flux. In yet another embodiment of the present invention, the curing agent comprises a heat latent curing agent. In another embodiment of the present invention, the epoxy resin comprises a solid bisphenol A or bisphenol F epoxy resin. In yet another embodiment of the present invention, the melting point of the epoxy resin is less than about 100°C. In a further embodiment of the invention, the solvent comprises dichloromethane.
在本发明的另一个实施方式中,基片包含另一个管芯以形成堆叠的芯片组件。在本发明的另外的实施方式中,堆叠的芯片组件包含多个管芯。在本发明的另一个实施方式中,在放置涂有底部填充材料的管芯之前,基片被涂有底部填充组合物。In another embodiment of the invention, the substrate contains another die to form a stacked chip assembly. In further embodiments of the invention, the stacked chip assembly includes a plurality of dies. In another embodiment of the invention, the substrate is coated with an underfill composition prior to placement of the underfill coated die.
附图简述Brief description of the drawings
图1示出了现有技术的微电子组件。Figure 1 shows a prior art microelectronic assembly.
图2示出了在本发明的一个实施方式中的凸面管芯连接工艺,该实施方式包括(a)涂覆后的翻转的管芯,(b)在其上形成有凸面的加热的管芯,以及(c)将管芯放置在基片上。Figure 2 shows a convex die attach process in one embodiment of the invention comprising (a) a coated flipped die, (b) a heated die with a convex formed thereon , and (c) placing the die on the substrate.
图3示出了依据本发明的一个实施方式的完整的制造和焊接工艺,该实施方式包含(a)带有焊料凸块的晶片,(b)施加有底部填充材料的晶片,(c)带有被干燥的底部填充材料的晶片,(d)被切片的晶片,(e)被捡起并翻转的管芯,(f)放置在基片上的管芯,以及(g)管芯粘着到焊料已回流和底部填充材料已固化的基片。Figure 3 shows the complete fabrication and soldering process according to one embodiment of the invention comprising (a) a wafer with solder bumps, (b) a wafer with an underfill material applied, (c) a wafer with Wafer with dried underfill material, (d) wafer being sliced, (e) die picked up and flipped, (f) die placed on substrate, and (g) die adhered to solder Substrate with reflowed and cured underfill material.
发明详细详述Detailed Description of the Invention
在微电子元件的制造中有多种方法用于生产硅晶片、粘着焊料凸块以及将晶片切成个别的管芯。本发明的各种实施方式的方法可以容易地被整合进本领域技术人员能认识的现存工艺中。There are various methods used in the manufacture of microelectronic components for producing silicon wafers, attaching solder bumps, and dicing the wafers into individual dies. The methods of the various embodiments of the invention can be readily integrated into existing processes as will be recognized by those skilled in the art.
在本发明的第一方面,管芯被涂有底部填充材料。底部填充材料优选地包含环氧树脂。该底部填充材料可以选择地包含一种或多种固化剂、溶剂、焊剂溶液以及填料。在本发明的一个实施方式中,包含多个管芯的晶片被涂覆,然后被切成个别的已涂覆管芯。在本发明的另一个实施方式中,管芯在从晶片切出后个别地被涂覆。In a first aspect of the invention, the die is coated with an underfill material. The underfill material preferably contains epoxy resin. The underfill material may optionally contain one or more of curing agents, solvents, flux solutions, and fillers. In one embodiment of the invention, a wafer containing a plurality of dies is coated and then diced into individual coated dies. In another embodiment of the invention, the dies are coated individually after being diced from the wafer.
在本发明的另一个实施方式中,底部填充复合材料的一个重要特性是它的液化温度。该液化温度为固态的底部填充材料液化并开始流动的温度,从而在管芯被翻转时,由于重力在其上形成凸面。在本发明的一个实施方式中,此温度将落在用于倒装芯片应用的通用的工作和处理范围内,并且可以从大约20℃变化到大约270℃。在本发明的一个优选的实施方式中,该液化温度将在从大约40℃到大约150℃的范围内,并且最优选地为从大约80℃到大约120℃。In another embodiment of the present invention, an important characteristic of the underfill composite is its liquefaction temperature. The liquefaction temperature is the temperature at which the solid underfill material liquefies and begins to flow, forming a convex surface on it due to gravity when the die is flipped over. In one embodiment of the invention, this temperature will fall within the common operating and processing range for flip chip applications and can vary from about 20°C to about 270°C. In a preferred embodiment of the invention, the liquefaction temperature will be in the range of from about 40°C to about 150°C, and most preferably from about 80°C to about 120°C.
本发明的方法采用的底部填充复合材料可以包括适合于如本文描述的加热/液化步骤的任何底部填充复合材料。底部填充复合材料被调节为具有合适的粘性、液化温度以及可以对于特定的用途所需要的任何其它性质。在本发明的一个优选实施方式中,底部填充复合材料包括基于环氧树脂的底部填充材料,其包括热潜伏固化剂。该热潜伏固化剂允许底部填充材料在管芯上被加热而不引起固化,以允许底部填充材料在捡起/加热/放置各步骤的整个过程中保持非固化。在管芯被放置在基片上后,底部填充材料就接着被加热到固化剂的初始温度以上,以使环氧树脂开始固化。在环氧树脂聚合或交联到使得粘性相当地增加的程度时,固化开始。The underfill composite employed in the method of the present invention may comprise any underfill composite suitable for the heating/liquefaction step as described herein. The underfill composite is tuned to have the proper viscosity, liquefaction temperature, and any other properties that may be required for a particular application. In a preferred embodiment of the present invention, the underfill composite comprises an epoxy-based underfill comprising a thermal latent curing agent. The thermal latent curing agent allows the underfill material to be heated on the die without causing curing, allowing the underfill material to remain uncured throughout the pick/heat/place steps. After the die is placed on the substrate, the underfill material is then heated above the initial temperature of the curing agent to initiate curing of the epoxy. Curing begins when the epoxy polymerizes or crosslinks to such an extent that the tack increases considerably.
在本发明的最优选的实施方式中,底部填充复合材料包含熔点温度低于大约100℃的双酚A或双酚F固态环氧树脂,以及热潜伏固化剂,比如Stapleton的美国专利申请公开号2008/0012124号中描述的固化剂,该固化剂具有在大约150℃以上的固化初始温度。In the most preferred embodiment of the invention, the underfill composite comprises a bisphenol A or bisphenol F solid epoxy resin with a melting point temperature below about 100°C, and a thermal latent curing agent, such as Stapleton's U.S. Patent Application Publication No. The curing agent described in No. 2008/0012124 having a curing initiation temperature above about 150°C.
在大多数倒装芯片装置中,焊料球的大小范围为从25μm到500μm。根据用途,底部填充材料可以完全地覆盖焊料球或者仅仅覆盖其一部分。因此,在本发明的一个实施方式中,底部填充材料的厚度可以从0.1μm变化到10mm,优选地在25μm到1mm之间,并且理想地在100μm到400μm之间。然而,应认识到,微电子元件组件的几何形状和底部填充材料的性质将规定施加的最终厚度。In most flip-chip devices, the size of the solder balls ranges from 25 μm to 500 μm. Depending on the application, the underfill material can completely cover the solder ball or only a portion thereof. Thus, in one embodiment of the invention, the thickness of the underfill material may vary from 0.1 μm to 10 mm, preferably between 25 μm to 1 mm, and ideally between 100 μm to 400 μm. However, it should be recognized that the geometry of the microelectronic component assembly and the nature of the underfill material will dictate the final thickness applied.
在本发明的、底部填充材料包含溶剂的实施方式中,在放置步骤之前,需要干燥步骤以从底部填充材料移除溶剂。该干燥步骤包括,例如加热底部填充材料以使溶剂蒸发,或将底部填充材料放置于真空下,以使溶剂从底部填充材料移除。In embodiments of the present invention where the underfill material contains a solvent, prior to the placing step, a drying step is required to remove the solvent from the underfill material. The drying step includes, for example, heating the underfill material to evaporate the solvent, or placing the underfill material under vacuum to remove the solvent from the underfill material.
当管芯被涂覆了底部填充材料并且移除了任何溶剂,那么涂覆后的管芯可以选择地被储存一段时间,直到微电子元件组件要被构造为止。Once the die is coated with the underfill material and any solvent is removed, the coated die can optionally be stored for a period of time until the microelectronic assembly is to be constructed.
在本发明的进一步的实施方式中,如图2A-2C中所示,涂有底部填充材料30的管芯10被捡起并翻转,以便焊料球20和底部填充复合组合物30向下。涂有底部填充材料20的管芯10随后被加热。在加热到足够的温度后,即在或接近底部填充材料的液化温度时,重力和表面张力将使底部填充材料形成一凸面,如图2B中所示。在本发明的实施方式中,凸面的形状可以使用温度、涂层厚度、粘性以及底部填充材料的表面能来调节。包括具有一凸面的底部填充复合材料30的被加热的管芯10随后被定位并放置在基片40上。底部填充材料30的凸形允许空气60脱逸,以防止在管芯10和基片40之间残留有空气。In a further embodiment of the invention, as shown in FIGS. 2A-2C , die 10 coated with
在本发明的一个实施方式中,通过用加热的管芯接合器来使管芯便于被捡起、加热以及放置。管芯接合器一般地使用放置头,该放置头经由抽吸捡起管芯、将板和管芯放置对准,然后将管芯放置在板上并停止抽吸以释放管芯。加热的管芯接合器,比如由Datacon(Datacon North America,Trevose,PA 19053)出售的那些管芯接合器,在管芯被放置时,允许管芯和/或基片同时加热。用于加热管芯的方式包括,通过加热放置头以传导加热管芯、经由从管芯接合器传导的热量加热基片,或者经由热空气流对板和/或基片进行对流加热。In one embodiment of the invention, dies are facilitated to be picked, heated and placed by using a heated die bonder. A die bonder typically uses a placement head that picks up the die via suction, aligns the board and die placement, then places the die on the board and stops the suction to release the die. Heated die bonders, such as those sold by Datacon (Datacon North America, Trevose, PA 19053), allow the die and/or substrate to be heated simultaneously as the die is placed. Means for heating the die include conductively heating the die by heating the placement head, heating the substrate via conduction heat from the die bonder, or convective heating of the plate and/or substrate via a stream of hot air.
管芯被放置成使得焊料球接触在基片上对应的连接器焊盘,以允许管芯和基片(优选地为印刷电路板)之间的电气互连。在底部填充材料润湿基片时,底部填充材料的凸形保留使空气脱逸的空间。这防止了在本文论述的不希望有的空气的残存。底部填充材料可润湿基片的表面,并大致上填充管芯和基片之间的区域,和围绕焊料球。在本发明的一个优选的实施方式中,基片完全地围绕焊料球,在底部填充材料中不留任何空隙。The die is placed such that the solder balls contact corresponding connector pads on the substrate to allow electrical interconnection between the die and the substrate, preferably a printed circuit board. The convex shape of the underfill material leaves room for air to escape when the underfill material wets the substrate. This prevents the undesirable entrapment of air discussed herein. The underfill material wets the surface of the substrate and substantially fills the area between the die and the substrate, and around the solder balls. In a preferred embodiment of the invention, the substrate completely surrounds the solder balls without leaving any voids in the underfill material.
在本发明的一个替代的实施方式中,捡起并放置的步骤是使用倾斜的或不均匀的捡起及放置头(pick and place head)实现的。这将允许将管芯放置时,凸出涂层的顶点相对于管芯偏离中心。类似地,在某些情形中,保持基片处于相对于管芯呈一角度,以提供相同的偏中心对准,可以是有利的。In an alternative embodiment of the present invention, the step of picking and placing is accomplished using an inclined or uneven pick and place head. This will allow the apex of the raised coating to be placed off-center relative to the die when the die is placed. Similarly, in some cases it may be advantageous to keep the substrate at an angle relative to the die to provide the same off-center alignment.
在本发明的另一个实施方式中,管芯和基片二者在放置步骤的过程中均被加热。加热管芯和板确保底部填充材料保持为液体,直到它有机会充分地润湿基片的表面。通常,温度将在正常的操作温度范围大约20℃到大约270℃内。在本发明的一个优选的实施方式中,该温度在大约40℃和大约150℃之间,并且理想地在大约80℃和大约120℃之间。In another embodiment of the invention, both the die and the substrate are heated during the placing step. Heating the die and board ensures that the underfill material remains liquid until it has had a chance to fully wet the surface of the substrate. Typically, the temperature will be within the normal operating temperature range of about 20°C to about 270°C. In a preferred embodiment of the invention, the temperature is between about 40°C and about 150°C, and desirably between about 80°C and about 120°C.
在管芯被放置在基片上后,微电子组件被加热以使焊料回流并固化底部填充复合材料。在本发明的一个替代的实施方式中,底部填充材料在放置之后但在使焊料回流之前被冷却。这允许底部填充复合材料重新固化并将组件保持在一起。这在放置和回流之间有时间延迟时,或者在组件在这些步骤之间必须被移动或储存时可以是有优势的。在本发明的一个另外的实施方式中,组件被置于后烘烤工序,以使底部填充材料在低于焊料回流温度的温度下固化。After the die is placed on the substrate, the microelectronic assembly is heated to reflow the solder and cure the underfill compound. In an alternative embodiment of the invention, the underfill material is cooled after placing but before reflowing the solder. This allows the underfill compound to recure and hold the component together. This can be advantageous when there is a time delay between placement and reflow, or when components must be moved or stored between these steps. In an additional embodiment of the invention, the assembly is placed in a post-bake process to allow the underfill material to cure at a temperature below the reflow temperature of the solder.
在本发明的另一个实施方式中,基片和管芯都被涂有底部填充材料。在基片上的底部填充材料涂层通过覆盖基片的任何表面特征物比如焊料掩模或突出的电气互连点,来提供均匀的接触表面。应用在基片上的底部填充材料的成分可以与涂覆管芯的不同。然而,在本发明的优选的实施方式中,基片上的底部填充复合材料与在管芯上的底部填充复合材料大致上相同。另外,涂覆基片这一做法,在管芯被放置时提供底部填充材料对底部填充材料的接触,这会改进润湿,并进一步减少在放置过程中残留空气的可能性。In another embodiment of the invention, both the substrate and the die are coated with an underfill material. The coating of underfill material on the substrate provides a uniform contact surface by covering any surface features of the substrate such as solder mask or protruding electrical interconnects. The composition of the underfill material applied on the substrate may be different from that used to coat the die. However, in a preferred embodiment of the invention, the underfill compound on the substrate is substantially the same as the underfill compound on the die. In addition, coating the substrate provides underfill material to underfill material contact when the die is placed, which improves wetting and further reduces the possibility of entrapped air during placement.
在本发明的另一个实施方式中,该基片包含另一个管芯。在此实施方式中,微电子组件由将管芯一个堆叠在另一个上并同时互相带有电气互连而构成。其在本发明此实施方式的范围内,以在依据本文的不同实施方式的方法制备的组件中提供多个堆叠的管芯。In another embodiment of the invention, the substrate contains another die. In this embodiment, a microelectronic assembly is formed by stacking dies one on top of the other with electrical interconnections to each other. It is within the scope of this embodiment of the invention to provide a plurality of stacked dies in an assembly prepared according to the methods of the various embodiments herein.
例子example
在本发明的第一示范性的实施方式中,如图3A-3G所示,本发明的实施方式的方法被并入微电子元件生产工序。在图3A中,该工序从在其上形成有多个焊料凸块120的晶片100开始。在图3B中晶片100被涂有底部填充材料130,该底部填充材料130完全覆盖焊料凸块120。底部填充材料130依据表1包括固态的环氧树脂、热潜伏固化剂、溶剂以及焊剂溶液。In a first exemplary embodiment of the present invention, as shown in FIGS. 3A-3G , the method of the embodiment of the present invention is incorporated into a microelectronic component manufacturing process. In FIG. 3A, the process begins with a
表1——底部填充复合材料Table 1 - Underfill Composite Materials
*LORD Curative包含在Stapleton的美国专利申请第2008/0012124号中描述的固化剂。 * LORD Curative contains the curing agent described in US Patent Application No. 2008/0012124 to Stapleton.
如图3C所示,底部填充组合物130随后通过使用热量和微真空移除涂层溶剂而硬化,以在管芯100上产生非粘性的干燥涂层,该非粘性的干燥涂层完全地覆盖焊料凸块120。随后晶片100被切割成个别的管芯110,如图3D所示。As shown in FIG. 3C , the
如图3E所示,个别的管芯110随后被加热的管芯接合器170捡起,在此时,固态的未固化树脂130液化以产生凸面。在图3F中,带有低粘度的凸出表面的管芯110随后被对准并放置到被加热的板140上,允许树脂130在连接工序的过程中润湿板140的表面。板140在放置的过程中同时被加热到一温度,该温度低于可能会使板140损坏或者使树脂开始固化的温度。As shown in FIG. 3E , individual dies 110 are then picked up by
然后管芯110和板140通过回流炉,以形成120和板140上的电气元件150之间的物理连接。然后组件在180-200℃被后烘烤1小时,以确保底部填充复合材料完全固化。
虽然本发明已经参考特定的实施方式进行了描述,但应认识到这些实施方式仅为对本发明的原理的说明。本领域技术人员应知晓本发明的装置和方法可以以其它的形式和实施方式构造和实施。因此,本文的描述不应被理解为限制本发明,因为其它实施方式也属于本发明的范围。While the invention has been described with reference to specific embodiments, it should be recognized that these embodiments are merely illustrative of the principles of the invention. Those skilled in the art will appreciate that the apparatus and method of the present invention may be constructed and implemented in other forms and implementations. Therefore, the description herein should not be construed as limiting the invention, as other embodiments also fall within the scope of the invention.
虽然本发明已经参考特定的实施方式进行了描述,但应认识到这些实施方式仅为对本发明的原理的说明。本领域技术人员应知晓本发明的复合材料、装置和方法可以以其它的形式和实施方式构造和实施。因此,本文的描述不应被理解为限制本发明,因为其它实施方式也属于本发明由附加的权利要求界定的范围。While the invention has been described with reference to specific embodiments, it should be recognized that these embodiments are merely illustrative of the principles of the invention. Those skilled in the art will appreciate that the composite materials, devices and methods of the present invention may be constructed and implemented in other forms and embodiments. Accordingly, the description herein should not be read as limiting the invention, since other embodiments also fall within the scope of the invention as defined by the appended claims.
Claims (22)
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| EP (1) | EP2135276A2 (en) |
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| US20120178219A1 (en) * | 2011-01-11 | 2012-07-12 | Nordson Corporation | Methods for vacuum assisted underfilling |
| US8796075B2 (en) | 2011-01-11 | 2014-08-05 | Nordson Corporation | Methods for vacuum assisted underfilling |
| WO2012133818A1 (en) * | 2011-03-31 | 2012-10-04 | 三菱化学株式会社 | Three-dimensional integrated circuit laminate and interlayer filler material for three-dimensional integrated circuit laminate |
| US9230873B2 (en) | 2011-07-15 | 2016-01-05 | 3M Innovative Properties Company | Semiconductor package resin composition and usage method thereof |
| US8865487B2 (en) * | 2011-09-20 | 2014-10-21 | General Electric Company | Large area hermetic encapsulation of an optoelectronic device using vacuum lamination |
| US9461008B2 (en) * | 2012-08-16 | 2016-10-04 | Qualcomm Incorporated | Solder on trace technology for interconnect attachment |
| JP2014091744A (en) | 2012-10-31 | 2014-05-19 | 3M Innovative Properties Co | Underfill composition, semiconductor device and manufacturing method thereof |
| DE102013102542A1 (en) * | 2013-03-13 | 2014-09-18 | Schweizer Electronic Ag | Electronic component and method for manufacturing an electronic component |
| US9972590B2 (en) * | 2016-07-05 | 2018-05-15 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Semiconductor package having a solder-on-pad structure |
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| AU8502798A (en) * | 1997-07-21 | 1999-02-10 | Aguila Technologies, Inc. | Semiconductor flip-chip package and method for the fabrication thereof |
| SG88747A1 (en) * | 1999-03-01 | 2002-05-21 | Motorola Inc | A method and machine for underfilling an assembly to form a semiconductor package |
| JP2000339648A (en) * | 1999-05-24 | 2000-12-08 | Tdk Corp | Method of manufacturing magnetic head device |
| EP1255292A1 (en) * | 2000-01-14 | 2002-11-06 | Toray Engineering Co., Ltd. | Chip mounting method |
| TW574739B (en) * | 2001-02-14 | 2004-02-01 | Nitto Denko Corp | Thermosetting resin composition and semiconductor device using the same |
| US7323360B2 (en) * | 2001-10-26 | 2008-01-29 | Intel Corporation | Electronic assemblies with filled no-flow underfill |
| US7180640B2 (en) * | 2002-09-20 | 2007-02-20 | Maltseff Paul A | Monolithic micro scanning device |
| US6906416B2 (en) * | 2002-10-08 | 2005-06-14 | Chippac, Inc. | Semiconductor multi-package module having inverted second package stacked over die-up flip-chip ball grid array (BGA) package |
| US6919420B2 (en) * | 2002-12-05 | 2005-07-19 | International Business Machines Corporation | Acid-cleavable acetal and ketal based epoxy oligomers |
| US7301222B1 (en) * | 2003-02-12 | 2007-11-27 | National Semiconductor Corporation | Apparatus for forming a pre-applied underfill adhesive layer for semiconductor wafer level chip-scale packages |
| US20050028361A1 (en) * | 2003-08-07 | 2005-02-10 | Indium Corporation Of America | Integrated underfill process for bumped chip assembly |
| US7229933B2 (en) * | 2004-03-31 | 2007-06-12 | Intel Corporation | Embossing processes for substrate imprinting, structures made thereby, and polymers used therefor |
| US7485502B2 (en) * | 2006-01-31 | 2009-02-03 | Stats Chippac Ltd. | Integrated circuit underfill package system |
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2008
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| EP2135276A2 (en) | 2009-12-23 |
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