CN101650591A - Power supply management method - Google Patents

Abstract

The invention discloses a plurality of power management methods, which are applied to an electronic system capable of operating in a non-power-saving mode and a power-saving mode. According to one of the above methods, when the electronic system is idle in the non-power saving mode, the idle state time is calculated. When the idle time equals or exceeds the mode entering time, the electronic system enters a power saving mode. When the electronic system is in the power saving mode, calculating the power supply cut-off time, and then modifying the mode entering time according to the power supply cut-off time. The power management method can switch the electronic system to the power-saving mode when the condition is met, so that the power consumption of the electronic system is saved.

Description

power management method

technical field

The present invention relates to power management, and in particular to an automatic power management method for devices integrating serial bus interfaces.

Background technique

The Serial Advanced Technology Attachment (SATA) bus, or the Serial Attached Small Computer System Interface (SAS) bus, is a serial bus that replaces the storage The device's parallel interface is designed primarily for data transfer between two SATA/SSI compliant devices, such as a host (eg, a computer) and a storage device (eg, an optical drive). Compared with the parallel Advanced Technology Attachment (parallel ATA) bus, the serial Advanced Technology Attachment bus has the following three advantages, namely, speed, cable size, and hot-swap capability. The serial advanced technology accessory bus includes a pair of signal lines, which are coupled to a differential transmitter (differential transmitter), and are configured to transmit signals in a certain direction, and further include another pair of signal lines, which are coupled to Another differential transmitter configured to transmit signals in opposite directions.

There are physical layer, link layer and transport layer defined in the serial advanced technology attachment interface standard. The physical layer performs the transmission and reception of high bit rate serial data. After the above data is received by the physical layer, it is deserialized and then sent to the link layer. The physical layer also receives data from the link layer, serializes the data, and outputs it to a differential line pair. The link layer can provide requests to the physical layer to output signals, and provide data from the physical layer to the transport layer. The transport layer performs the data conversion required for the operation according to the standard of the Serial Advanced Technology Attachment.

The Serial Advanced Technology Attachment specification is applied to the transmission interface of a hard disk drive or an optical drive to replace the long-term parallel Advanced Technology Attachment/Advanced Technology Attachment Packet Interface (ATAPI). The SATIA specification specifies two pairs of differential signal lines to replace the original 40 or 80 signal lines connected in parallel. Serializing raw data can reduce the number of signal lines and voltage, and improve speed. The above specification also adopts some new functions, such as: flow control (flow control) and error retransmission (error resending), to control the data flow in a simple way.

Figure 13 is a schematic diagram of the communication layers in the Serial Advanced Technology Annex specification. As shown in FIG. 13 , the SATIA interface connects the host 11 and the device 13 . Device 13 may be an optical storage device, hard drive, or other device with a Serial Advanced Technology Attachment Interface. In the specification of the serial advanced technology attachment, the communication layer includes four layers, namely: the first layer (physical layer), the second layer (link layer), the third layer (transport layer) and the fourth layer (application layer). ). The physical layer is responsible for converting digital and analog signals. That is, the physical layer receives the digital signal transmitted by the link layer, converts it into an analog signal, and transmits the analog signal to another endpoint. The physical layer also receives an analog signal from another endpoint, converts it to a digital signal, and outputs the digital signal to the link layer. The link layer encodes and decodes digital signals. That is, the link layer encodes data from the transport layer and outputs the encoded data to the physical layer. On the other hand, the link layer decodes data from the physical layer and outputs the decoded data to the transport layer. In addition, the link layer also supports power cut management. The transport layer constructs and deconstructs the Frame Information Structure (FIS). The frame information structure is defined in detail in the specification of the Serial Advanced Technology Annex. The application layer is responsible for managing the buffer memory and the Direct Memory Access (DMA) engine.

The serial advanced technology accessory interface standard supports physical preparation (PhyReady) mode, partial (Partial) mode and sleep (Slumber) mode. PhyReady mode (idle state) is a state that indicates that the SATIA interface is ready to transmit and receive data. Therefore, the physical (physical, PHY) logic circuit used to implement the physical layer operation and the main phase-locked loop (Phase-Locked Loop, PLL) circuit used to synchronize two serial advanced technology accessory compatible devices are both in the power supply and active state. The Partial mode and the Slumber mode are power saving modes, which are used to eliminate or reduce the power consumption of the physical logic circuit and/or the main PLL circuit. Slumber mode is more power-efficient than Partial mode, but the return delay time of the two is different. The return delay time of the Partial mode usually does not exceed 10 microseconds (microsecond), while the return delay time of the Slumber mode generally does not exceed 10 milliseconds (millisecond).

Figure 14 is a schematic diagram of the power management standard for the Serial Advanced Technology Accessory Interface. Transmit the original command "Partial Mode Request" (Partial Request: PMREQ_P) or "Slumber Request" (Slumber Request: PMREQ_S) to the serial advanced technology accessory bus through one of the multiple serial advanced technology accessory compatible devices, so that The serial advanced technology accessory interface connected with it enters Partial mode or Slumber mode respectively. In order to return to PhyReady mode from Partial mode or Slumber mode, one of the host or storage device transmits the out-of-band (Out OfBand, OOB) signal COMWAKE to the serial bus, and then the host or storage device responds to COMWAKE and switches to PhyReady mode .

In general, a SATAT-compliant device will request a power mode transition as soon as all outstanding commands have completed. This will allow the link to enter a low power state as soon as the command completes. However, before the command is completed, there will be some idle states on the link, for example, waiting to transmit or receive data or status information before the command is completed. During the idle state, the SATTA compatible device only receives or transmits synchronization signals.

Contents of the invention

In order to save the power consumption of electronic devices and electronic systems, the following technical solutions are provided:

The present invention provides a power management method, which is applied to an electronic device with a serial bus interface to save its power consumption. The serial bus interface has an internal queue for storing unfinished commands. The above power management method includes: confirmation Whether the internal queue is empty; and if the internal queue is empty, switching the electronic device to a power saving mode.

The present invention also provides a power management method, which is applied to an electronic device with a serial bus interface to save its power consumption. The power management method includes: confirming whether the serial bus interface receives or transmits a synchronization signal; and if the serial bus interface Receive or transmit synchronous signal, switch the electronic device to power saving mode.

The present invention also provides a power management method, which is applied to an electronic device with a serial bus interface to save its power consumption, wherein the serial bus interface includes a link layer part, and the above power management method includes: confirming whether the link layer part is is in an idle state; and if the link layer part is in an idle state, switching the serial bus interface to a power saving mode.

The present invention further provides a power management method, which is applied to an electronic system operable in a non-power-saving mode and a power-saving mode to save its power consumption. The power management method includes: in the non-power-saving mode, when the electronic system is When in the idle state, calculate the idle state time; if the idle state time is greater than or equal to the first threshold, switch the electronic system to the power saving mode; when the electronic system is in the power saving mode, calculate the power cut time; and according to the power cut time, modify first threshold.

The above-mentioned power management method can confirm whether to enter the power-saving mode through various ways, and switch the electronic device to the power-saving mode when conditions are met, so as to save the power consumption of the above-mentioned electronic device and electronic system.

Description of drawings

FIG. 1 is a block diagram of a system according to an embodiment of the present invention.

2a and 2b are flowcharts of two automatic power management methods applied to the system shown in FIG. 1 .

FIG. 3 is a block diagram of another system according to an embodiment of the present invention.

4a and 4b are flowcharts of two automatic power management methods applied to the system shown in FIG. 3 .

FIG. 5 is a flowchart of an automatic power management method for a SATAT compatible device according to an embodiment of the present invention.

6-12 are examples for illustrating step 512 in FIG. 5 .

Figure 13 is a schematic diagram of the communication layers in the Serial Advanced Technology Annex specification.

Figure 14 is a schematic diagram of the power management standard for the Serial Advanced Technology Accessory Interface.

Detailed ways

Certain terms are used in the description and claims to refer to particular elements. Those skilled in the art should understand that hardware manufacturers may use different terms to refer to the same component. The specification and claims do not use the difference in name as a way to distinguish components, but use the difference in function of components as a criterion for distinguishing. "Include" mentioned throughout the description and claims is an open-ended term, so it should be interpreted as "including but not limited to". In addition, the term "coupled" herein includes any direct and indirect means of electrical connection. Therefore, if it is described that the first device is coupled to the second device, it means that the first device may be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means.

FIG. 1 is a block diagram of a system according to an embodiment of the present invention. The above-mentioned system has a host computer (such as a personal computer) and a storage device (such as an optical drive), and the two communicate through a serial advanced technology accessory bus. Both the host computer and the optical drive are Serial Advanced Technology Accessory Compatible Devices. As shown in Figure 1, the host 10 includes: a main host unit 14, a serial advanced technology accessory interface 16, a transmitter module Tx for transmitting information, and a receiver module Rx for receiving information; the storage device 12 includes: a main optical drive Unit 20, Serial Advanced Technology Accessory Interface 18, transmitter module Tx for transmitting information and receiver module Rx for receiving information. Both SATIA 16 and 18 communicate data to each other via SATB 22 disposed therebetween. Each SATIA (16 or 18) includes an internal queue (24 or 26) in which commands are dynamically rearranged or relogged so that SATAI 16 or 18 supports this Native Command Queuing (NCQ) or Native Advanced Technology Attachment Packet Interface Commands, where Native Command Queuing is a command protocol that allows serial Advanced Technology Attachments to be executed within a single optical drive Multiple Outstanding Commands, Native Advanced Technology Attachment Packet Interface is a serial Advanced Technology Attachment command protocol designed to allow outstanding packet commands in a single Serial Advanced Technology Attachment frame information structure.

2a and 2b are flowcharts of two types of automatic power management according to an embodiment of the present invention, applied to the SATAC host 10 and the storage device 12 in FIG. 1 . As shown, a SATIA interface is identified as idle if its internal queue is empty. Either the host 10 of the SATTA or the SATTA-compatible storage device 12 can each confirm whether the SATIA interface is in an idle state. Although the host computer 10 integrated with the SATIA interface 16 can also be used to illustrate the operation steps of FIGS. illustrate. In step 200 of Figure 2a, it is determined whether the internal queue 26 is empty. If so, SATIA 18 is assumed to be idle. Next, as shown in step 202 of FIG. 2 a , the storage device 12 is switched to operate in the power saving mode. The mode change described above can be accomplished by transmitting a “partial mode request” or a “sleep mode request” to SATB 22 .

Alternatively, as shown in Figure 2b, entry into the power saving mode may be delayed until the idle state lasts for a preset period of time. Similar to step 200 of FIG. 2a, step 204 of FIG. 2b is used to confirm whether the internal queue 26 is empty. If yes, in step 206, a timer is initialized to count the idle state time when the internal queue 26 is continuously empty. Steps 208 and 210 form a loop to continuously check whether the idle state time of SATIA 18 reaches the mode entry time. If the result is negative, the “No” path is selected in step 210 , and the above loop returns to step 208 . If the idle state time is greater than or equal to the mode entry time, select the "Yes" path in step 210, as shown in step 212 in FIG. 2b, and the storage device 12 enters the power saving mode.

Switching a SATTA-compatible device to a power save mode may include switching the SATTA-compatible device's serial The advanced technology accessory interface 16 or 18 switches to power saving mode. Alternatively, it may also include: switching the main host unit 14 or the main optical drive unit 20 of the SATA compatible device to a power saving mode, such as reducing the rotation speed of the storage device 12 or other similar methods. Still further, it may also include: turning off the receiver module, and periodically turning on the receiver module during operation in the power saving mode to check whether the SATAC device requests to return to the active mode. Alternatively, the method of switching a Serial Advanced Technology Accessory compatible device into a power saving mode may include any combination of the methods described above.

FIG. 3 is a block diagram of a system according to another embodiment of the present invention. The system described above has a host computer 30 and an optical drive 32 communicating via a serial advanced technology accessory bus 22 . Figure 3 uses the same symbols as in Figure 1 for similar elements having the same function. Unlike FIG. 1 , SATIA 34 has a link layer portion 38 and a physical layer portion 40 , and SATIA 36 has a link layer portion 44 and a physical layer portion 42 . The PHY portion 40 is coupled to the SATB 22 for transmitting data to or receiving data from the PHY portion 42 . When performing communication of the physical layer section 40 with the link layer section 38 , the physical layer section 40 performs data transmission or reception via the serial advanced technology attachment bus 22 . If no data is being transmitted or received and the PHY portion 40 is in an idle state, a synchronization signal is sent to the PHY portion 42 of the SATIA interface 36 and another synchronization signal is received from the PHY portion 42 .

If there is no communication between the transport layer part and the link layer part 38, the physical layer part 42 is also in an idle state. There is no communication between the link layer portion in the idle state and the physical layer portion or the transport layer portion, indicating that the SATIA 34 or 36 is also in the idle state. Alternatively, when the SATIA 34 or 36 is receiving or transmitting synchronization signals, the SATAI is also in an idle state.

4a and 4b are flowcharts of two automatic power management embodiments according to the present invention, applied to the SATAC host 30 or the optical drive 32 in FIG. 3 . As shown in Figures 4a and 4b, if the physical layer portion 40 or 42 is in the idle state, then the SATIA 34 or 36 is asserted in the idle state. Although the host computer 30 integrated with the SATIA interface 34 can also be used to illustrate the operation steps of FIGS. . If link layer portion 44 is in the idle state, or SATIA 36 receives or transmits a synchronization signal, then SATIA 36 is considered to be in the idle state (step 300). Subsequently, as shown in step 302 in FIG. 4a, the optical drive 32 is switched to operate in the power saving mode. The above-mentioned mode change can be realized by transmitting a "partial mode request" or "sleep mode request" to the serial advanced technology accessory bus 22 .

Alternatively, as shown in Figure 4b, entry into the power saving mode may be delayed until the idle state lasts for a preset period of time. Similar to FIG. 2b, except that the confirming steps 304 and 308 in FIG. 4b are different from the steps 204 and 208 in FIG. 2b, other steps perform similar operations. Therefore, for simplicity of description, details are not described here. As shown in FIG. 4b, when the idle state time of the SATIA interface reaches the mode entry time, the SATAT compatible device will be switched to operate in the power saving mode.

Switching a SATTA-compatible device to a power save mode may include switching the SATTA-compatible device's serial The advanced technology accessory interface 34 or 36 switches to power saving mode. Alternatively, it may also include: switching the main host unit 14 or the main optical drive unit 20 of the SATA compatible device to a power saving mode, for example, reducing the rotation speed of the storage device 32 or other similar methods. Still further, it may also include: turning off the receiver module, and periodically turning on the receiver module during operation in the power saving mode to check whether the SATAC device requests to return to the active mode. Alternatively, the method of switching a Serial Advanced Technology Accessory compatible device into a power saving mode may include any combination of the methods described above.

The mode entry time introduced by Figure 2b or 4b can be constant or variable, depending on the specific circumstances of the Serial Advanced Technology Accessory bus. When the SATAC device changes from the non-power saving mode to the power saving mode, it indicates that the SATAC device enters the power saving mode, otherwise, the SATAC device will enter the active mode. Thus, the mode entry time is the period of time from when the SATIA interface is identified as idle until the SATTA compatible device enters the power saving mode. Power down time, defined as the period of time from when a Serial Advanced Technology Accessory compliant device enters power saving mode until it returns to active mode. When the power-off time of the SATAT-compliant device is relatively short, the SATAT-compliant device can maintain the active mode to avoid frequent return delays due to the rapid return from power-saving mode, so a modest increase in Mode entry time. Conversely, if the power-off time of the SATAT-compliant device is relatively long, entering the power saving mode earlier can save more power, so the mode entry time should be reduced. Therefore, the power-off time can be used as an index for modifying the mode-entry time.

FIG. 5 is a flowchart of an automatic power management method for a SATAT compatible device according to an embodiment of the present invention. As shown in step 500, in the non-power-saving mode, it is determined whether the SATIA interface is idle. If yes, start a timer in step 502 to count the idle state time. Subsequently, step 504 is executed to confirm whether the idle state time reaches the mode entry time. When the SATA interface returns to the data transmission or reception state, that is, returns to the active mode before the idle state time reaches the mode entry time, then stop the calculation of the idle state time and reset the timer, then return to step 500 (step 504's "No" path). If the idle state time exceeds or is equal to the mode entry time, then execute step 506 to switch the SATAT compatible device to operate in the power saving mode, and in step 508, start the calculation of the power off time. Then, in step 510, it is determined whether the SATAI is in active mode. When the SATIA interface returns to the active mode, execute step 512 to stop the calculation of the power off time, and check whether the mode entry time needs to be modified. In step 514, it is confirmed whether the power off time is appropriate. If yes, the mode entry time will not be modified, and the process returns to step 500 . Otherwise, in step 516 , the mode entry time is modified and flow returns to step 500 .

FIG. 6 is an example for illustrating step 512 in FIG. 5 . In step 602, it is confirmed whether the power cut-off time is less than a preset second threshold. If so ("Yes" path of step 602), as shown in step 604, increase the mode entry time, for example: increase a preset value. If the power cut-off time is greater than or equal to the preset second threshold ("No" path of step 602), the mode entry time remains unchanged.

The mode entry time can be limited to avoid unintended effects caused by the continuous increase of the mode entry time. Accordingly, FIG. 7 is a modified version of FIG. 6 . After step 604, step 706 is executed to confirm whether the mode entry time reaches the upper limit. If not, the mode entry time remains unchanged. Otherwise, in step 708, the mode entry time is decreased, which can be optionally decreased or decreased by a preset value. Therefore, the mode entry time can be maintained less than the upper limit, and an idle state time exceeding the upper limit can be avoided.

FIG. 8 is also used to illustrate step 512 in FIG. 5 , wherein, if the power-off time is less than the second threshold, it is determined to be too short. Figures 6 and 7 illustrate the increase of the trigger mode entry time due to the short power cut-off time. Unlike the above two figures, in Figure 8, the mode entry time can be increased or decreased to keep the mode entry time between the upper and lower limits . When correcting, a propensity variable is used to indicate that the mode entry time increases or decreases. Therefore, in step 802, it is determined whether the power cut-off time is too short, that is, whether the power cut-off time is smaller than the second threshold. Step 804 is executed to confirm that the mode entry time tends to be higher or lower. If the mode entry time tends to increase, step 806 is executed after step 804 to increase the mode entry time. If the mode entry time tends to decrease, step 808 is executed after step 804 to decrease the mode entry time. Step 810 is executed to confirm whether the changed mode entry time reaches the upper limit or the lower limit. If so, an inverse operation is performed on the mode entry time, reversing its tendency so that the mode entry time remains between the upper and lower bounds.

FIG. 9 is another example for illustrating step 512 in FIG. 5, wherein the mode entry time can only be a higher value or a lower value. If the power off time is determined to be too short, the mode entry time will be switched from one value to another. In step 902 of FIG. 9 , it is determined whether the power cut-off time is less than a second threshold. If not, the mode entry time remains unchanged. Otherwise, step 904 is executed to determine whether the mode entry time is a higher value or a lower value. Then, in step 906, the mode entry time is switched from a higher value to a lower value, or, in step 908, the mode entry time is switched from a lower value to a higher value.

FIG. 10 is another example for illustrating step 512 in FIG. 5 . In step 1002, it is determined whether the power cut-off time is less than a second threshold. If not, the mode entry time remains unchanged. Otherwise, in step 1004, the mode entry time is randomly assigned as a value between an upper limit and a lower limit.

The difference between FIG. 11 and FIG. 6 lies in the extra step 1102 , that is, the path after the result of “no” is confirmed in step 602 . In step 1102, when the power cut-off time is not less than the second threshold, the mode entry time is reduced, so that the SATAT compatible device can be switched to the power saving mode earlier to save more power.

Since an inappropriate power-off time occurs solely by accident, it is not possible to modify the mode-entry time every time when the power-off time is confirmed to be too short or too long. Therefore, as shown in FIG. 12 , the most recently collected statistical results of power cut-off time are used as evidence for the mode entry time modification method. In step 1202, the latest collected statistical results of power cut-off time are calculated. If the statistical result meets the first criterion (“Yes” path of step 1204 ), the mode entry time will be increased in step 1208 . Otherwise, go to step 1206. If the statistical result meets the second criterion (“Yes” path of step 1206 ), the mode entry time will be decreased in step 1210 . Otherwise, the mode entry time remains unchanged.

The statistical result in FIG. 12 may be the percentage of inappropriate power-off time among a certain number of recently collected power-off times. Alternatively, it may be the number of inappropriate power-off times within a certain period. Example: If more than 80% of every 20 latest collected power cut times are found to be too short, it indicates that the mode entry time should be increased. Another example: if within one hour, the power cut-off time of more than 10 pens is confirmed to be too short, it may also indicate that the mode entry time should be increased. Other conditions may also be used as evidence that the mode entry time should be increased, for example: all power cut times are determined to be too short within a day, or more than 8 consecutive power cut times are determined to be too short within a predetermined period of time. short wait. The criteria used to justify a required decrease in mode entry time may or may not be similar to the criteria used to justify a required increase in mode entry time. For example: both of the above criteria can be based on the percentage of inappropriate power off time, or one can be based on a percentage and the other can be based on the number of inappropriate power off time.

Embodiments of the present invention are illustrated using the Serial Advanced Technology Accessory Interface as an example, but not limited thereto. The present invention can also be implemented on a Serial Small Computer System Interface using the Serial Small Computer System Interface bus. For example: one of the power management methods disclosed in Figures 2a, 2b and Figures 5-12 can be used to replace the serial advanced technology attachment in Figure 1 with the serial small computer system interface bus and the corresponding serial small computer system interface Bus 22 and Serial Advanced Technology Accessory Interfaces 16 and 18. The serial advanced technology accessory bus 22 and the serial advanced technology accessory interface 34 and 32 in FIG. 4a, 4b and one of the power management methods in Fig. 5-12.

The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the claims of the present invention shall fall within the scope of the present invention.

Claims (20)

1. A power management method applied to an electronic device with a serial bus interface to save its power consumption, wherein the serial bus interface has an internal queue for storing unfinished commands, the power management method comprising: confirm that the internal queue is empty; and If the internal queue is empty, switch the electronic device to a power saving mode. 2. The power management method according to claim 1, further comprising: When the internal queue is empty, the idle state time is measured, wherein, when the idle state time is greater than or equal to a first threshold, the electronic device is switched to the power saving mode. 3. The power management method according to claim 1, further comprising: If the internal queue is empty, switch the serial bus interface to the power saving mode. 4. A power management method applied to an electronic device with a serial bus interface to save its power consumption, the power management method comprising: confirming whether the serial bus interface receives or transmits a synchronization signal; and If the serial bus interface receives or transmits the synchronization signal, the electronic device is switched to a power saving mode. 5. The power management method according to claim 4, further comprising: When the serial bus interface receives or transmits the synchronization signal, the idle state time is measured, wherein, when the idle state time is greater than or equal to a first threshold, the electronic device is switched to the power saving mode. 6. The power management method according to claim 4, further comprising: If the serial bus interface receives or transmits the synchronization signal, switch the serial bus interface to the power saving mode. 7. A power management method applied to an electronic device with a serial bus interface to save its power consumption, wherein the serial bus interface includes a link layer part, the power management method comprising: confirm whether the link layer part is idle; and If the link layer part is in an idle state, switch the serial bus interface to a power saving mode. 8. The power management method according to claim 7, further comprising: When the link layer part is in the idle state, the idle state time is measured, wherein, when the idle state time is greater than or equal to a first threshold, the electronic device is switched to the power saving mode. 9. The power management method according to claim 7, further comprising: If the serial bus interface receives or transmits a synchronous signal, the serial bus interface is switched to the power saving mode. 10. A power management method applied to an electronic system operable in a non-power-saving mode and a power-saving mode to save its power consumption, the power management method comprising: In the non-power-saving mode, when the electronic system is in an idle state, measuring the idle state time; if the idle state time is greater than or equal to a first threshold, switching the electronic system to the power saving mode; measuring power-off time while the electronic system is in the power-saving mode; and The first threshold is modified according to the power cut-off time. 11. The power management method according to claim 10, characterized in that: the modifying step comprises: When the power cut-off time is less than the second threshold, the first threshold is increased. 12. The power management method according to claim 11, wherein the modifying step further comprises: When the first threshold reaches the upper limit, the first threshold is decreased. 13. The power management method according to claim 10, wherein the modifying step comprises: When the power cut-off time is greater than or equal to the second threshold, the first threshold is decreased. 14. The power management method according to claim 10, wherein the modifying step comprises: When the power cut-off time is less than the second threshold and the mode-entry time tends to be higher, increase the mode-entry time; When the power-off time is less than the second threshold and the trend of the mode-entry time is lower, decrease the mode-entry time; and When the mode entry time reaches an upper limit or a lower limit, the tendency of the mode entry time is reversed. 15. The power management method according to claim 10, wherein the modifying step comprises: When the power cut-off time is less than the second threshold, the mode entry time is adjusted to be between an upper limit and a lower limit. 16. The power management method according to claim 10, wherein the modifying step comprises: The first threshold is decreased when a plurality of recently collected statistical results of power cut-off times meet the criteria. 17. The power management method according to claim 10, wherein the modifying step comprises: The first threshold is increased when a plurality of recently collected statistical results of power cut-off times meet the criteria. 18. The power management method according to claim 10, wherein the modifying step comprises: Computing statistics for multiple most recently collected power cut times; When the statistical result meets the first criterion, increasing the first threshold; and When the statistical result meets the second standard, the first threshold is decreased. 19. The power management method according to claim 18, wherein one of the first standard and the second standard is: Among the plurality of newly collected power cut-off times, those confirmed to be inappropriate exceed a preset percentage value. 20. The power management method according to claim 18, wherein one of the first standard and the second standard is: Among the plurality of newly collected power cut-off times, those confirmed as inappropriate are greater than a preset number.

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