CN101638215A - Manufacture method of micro-nano gap electrode - Google Patents

Abstract

The invention discloses a manufacture method of a micro-nano gap electrode. The method comprises the following steps: designing electrode patterns and manufacturing the electrode, i.e. firstly, designing the size of each electrode gap to be 1.2-2.8 microns, wherein electrode patterns comprise an interdigital type, a zigzag type, a square-to-tip type a square-to-square type and a square-to-flat type, the area of each unit is 5800 microns*5800 microns, a ceramic groove has a width of 100 microns, a metal layer is made into small squares on all edges of the unit as an electrode-extracting pattern, and a 4-inch silicon chip is provided with 184 identical units; then, adopting an electron beam to make a plate; using a standard process method for the cleaning and the photoetching of a P-type 100silicon; adopting negative-cutting positive photoresist for plasma etching; and oxidizing so that the growth thickness of silicon dioxide is 1.1 microns; and the electrode gap is at a nano stage or adeep submicron stage. The prepared electrode sensitive material has a sequential distribution rule and a very uniform distribution area and is suitable for sensor probes needing electrode gaps in nanometer structure.

Description

A kind of fabrication method of micro-nano-gap electrode

technical field

The invention relates to the technical field of electrode manufacturing, in particular to a method for manufacturing a multi-structure multi-pattern micro-nano-gap electrode from deep submicron to nanoscale.

Background technique

Nanoparticles refer to particles with a size ranging from 1 to 100 nm. Studies have shown that the physical and chemical properties of nanomaterials are different from macroscopic materials. Metal and semiconductor nanoparticles have attracted increasing attention due to their unique properties in light, electricity, catalysis, chemical sensing, and future nanomemory devices. The research on it in the field of science and application is a hot spot in current scientific research. Technologies related to nanomaterials will play a leading role in economic development in the new century. In short, it can be said that the world today has entered the "nano era".

When using nanostructure materials as sensitive elements to construct electrical sensors, it is usually necessary to arrange or bridge the nanostructures as sensing materials between two electrodes, so as to transmit the changes of their characteristics with the measurement object in the form of electrical signals. out.

Under the guidance of Moore's Law, the semiconductor industry steps up to a new level every two to three years, which is the so-called road map of semiconductor technology development (ITRS). In 2004, it entered the mass production of 90nm node devices, in 2007 it was 65nm, and the latest technology has reached a scale of 45nm or even smaller. However, the key to all these changes is lithography technology, so people collectively call lithography technology the "leader" of the semiconductor industry. With the improvement of integrated circuit product technology requirements, lithography technology is also continuously improving the resolution to produce finer device sizes.

Traditionally, improving the resolution of lithography technology is nothing more than shortening the exposure wavelength and increasing the numerical aperture NA of the lens. Usually, shortening the wavelength is one of the most effective methods. In fact, the current mainstream products of global lithography machines are KrF (248nm) and i-line (365nm). However, when it reaches below the sub-micron level, the difficulty and cost of lithography technology will increase exponentially, especially when universities and research institutes do not have the conditions for mass production.

Traditionally, it is believed that the quality of lithography depends not only on the accuracy of the lithography machine, but also depends on the use of photoresist and the lithography environment on a large scale, such as: humidity, pollutant content Impact. Especially in the laboratory conditions of universities and scientific research institutions, it is difficult to achieve complete control of the environment. Especially when making sub-micron photolithographic patterns.

The currently commonly used electrode pattern design method generally seldom considers the limitation of photolithography technology, which is because the current photolithography technology has been developed to a relatively advanced level. Usually, according to the normal process flow, the required graphics can be obtained.

However, according to the traditional way of thinking to design electrode patterns, there will be certain bottlenecks at the deep submicron scale. Especially in scientific research, it is impossible to invest a lot of money in designing high-precision micro-nano electrodes for a small number of tentative experiments. Photolithography The cost of the nanoscale increases exponentially.

Moreover, in order to conduct a large number of tentative experiments in scientific research, it is necessary to design a large number of electrode patterns with different conditions and shapes, and to manufacture them according to commercial technology. The cost is unbearable for general universities and scientific research institutions.

There are a large number of electrode design and production methods in the published technical information, as well as a variety of electrode design and production for different sensors, which are mainly summarized as follows:

The first is for optical exposure technology. This technology does not have high requirements for photolithography, so the line width design of electrode patterns and spacing is relatively large, generally above microns, typically several microns or even tens of microns. The advantage is that the relative error is small, the design is convenient, and the cost is low. But its main problem is that the designed device pattern is relatively large, which is not suitable for nanoscale devices.

The second is for electron beam exposure technology, which has higher requirements on photolithography technology, so the design of electrode pattern and spacing line width is relatively small, generally in the submicron to deep submicron level. Typically around 1 micron. Its advantage is that the electrode pattern and spacing are fine, which is conducive to precise control, and the manufactured device has excellent performance. The disadvantage is that the production cost is high, and large errors may occur during photolithography.

To sum up, it can be found that the industry continues to follow Moore's Law with its exquisite process technology and process equipment, pushing the minimum line width of electrodes to smaller and smaller nanometer scales. As a scientific research and education unit, it is troubled by the lack of such advanced equipment and technological conditions. Technical difficulties and rising costs have become a bottleneck in the progress of scientific research results of scientific research units.

Contents of the invention

The object of the present invention is to provide a method for manufacturing micro-nano-gap electrodes in response to the above-mentioned deficiencies. The method adopts micron-level photolithography design technology to produce nano-level electrode gaps. The electrodes produced are finally used in the field of sensors to solve the problem of sensors. The problem of integration in the production and the consideration of cost at the same time make it have more advantages than traditional sensors, and provide a new method for the production of micro-nano sensors in the future.

The purpose of the present invention is achieved like this:

A method for manufacturing a micro-nano-gap electrode, comprising the following specific steps:

a) Electrode graphic design

The electrode gap size is designed to be 1.2-2.8 microns; the electrode pattern is interdigitated, zigzag, square-to-pointed, square-to-square and pointed-to-flat; each unit is 5800 microns × 5800 microns, and the width of the scribing groove is 100 microns , the cross alignment mark is set on the diagonal, the length and width are 50 microns each, and the small squares along the sides of each unit are the metal layer, which is used as the electrode lead pattern, with a size of 500 microns × 500 microns. The figures in the middle, electrodes and electrode gaps are arranged as a whole. Rectangular arrangement and square arrangement: in the rectangular arrangement, the gap size is 2.8 microns, 2.4 microns, 2 microns or 1.8 microns, the overall arrangement size is 220 microns × 330 microns, covered with a metal layer, the size is 220 micron x 350 micron; gap size 1.6 micron, 1.4 micron or 1.2 micron (except interdigitated), overall arrangement size 200 micron x 400 micron, covered with metal layer, size 220 x 420 micron; square In this type of arrangement, the size of the gap is 1.2-2.8 microns, the overall size of the arrangement is 350 microns × 350 microns, covered with a metal layer, the size is 380 microns × 380 microns; 184 identical units are set on a 4-inch silicon wafer, with Photolithography on silicon wafers of 4 inches and below.

In the rectangular arrangement, for the interdigitated and gap size of 1.6 microns, 1.4 microns or 1.2 microns, the overall array size is 200 microns × 370 microns, and the metal layer covering it is 220 microns × 380 microns.

b) Electrode fabrication

Electron beam plate making is used; 4-inch, 3-inch or 2-inch P-type 100 silicon wafers are cleaned with the standard technology of Radio Corporation of America (RCA), and then photolithography is performed on the silicon wafers, and plasma etching is performed using negative positive resists , the etching depth is 10 microns, and then oxidized. The process conditions are: furnace temperature: 1180 ° C, oxygen flow rate 500ml/min, oxidation time: first dry oxygen oxidation for 10 minutes, then wet oxygen oxidation for 50 minutes, and finally dry oxygen oxidation for 10 minutes Minutes, the thickness of the grown silicon dioxide is 1.1 μm; the electrode gap is at the nanoscale or deep submicron scale.

Coating sensitive materials between the electrode gaps to form a sensor probe, and making a new type of sensor through electrode extraction.

The present invention has the following characteristics:

(1) The design idea is novel, the nano-electrode spacing is realized by micron photolithography technology, and the graphics are arranged in an array, which is suitable for all sensor probes that require nano-structured electrode gaps;

(2) The electrodes are symmetrical, the distribution of sensitive materials is regular and orderly, and the distribution area is very uniform;

(3) The requirements for production equipment and environment are not high, and the production cost is relatively low.

Description of drawings

Fig. 1 is the schematic diagram of electrode layout unit of the present invention

Fig. 2, Fig. 3, Fig. 4, Fig. 5 and Fig. 6 are schematic diagrams of various electrode patterns on the electrode layout of the present invention. The dark part is the part that needs to be etched to form the electrode gap;

Fig. 7 is a four-inch electrode layout of the present invention, and each unit is the unit shown in Fig. 1;

Figure 8, Figure 9, and Figure 10 are schematic diagrams of the oxidation of the present invention, the dark part is silicon dioxide, and the light part is silicon;

Fig. 11 is the morphological figure under the optical microscope after the photolithography of the electrode of the present invention

Detailed ways

The present invention will be further described below in conjunction with the accompanying drawings.

Concrete steps of the present invention are as follows:

a) Use deep submicron technology to design the electrode gap size. The size of each electrode gap is 1.2-2.8 microns. Refer to Figure 1. The number is used to distinguish the size of the electrode gap. The larger the number, the smaller the electrode gap. Specifically: 1 represents a gap of 2.8 microns; 2 represents 2.4 microns; 3 represents 2 microns, 4 represents 1.8 microns; 5 represents 1.6 microns; 6 represents 1.4 microns; 7 represents 1.2 microns. The dark color is the electrode gap that needs to be etched. After the oxidation process, the gap size of the electrode pattern can reach the meter level; the best electrode size can be selected during the test.

Design electrode patterns with different shapes and gaps, with high integration, and can form a contrast between each electrode pattern. Since the electric field distributions formed by different electrode gaps and electrode patterns are different, the properties of the finally formed devices are also different. The influence of the curvature of the figure is also considered in the design. Refer to Figure 2, Figure 3, Figure 4, Figure 5 and Figure 6. The graphics are point-to-point, point-to-flat, and zigzag. The larger the number, the smaller the angle. There are mainly 90 degrees, 45 degrees and 60 degrees; for squares, interdigitated figures, except that the relative gap is as described in step a, the spacing between adjacent parallel sides is also designed according to step a. This actually provides a broad platform for the fabrication and testing of micro-nano sensors, enabling researchers to choose electrodes with appropriate shapes and gaps to make sensor probes. The designed electrode patterns mainly include: interdigitated electrodes, zigzag electrodes, square-to-point electrodes, square-to-point electrodes, point-to-flat electrodes and so on.

Referring to Figure 1, each unit is 5800 microns × 5800 microns, the width of the scribing groove is 100 microns, and the cross alignment mark is set on the diagonal, the length and width are 50 microns, and the small squares along the sides of each unit are metal layers, which are used as electrode leads. The size is 500 microns × 500 microns, and the graphics in the middle, electrodes and electrode gaps are arranged as a whole, which are divided into rectangular arrangement and square arrangement: in the rectangular arrangement, the gap size is 2.8 microns, 2.4 microns, 2 microns or 1.8 microns, The size of the overall arrangement is 220 microns × 330 microns, covered with a metal layer, the size is 220 microns × 350 microns; the size of the gap is 1.6 microns, 1.4 microns or 1.2 microns (except interdigitated), the overall arrangement size is 200 microns x 400 microns, and the metal layer covering it is 220 x 420 microns. For the interdigitated shape with a gap size of 1.6 microns, 1.4 microns or 1.2 microns, the overall arrangement size of electrodes and electrode gaps is 200 microns × 370 microns, and the covered metal layer is 220 microns × 380 microns; In the case of 1.2 to 2.8, the size of the overall arrangement of electrodes and electrode gaps is 350 microns x 350 microns, covered with a metal layer, the size of which is 380 microns x 380 microns. 184 identical units are set on a 4-inch silicon wafer, which is suitable for photolithography of 4-inch and smaller silicon wafers.

Referring to Figure 7, a total of 184 identical units shown in Figure 1 can be obtained on a 4-inch silicon wafer.

After the layout design is completed, electron beam plate making is used; the 2-inch P-type 100 silicon wafer is cleaned with the standard process method of Radio Corporation of America (RCA), and then the silicon wafer is photoetched, and plasma etching is carried out by using negative positive photoresist , the etching depth is 10 microns, and then oxidized. The process conditions are: furnace temperature: 1180°C, oxygen flow rate 500ml/min, oxidation time: first dry oxygen oxidation for 10 minutes, then wet oxygen oxidation for 50 minutes, and finally dry oxygen oxidation In 10 minutes, the thickness of the grown silicon dioxide is 1.1 μm; the electrode gap is at the nanoscale or deep submicron scale. Coating sensitive materials between the electrode gaps to form a sensor probe, and making a new type of sensor through electrode extraction.

Referring to Figure 8, Figure 9 and Figure 10, the layout design ideas and methods are explained by using L-EDIT layout software. The principle of using micron design ideas to form nanoscale electrode spacing comes from the process of silicon substrate During oxidation, part of the raw material of the grown oxide layer comes from the incoming oxygen, and the other part comes from the silicon substrate. For every unit of 1 oxide layer grown, 0.44 units of the silicon substrate will be consumed. On the original plane A silicon dioxide layer of 0.56 units is grown (the dark part in Figure 8), which is commonly known as "eating half and growing half" in technology; if the designed electrode is oxidized in this way, the electrode gap can be significantly reduced (Figure 9), To achieve the electrode gaps of various sizes we need.

Different electrode structures have different contact areas with oxygen in an oxygen atmosphere, and the resulting oxidation effects are also different. In order to investigate the influence of the electrode structure on the oxidation effect, electrode structures of different shapes were designed; the main types are as follows: (1) pointed to flat (Fig. 2); (2) flat to flat (Fig. 3); (3) fork Finger-shaped (Figure 4); (4) Point to Point (Figure 5, Figure 6). In each figure, different angles, different widths and different lengths are designed respectively, so as to be used in sensors with different requirements in the future, especially the selection of micro-nano sensor probes. Moreover, the different designs of electrode shapes and parameters are conducive to observing and discussing which structure has the best effect after oxidation.

According to the results of the experimental test, the interdigitated electrode pattern can make the sensitive material coated therebetween distribute most uniformly; while the electric field intensity formed by the tip of the zigzag electrode is the largest and the sensitivity is the highest.

Figure 1 is the situation in a unit of the designed layout, the dark color is the electrode gap, and the light color is the metal layer.

Figure 7 is a general view of the 4-inch electrode layout, and a total of 184 identical units as shown in Figure 1 can be obtained on a 4-inch silicon wafer.

The numbers are used to distinguish the designed electrode gap size, the larger the number, the smaller the electrode gap. Specifically ranging from 2.8 to 1.2 microns. The surrounding electrodes are test electrodes, which are covered with metal and drawn out to measure various electrical properties; the middle electrodes are observation electrodes, which are used to observe the electrode effect after oxidation.

Each unit is 5800 microns × 5800 microns, the width of the scribing groove is 100 microns, and the cross alignment mark is set on the diagonal, the length and width are 50 microns, and the small squares along the sides of each unit are metal layers, which are used as electrode lead patterns, and the size is 500 microns. ×500 microns, the graphics in the middle, the overall arrangement of electrodes and electrode gaps are divided into rectangular arrangement and square arrangement: in the rectangular arrangement, among the zigzag, square-to-pointed, square-to-square and pointed-to-flat electrodes, the gap size For 2.8 microns, 2.4 microns, 2 microns or 1.8 microns, the overall arrangement size is 220 microns × 330 microns, covered with a metal layer, the size is 220 microns × 350 microns; the overall arrangement size of other gap sizes is 200 microns × 400 microns, and the overlying metal layer is 220×420 microns. The design of the interdigitated electrode is quite special, the electrode gap size is 1.6 micron, 1.4 micron, 1.2 micron, the overall arrangement size of the electrode and the electrode gap part is 200×370, and the covered metal layer is 220 micron×380 micron; square type arrangement Among them, the electrodes and the electrode gaps are arranged as a whole, with a size of 350 microns x 350 microns, covered with a metal layer, with a size of 380 microns x 380 microns. 184 identical units are set on a 4-inch silicon wafer, which is suitable for photolithography of 4-inch and smaller silicon wafers.

After the design, the photolithography plate is made. This plate is made by electron beam exposure, with a minimum line width of 1.2 microns. It adopts 2-plate technology and is a negative plate. Positive photolithography is used in lithography, which has low toxicity, less harm to the human body, and is easy to develop.

Take making this electrode on the P-type (100) silicon chip of 2 inches as an example, elaborate the feasibility of the present invention:

(1), first carry out silicon wafer cleaning. First place the silicon wafer in a mixture of Piranha solution (concentrated sulfuric acid: hydrogen peroxide = 3:1 (volume ratio)), and heat to remove various inorganic impurities and organic contamination such as photoresist. Next, the standard RCA cleaning process is adopted: No. 1 liquid (27% NH ₄ OH: 30% H ₂ O ₂ : deionized water = 1: 2: 5), No. 2 liquid (37% HCl: 30% H ₂ O ₂ : deionized water=1:2:8) to clean the silicon wafer. Finally, rinse with a large amount of deionized water and dry to complete the silicon wafer cleaning.

(2), positive photolithography

Positive photoresist is used. Firstly, HMDS is evenly coated on the surface of the wafer, and then a layer of positive photoresist is evenly coated on it, and then pre-baked. The drying temperature is 80°C, and the drying time is 10-20 minutes. Afterwards, photolithography is carried out, and development is carried out in NaOH solution. After development, the film is hardened at a temperature of 120° C. for 20 minutes. At this point, the entire glue coating photolithography process is completed.

(3), oxidation

This is a mature process, and the dried silicon wafer is placed in an oxidation furnace for oxygen thermal oxidation. Its process conditions: Furnace temperature: 1180°C, oxygen flow rate 500ml/min, oxidation time: first dry oxygen oxidation for 10 minutes, then wet oxygen oxidation for 50 minutes, and finally dry oxygen oxidation for 10 minutes, the thickness of the grown silicon dioxide is 1.1μm; the electrode gap is at the nanometer level or deep submicron level. Figure 11 shows the morphology of several typical electrodes under an optical microscope after photolithography, with a magnification of 1000 times.

Subsequent steps are conventional process steps: Au metal layer is deposited as wiring. Various sensitive materials can be coated between the electrodes for sensor testing.

Principle analysis

Oxidation theory analysis:

The silicon in SiO ₂ grown by the thermal oxidation method comes from the silicon surface, that is, the silicon on the silicon surface is transformed into the components in SiO ₂ through chemical reaction. In this way, as the reaction progresses, the position of the silicon surface moves toward the inner direction of the silicon. Therefore, the thermal oxidation of silicon will have a clean interface, and the contaminants in the oxidant will remain on the surface of SiO ₂ . We know that the molecular density of amorphous SiO ₂ N _SiO2 = 2.2×10 ²² /cm ³ , each SiO ₂ molecule contains a silicon atom, so the atomic density of silicon contained in SiO ₂ is also 2.2×10 ²² /cm ³ . The atomic density of silicon crystal N _Si =5.0×10 ²² /cm ³ . If there is no SiO ₂ on the surface of the silicon wafer, and a SiO ₂ layer with a thickness of X ₀ is grown, the position of the silicon surface will change due to the conversion of the surface silicon into the components in SiO ₂ . The changed position of the silicon surface is at X below the original position, as shown in Fig. 9 and Fig. 10 .

The thickness is X ₀ , the number of molecules of SiO ₂ contained in the body with an area of one square centimeter is N _SiO2 ·X ₀ , and this value should be equal to the number of silicon atoms N _Si ·X in SiO ₂ , namely

N _SiO2 ·X ₀ ＝N _Si ·X

The change amount X of silicon surface position before and after oxidation is

X＝N _SiO2 X ₀ /N _Si

Substituting the values of N _SiO2 and N _Si , we get

X＝0.44X ₀

It can be known from the above formula that to grow a unit thickness of SiO ₂ , it is necessary to consume 0.44 unit thickness of the silicon layer.

Claims (1)

1, a kind of preparation method of micro-nano gap electrode is characterized in that this method comprises following concrete steps:

A) electrode pattern design

Design each electrode gap size at 1.2～2.8 microns; Electrode pattern is that interdigitated, zigzag, side are to pointed, square square shaped and sharp to flat shape; Every unit is 5800 microns * 5800 microns, the scribe line width is 100 microns, the diagonal angle is provided with the cross alignment mark, length and width respectively are 50 microns, respectively little square is a metal level along the limit in the unit, draw figure as electrode, size is 500 microns * 500 microns, middle each figure, electrode and electrode gap overall alignment are divided into arrangement of rectangle class and square class and arrange: during the rectangle class is arranged, gap size is 2.8 microns, 2.4 micron, 2 microns or 1.8 microns, the overall alignment size is 220 microns * 330 microns, is coated with metal level on it, and size is 220 microns * 350 microns; Gap size is 1.6 microns, 1.4 microns or 1.2 microns, and the overall alignment size is 200 microns * 400 microns, is coated with metal level on it, and size is 220 * 420 microns; During the square class was arranged, gap size was at 1.2～2.8 microns, and the overall alignment size is 350 microns * 350 microns, is coated with metal level on it, and size is 380 microns * 380 microns; 184 same units are set on 4 inches silicon chips, are used for 4 inches and 4 inches photoetching with lower silicon slice;

B) electrode is made

Adopt electron beam plating; With the Radio Corporation of America (RCA) standard technology method 4 inches, 3 inches or 2 inches P type 100 silicon chips are cleaned, then silicon chip is carried out photoetching, adopt the positive glue of cloudy version, carry out plasma etching, etching depth is 10 microns, carry out oxidation then, its process conditions: furnace temperature: 1180 ℃ of oxygen flow 500ml/min, oxidization time: first dry-oxygen oxidation 10 minutes, wet-oxygen oxidation is 50 minutes again, dry-oxygen oxidation 10 minutes more at last, the thickness of the silica of being grown is 1.1 μ m; Electrode gap is at nanoscale or deep-submicron.

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