CN101634967A - Block management method, storage system and controller for flash memory - Google Patents
Block management method, storage system and controller for flash memory Download PDFInfo
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Abstract
A block management method and a controller and a storage system using the same are suitable for managing a plurality of physical blocks of a Multi-Level Cell (MLC) NAND (NAND) flash memory, and the physical blocks are at least grouped into a data area and a spare area, wherein each physical block comprises a plurality of page addresses, the page addresses are divided into a plurality of upper page addresses and a plurality of lower page addresses with a writing speed higher than that of the upper page addresses, the block management method comprises the steps of configuring a plurality of logical blocks for a host to access, recording the logical blocks belonging to frequently accessed blocks, and executing a special mode to store data of one logical block belonging to the frequently accessed blocks by using the lower page addresses of at least two physical blocks of the MLC NAND flash memory. Therefore, the access speed of the flash memory storage system is effectively improved.
Description
Technical field
The invention relates to a kind of block management method that is used for flash memory, and particularly relevant for a kind of multilayer storage unit (Multi Level Cell, MLC) stocking system and controller of the block management method of nand flash memory, use the method for being used for.
Background technology
Digital camera, mobile phone camera and MP3 are very rapid in growth over the years, make the consumer also increase rapidly the demand of Storage Media.Because flash memory (Flash Memory) has that data are non-volatile, power saving, volume is little and the characteristic of no mechanical structure etc., suitable portable applications, the most suitable being used on the battery-powered product of this class Portable.Storage card be exactly a kind of with the storage device of non-(NAND) flash memory as Storage Media.Because storage card volume low capacity is big and easy to carry, so be widely used in the storage of individual significant data.Therefore, the flash memory industry becomes a ring quite popular in the electronic industry in recent years.
In general, the flash memory of flash memory system can be divided into a plurality of physical blocks and this a little physical blocks can be grouped into data field (data area) and spare area (spare area).Classify as and to store in the physical blocks of data field by writing the valid data that instruction writes, and the physical blocks in the spare area is the physical blocks in the replacement data district when writing instruction in execution.Specifically, when flash memory system receive main frame writing the instruction and desire is write fashionable to the physical blocks of data field, flash memory system can from the spare area, extract a physical blocks and the physical blocks that will in the data field, desire to write in effective legacy data write to the physical blocks of from the spare area, extracting with the new data of desiring to write and the physical blocks that will write new data is associated as the data field, and the physical blocks of data field is erased and is associated as the spare area originally.In order to allow main frame access successfully with the physical blocks of the mode storage data of rotating, flash memory system can provide logical blocks to main frame.That is to say, flash memory system can reflect rotating of physical blocks by the mapping relations between the physical blocks of record in logical blocks and physical blocks mapping table and renewal logical blocks and data field, so main frame only need write and flash memory system can read or write data to the physical blocks of being shone upon according to logical blocks and physical blocks mapping table at providing logical blocks.
Yet, improving and when making that the design capacity of each physical blocks can be increasing, also cause the above-mentioned time of moving effective legacy data relatively to increase and reduce the usefulness of system on the flash memory processing procedure.Particularly, when being used as the Storage Media that computer operating system is installed when flash memory system, operating system meeting regular ground access particular data (for example, file configuration table (File Allocation Table, FAT), the speed that therefore promotes this type of data access is considerable.
Summary of the invention
In view of this, the invention provides a kind of block management method, it can promote the speed of the data access of MLC nand flash memory effectively.
In addition, the invention provides a kind of controller, it uses above-mentioned block management method to manage the MLC nand flash memory, to promote the speed of data access effectively.
Moreover, the invention provides a kind of stocking system, it uses above-mentioned block management method to manage the MLCNAND flash memory, to promote the speed of data access effectively.
The present invention proposes a kind of block management method, be applicable to management multilayer storage unit (Multi LevelCell, MLC) a plurality of physical blocks and this a little physical blocks with non-(NAND) flash memory are grouped into data field and spare area at least, wherein each physical blocks comprises that a plurality of page addresses and this a little page addresses divide into a plurality of page addresss and a plurality of following page addresss of writing speed faster than page address those on gone up, and this block management method comprises that a plurality of logical blocks of configuration are for the main frame access, record belongs to the logical blocks of frequent access block and carries out special pattern stores a logical blocks that belongs to the frequent access block at least with the following page address of two physical blocks of use MLC nand flash memory data.
In one embodiment of this invention, the above-mentioned record step that belongs to the logical blocks of frequent access block comprises the usage count of writing down each logical blocks and according to sort all logical blocks and be the frequent access block from the logical blocks that the logical blocks with maximum usage count begins to write down in regular turn pre-defined number of usage count.
In one embodiment of this invention, above-mentioned execution special pattern comprises with the data step that the following page address of two physical blocks using the MLC nand flash memory stores a logical blocks that belongs to the frequent access block whether the logical blocks that judgements desired to write when main frame writes data to each logical blocks belongs to the frequent access block, wherein when the logical blocks of desiring to write belongs to the frequent access block then from this spare area two physical blocks of extraction and only the following page address of two physical blocks being extracted of use write data.
In one embodiment of this invention, the step of the usage count of above-mentioned each logical blocks of record comprises the usage count of upgrading these a little logical blocks when main frame writes data to logical blocks.
In one embodiment of this invention, above-mentioned block management method also comprises when the logical blocks of desiring to write belongs to the frequent access block two physical blocks that data are to use the following page address of two physical blocks being extracted to store and record stores the data of the logical blocks of desiring to write in the special pattern mapping table of the logical blocks that in logical blocks and physical blocks mapping table record special pattern mark is desired to write with expression.
In one embodiment of this invention, above-mentioned block management method comprises that also the following page address of two physical blocks ought using the MLC nand flash memory stores the data of the logical blocks of desiring to write, when the while main frame desires to write to this logical blocks is carried out the random writing pattern, from the spare area, extract another physical blocks and in another physical blocks of being extracted, temporarily store the data that logical blocks write of main frame desiring to write.
In one embodiment of this invention, above-mentioned block management method comprises that also the last page address of the physical blocks that then physical blocks of extraction and use are extracted from the spare area when the logical blocks of desiring to write does not belong to the frequent access block writes data with following page address.
In one embodiment of this invention, whether above-mentioned record belongs to usage count that the step of the logical blocks of this frequent access block comprises the usage count of writing down each logical blocks and judge each logical blocks greater than the frequent threshold value of access, wherein usage count is recorded as the frequent access block greater than each logical blocks of the frequent threshold value of access.
The present invention also provides a kind of flash memory system and its controller.This flash memory system comprises MLCNAND flash memory, transmission connecting interface and controller, wherein the MLC nand flash memory of flash memory system has a plurality of physical blocks and this a little physical blocks are grouped into data field and spare area at least, and each physical blocks comprises that a plurality of page addresses and this a little page addresses divide into a plurality of page addresss and a plurality of time page addresss of writing speed faster than page address on those gone up.This controller comprises microprocessor unit and is coupled to the flash interface of microprocessor unit, memory buffer and memory management module.Particularly, this memory management module has a plurality of machine instructions that can be carried out by microprocessor unit to finish above-mentioned block management method.
In one embodiment of this invention, above-mentioned flash memory system is carry-on dish, flash memory cards or solid state hard disc.
The present invention also provides a kind of controller, be applicable to flash memory system with multilayer storage unit and non-flash memory, wherein this multilayer storage unit and non-flash memory have a plurality of physical blocks and those physical blocks are grouped into data field and spare area at least, each physical blocks comprises that a plurality of page addresses and those page addresses divide into a plurality of page addresss and a plurality of time page addresss of writing speed faster than page address on those gone up, and this controller comprises: microprocessor unit; Flash interface is coupled to this microprocessor unit; Memory buffer is coupled to this microprocessor unit; And memory management module, be coupled to this microprocessor unit and have a plurality of machine instructions that can be carried out by this microprocessor unit this flash memory is carried out a plurality of block management steps, those block management steps comprise: dispose a plurality of logical blocks for the main frame access; Record belongs to the logical blocks of frequent access block; And carry out special pattern stores the logical blocks that belongs to this frequent access block at least with the following page address of two physical blocks using this multilayer storage unit and non-flash memory respectively data.
The present invention also provides a kind of stocking system, comprise: multilayer storage unit and non-flash memory, have a plurality of physical blocks and those physical blocks are grouped into data field and spare area at least, wherein each physical blocks comprises that a plurality of page addresses and those page addresses divide into a plurality of page addresss and a plurality of time page addresss of writing speed faster than page address on those gone up; The transmission connecting interface; And controller, be electrically connected to this multilayer storage unit and non-flash memory and this transmission connecting interface, a plurality of machine instructions of this controller meeting execute store administration module are to carry out a plurality of block management steps, and those block management steps comprise: dispose a plurality of logical blocks for the main frame access; Record belongs to the logical blocks of frequent access block; And carry out special pattern stores the logical blocks that belongs to this frequent access block at least with the following page address of two physical blocks using this multilayer storage unit and non-flash memory respectively data.
The present invention stores the data of a logical blocks because of the following page address (that is, the quick page) that adopts two physical blocks, so can promote the access speed of flash memory system effectively.
For above-mentioned feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and cooperate appended graphicly, be described in detail below.
Description of drawings
Fig. 1 is the summary calcspar that illustrates flash memory system according to the embodiment of the invention.
Fig. 2 A is the programming synoptic diagram that illustrates the MLC nand flash memory.
Fig. 2 B is the example arrangement of last page address and following page address that illustrates the physical blocks of MLC nand flash memory according to the embodiment of the invention.
Fig. 3 A, 3B and 3C illustrate the synoptic diagram that the physical blocks of flash memory is rotated with general modfel according to the embodiment of the invention.
Fig. 4 A, 4B and 4C illustrate the synoptic diagram that the physical blocks of flash memory is rotated with special pattern according to the embodiment of the invention.
Fig. 5 A is the example that illustrates logical blocks and physical blocks mapping table according to the embodiment of the invention.
Fig. 5 B is the example that illustrates the special pattern mapping table according to the embodiment of the invention.
Fig. 6 is the process flow diagram that illustrates the block management step according to the embodiment of the invention.
[main element label declaration]
100: flash memory system
110: controller
110a: microprocessor unit
110b: memory management module
110c: flash interface
110d: memory buffer
120: the transmission connecting interface
130: flash memory
130-0,130-1,130-2,130-N: physical blocks
200: main frame
202: system region
204: the data field
206: the spare area
208: replace block
210: logical blocks
M, C, C1, C2, L: block
502: logical blocks field 502
504: the special pattern tag field
506: the physical blocks field
512: index field
514: the first special pattern block fields
516: the second special pattern block fields
S601, S603, S605, S607, S609, S611, S613, S615: block management step.
Embodiment
Fig. 1 is the summary calcspar that illustrates flash memory system according to the embodiment of the invention.Please refer to Fig. 1, flash memory system 100 comprises controller (also claiming controller system) 110, transmission connecting interface 120 and flash memory 130.
Usually flash memory system 100 can use with main frame 200, so that main frame 200 can write to data flash memory system 100 or reading of data from flash memory system 100.In the present embodiment, flash memory system 120 be solid state hard disc (Solid State Drive, SSD).But it must be appreciated that flash memory system 100 can also be storage card or carry-on dish in another embodiment of the present invention.
In the present embodiment, memory management module 110b is embodied in the controller 110 with form of firmware, for example write the instruction of program associated mechanical and (for example be stored in program storage with program language, ROM (read-only memory) (Read Only Memory, ROM)) come the real memory management module 110b that does, wherein when flash memory system 100 runnings, a plurality of mechanical orders of memory management module 110b can be loaded among the memory buffer 110d and by microprocessor unit 110a and carry out to finish above-mentioned average abrasion function, the bad block management function, service logic block and physical blocks mapping table function etc.Particularly, a plurality of mechanical orders of controller 110 by execute store administration module 110b come this to finish block management step (as shown in Figure 6) according to the embodiment of the invention.
In another embodiment of the present invention, the mechanical order of memory management module 110b can also form of firmware be stored in the specific region (for example, following system region 202) of flash memory 130.Similarly, when flash memory system 100 runnings, a plurality of machine instructions of memory management module 110b can be loaded among the memory buffer 110d and by microprocessor unit 110a to be carried out.In addition, memory management module 110b can also example, in hardware be embodied in the controller 110 in another embodiment of the present invention.
Memory buffer 110d is coupled to microprocessor unit 110a and in order to stocking system data (for example logical blocks and physical blocks mapping table) temporarily or data that main frame 200 read or write.In the present embodiment, memory buffer 110d be static RAM (static randomaccess memory, SRAM).Yet, it must be appreciated, the invention is not restricted to this, dynamic RAM (Dynamic Random Access memory, DRAM), reluctance type storer (Magnetoresistive Random Access Memory, MRAM), Ovonics unified memory (PhaseChange Random Access Memory, PRAM) or other storer that is fit to also can be applicable to the present invention.
In addition, though be not illustrated in present embodiment, controller 110 can comprise also that error correction module and power management module etc. are used to control the general utility functions module of flash memory.
Be sector (sector) size corresponding to disc driver, generally speaking, user data field D is generally 512 bytes, and redundant area R is generally 16 bytes.Just, one page is a sector.Yet, can also form one page in a plurality of sectors, for example one page comprises 4 sectors.
Generally speaking, physical blocks 130-0 to 130-N can be made up of the page address of arbitrary number, for example 64 page addresses, 128 page addresses, 256 page addresses etc.Physical blocks 130-0 to 130-N also can be grouped into several zones (zone) usually, and coming diode-capacitor storage with the zone is to operate independently of one another with the parallel degree of increase operation execution and the complexity of streamlining management in a way.
In addition, flash memory 130 is that (Multi Level Cell, MLC) with non-(NAND) flash memory, and the programming of the physical blocks of MLC nand flash memory can be divided into the multistage to the multilayer storage unit in this enforcement.For example, be example with 4 layers of storage unit, shown in Fig. 2 A, the programming of physical blocks can be divided into for 2 stages.Phase one is the part that writes of following page address (lower page), its physical characteristics is similar to individual layer storage unit (Single Level Cell, SLC) nand flash memory, page address (upper page) on just can programming after finishing the phase one wherein descends the writing speed of page address can be faster than last page address.Therefore, the speed page (that is last page address) and the quick page (that is following page address) can be divided in the page address of each physical blocks shown in Fig. 2 B.Similarly, in the case of 8 layers of storage unit or 16 layers of storage unit, storage unit can comprise more a plurality of page addresses and can be so that more the multistage writes.At this, the page address that writing speed is the fastest is called page address down, and the slower page address of other writing speed is referred to as page address.For example, last page address comprises a plurality of pages with different writing speeds.In addition, in other embodiments, last page address also can be the slowest page of writing speed, perhaps writing speed the slowest with writing speed partly faster than the writing speed page of the slow page.For example, in 4 layers of storage unit, following page address is the fastest and writing speed time fast page of writing speed, and last page or leaf then is the slowest and writing speed time slow page of writing speed.
Particularly, because a plurality of page addresses of the physical blocks of flash memory 130 can be as above-mentioned page address and the following page address divided in embodiments of the present invention, therefore can include a page address lookup table at memory management module 110b, can be recorded in wherein in each block which page address belongs to page address and which page address belongs to time page address.It must be appreciated that the last page address shown in Fig. 2 B is an example only with the configuration of following page address, the invention is not restricted to this.Therefore, when using the MLC nand flash memory of not the same page or leaf and the configuration of following page address, can use above-mentioned page address question blank to come record.
Fig. 3 A, 3B and 3C illustrate the synoptic diagram that the physical blocks of flash memory is rotated with general modfel according to the embodiment of the invention.
It must be appreciated that the physical blocks 130-0 to 130-N that operates flash memory 130 with speech such as " extraction ", " moving ", " exchange ", " cutting apart ", " divisions " when this describes the running of flash memory is a notion in logic.That is to say that the physical location of the physical blocks of flash memory is not changed, but in logic the physical blocks of flash memory is operated.What deserves to be mentioned is that the running of following physical blocks is finished by the mechanical order of controller 110 execute store administration module 110b.
Please refer to Fig. 3 A, in embodiments of the present invention, for programming (that is, write and erase) flash memory 130 efficiently, controller 110 can logically be grouped into the physical blocks 130-1 to 130-N of flash memory 130 system region 202, data field 204 and spare area 206.In general, the physical blocks that belongs to data field 204 in the flash memory 130 can account for more than 90%.As previously mentioned, the physical blocks 130-1 to 130-N of flash memory 130 can provide main frame to come storage data in the mode of rotating, therefore controller 110 can provide logical blocks 210 to main frame carrying out data access, and write down the physical blocks that logical blocks is shone upon by service logic block and physical blocks mapping table.
Physical blocks in the system region 202 is in order to the register system data, and system data for example is about the mapping table (mapping table) of page address number, record logical blocks and the physical blocks mapping relations of the number of regions of flash memory 130, physical blocks number that each is regional, each physical blocks etc.
Physical blocks in the data field 204 is in order to store user's data, in general is exactly the block that the logical blocks 210 of 200 accesses of main frame is shone upon.
Therefore physical blocks in the spare area 206 is in order to the physical blocks in the replacement data district 204, and the physical blocks in spare area 206 be sky or spendable block, i.e. no record data or be labeled as invalid data useless.
Specifically, because only can programme once in each address in flash memory, therefore if will be when writing Data Position and write data once more, the operation that execution is earlier erased.Yet the flash memory unit of writing is the page as previously mentioned, and it is less than being the unit of erasing of unit with the physical blocks.Therefore, if will carry out the erase operation for use of physical blocks the time, must be first the data of the effective page address in the physical blocks of desiring to erase be copied to the erase operation for use that just can carry out physical blocks after other physical blocks.
For example, when main frame desired to write the logical blocks L of data to logical blocks 210, controller 110 can learn that logical blocks L is the physical blocks M in the mapping (enum) data district 204 at present by logical blocks and physical blocks mapping table.Therefore, flash memory system 100 will upgrade the data among the physical blocks M, during, controller 110 meeting extracts physical block C from spare area 206 replace the physical blocks M of data field 204.Yet, when new data being gone into, can at once all valid data among the physical blocks M not moved to physical blocks C and the physical blocks M that erases to physical blocks C.Specifically, controller 110 can be copied to physical blocks C (as (a) of Fig. 3 B) with desiring to write page address valid data (i.e. page or leaf P0 and P1) before among the physical blocks M, and new data (being page or leaf P2 and the P3 of physical blocks C) is write to C block (as (b) of Fig. 3 B).At this moment, the physical blocks C that will contain effective legacy data and the new data that writes of part temporarily is associated as replacement physical blocks 208.Therefore this is because the valid data among the physical blocks M might become invalidly in next operation (for example, writing instruction), at once all valid data among the physical blocks M is moved to replacement physical blocks C and may be caused meaningless moving.In this case, the content integration of physical blocks M and replacement physical blocks C gets up to be only the complete content of the mapping logic block L of institute.These mother and child blocks (that is, physical blocks M and replacement physical blocks C can decide according to the size of memory buffer 110d in the controller 110, for example generally can use five groups and do in fact by) instantaneous relation.The operation of temporarily keeping the instantaneous relation of this kind generally can be described as unlatching (open) mother and child blocks.
Afterwards, in the time physical blocks M really need being merged with the content of replacing physical blocks C, controller 110 just can be put in order physical blocks M and replacement physical blocks C and be a block, promotes the service efficiency of block thus, and the operation of this merging can be described as again closes (close) mother and child blocks.For example, shown in Fig. 3 B (c), when closing mother and child blocks, controller 110 can (that is, page or leaf P4～PN) be copied to and replaces physical blocks C, then physical blocks M is erased and is associated as spare area 206 with remaining valid data among the physical blocks M, simultaneously, to replace physical blocks C and be associated as data field 204, and in logical blocks and physical blocks mapping table, the mapping of logical blocks L be changed to physical blocks C, finish the operation of closing mother and child blocks thus.
Since the programming specification requirement of flash memory 130 must begin to write to last page from first page of each physical blocks and the condition of only can programme once in each position (promptly by only can " 1 " becoming " 0 ") under, in case after the page address of storer physical blocks writes data, carry out the step shown in Fig. 3 B again if the data that the desire renewal has write just must be extracted a physical blocks as shown in Figure 3A from spare area 206.Therefore, do not carrying out when physical blocks before (c) shutoff operation of Fig. 3 B (promptly be in shown in (b) of Fig. 3 B instantaneous), and the data that take place must renewal just to have moved are (for example during the P0 shown in Fig. 3 B (a)～P1), then the legacy data of being moved just must be moved once again, and this is called at random (Random) when writing pattern.
For example, (File Allocation Table FAT) comes storage medium management, and wherein the access of FAT data is very frequent generally can to use file configuration table in storage device.Therefore, when showing, access FAT may enter the random writing pattern because bringing in constant renewal in the data of just having moved.When entering above-mentioned random writing pattern, controller 110 can directly write data sequentially and not carry out moving operation as (a) described valid data of Fig. 3 B in replacing physical blocks C, to avoid constantly repeating the operation of Fig. 3 A and Fig. 3 B under the random writing pattern.And, after the random writing pattern finishes, from spare area 206, extract a physical blocks again and put in order also physical blocks M and the valid data of replacing physical blocks C.At this, the replacement physical blocks C that enters the random writing pattern also is called as chaotic sub-block.
In addition, when if 200 couples of logical blocks L of main frame constantly write the data of a discontented page in another embodiment, controller 110 can extract a physical blocks again as temporary physical blocks from spare area 206, and the data that will be discontented with a page write in the page of temporary physical blocks in order, and in after when the end mother and child blocks concerns, just carry out the integration of valid data.
For example, shown in Fig. 3 C, work as above-mentioned unlatching mother and child blocks (promptly, physical blocks M with replace physical blocks C) the logical blocks L of instantaneous relation when entering the random writing pattern, controller 110 can extract a physical blocks again as temporary physical blocks T from spare area 206, and during this random writing pattern, 200 couples of logical blocks L of main frame write data and can temporarily be stored among the temporary physical blocks T.Afterwards, when finishing the random writing pattern, the data of temporary physical blocks T can be integrated into replaces physical blocks C, and temporary physical blocks T can be erased and move and is back to spare area 206.
In the present embodiment, except coming the data of stored logic block L with the general modfel shown in Fig. 3 A and Fig. 3 B, controller 110 also can be carried out the mechanical order of block management module comes the stored logic block with special pattern data.Specifically, in special pattern, the data that controller 110 can use the following page address of two replacement physical blocks to come the stored logic block.As mentioned above, because the writing speed of page address is faster than last page address down, therefore only following page address comes storage data will improve the speed of data access.Yet, owing to belong to the sum of the page address of page address down in the present embodiment in physical blocks and be half that accounts for a physical blocks, therefore in the special pattern of present embodiment, can store the data of a logical blocks with the following page address of two physical blocks, wherein, what deserves to be explained is, the page sum of nextpage also can be the 1/N of physical blocks, and N is a natural number.
Fig. 4 A, 4B and 4C illustrate the synoptic diagram that the physical blocks of flash memory is rotated with special pattern according to the embodiment of the invention.
Please refer to Fig. 4 A, for example when main frame desired to write the logical blocks L of data to logical blocks 210, controller 110 can learn that logical blocks L is the physical blocks M in the mapping (enum) data district 204 at present by logical blocks and physical blocks mapping table.Therefore, flash memory system 100 will upgrade the data among the physical blocks M, during, controller 110 can be from spare area 206 extracts physical block C1 and physical blocks C2 replace the physical blocks M of data field 204.Similarly, when new data being write to physical blocks C1 and physical blocks C2, controller 110 can not moved all valid data among the physical blocks M at once to physical blocks C1 and physical blocks C2 and the physical blocks M that erases, and can temporarily keep the relation of mother and child blocks (that is, physical blocks M, replacement physical blocks C1 and replacement physical blocks C2) as mentioned above.
During logical blocks is to be in special pattern (promptly, logical blocks is that the following page address with two physical blocks comes storage data) and be to be in the example of instantaneous relation of above-mentioned mother and child blocks, when if this logical blocks enters above-mentioned random writing pattern, similarly, controller 110 can extract a physical blocks and temporarily store the data of desiring to write as temporary physical blocks from spare area 206, and just carries out the integration of valid data when the random writing pattern finishes.
For example, shown in Fig. 4 B, work as above-mentioned unlatching mother and child blocks (promptly, physical blocks M, replace physical blocks C1 and replace physical blocks C2) the logical blocks L of instantaneous relation when entering the random writing pattern, controller 110 can extract a physical blocks again as temporary physical blocks T from spare area 206, and during this random writing pattern, 200 couples of logical blocks L of main frame write data and can temporarily be stored among the temporary physical blocks T.Afterwards, when finishing the random writing pattern, the data of temporary physical blocks T can be integrated into replaces physical blocks C1 and replaces physical blocks C2, and temporary physical blocks T can be erased and move and is back to spare area 206.
In the present embodiment, because logical blocks can be in general modfel or special pattern, so controller 110 must know logical blocks that whether logical blocks is in special pattern and is in special pattern is to use the following page address of which two physical blocks.Fig. 5 A is the example that illustrates logical blocks and physical blocks mapping table according to the embodiment of the invention.Please refer to Fig. 5 A, in the present embodiment, logical blocks and physical blocks mapping table comprise logical blocks field 502, special pattern tag field 504 and physical blocks field 506.The physical blocks that physical blocks field 506 is shone upon in order to the logical blocks that is write down in the record logical blocks field 502.Special pattern tag field 504 is to be in general modfel or special pattern in order to the logical blocks of this notes record of mark, represent when the special pattern tag field is registered as " 0 " that wherein the pairing logical blocks of this notes record is to be in general modfel, and represent that when this special pattern tag field is registered as " 1 " the pairing logical blocks of this notes record is to be in special pattern.For example, in the example of Fig. 5 A, having write down logical blocks 0 in the first stroke map record is at general modfel and mapping physical block 125.
In addition, memory management module 110b comprises that also the special pattern mapping table is in the physical blocks that the logical blocks of special pattern is shone upon in order to record in the present embodiment.Fig. 5 B is the example that illustrates the special pattern mapping table according to the embodiment of the invention.Shown in Fig. 5 B, the special pattern mapping table comprises index field 512, the first special pattern block field 514 and the second special pattern block field 516.Index field 512 is in order to be recorded in the index value of every notes record in the special pattern mapping table, and the first special pattern block field 514 and the second special pattern block field 516 are in order to write down employed two physical blocks of this notes record.Particularly, the index value of index field can be recorded in the physical blocks field in logical blocks and the physical blocks mapping table.Just, when logical blocks is marked as when being in special pattern, controller 110 can find two physical blocks of being shone upon by the value of physical blocks field in logical blocks and the physical blocks mapping table to the special pattern mapping table.For example, please refer to the example of Fig. 5 A and Fig. 5 B, having write down logical blocks 1 in second map record of Fig. 5 A is at special pattern, and has write down the index value 0 of special pattern mapping table in physical blocks field 506.Base this, the record that inquires index value 0 again in the record by the special pattern mapping table comprises physical blocks 98 and physical blocks 102.Base this, just can learn that by the inquiry of logical blocks and physical blocks mapping table and special pattern mapping table logical blocks 1 is to use the following page address of physical blocks 98 and physical blocks 102 to come storage data.
What deserves to be mentioned is, because the physical blocks of spare area 206 is limited, and the load that every increase by one notes record will increase flash memory system 100 in the special pattern mapping table (for example, need bigger memory buffer 110d), therefore can limit the number of the logical blocks of using special pattern in embodiments of the present invention, the pre-defined number that for example uses the logical blocks of special pattern in the present embodiment is 10.Base this, controller 110 can select the logical blocks of main frames 200 frequent accesses to carry out special pattern in the present embodiment.
In the present embodiment, when flash memory system 100 starts, the mechanical order of the microprocessor unit 110a meeting execute store administration module 110b of controller 110 is to set up the usage count table, the usage count that wherein can write down each logical blocks in memory buffer 110d.For example, when 200 pairs of a certain logical blocks of main frame write data, then the usage count of this logical blocks will be added 1.Except the usage count of writing down each logical blocks, judge that according to usage count normal several logical blocks of using can be recorded in memory buffer 110d as the frequent access block in the present embodiment.For example, can begin 10 logical blocks of record among memory buffer 110d from logical blocks according to all usage counts ordering from large to small in the present embodiment with maximum usage count, and when the usage count table was updated, the frequent access block that is recorded among the memory buffer 110d will be updated.In addition, in the present embodiment, the usage count table is to rebulid when flash memory system 100 each starts, and in other words, all count values can make zero again when each start and count.Yet, the invention is not restricted to this, the usage count table also can be stored to before flash memory system 100 start in the system region 202 so that continue counting during the next time start.
Base this, write fashionablely when 200 pairs of logical blocks of main frame in embodiments of the present invention, controller 110 just can judge whether this is desired the logical blocks execution special pattern that writes according to the frequent access block that writes down in memory buffer 110d.
In another embodiment of the present invention, when the logical blocks during being in special pattern finished instantaneous relation of above-mentioned mother and child blocks, this logical blocks still can be kept and use the following page address of two physical blocks to come storage data.For example, shown in Fig. 4 C, when finishing instantaneous relation of mother and child blocks, physical blocks M can be erased and is associated as spare area 206 and physical blocks C1 and physical blocks C2 and can be associated as data field 204 after moving of old effect data finished.That is to say the following page address of logical blocks L meeting mapping physical block C1 and physical blocks C2.Simultaneously, when main frame 200 once more desire the logical blocks that is in special pattern is carried out when writing instruction, controller 110 can judge whether this logical blocks that has been in special pattern still is the frequent access block according to the record among the memory buffer 110d.
If the logical blocks that has been in special pattern during still for the frequent access block then controller 110 can from spare area 206, extract two physical blocks physical blocks and only use the following page address of these two physical blocks to write data as an alternative.In addition, if the logical blocks that has been in special pattern during no longer for the frequent access block then controller 110 can from spare area 206, extract physical blocks physical blocks and use the last page address of this physical blocks and following page address writes data as an alternative.In other words, then this logical blocks can revert to general modfel when the logical blocks that is in special pattern no longer is the frequent access block, and no longer takies two physical blocks.
Fig. 6 is the process flow diagram that illustrates the block management step according to the embodiment of the invention.
Please refer to Fig. 6, when flash memory system 100 starts, in step S601, can dispose a plurality of logical blocks for main frame 200 accesses.Then, in step S603, can write down the usage count of each logical blocks, wherein when main frame 200 writes data to logical blocks, will upgrade the usage count of logical blocks in the present embodiment.
Afterwards, can be in step S605 according to sort all logical blocks and be the frequent access block of usage count from the logical blocks that the logical blocks with maximum usage count begins to write down in regular turn pre-defined number (for example, 10).Be that logical blocks with predetermined number is as the frequent access block in the present embodiment, but yet in another embodiment of the present invention also the setting access number of times be the frequent access block greater than the logical blocks of the frequent threshold value of particular access, but wherein the frequent threshold value of this access is to be set up on their own and dynamic change by the user.For example, the frequent threshold value of access can be made as 255.
Can wait for and the director data that writes that receives main frame 200 at step S607 middle controller 110, and can judge in step S609 whether the logical blocks of desiring to write belongs to the frequent access block.
If in step S609, judge when the logical blocks of desiring to write belongs to the frequent access block, then in step S611, from spare area 206, extract two physical blocks and only use the following page address of two physical blocks being extracted to write data.
If in step S609, judge when the logical blocks desire to write does not belong to the frequent access block, then in step S613, from spare area 206, extract physical blocks that a physical blocks and use extract on page address write data with following page address.
As mentioned above, when controller 110 was managed the physical blocks of flash memory 130 with special pattern, then controller 110 must write down relevant mapping relations in order to follow-up access.Therefore, after step S611 and step S613, can carry out the renewal of logical blocks and physical blocks mapping table and/or special pattern mapping table.For example, the block management step also is included in logical blocks and the physical blocks mapping table record special pattern mark and is to use the following page address of two physical blocks being extracted to store to be illustrated in the data that write among the step S611, and in the special pattern mapping table employed two physical blocks of record.
Afterwards, the block management step can be back to step S603 and S605 upgrades usage count and frequent access block, and awaits orders once more to receive in step S607 and instruct.Though be not illustrated among Fig. 6, the block management step that those skilled in the art can understand Fig. 6 easily can receive shutdown or power interruption instruction back end.
In sum, the present invention provides a kind of special pattern that stores the data of a logical blocks with the following page address of two physical blocks in the management of physical blocks.Base this, when carrying out access, can promote the speed of data access effectively for the logical blocks of using this special pattern.Particularly, the invention provides the logical blocks that the main frame frequent access is judged in a kind of usage count by logical blocks, by carrying out above-mentioned special pattern for the logical blocks of these a little frequent access, can be in the limited elevator system usefulness down of system resource.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; any those skilled in the art; without departing from the spirit and scope of the present invention; when can doing a little change and retouching, so protection scope of the present invention is as the criterion when looking appended the claim scope person of defining.
Claims (25)
1. block management method, the a plurality of physical blocks and those physical blocks that are applicable to management multilayer storage unit and non-flash memory are grouped into data field and spare area at least, wherein each physical blocks comprises that a plurality of page addresses and those page addresses divide into a plurality of page addresss and a plurality of time page addresss of writing speed faster than page address on those gone up, and this block management method comprises:
Dispose a plurality of logical blocks for the main frame access;
Record belongs to the logical blocks of frequent access block; And
Carry out special pattern stores the logical blocks that belongs to this frequent access block at least with the following page address of two physical blocks using this multilayer storage unit and non-flash memory respectively data.
2. block management method according to claim 1, the step that wherein writes down the logical blocks that belongs to this frequent access block comprises:
Write down the usage count of each logical blocks; And
According to sort those logical blocks and be this frequent access block of those usage counts from the logical blocks that the logical blocks with this maximum usage count begins to write down in regular turn pre-defined number.
3. block management method according to claim 1, wherein carry out this special pattern and comprise with the data step that the following page address of two physical blocks using this multilayer storage unit and non-flash memory respectively stores the logical blocks that belongs to this frequent access block:
When writing data to each logical blocks, this main frame judges whether this logical blocks of desiring to write belongs to this frequent access block; And
When this logical blocks of desiring to write belongs to this frequent access block, then from this spare area, extract two physical blocks and only use the following page address of two physical blocks being extracted to write this data.
4. block management method according to claim 2, the step that wherein writes down the usage count of each logical blocks comprises the usage count of upgrading those logical blocks when this main frame writes data to those logical blocks.
5. block management method according to claim 3 also comprises:
Two physical blocks that record special pattern mark is to use the following page address of two physical blocks being extracted to store with the data of representing the logical blocks that this desires to write and record stores the data of this logical blocks of desiring to write in the special pattern mapping table in logical blocks and physical blocks mapping table when this logical blocks of desiring to write belongs to this frequent access block.
6. block management method according to claim 3 also comprises:
When the following page address of two physical blocks using this multilayer storage unit and non-flash memory stores the data of this logical blocks of desiring to write this main frame is carried out random writing pattern to this logical blocks of desiring to write simultaneously, from this spare area, extract another physical blocks and in another physical blocks of being extracted, temporarily store this main frame these data of desiring to write that logical blocks write.
7. block management method according to claim 3 also comprises:
The last page address of the physical blocks that then physical blocks of extraction and use are extracted from this spare area when this logical blocks of desiring to write does not belong to this frequent access block writes this data with following page address.
8. block management method according to claim 1, the step that wherein writes down the logical blocks that belongs to this frequent access block comprises:
Write down the usage count of each logical blocks; And
Whether the usage count of judging each logical blocks greater than the frequent threshold value of access, wherein this usage count is recorded as this frequent access block greater than each logical blocks of the frequent threshold value of this access.
9. controller, be applicable to flash memory system with multilayer storage unit and non-flash memory, wherein this multilayer storage unit and non-flash memory have a plurality of physical blocks and those physical blocks are grouped into data field and spare area at least, each physical blocks comprises that a plurality of page addresses and those page addresses divide into a plurality of page addresss and a plurality of time page addresss of writing speed faster than page address on those gone up, and this controller comprises:
Microprocessor unit;
Flash interface is coupled to this microprocessor unit;
Memory buffer is coupled to this microprocessor unit; And
Memory management module is coupled to this microprocessor unit and has a plurality of machine instructions that can be carried out by this microprocessor unit this flash memory is carried out a plurality of block management steps, and those block management steps comprise:
Dispose a plurality of logical blocks for the main frame access;
Record belongs to the logical blocks of frequent access block; And
Carry out special pattern stores the logical blocks that belongs to this frequent access block at least with the following page address of two physical blocks using this multilayer storage unit and non-flash memory respectively data.
10. controller according to claim 9, the step that wherein writes down the logical blocks that belongs to this frequent access block comprises:
Write down the usage count of each logical blocks; And
According to sort those logical blocks and be this frequent access block of those usage counts from the logical blocks that the logical blocks with this maximum usage count begins to write down in regular turn pre-defined number.
11. controller according to claim 9 is wherein carried out this special pattern and is comprised with the data step that the following page address of two physical blocks using this multilayer storage unit and non-flash memory respectively stores the logical blocks that belongs to this frequent access block:
When writing data to each logical blocks, this main frame judges whether this logical blocks of desiring to write belongs to this frequent access block; And
When this logical blocks of desiring to write belongs to this frequent access block, then from this spare area, extract two physical blocks and only use the following page address of two physical blocks being extracted to write this data.
12. controller according to claim 10, the step that wherein writes down the usage count of each logical blocks comprises the usage count of upgrading those logical blocks when this main frame writes data to those logical blocks.
13. controller according to claim 11, wherein those block management steps also comprise:
Two physical blocks that record special pattern mark is to use the following page address of two physical blocks being extracted to store with the data of representing the logical blocks that this desires to write and record stores the data of this logical blocks of desiring to write in the special pattern mapping table in logical blocks and physical blocks mapping table when this logical blocks of desiring to write belongs to this frequent access block.
14. controller according to claim 11, wherein those block management methods also comprise:
When the following page address of two physical blocks using this multilayer storage unit and non-flash memory stores the data of this logical blocks of desiring to write this main frame is carried out random writing pattern to this logical blocks of desiring to write simultaneously, from this spare area, extract another physical blocks and in another physical blocks of being extracted, temporarily store this main frame these data of desiring to write that logical blocks write.
15. controller according to claim 11, wherein those block management steps also comprise:
The last page address of the physical blocks that then physical blocks of extraction and use are extracted from this spare area when this logical blocks of desiring to write does not belong to this frequent access block writes this data with following page address.
16. controller according to claim 9, wherein this flash memory system is carry-on dish, flash memory cards or solid state hard disc.
17. controller according to claim 9, the step that wherein writes down the logical blocks that belongs to this frequent access block comprises:
Write down the usage count of each logical blocks; And
Whether the usage count of judging each logical blocks greater than the frequent threshold value of access, wherein this usage count is recorded as this frequent access block greater than each logical blocks of the frequent threshold value of this access.
18. a stocking system comprises:
Multilayer storage unit and non-flash memory, have a plurality of physical blocks and those physical blocks are grouped into data field and spare area at least, wherein each physical blocks comprises that a plurality of page addresses and those page addresses divide into a plurality of page addresss and a plurality of time page addresss of writing speed faster than page address on those gone up;
The transmission connecting interface; And
Controller is electrically connected to this multilayer storage unit and non-flash memory and this transmission connecting interface, and a plurality of machine instructions of this controller meeting execute store administration module are to carry out a plurality of block management steps, and those block management steps comprise:
Dispose a plurality of logical blocks for the main frame access;
Record belongs to the logical blocks of frequent access block; And
Carry out special pattern stores the logical blocks that belongs to this frequent access block at least with the following page address of two physical blocks using this multilayer storage unit and non-flash memory respectively data.
19. stocking system according to claim 18, the step that wherein writes down the logical blocks that belongs to this frequent access block comprises:
Write down the usage count of each logical blocks; And
According to sort those logical blocks and be this frequent access block of those usage counts from the logical blocks that the logical blocks with this maximum usage count begins to write down in regular turn pre-defined number.
20. stocking system according to claim 18 is wherein carried out this special pattern and is comprised with the data step that the following page address of two physical blocks using this multilayer storage unit and non-flash memory respectively stores the logical blocks that belongs to this frequent access block:
When writing data to each logical blocks, this main frame judges whether this logical blocks of desiring to write belongs to this frequent access block; And
When this logical blocks of desiring to write belongs to this frequent access block, then from this spare area, extract two physical blocks and only use the following page address of two physical blocks being extracted to write this data.
21. stocking system according to claim 19, the step that wherein writes down the usage count of each logical blocks comprises the usage count of upgrading those logical blocks when this main frame writes data to those logical blocks.
22. stocking system according to claim 20, wherein those block management steps also comprise:
Two physical blocks that record special pattern mark is to use the following page address of two physical blocks being extracted to store with the data of representing the logical blocks that this desires to write and record stores the data of this logical blocks of desiring to write in the special pattern mapping table in logical blocks and physical blocks mapping table when this logical blocks of desiring to write belongs to this frequent access block.
23. stocking system according to claim 20, wherein those block management methods also comprise:
When the following page address of two physical blocks using this multilayer storage unit and non-flash memory stores the data of this logical blocks of desiring to write this main frame is carried out random writing pattern to this logical blocks of desiring to write simultaneously, from this spare area, extract another physical blocks and in another physical blocks of being extracted, temporarily store this main frame these data of desiring to write that logical blocks write.
24. stocking system according to claim 20, wherein those block management steps also comprise:
The last page address of the physical blocks that then physical blocks of extraction and use are extracted from this spare area when this logical blocks of desiring to write does not belong to this frequent access block writes this data with following page address.
25. stocking system according to claim 18, the step that wherein writes down the logical blocks that belongs to this frequent access block comprises:
Write down the usage count of each logical blocks; And
Whether the usage count of judging each logical blocks greater than the frequent threshold value of access, wherein this usage count is recorded as this frequent access block greater than each logical blocks of the frequent threshold value of this access.
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