CN101617415B - Method for manufacturing thin film semiconductor structure - Google Patents
Method for manufacturing thin film semiconductor structure Download PDFInfo
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- CN101617415B CN101617415B CN2009800000210A CN200980000021A CN101617415B CN 101617415 B CN101617415 B CN 101617415B CN 2009800000210 A CN2009800000210 A CN 2009800000210A CN 200980000021 A CN200980000021 A CN 200980000021A CN 101617415 B CN101617415 B CN 101617415B
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 130
- 238000000034 method Methods 0.000 title claims abstract description 63
- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 239000010409 thin film Substances 0.000 title abstract description 7
- 239000000463 material Substances 0.000 claims abstract description 62
- 239000000758 substrate Substances 0.000 claims abstract description 45
- 229910052594 sapphire Inorganic materials 0.000 claims abstract description 41
- 239000010980 sapphire Substances 0.000 claims abstract description 41
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 39
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 38
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 20
- 238000005530 etching Methods 0.000 claims abstract description 12
- 238000005520 cutting process Methods 0.000 claims abstract description 6
- 239000011248 coating agent Substances 0.000 claims description 10
- 238000000576 coating method Methods 0.000 claims description 10
- 238000005498 polishing Methods 0.000 claims description 8
- 238000013517 stratification Methods 0.000 claims description 5
- 239000013078 crystal Substances 0.000 claims description 4
- 238000000227 grinding Methods 0.000 claims description 4
- 239000004038 photonic crystal Substances 0.000 claims 1
- 238000000151 deposition Methods 0.000 abstract description 4
- 239000010408 film Substances 0.000 description 9
- 238000005516 engineering process Methods 0.000 description 7
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 5
- 239000010432 diamond Substances 0.000 description 5
- 229910003460 diamond Inorganic materials 0.000 description 5
- 230000014509 gene expression Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229910010271 silicon carbide Inorganic materials 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052799 carbon Inorganic materials 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000009616 inductively coupled plasma Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 229910017083 AlN Inorganic materials 0.000 description 1
- 229910000980 Aluminium gallium arsenide Inorganic materials 0.000 description 1
- 229910005540 GaP Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910010421 TiNx Inorganic materials 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000007521 mechanical polishing technique Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000011435 rock Substances 0.000 description 1
- 238000012216 screening Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
- H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
- H10H20/018—Bonding of wafers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/01—Manufacture or treatment
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Abstract
本发明公开了制作一种薄膜氮化镓(GaN)基半导体结构的方法。依照本发明的一个实施例，方法包括的步骤：提供一个蓝宝石基板；按顺序形成一个或多个半导体层在蓝宝石基板上；蚀刻一个图案在一个或多个半导体层上；沉积一电介质层；形成一光刻胶在部分电介质层上；其中部分电介质层被沉积在一个或多个半导体层上；沉积一个底涂料；去除光刻胶层，其中在光刻胶上的底涂料也被去除；沉积一种超硬材料，其中超硬材料形成在图案上；去除蓝宝石基板。所以，超硬材料可被有选择性沉积在期望有超硬材料的区域。然后，垂直结构GaN基发光装置可以通过切割半导体结构而形成。
The present invention discloses a method for making a thin-film gallium nitride (GaN)-based semiconductor structure. According to one embodiment of the present invention, the method includes the steps of: providing a sapphire substrate; forming one or more semiconductor layers on the sapphire substrate in sequence; etching a pattern on one or more semiconductor layers; depositing a dielectric layer; forming a photoresist on a portion of the dielectric layer; wherein a portion of the dielectric layer is deposited on one or more semiconductor layers; depositing a primer; removing the photoresist layer, wherein the primer on the photoresist is also removed; depositing a superhard material, wherein the superhard material is formed on the pattern; removing the sapphire substrate. Therefore, the superhard material can be selectively deposited in the area where the superhard material is desired. Then, a vertical structure GaN-based light-emitting device can be formed by cutting the semiconductor structure.
Description
Cross reference is to related application
The application is that a part of U.S. Patent application (application number: 11/891,466, in application in Augusts in 2007 10) continues patent application (continuation-in-part), and its disclosure is attached to this paper by reference fully.
Technology
The present invention relates to field of semiconductor manufacture, particularly a kind of semiconductor making method is to produce thin-film semiconductor structures.
Background technology
In the conventional method of making flip-chip (flip-chip) light-emitting diode, the multilayer epitaxial layer is deposited on the substrate of a sapphire growth, to make an epitaxial wafer, on epitaxial wafer, makes a plurality of light-emitting diodes.Then, epitaxial wafer is cut into wafer.Be connected at least one pad of fixed pan by at least one electrode with element wafer, element wafer is connected to a fixed pan.
Film-gallium nitride (GaN) light-emitting diode has substituted the flip-chip LED element, and compare with the flip-chip LED element, film-GaN light-emitting diode has on low thermal resistance, n-type layer and the p-type layer uniform current and advantage cheaply.For film-GaN light-emitting diode, epitaxial wafer is bonded directly to a conductive carrier substrate.Then, a laser lift-off process (laser lift-off process) is used to remove sapphire substrate, stays the active region of light-emitting diode.But the shortcoming of laser-stripping method comprises needs price apparatus and processing may damage light-emitting diode.
Traditional chemical mechanical polishing (CMP) technology has been used to substitute laser lift-off technique, and it does not need laser aid, can't produce similar damage.But when implementing traditional CMP technology, if polished plane is too big, the variation on the planar thickness will cause damaging a resulting structure too greatly.So, when keeping required production standard, can't carry out the production in enormous quantities of semiconductor device.
So the known technology of making thin-film semiconductor structures can cause damaging the change with output.So, the method for needs a kind of production film gallium nitride (GaN) based semiconductor structure, it can overcome the deficiency of known method.
Summary of the invention
According to one embodiment of the present of invention, disclosed the method for a kind of making film gallium nitride (GaN) based semiconductor structure.The method comprises provides a sapphire substrate; Form one or more semiconductor layers according to priority on sapphire substrate; Etching one pattern is on one or more semiconductor layers; Deposit a dielectric layer; Form a photoresist on the part dielectric layer; Wherein the part dielectric layer is deposited on one or more semiconductor layers; Deposit a kind of primer; Remove photoresist layer, wherein the primer on photoresist also is removed; Deposit a superhard material, wherein superhard material is formed on the pattern; Remove sapphire substrate.
According to an alternative embodiment of the invention, disclosed the method for a kind of making film gallium nitride (GaN) based semiconductor structure.The method comprises provides a sapphire substrate; Form one or more semiconductor layers according to priority on sapphire substrate, one or more semiconductor layers comprise a resilient coating, a non-impurity-doped GaN layer, n-type GaN layer, an active layer and a p-type GaN layer; Etching one channel patterns is on one or more semiconductor layers; Deposit a dielectric layer; Form a photoresist on the part dielectric layer, wherein the part dielectric layer is deposited on one or more semiconductor layers; Deposit a kind of primer; Remove photoresist layer, wherein the primer on photoresist also is removed; Deposit a superhard material, wherein superhard material is formed in the groove; Etching and remove dielectric layer, and expose a p-GaN layer of one or more semiconductor layers; Form an electrically-conductive backing plate on the p-GaN layer that exposes; Remove sapphire substrate; Be etched with a n-GaN layer that exposes one or more semiconductor layers; Form a n-electrode on the n-GaN layer that exposes.
According to an alternative embodiment of the invention, disclosed a film gallium nitride (GaN) based semiconductor structure.The film GaN base semiconductor structure comprises a sapphire substrate; One or more semiconductor layers are formed on the substrate; A plurality of terminating points are formed on one or more semiconductor layers; One electrode layer is formed on one or more semiconductor layers; With an electrically-conductive backing plate that is bonded to electrode layer, wherein electrically-conductive backing plate is conduction and heat conduction.
According to an alternative embodiment of the invention, disclosed a vertical stratification gallium nitride (GaN) based light-emitting diode (LED).Vertical stratification GaN base LED comprises an electrically-conductive backing plate, and wherein electrically-conductive backing plate is conduction and heat conduction; One is bonded to the electrode layer of electrically-conductive backing plate; Be bonded to one or more semiconductor layers of electrode layer, wherein one or more semiconductor layers comprise a n-type GaN layer, an active layer and a p-type GaN layer, and wherein electrode layer is bonded to p-type GaN layer; A plurality of terminating points are formed on one or more semiconductor layers; And one the n-electrode attached to n-type GaN layer.
From the following detailed description, those skilled in the art are with other embodiments of the invention easier to understand, and wherein the embodiment of the invention is to be described by accompanying drawing.Will recognize that the present invention can be applicable to other and different embodiment, and can make change to its some details in every way, and do not break away from the spirit and scope of the present invention.
Description of drawings
Fig. 1 is the sectional view of an example semiconductor structure after implementing super flat (super flat) chemical Mechanical Polishing Technique of one embodiment of the invention.
Fig. 2 is the oblique top view that is distributed in the terminating point in the example semiconductor structure of one embodiment of the invention.
Fig. 3 is the sectional view of a semiconductor structure of one embodiment of the invention.
Fig. 4 is the sectional view of semiconductor structure after the etching of one embodiment of the invention.
Fig. 5 is the sectional view of semiconductor structure after covering diamond film of one embodiment of the invention.
Fig. 6 is the sectional view of semiconductor structure after forming first electrode layer of one embodiment of the invention.
Fig. 7 is the sectional view at conductive carrier of bonding semiconductor structure after first electrode layer of one embodiment of the invention.
Fig. 8 is the sectional view of semiconductor structure after the mechanical polishing process of one embodiment of the invention.
Fig. 9 A be one embodiment of the invention in alligatoring top light emitting zone after the sectional view of semiconductor structure.
Fig. 9 B is the sectional view at the semiconductor structure of the two-dimentional luminescent crystal of formation on the top light emitting zone of one embodiment of the invention.
Figure 10 A is the sectional view of formation second electrode of one embodiment of the invention to semiconductor structure shown in Fig. 9 A.
Figure 10 B is the sectional view of formation second electrode of one embodiment of the invention to semiconductor structure shown in Fig. 9 B.
Figure 11 A is the sectional view of the cutting drawing 10A semiconductor structure light-emitting device of one embodiment of the invention.
Figure 11 B is the sectional view of the cutting drawing 10B semiconductor structure light-emitting device of one embodiment of the invention.
Figure 12 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 13 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 14 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 15 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 16 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 17 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 18 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 19 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 20 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 21 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 22 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 23 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 24 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 25 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 26 is the sectional view of a semiconductor structure of one embodiment of the invention.
Figure 27 is the sectional view of a semiconductor structure of one embodiment of the invention.
Embodiment
In following description,, specific embodiments of the invention have been shown with reference to accompanying drawing and by describing.Will be understood that, not departing from the scope of the present invention under the situation, can make the change of structure and others, as other embodiment.And the various aspects of various embodiment and each different embodiment can be used in combination with any suitable method.So in fact accompanying drawing and describe in detail can be counted as descriptive and nonrestrictive.
The present invention relates generally to the method for a kind of making film gallium nitride (GaN) based semiconductor structure.Fig. 3 is usually directed to a kind of method of making semiconductor-based light-emitting device of first embodiment of the invention to 11B.Figure 12 to 27 describes the method for the semiconductor-based light-emitting device of making of second embodiment of the invention.For example, semiconductor-based light-emitting device is a vertical GaN-based LED.Will recognize that about the details of second embodiment of the invention with describe and can be adapted to the first embodiment of the present invention equally, vice versa.By using relevant Fig. 3, can make a vertical stratification GaN base LED to the implementation method of 11B description or the combination step of the described implementation method of relevant Figure 12 to 27 or above two kinds of methods.But, it will be recognized by those skilled in the art, also can use other method, and can not depart from the scope of the present invention.Although disclosed these manufacturing process of a light-emitting device, will recognize that the method for making a thin-film semiconductor structures also can be used for other application.So the making of a vertical stratification GaN base LED is the example that an embodiment of the invention is used.
In whole description process, use prefix " u-" to represent non-impurity-doped or doping a little, " p-" expression p-type or positive pole, and " n-" expression n-type or negative pole.
Fig. 1 is a sectional view with example semiconductor structure of a plurality of terminating points 260.Semiconductor structure also can be called as " plane " or " whole plane ", and the semiconductor structure of a flat shape makes because LED typically uses.Semiconductor structure has two distance 210, variable V 220, active region 230 (it can be the light-emitting area of a LED), an electrode layer 240 and carriers 250 between the terminating point 260.Each terminating point has a terminating point width 270.After using mechanical thinning method, as a super graduation mechanical polishing method, to have planted into a plurality of terminating points 260, the variable V on whole plane can be controlled in the desired standard of semiconductor fabrication.
At a traditional semiconductor structure, when implementing a kind of traditional mechanical thinning technology, if polished plane is very big, when practical application, the variable V of layer thickness as shown in Figure 1 changes will be very greatly.Distance between variable V and horizontal edge is proportional.As shown in Figure 1, terminating point 260 serves as the edge on plane, thereby variable V can reduce, even the size on whole plane is very big.
According to an embodiment, the method for setting up terminating point may further comprise the steps: (a) provide first material to form ground floor; (b) provide second material to form the second layer on the one side of ground floor; (c) the etching second layer exposes the ground floor surface to produce a plurality of grooves; (d) fill up the 3rd material in a plurality of grooves, its hardness is greater than first material and second material, and the groove that fills up forms a plurality of polishing terminating points; (e) remove the 3rd material that is positioned at the groove outside, and the surface of exposing the second layer.So the present invention allows to remove subsequently first material, control variables V is in semiconductor fabrication process required standard and scope simultaneously.
Fig. 2 shows the oblique top view that a terminating point of one embodiment of the invention distributes.As mentioned above, can reduce variable V by using terminating point.So the variable V in tolerance interval can obtain by the size of control terminating point and/or the distance between the terminating point.Although normally square or girth is linear at terminating point shown in Figure 2, the terminating point in the present invention can be an Any shape, as line, point, circle, triangle or rectangle, and can be positioned at any correct position on the plane.
According to an embodiment, Fig. 3 has disclosed an enforcement of the present invention to 11B, and it is a kind of method of making thin film semiconductor's light-emitting device.The method may further comprise the steps: (a) provide first material to form ground floor 410; (b) provide second material of semi-conducting material, be used for forming the second layer 230, serve as an active region on ground floor one side (as shown in Figure 3, second material can comprise a plurality of layers, for example one or more layers p-GaN layer 420, the active layer that a plurality of quantum well 430 are arranged, and one or more layers n-GaN layer 440); (c) the etching second layer and produce a plurality of grooves 510 exposes the surface (as shown in Figure 4) of ground floor; (d) cover one deck medium 620; (e) add the 3rd material 610, its hardness is greater than first material and second material, and it also fills up groove to form a plurality of terminating points (as shown in Figure 5); (f) remove the 3rd material 610 and a layer medium 620, remove at groove with the 3rd material on the exterior domain, thereby only have terminating point 910 (shown in Figure 8) to keep, and the 4th material is provided, to form first electrode layer 710 (as shown in Figure 6) on the surface of the second layer; (g) bonding first electrode layer is on a conductive carrier 810 (as shown in Figure 7); (h) remove ground floor and expose a plurality of terminating points 910 (as shown in Figure 8); (i) after removing ground floor, form a plurality of second electrodes 1110 (as shown in figure 10) on the surface of second material.Present embodiment also comprise the alligatoring light-emitting area shown in Fig. 9 A or at the formation 2 D photon crystal 1020 shown in Fig. 9 B on light-emitting area.At last, shown in Figure 11 A and Figure 11 B, can cut and form light-emitting device.
In above-described embodiment, first material can be sapphire, silicon, AlN, SiC, GaAs or GaP; Second material can be GaN or GaInN, the second material semi-conducting material of III-V family; Etching in step (c) lining may be inductive couple plasma etching (inductively coupled plasma etching); Wherein the 3rd material can be diamond film or diamond like carbon (DLC) film; Removal in step (h) lining can be by a kind of mechanical thinning method; First electrode layer is the p-type, and the second electrode lay is the n-type.One embodiment of the present of invention are Buddha's warrior attendant rock screening(s) light-emitting diodes, and it is by reference code 1210 expressions.
The semiconductor device structure that produces according to the embodiment of the invention comprises: a conductive carrier; A semiconductor material layer; A superhard material, wherein superhard material has a surface at least near semiconductor material layer; First electrode layer is positioned at the first surface of semiconductor material layer; And the second electrode lay, be positioned at semiconductor material layer facing on the second surface of first electrode layer.For example, semiconductor material layer can be a kind of among InGaP, AlInGaN, AlInGaP, AlGaAs, GaAsP, the InGaAsP or material that other is suitable.Superhard material can be such as diamond, diamond like carbon (DLC), titanium nitride (TiNx), tungsten titanium (TiWx) alloy or other suitable material.Conductive carrier can be such as copper, silicon, carborundum, GaAs (GaAs) or other similar material.
Figure 12 is the sectional view of a semiconductor structure of one embodiment of the invention.The sectional view of semiconductor structure 1200 shows a sapphire substrate 1202 and a semiconductor layer 1204 that is grown on the sapphire substrate 1202.For example, semiconductor layer 1204 can be an InGaN layer as shown in figure 12, has 1208, one on a n-type GaN layer (n-GaN) that the active layer 1210 and a p-type GaN (p-GaN) layer 1212 of a plurality of quantum well (MQW) structure are arranged.But, to Figure 27, only show semiconductor layer 1204 for ease of clear description at Figure 13.But, should be realized that according to embodiments of the invention, any desired layer comprises one or more layers, can grow on substrate.
Usually, n-GaN layer 1208 and active layer 1210 are grown on the semiconductor substrate 1202.Other layer also can at first be grown on the semiconductor substrate 1202, and this depends on the application and the design of semiconductor structure 1200.Then, one or more p-GaN layers 1212 are grown on the active layer 1210.According to embodiments of the invention, the n-GaN layer can comprise a non-impurity-doped resilient coating that is grown on the sapphire substrate 1202, and it does not show in figure.Then, the n-GaN layer can be grown on the undoped resilient coating.
Figure 13 is the sectional view of a semiconductor structure of one embodiment of the invention.Execution is etched with sets up a pattern 1300 on semiconductor layer 1204 and expose sapphire substrate 1202.In an embodiment, pattern 1300 can be a groove shape, and its formation may be to isolate (mesa isolation) or other suitable engraving method by platform.The shape of pattern can be the shape of groove, point, hole, line or any other expectation.Those skilled in the art can use other method and the technology that is used for setting up pattern 1300.
At Figure 14 to 17 li, use one to select deposition process, pattern 1300 is filled a kind of superhard material.One protection dielectric layer 1400 is deposited on the exposing surface on semiconductor layer 1204 and process for sapphire-based plane 1202.One photoresist 1402 is patterned on semiconductor layer 1204.
With reference to Figure 15, primer 1500 is applied on the semiconductor structure 1200, and it covers photoresist 1402 and dielectric layer 1400.Adding primer 1500 is steps that form superhard material on pattern 1300.
With reference to Figure 16, remove photoresist 1402.In addition, primer 1500 and the photoresist 1402 that is positioned on the photoresist 1402 is removed together.So the part dielectric layer 1400 on semiconductor layer 1204 does not have primer 1500, it need be used for depositing superhard material.
With reference to Figure 17, superhard material 1700 is to form on pattern 1300.Because primer 1500 only is positioned on the part dielectric layer of pattern 1300, superhard material 1700 only is formed on these zones.So superhard material 1700 to the position of small part based on primer 1500 optionally deposited.Owing to do not have primer on the part dielectric layer on the semiconductor layer 1204, superhard material 1700 can not be formed on these zones.
With reference to Figure 18, the dielectric layer 1400 on semiconductor layer 1204 is removed, to expose the p-GaN layer of semiconductor layer 1204.With reference to Figure 19, utilize the metallization of p-type, first electrode layer 1900 is to form on the surface of semiconductor layer 1204 and superhard material 1700.First electrode layer 1900 can be ohmic contact and mirror layer.Referring now to Figure 20, compare with the schematic diagram of Figure 19, image has been rotated 180 °, makes sapphire substrate 1202 appear at the top of accompanying drawing now.First electrode layer 1900 is bonded on the conductive carrier 2000.According to an embodiment, conductive carrier 2000 can comprise copper, silver, gold, silicon, carborundum or GaAs (GaAs).
Figure 21 is the sectional view of a semiconductor structure of one embodiment of the invention.Figure 21 shows the sapphire substrate of having removed 1202.In an embodiment, sapphire substrate 1202 is to be removed by a mechanical thinning process, and it may comprise that usually grinding, polishing or surface chemistry mechanical polishing are as the part process.In an embodiment, use grinding, polishing and the CMP of combination to remove sapphire substrate 1202.Also can use other removal method.But the mechanical thinning method of the use embodiment of the invention can provide the advantage of speed and precision aspect.Remove sapphire substrate 1202 and expose superhard material 1700.Superhard material 1700 is a kind of materials harder than sapphire substrate 1202, and it serves as terminating point and when stops indicating mechanical thinning process.When terminating point is when being formed by a kind of superhard material, can determine in the position of terminating point end and accurately stop mechanical thinning, stay remaining semiconductor layer.Superhard material can be any than sapphire substrate and the harder suitable material of GaN layer.The example of suitable superhard material can be with reference to Fig. 3 providing to 11B.But " superhard " is not to be intended to be limited to the example that is provided, and can be any material type that is fit to be used for realizing described method.
With reference to Figure 22, the non-impurity-doped resilient coating of semiconductor layer 1204 is etched and expose n-GaN layer 2200.With reference to Figure 23, electrode 2300 is formed on the n-GaN layer 2200 that exposes.
According to one embodiment of the present of invention, as shown in figure 24, can carry out the surface texturizing 2400 or the alligatoring of light-emitting area.According to another embodiment, as shown in figure 25, also can carry out on light-emitting area, forming 2 D photon crystal 2500.
Figure 26 is the sectional view of the semiconductor structure shown in Figure 24 of one embodiment of the invention.
Figure 27 is the sectional view of the semiconductor structure shown in Figure 25 of one embodiment of the invention.
Though the described embodiment of reference describes especially and has shown the present invention, it will be understood to those of skill in the art that and can make change to its form and details, and can not break away from the spirit and scope of the present invention.For example, although described some engraving method, any suitable engraving method can be used for embodiments of the invention, such as wet etching, dry ecthing, ICP etching, PEC etching or other suitable method.For example, in an embodiment, can use higher optionally wet etching; But, also can use dry ecthing well-known to those skilled in the art and other suitable engraving method.
So, more than describes and be intended to provide example embodiment of the present invention, and the concrete example that is provided is not provided the scope of the invention.
Claims (16)
1. method of making a film gallium nitride (GaN) based semiconductor structure, the method comprises:
A sapphire substrate is provided;
On sapphire substrate, sequentially form one or more semiconductor layers;
On one or more semiconductor layers, etch a pattern;
Deposit a dielectric layer;
Form a photoresist on the part dielectric layer, wherein the part dielectric layer is deposited on one or more semiconductor layers;
Deposit a primer;
Remove photoresist layer, wherein the primer on photoresist also is removed;
Deposit a superhard material, wherein superhard material is formed on the pattern; With
Remove sapphire substrate.
2. method according to claim 1, wherein sapphire substrate is by using mechanical thinning method to remove.
3. method according to claim 1, wherein sapphire substrate is to remove by grinding, the polishing of using combination.
4. method according to claim 1, wherein one or more semiconductor layers comprise a n-type GaN layer, an active layer and a p-type GaN layer.
5. method according to claim 1, wherein one or more semiconductor layers also comprise a undoped resilient coating, and this undoped resilient coating is to grow on sapphire substrate, and wherein n-type GaN layer is to grow on undoped resilient coating.
6. method according to claim 1 also comprises:
Be etched with the removal dielectric layer, expose a p-GaN layer of one or more semiconductor layers;
The substrate that forms a conduction and heat conduction is on the p-GaN layer that exposes;
Be etched with a n-GaN layer that exposes one or more semiconductor layers;
Form a n-electrode on the n-GaN layer that exposes; With
Cutting semiconductor structure and form a plurality of light-emitting devices.
7. method according to claim 1 wherein adopts the superhard material harder than sapphire substrate, serves as a plurality of terminating points and when stops indicating mechanical thinning process, and the hardness of a plurality of terminating points is greater than the hardness of sapphire substrate.
8. method of making film gallium nitride (GaN) based semiconductor structure, the method comprises:
One sapphire substrate is provided;
Sequentially form one or more semiconductor layers on sapphire substrate, one or more semiconductor layers comprise a n-type GaN layer, an active layer and a p-type GaN layer;
Etching one channel patterns on one or more semiconductor layers;
Deposit a dielectric layer;
Form a photoresist on the part dielectric layer, wherein the part dielectric layer is deposited on one or more semiconductor layers;
Deposit a primer;
Remove photoresist layer, wherein the primer on photoresist also is removed;
Deposit a superhard material, wherein superhard material is formed in the groove;
Be etched with the removal dielectric layer, expose a p-GaN layer of one or more semiconductor layers;
On the p-GaN layer that exposes, form an electrically-conductive backing plate;
Remove sapphire substrate;
Be etched with a n-GaN layer that exposes one or more semiconductor layers;
On the n-GaN layer that exposes, form a n-electrode.
9. method according to claim 8, wherein one or more semiconductor layers also comprise a undoped resilient coating, and undoped resilient coating is to grow on sapphire substrate, and wherein n-type GaN layer is to grow on undoped resilient coating.
10. method according to claim 8, wherein electrically-conductive backing plate is conduction and heat conduction.
11. method according to claim 8, wherein sapphire substrate is by using mechanical thinning (mechanical thinning) method to remove.
12. method according to claim 8, wherein sapphire substrate is to remove by the grinding and polishing method of a combination.
13. method according to claim 8 wherein adopts the superhard material harder than sapphire substrate, serves as a plurality of terminating points and when stops indicating mechanical thinning process, the hardness of a plurality of terminating points is greater than the hardness of sapphire substrate.
14. method according to claim 8 also comprises:
A light-emitting area of the one or more semiconductor layers of surface texturizing; With
Cutting semiconductor structure and form a plurality of light-emitting devices.
15. method according to claim 8 also comprises:
On a light-emitting area of one or more semiconductor layers, form 2 D photon crystal (two-dimensional photonic crystal); With
The cutting semiconductor structure is to form a plurality of light-emitting devices.
16. the gallium nitride of a vertical stratification (GaN) based light-emitting diode (LED) comprising:
One electrically-conductive backing plate, wherein electrically-conductive backing plate is conduction and heat conduction;
One electrode layer is bonded to electrically-conductive backing plate;
One or more semiconductor layers are bonded to electrode layer, and wherein one or more semiconductor layers comprise a n-type GaN layer, an active layer and a p-type GaN layer, and wherein electrode layer is bonded to p-type GaN layer;
A plurality of terminating points are formed on one or more semiconductor layers; With
One n-electrode is attached to n-type GaN layer.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2009/071047 WO2010108331A1 (en) | 2009-03-27 | 2009-03-27 | Method of producing thin semiconductor structures |
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| CN101617415B true CN101617415B (en) | 2011-09-07 |
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| US8187900B2 (en) * | 2007-08-10 | 2012-05-29 | Hong Kong Applied Science and Technology Research Institute Company Limited | Optimization of polishing stop design |
| TWI462339B (en) * | 2011-11-21 | 2014-11-21 | Ritedia Corp | Light-emitting diode having diamond-like carbon layer and manufacturing method and application thereof |
| TW201511327A (en) | 2013-09-06 | 2015-03-16 | Ind Tech Res Inst | Light-emitting diode |
| CN105355752B (en) * | 2015-10-27 | 2018-03-02 | 天津三安光电有限公司 | A kind of LED chip construction, encapsulating structure and preparation method thereof |
| US11056611B2 (en) * | 2018-09-11 | 2021-07-06 | Facebook Technologies, Llc | Mesa formation for wafer-to-wafer bonding |
| CN116759498B (en) * | 2023-08-16 | 2023-11-17 | 南昌凯捷半导体科技有限公司 | Red light micro LED chip and manufacturing method thereof |
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| TW200503066A (en) * | 2003-07-07 | 2005-01-16 | Macronix Int Co Ltd | Process for reworking semiconductor patterned photoresist layer |
| KR100730072B1 (en) * | 2005-12-06 | 2007-06-20 | 삼성전기주식회사 | Vertical structure gallium nitride-based light emitting diode device and method of manufacturing the same |
| US7846753B2 (en) * | 2007-08-10 | 2010-12-07 | Hong Kong Applied Science And Technology Research Institute | Vertical light emitting diode and method of making a vertical light emitting diode |
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