CN101609544A - A data loading and testing method and device for an image processor - Google Patents

Abstract

The invention discloses a kind of image processor data load and method of testing and device, loading procedure is stored in the first address place of FLASH, DSP calls in internal memory with loader module when loading startup, and a plurality of image processing programs to be loaded are stored in the successor address of FLASH; DSP switches between loading procedure and a plurality of image processing program according to the command information that receives, to finish FLASH data load, path testing and other test assignment.The present invention can upgrade and safeguards, and can enable different image processing programs according to different target types after image processor is packed program, and is easy to operate, the reliability height.

Description

A data loading and testing method and device for an image processor

technical field

The invention belongs to the application field of digital image processing, and in particular relates to a method and a device for loading data into an image processing machine.

Background technique

An image processor is a device that performs a series of operations such as processing, analysis, identification, and tracking on an input image to obtain useful information. Digital Signal Processing (DSP) is one of the main carriers for the operation of the image processor system. When the DSP is running, its programs and data are generally stored in the internal DSP or the externally expanded static memory (Static Random Access Memory, SRAM), and will be lost after power failure. Therefore, the program files and some data files of the DSP need to be cured to an external non-volatile memory, such as flash memory (FLASH).

The image processor needs to use different image processing algorithms, different working parameters and template images for specific objects for different object types. The object types may be moving cars, ships, airplanes, or stationary buildings, traffic Hubs, important facilities, etc. Due to the diversity and complexity of image processing, the image processing machine has the characteristics of multi-program modules. Being able to load the above data into the image processor correctly is a condition that the image processor loading and testing device must meet. If the data loading fails, how to ensure that the loading and testing device can continue to work normally is a key point in the design of this type of device. Technical Difficulties.

The commonly used method of online debugging and loading of DSP software is to use the emulator provided by the DSP manufacturer through the JTAG (Joint Test Action Group) port on the DSP. This method is very convenient in the debugging stage, but in complex embedded systems, the image processor may only be a part of the whole system. After the system docking is completed, the image processor works with the entire system. Once a problem occurs, the image processor needs to be separated from the entire system to expose the JTAG port to realize software debugging and loading. And using JTAG loading not only requires additional tools such as emulators and development platforms, but also requires professionals to operate, and the scope of application is narrow.

In the 8th issue of "World Electronic Components" in 2008, in the article "Realization of DSP Program Loading Based on Computer Serial Port" by Li Shijie and others of Air-to-Air Missile Research Institute, a method of loading DSP based on computer serial port is mentioned. A UART chip is connected to the DSP's multi-channel buffered serial port (McBSP) after performing level conversion, but the communication protocol is simple, and the given example only involves the case of a single DSP program module. Suitable for complex image processing machines. Moreover, the reliability of the loading method is not high, and if the loading is wrong, the loading and testing device will be paralyzed.

In "Research and Development", Volume 26, No. 10, 2007, in the article "Design and Implementation of DSP Off-chip Flash in System Programming" by Zhang Bing and others from Nanjing University of Aeronautics and Astronautics, a computer serial port pairing method is also mentioned. The method of loading Flash outside the DSP chip builds a resident Flash update firmware program, which solves the problem of paralysis of loading and testing devices caused by loading errors, but the example given by this method only involves the situation of DSP processing a single software , the communication protocol is simple and cannot be applied to image processors with multi-program modules, and no more effective measures are considered to ensure the reliability of data transmission.

Contents of the invention

The purpose of the present invention is to provide a data loading method and device for an image processor. After the image processor is packaged, the program can be upgraded and maintained, and different image processing programs can be activated according to different target types. The operation is convenient. High reliability.

A data loading and testing method for an image processor, the loading program is stored at the first address of the FLASH of the image processor, including a FLASH loading submodule, a software switching submodule, a path detection submodule, a first testing submodule, and a second testing submodule Module, ..., the nth test sub-module, when the loading and testing device starts, the DSP of the image processor transfers the loading program into the memory; the data to be loaded is stored in the follow-up address of the FLASH, including the image processing program, program parameters and target template image ; The image processing program includes a switching software submodule, a path detection submodule and an image processing submodule;

The current running program of the DSP receives the instruction information sent by the loading and testing device, and judges whether it is a loading program or an image processing program. If it is a loading program, it will be processed according to mode A; if it is an image processing program, it will be processed according to mode B;

Method A:

A1) If the instruction information is a FLASH loading instruction, then run the FLASH loading submodule of the loading program to complete the FLASH data loading operation;

The FLASH data loading operation is performed as follows:

(a11) The FLASH loading submodule detects the FLASH type connected to the DSP, and returns the receiving ready information containing the FLASH type to the loading and testing device;

(a12) The loading and testing device encodes the data to be loaded according to the FLASH type, and sends the encoded data packet to the FLASH loading submodule;

(a13) The FLASH loading sub-module receives the data packet, decodes the data packet and performs a correctness check, and returns the check result to the loading and testing device. If the check result is correct, enter step (a4), otherwise, end;

(a14) The FLASH loading submodule writes the decoded data into the FLASH sector specified by the FLASH loading instruction;

(a15) The FLASH loading submodule checks the correctness of the data written into the FLASH, and if correct, returns the status information that the FLASH is loaded successfully, otherwise it ends;

A2) If the instruction information is a program switching instruction, then judge whether it is the target program, if so, then run the loading program as usual, return the status information that the target program is running to the loading and testing device, otherwise DSP resets, and runs the switching program of the loading program The sub-module guides and loads the target program from the FLASH to the DSP memory as a new current running program, and returns the status information of the target software switching success to the loading and testing device;

A3) If the instruction information is the i-th test instruction, i=1, 2, ..., n, then run the i-th test submodule of the loader to complete the corresponding test, and return the status information representing the test result to the loading and testing device ;

A4) If the instruction information is a path detection instruction, then run the path detection submodule of the loading program to complete the path detection between the loading and testing device and the DSP, and return state information representing the detection result to the loading and testing device;

Method B:

B1) If the instruction information is a data loading instruction, then return to the loading and testing device the status information prompting the user to switch to the loading program;

B2) If the instruction information is a switch program instruction, then judge whether it is the target program, if so, then run the current image processing program as usual, and return the status information that the target program is running to the loading and testing device, otherwise the DSP resets, and the image processing before operation The switching program sub-module of the program guides and loads the target program from the FLASH to the DSP memory as a new current running program, and returns the status information that the switching of the target software is successful to the loading and testing device;

B3) If the instruction information is the i-th test instruction, i=1, 2, ..., n, then return to the loading and testing device the state information that prompts to switch to the loading program;

B4) If the instruction information is a path detection instruction, the path detection submodule running the current image processing program completes the path detection between the loading and testing device and the DSP, and returns status information indicating the detection result to the loading and testing device.

Compared with the traditional background technology in the past, the technical effect of the present invention is reflected in:

1. Improved loading reliability.

Design a set of loading programs that are resident at the first address of FLASH, and generally do not need to be changed after delivery to the user, which effectively solves the problem of data loading failures that cause the crash of the loading and testing device.

2. After the image processor is packaged, it is convenient to upgrade and maintain the program

The user controls the image processor to run the loading program through the host computer to complete the data loading task, so as to conveniently upgrade the program data of the image processor; in addition, the test submodule of the loading program can be expanded according to actual needs, such as monitoring the important data on the image processor. The working status of the device, view and change the program type currently running in the DSP, view the data content stored in the FLASH, etc., to achieve effective maintenance of the program.

3. A common communication protocol between the loading and testing device and the image processor to be loaded is established.

The protocol is scalable and easy to explain. It is not only suitable for computer serial ports, but also can be slightly modified for loading and testing devices based on USB ports, PCI ports or network ports. It is generally applicable to image processors with FPGA+DSP+FLASH structure. The platform has the advantages of universality, strong scalability and high reliability.

4. Improved DSP multi-program module switching technology

By introducing the boot selection switch implemented by software, it is not necessary to modify the hardware of the processor, only the user needs to input the information of the target program to be switched, and the main control computer can control the DSP to realize arbitrary switching between multi-program modules.

Description of drawings

Fig. 1 is a figure of operation steps of the present invention;

Fig. 2 is a schematic diagram of instruction packet format definition;

Fig. 3 is a schematic diagram of file package format definition;

Fig. 4 is the overall structural diagram of the loading and testing device of the present invention;

Fig. 5 is a hierarchical structure diagram of the loading and testing device and the loaded image processor of the present invention;

Fig. 6 is a division diagram of the functional modules of the control program at the main control terminal;

Figure 7 is a serial port data format diagram;

Fig. 8 is a schematic diagram of the connection between the loading and testing device of the present invention and the loaded image processor;

Fig. 9 is a schematic diagram of the McBSP port connection between the main DSP and the slave DSP;

Fig. 10 is a schematic diagram of data storage in FLASH;

Fig. 11 is a schematic diagram of sub-module division of the loader;

Fig. 12 is a schematic diagram of sub-module division of the loader embodiment;

Fig. 13 is a flow chart of the loading program module running in the main DSP of the image processing machine;

Fig. 14 is the flow chart of the image processing program module running in the main DSP of the image processing machine;

Fig. 15 is a flow chart of the loading program module running in the image processor from the DSP;

Fig. 16 is a flow chart of the image processing program modules running in the image processor slave DSP.

Detailed ways

Further details will be given below in conjunction with the accompanying drawings and embodiments.

Figure 1 shows the flow of the loading method of the present invention, specifically.

(1) Convert the loader executable file compiled by the DSP development platform into a pure data file supported by FLASH, for example, convert the .out file compiled by CCS (Code Composer Studio) into a hexadecimal .hex file . The loading program includes a FLASH loading submodule, a switching program submodule, a path detection submodule, a device testing submodule and a FLASH data viewing submodule.

(2) Adopt emulator and debugging interface provided by DSP manufacturer, for example, adopt USB emulator and JTAG port of TI company, write the data file generated in step (1) to the first address of DSP off-chip FLASH.

(3) Starting the loading and testing device, including connecting the loading and testing device with the image processor to be loaded, turning on the main control computer, running the control program module of the main control computer, and starting the image processor. At this moment, the programs run by each DSP in the image processor are the loading programs programmed into the first address of the FLASH in step (2).

(4) Before the FLASH loading sub-module of the loading program carries out data loading, first test whether the data path from the main control computer → image processing machine DSP → main control computer is correct, if correct, then enter step (5), otherwise end the operation, Check the cause of the failure.

(5) The FLASH loading sub-module writes various data into the sector positions of the specified FLASH in the following ways:

(5.1) The user sends a FLASH loading command to the FLASH loading sub-module, and the information included in the FLASH loading command includes: the size of the data to be loaded, the starting address of the sector to be written into the FLASH;

(5.2) After the FLASH loading sub-module receives the FLASH loading instruction, it detects the connected FLASH type and prepares to receive the data to be loaded;

(5.3) After the loading and testing device receives the message that the DSP is ready, the data to be loaded is encoded, and the encoded data packet is sent to the loading program; the data to be loaded is stored in the follow-up address of the FLASH, including the image processing program, program Parameters and target template images; the image processing program includes a switching program submodule, a path detection submodule and an image processing submodule;

(5.4) The FLASH loading sub-module receives the data packet to be loaded, decodes the data packet and performs correctness verification, and returns the verification result to the loading and testing device. If the verification result is correct, enter step (5.5), otherwise, End this operation, detect the cause of the failure, and return to step (3);

(5.5) The FLASH loading submodule writes the decoded effective data to be loaded into the sector position specified by the FLASH loading instruction;

(5.6) The FLASH loading sub-module checks the correctness of the data written into the FLASH, and if it is correct, returns the information that the loading is successful to the loading and testing device. After this loading is completed, return to step (5); otherwise end this time Operation, detection error cause, back to step (4);

(6) After the loading and testing device has correctly written all the data into the FLASH of the image processor, the current running program of the DSP receives the user's instruction information and judges whether it is a loading program or an image processing program. The above-mentioned way A is processed: if it is an image processing program, the above-mentioned way B is used for processing.

The main data interacted between the loading and testing device and the image processor include the instruction data sent by the loading and testing device to the image processor, the loaded data sent by the loading and testing device to the image processor, and the data returned by the image processor to the host computer. There are three types of status message data, specifically:

(1) The loading and testing device sends the path detection instruction to the image processor;

(2) The loading and testing device sends a switching program instruction to the image processor;

(3) The loading and testing device sends a file data update command to the image processor;

(4) The loading and testing device sends the file data to be loaded to the image processor;

(5) The loading and testing device sends the device instruction word on the test board to the image processor;

(6) The loading and testing device sends the FLASH data viewing instruction to the image processor;

(7) The image processor returns information about whether the path is normal or not to the loading and testing device;

(8) The image processor returns the switching program status information to the loading and testing device;

(9) The image processor returns the loading FLASH information to the loading and testing device;

(10) The image processor returns device test result information to the loading and testing device;

(11) The image processor returns the data information stored in the FLASH to the loading and testing device.

In order to ensure the reliability of the loading method, the present invention mainly takes the following measures:

(1) Developed a set of communication protocols followed by the loading and testing device and the image processor;

The data exchanged between the loading and testing device and the image processor is defined as a fixed-size format, and the size of each data packet is 32Bytes. The instruction packet sent by the loading and testing device to the image processor and the status message packet returned by the image processor to the loading and testing device have the same format definition, as shown in Figure 2, the first three fields are packet header information, which respectively represent: DSP number , program number and instruction category, the last two fields are 16-bit cyclic check code (Cyclic Redundancy Check, CRC), and the middle field is a specific instruction or status word.

The format definition of the data packet to be loaded is shown in Figure 3. The header and tail information of the packet is consistent with the header and tail of the instruction packet, and the 3rd and 4th fields of the file packet are the data frame number.

(2) carry out CRC check to the data packet transmitted between the loading and testing device and the image processor;

(3) Check the frame number of the loaded program module data packet sent by the loading and testing device to the image processor, and the wrong data packet will not be allowed to be written into the FLASH.

(4) The loader module that resides in FLASH is set.

That is, the loading program mentioned in step (1) (2), this program is independent from other image processing programs, and is dedicated to realize the data loading function. After it is written into FLASH, it generally does not need to be updated, which solves the problem of data loading failure caused by loading and Problems with the test device not continuing to function properly.

(5) Overtime processing.

Contains image processor timeout and loading and testing device timeout. If the image processor times out, the control program of the master computer will give a system message, prompting the user that "the processor has timed out and has no response", and the user performs fault detection according to this prompt. The image processor is equipped with a watchdog circuit. If the DSP does not run for a certain period of time, the processor will automatically restart.

If the DSP does not receive the next file packet within 30s after receiving a file packet, it will be considered that the master computer has timed out, and a clock monitor is set in the DSP. Once the clock monitor is triggered, the DSP will give up the current operation and return to the initial state.

The present invention is not only applicable to a single DSP image processor, but also applicable to a multi-DSP image processor. Now, the multi-DSP image processor is taken as an example to illustrate the loading and testing device for realizing the above method. As shown in Figure 4, the loading and testing device includes an RS232/RS422 serial port converter, a master computer with an RS232 serial port, an electrical characteristic conversion circuit, and a loading program. The loaded image processor is a multi-DSP+FPGA+ The structure of FLASH.

For the hierarchical structure of the loading and testing device and the loaded image processor, refer to Figure 5, from low to high: hardware layer, hardware interface layer, monitoring system layer, Windows device driver layer, Windows operating system layer and application layer.

(1) Hardware layer: the image processor and various hardware resources on its board.

(2) Hardware interface layer: Also known as the hardware driver layer, it consists of a series of encapsulated driver functions, which directly operate on the hardware, thereby driving the hardware circuit to work normally. The call interface they provide upwards makes users not concerned about how the underlying hardware works.

(3) Monitoring system layer: The monitoring program is used to control the operation of the entire image processor, complete the task scheduling of the entire system, resource allocation, data transmission, command reception, interpretation and execution.

(4) Windows device driver layer: Between the application layer and the monitoring software layer, all data communication between the control program and the image processor must be supported by the Windows device driver layer, and the device driver layer converts the data and commands of the application layer Into an IRP request packet, call the corresponding processing routine to complete the data communication between the control program and DSP.

(5) Windows operating system layer: the operating environment of the console of the main control machine to control the program modules. Use its message loop mechanism to process various Windows window messages of the control program module, and at the same time call the device driver to process the corresponding IRP, which is the supporting environment for the entire main control computer control program module.

(6) Application layer: The master control program module is located in this layer, which has a good human-computer interaction interface, and the user controls the operation of the entire system and monitors the status of the system through the program module.

Among them, all the tasks and functions of (1)(2)(3) layers are realized on the image processor, and all the tasks and functions of (4)(5)(6) layers are realized on the loading and testing device.

The digital image machine data loading and testing device for realizing the above method includes a main control computer, an RS232/RS422 serial port converter, an electrical characteristic conversion circuit and a loading program. The components of the loading and testing device are introduced in detail below.

1. RS232/RS422 serial converter

One end of the serial port converter is connected to the RS232 port of the main control computer, and the other end is connected to the electrical conversion circuit of the image processor. Its function is to convert the output data stream of the main control computer into a differential mode, which is convenient for long-distance transmission.

2. Main controller

The control program module of the main control machine is developed in the environment of Visual C++6.0, interacts with the user upwards, and calls the Windows API (Application Programming Interface, application programming interface) function downwards. It is necessary to be able to send the data stipulated by the protocol to the image processor, receive and analyze the information returned by the DSP; build an interface for interacting with the user, generate relevant instruction information and send it to the image processor according to the user's operation. After receiving the information returned by the image processor, analyze and notify the user. The functional module division of the master control program module is shown in Figure 6, including six functional submodules, namely: file format conversion submodule, encoding submodule, sending submodule, receiving submodule, parsing submodule and display submodule module.

(1) The file format conversion sub-module is used to convert the data file input by the user into a file format supported by FLASH, for example, convert the .out file compiled by CCS into a .hex file. The steps of file format conversion are as follows:

①Change the file extension from .out to .hex;

②Remove the .hex file header and separate the data file;

③Write the converted .hex into the directory of the .out file, that is, store it in the hard disk of the master computer.

(2) The encoding sub-module receives the instruction information input by the user, reads the data file in the hard disk of the master computer, encodes the instruction information and the data file information respectively according to the communication protocol, and obtains the instruction packet and the file packet. For example command package

00c000001ABCDEFGHIJKLMNOPQRSTU(CRC1)(CRC2) indicates that this is a channel detection instruction sent to DSP0, and the program No. 0 should be running in DSP0, and the last two fields CRC1 and CRC2 indicate the CRC check code.

11c000002200000000000000000000(CRC1)(CRC2), which means that this is a switching program instruction sent to DSP1, and the program No. 1 is running in DSP1, and DSP1 is required to switch the program to No. 2.

20c000003100064010000000000000(CRC1)(CRC2), indicating that this is a FLASH loading instruction sent to DSP2, the size of the file to be loaded is 0x1000Bytes, and the starting address to be loaded into FLASH is 0x64010000.

For example, the file package 00dfe00010d24f353dfs5fgg5f3g4f(CRC1)(CRC2) means that this is a file package sent to DSP0, the frame number is 0xfe(254), and the middle 25 fields are valid file data. When the number of remaining file data is less than 25Bytes, add 0 to make up.

(3) The sending sub-module configures the serial port of the main control computer, and sends the instruction packet and data packet to the serial port of the main control computer. Serial port parameters include: serial port name, baud rate, parity bit, data bit and stop bit. The baud rate adopted by the present invention is 19200, the parity bit is 0, the data bit is 8, the stop bit is 0, the valid data in the 11bits data is 8bit, and the serial data format is as shown in Figure 7.

(4) The receiving sub-module writes the status information fed back by the image processor into the storage area of the main control computer through the serial port of the main control computer.

(5) The parsing sub-module is used for parsing the status information packet returned by the processor.

e.g. status packet

02c000001ABCDEFGHIJKLMNOPQRSTU(CRC1)(CRC2), indicating that the serial port data path between PC and DSP0 is correct, and the program running in DSP0 is program No. 2.

12c000002200000000000000000000(CRC1)(CRC2), indicating that DSP1 has successfully switched to program No. 2.

20c000003510000000000000000000(CRC1)(CRC2), indicating that DSP2 is ready to receive the file data to be loaded, and the FLASH model outside DSP2 is SST28VF016.

If the message packet does not comply with the provisions of the communication protocol, it is considered that the data packet is an error message.

(6) The display sub-module displays the analysis result obtained by the analysis sub-module in the status bar of the user interface. For example: "The serial port path between PC and No. 0 DSP is correct, and the DSP is running the No. Correct" etc.

3. Electrical characteristic conversion circuit

Since RS-422 works in differential mode, and the FPGA of the image processor works in single-ended mode, it is necessary to add an electrical characteristic conversion circuit around the FPGA to match the electrical characteristics of both communication parties. -422, RS-485 communication conversion chip MAX3490 can realize this function.

4. Load the program

The loading program is mainly used to write the data to be loaded into the FLASH. The present invention adopts the emulator and the debugging interface provided by the DSP manufacturer, such as the USB emulator and the JTAG port of TI Company, to write it to the first address of the FLASH.

The loaded image processor is a structure based on multi-DSP+FPGA+FLASH, including 1 to 4 FPGAs (Field Programmable Gate Array, area programmable gate array), 1 to 9 DSPs, and one-to-one corresponding DSP NOR FLASH, its connection with the loading and testing device is shown in Figure 8. The working principle of each component of the image processor will be described below:

1. FPGA

FPGA generally uses 1 to 4 pieces, which are divided into master FPGA and slave FPGA. The FPGA connected to the electrical characteristic conversion circuit is the master FPGA, and the rest are slave FPGAs. On the one hand, the main FPGA converts the serial data sent by the master computer into parallel, judges the data flow direction according to the packet header information (DSP number), and transmits the data packet to the corresponding DSP; on the other hand, converts the parallel information packet returned by the DSP It is serial and fed back to the host computer. Build a Universal Asynchronous Receiver and Transmitter (UART) in the main FPGA to realize data serial/parallel conversion. The slave FPGA only needs to determine the data flow direction and forward the data, and does not need to perform serial/parallel conversion. FPGA plays the role of constructing data path in the image processor, and realizes the data interaction between DSP and the host computer.

2. DSP and FLASH

DSP generally uses 1 to 9 slices, which are also divided into master DSP and slave DSP. The specific allocation is specified by the user, but the DSP connected to the master FPGA must be the master DSP. The data path between the master DSP and the FPGA is constructed by a pair of FIFO buffers (input buffer FIFO and output buffer FIFO), and the data path between the master DSP and the slave DSP is realized by the interface that comes with the DSP, such as the McBSP port of TI C6000DSP, The Link port of the ADI SHARC series DSP, and the connection method of two TI DSPs using the McBSP port are shown in Figure 9. The loading channels between the slave DSPs are independent of each other. DSP responds to the instructions of the host computer, performs corresponding operations, and is the main executor of data loading.

Both the FLASH connected with the main DSP and the slave DSP store two kinds of loading program modules and image processing program modules, as shown in Figure 10. Since NOR FLASH needs to erase the corresponding sector before programming, in order to facilitate programming, the start address of each data stored in FLASH is specified as the start address of a certain sector, and according to the size of each data and the program number, assigning it a fixed sector location. Each data generally changes little after being finalized, and sector allocation takes into account a certain margin, and there is no need to change it after allocation.

See Figure 11 for a schematic diagram of the overall division of the loader submodules of the main DSP. An example of the loader is shown in Figure 12, including six functional submodules:

(1) Data flow direction judgment and forwarding sub-module: used to judge whether the data packet received by the master DSP needs to be forwarded to the slave DSP. Specifically: determine whether the DSP number information in the data packet corresponds to the current master DSP number, if so, the master DSP processes it, and if not, forwards it to the corresponding slave DSP.

(2) The path detection sub-module is used to test whether the data path from the master computer → image processor → master computer is correct. , return the channel normal message packet; if inconsistent, it indicates that the data transmitted by the channel is wrong, return the channel abnormal message packet, and then return to the initial state;

(3) The FLASH loading submodule is used to write valid data into the FLASH. The FLASH loading sub-module extracts the size of the data to be loaded from the data loading command, the starting address of the sector where the file will be written into the FLASH, the maximum number of programming times, etc., calculates the number of data packets, and then detects the The type of FLASH loaded, return a message packet to the host control program to indicate that "DSP0 is ready to receive file data, the type of FLASH mounted on the DSP is: XXXX", and then open the clock monitor. After the DSP receives the file data packet, it performs reliability verification, extracts the data with correct verification and stores it in the programming array, discards the data packets with incorrect verification and records the number of error data packets. If the data packet is completely received correctly, you can proceed to the next step, otherwise, jump out of this module and return to the initial state. If the arrival time of two adjacent file data packets exceeds 30s, it is considered that the main control machine is overtime, and the DSP triggers the clock monitor to jump out of the FLASH loading module and return to the initial state.

After the DSP receives the data packet, close the clock monitor, call the programming function of the FLASH loading module to start writing the FLASH. After writing, check whether the data in the FLASH is consistent with the programming file data in the memory. If they are consistent, return the message package "FLASH programming completed successfully" and return to the initial state; If the maximum number of repeatable operations is exceeded, write it again. If the number of repeatable operations has exceeded and the FLASH is still not written successfully, the information packet "Writing FLASH error" will be returned, and then return to the initial state to prepare for the next operation.

(4) The switching program sub-module is used for mutual switching among the multi-program modules of the image processor. The switching method is as follows: first judge whether the target program to be switched is consistent with the running program in the DSP memory, if they are consistent, return the message package "The program has been successfully started", if not, return the message package "Switching to the target program ", after which the DSP is reset, and the target program is loaded from the FLASH to the DSP memory.

(5) The device test sub-module is used to test the working status of the off-chip devices mounted on the DSP, and obtain the data stored in the FLASH, etc. Common devices mounted to DSP include Synchronous Dynamic Random Access Memory (Synchronous Dynamic Random Access Memory, SDRAM), FLASH, Dual Port RAM (DualPort Random Access Memory, DPRAM), etc. The test method is as follows: first determine the type of the device to be tested, then write a set of incremental data to the device to be tested, and then read it out to judge whether it is the same as the written data. The device is not working properly.

(6) FLASH data viewing sub-module: used to view the data content stored in FLASH. The viewing method is as follows: the FLASH loading sub-module first reads the segment of data in the FLASH according to the storage address information and size information of the data to be obtained in the instruction package, and then performs the file package according to the encoding sub-module in the above-mentioned master control program module. The encoding method encodes the data, generates a view result message packet, and returns it to the host computer at last.

The image processing program of the main DSP includes a channel detection sub-module, a switching program sub-module, a flow direction judgment sub-module and an image processing sub-module. Wherein the path detection sub-module and the switching program sub-module have the same functions as the path detection sub-module and the switching program sub-module of the aforementioned main DSP loading program. The flow direction judgment submodule here is similar to the flow direction judgment and forwarding submodule of the main DSP loader in that: both need to determine whether the DSP number information in the data packet corresponds to the current main DSP number; the difference lies in: the former judgment result If it is not corresponding, it will return the status information prompting to switch to the loader, and when the latter judges that it is not corresponding, it will directly forward the data to the target slave DSP. The image processing sub-module is used to implement an image processing algorithm for a specific task.

The workflow on the image processor side is as follows:

After the main DSP and the slave DSP are powered on, both start the loading program stored at the first address of the FLASH by default. If the data from the main control computer is not received within the specified time, it will be considered that the user is not currently loading the FLASH, and the program will automatically switch to the default Image processing program, otherwise, continue to run the loading program to process the task data of the main control computer accordingly.

During the execution of the image processing program by the main DSP, if the task data of the main control computer arrives, the image processing program stops the current operation and turns to process the task data of the main control computer: the main DSP calls the flow direction judgment submodule of the image processing program Determine whether the data packet needs to be forwarded, if necessary, return the message packet to prompt the user to switch to the loader of the main DSP, if not, refer to Figure 14, and process according to the following steps:

(101) If the command word in the instruction packet indicates a path detection instruction, run the path detection submodule of the image processing program.

(102) If the command word in the instruction packet indicates a data loading instruction, return a message packet to prompt the user to switch to the loading program.

(103) If the command word in the instruction packet indicates that it is a switch program command, run the switch program submodule of the image processing program.

(104) If the command word in the instruction packet indicates that it is a device test instruction, return the information packet to prompt the user to switch to the loading program.

(105) If the command word in the instruction packet indicates that it is a FLASH data viewing instruction, return the information packet to prompt the user to switch to the loading program.

When the main DSP executes the loading program, if the main control computer task data arrives, the loading program will analyze the serial port data (command packet and data packet) transmitted from the main control computer, and call the data flow determination and forwarding submodule of the loading program Determine whether the data packet needs to be forwarded, if necessary, then forward the data packet to the corresponding slave DSP, if not, then refer to Figure 13 to process according to the following steps:

(201) If the command word in the instruction packet indicates a path detection instruction, run the path detection submodule of the loading program.

(202) If the command word in the instruction packet indicates that it is a data loading instruction, then run the FLASH loading submodule of the loading program.

(203) If the command word in the instruction packet indicates that it is a switching program command, run the switching program submodule of the loading program.

(204) If the command word in the command packet indicates a device test command, run the device test submodule of the loading program.

(205) If the command word in the instruction packet indicates that it is a FLASH data viewing instruction, then run the FLASH data viewing submodule of the loading program.

Figure 15 and Figure 16 show the processing flow of the loading program and image processing program of the slave DSP respectively. The slave DSP receives the command packets and data packets forwarded by the master DSP, and the subsequent operations on them are basically the same as those of the master DSP, with some differences. Two points: a. The slave DSP does not need to forward data packets to other DSPs, so the loading program from the DSP does not include the data flow direction judgment and forwarding sub-module, and the image processing program from the DSP does not include the data flow direction judgment sub-module; b. The information packet produced by DSP is returned to the host computer through the main DSP.

In the present invention, the bootloading process of the loaded image processing machine DSP is the same as proposed in the Chinese patent document "Multi-DSP multi-program module bootloading method and its system" applied by Zheng Wei, Huazhong University of Science and Technology Institute of Image Recognition and Artificial Intelligence Institute. The bootloading method is the same as that mentioned above, and the patent document also mentions a method for switching the DSP multi-program module, but it can only be realized by operating the dial switch on the circuit board. When the processor is packaged, the DIP switch on the board is also packaged, which will cause the program switching function to be unavailable. If the key is connected forcibly, it will affect the reliability of the system. The present invention improves this method, and realizes the switch between DSP program modules by means of software. In this embodiment, a readable and writable register is set in the FPGA connected to the DSP as a boot selection switch. When the DSP performs bootloading, it reads the value of the boot selection switch, and starts the corresponding program according to this value.

The specific method is as follows:

1) After the currently running program of the DSP receives the switching command, it first judges whether the target program number is consistent with the running program number, if not, writes the target program number into the boot selection switch, and proceeds to the next step; if they are consistent, then Do not proceed to the next step.

2) Close the global interrupt and clear the interrupt control register.

3) The data in the DSP level 1 cache is set to be invalid.

4) Jump to DSP memory address 0 for execution.

5) The DSP memory address 0 stores the user loading code, so the DSP executes the user loading process, loads the program data corresponding to the number stored in the FLASH and the boot selection switch value into the memory, and the loading is completed.

Claims (4)

1, a kind of image processor data load and method of testing, loading procedure is stored in the FLASH first address place of image processor, comprise that FLASH loads submodule, changeover program submodule, path detection sub-module, the first test submodule, the second test submodule ..., n test submodule, the DSP of image processor calls in internal memory with loading procedure when loading with the proving installation startup; Data to be loaded deposit the subsequent address of FLASH in, comprise image processing program, program parameter and To Template image; Image processing program comprises changeover program submodule, path detection sub-module and Flame Image Process submodule;

The current working procedure of DSP receives and loads the command information that sends with proving installation, judges it self is loading procedure or image processing program, if loading procedure is then handled according to mode A: if image processing program is then handled according to mode B;

Mode A:

A1) if command information is the FLASH load instructions, the FLASH that then moves loading procedure loads submodule and finishes the FLASH data loading operations;

The FLASH data loading operations is carried out as follows:

(a11) FLASH loads submodule and detects the FLASH type that DSP connects, and returns the ready for receiving information that includes the FLASH type to loading with proving installation;

(a12) load and to treat loading data with proving installation according to the FLASH type and encode, the packet that coding is obtained sends to FLASH and loads submodule;

(a13) FLASH loads submodule and receives packet, and to decoded packet data and do the correctness verification, check results is returned to load and proving installation, be correct as check results, enter step (a4), otherwise, end;

(a14) FLASH loads the FLASH sector that data that submodule obtains decoding write the appointment of FLASH load instructions;

(a15) FLASH loading submodule carries out the correctness verification to the data that write FLASH, if correct, then return FLASH and loads successful status information, otherwise finish;

A2) if command information is the program switching command, judge then whether self is target program, if, then move loading procedure as usual, return the status information that target program is moving to loading with proving installation, otherwise DSP resets, the changeover program submodule of operation loading procedure with target program from FLASH Bootstrap Loading to the DSP internal memory as new current working procedure, and to loading the status information of returning the target software handover success with proving installation;

A3) if command information is the i test instruction, i=1,2 ..., n then moves i test submodule of loading procedure and finishes corresponding test, and to loading the status information of returning the expression test result with proving installation;

A4) detect instruction if command information is a path, then move the path that the path detection sub-module of loading procedure finishes between loading and proving installation and DSP and detect, and return the status information of representing testing result to loading with proving installation;

Mode B:

B1) if command information is the data load instruction, then return the status information that the prompting user switches to loading procedure to loading with proving installation;

B2) if command information is the changeover program instruction, judge then whether self is target program, if, then move the present image handling procedure as usual, return the status information that target program is moving to loading with proving installation, otherwise DSP resets, before the operation changeover program submodule of image processing program with target program from FLASH Bootstrap Loading to the DSP internal memory as new current working procedure, and to loading the status information of returning the target software handover success with proving installation;

B3) if command information is the i test instruction, i=1,2 ..., n then returns the status information that prompting switches to loading procedure to loading with proving installation;

B4) detect instruction if command information is a path, then move the path that the path detection sub-module of present image handling procedure finishes between loading and proving installation and DSP and detect, and return the status information of representing testing result to loading with proving installation.

2, image processor data load according to claim 1 and method of testing is characterized in that, for read-write register of DSP peripheral hardware as the guiding selector switch; When DSP carries out the program switching, earlier the target program numbering is write the guiding selector switch, hot reset reads the numerical value of guiding selector switch storage then again, will be stored in the program that numbering equates with this numerical value among the FLASH at last and be written into internal memory.

3, realize the image processor data load and the proving installation of the described method of claim 1, comprise main control computer, RS232/RS422 serial converter, opering characteristic of electric apparatus change-over circuit and loading procedure;

Main control computer links to each other with image processor based on the FPGA+DSP+FLASH structure by RS232/RS422 serial converter, opering characteristic of electric apparatus change-over circuit; Loading procedure is stored in the FLASH first address place of image processor, comprise that FLASH loads submodule, software switching submodule, path detection sub-module, the first test submodule, the second test submodule ..., n test submodule, DSP calls in internal memory with loader module when loading startup; Data to be loaded deposit the subsequent address of FLASH in, and data to be loaded comprise image processing program, program parameter and To Template image; Image processing program comprises changeover program submodule, path detection sub-module and Flame Image Process submodule;

Main control computer obtains packet and instruction bag to the data to be loaded and the command information coding of user's input, sends it to the DSP of image processor; Receive the status message that DSP returns, to feeding back to the user after its decoding;

RS232/RS422 serial converter one end connects main control computer, and other end connecting circuit characteristic change-over circuit is used to realize the mutual conversion of serial data RS232 form and RS422 form;

Opering characteristic of electric apparatus change-over circuit one end connects the RS232/RS422 serial converter, and the other end connects the FPGA of image processor, is used to realize the mutual conversion of serial data RS422 difference modes and single-ended mode;

The current working procedure of DSP receives and loads the command information that sends with proving installation, judges it self is loading procedure or image processing program, if loading procedure is then handled according to mode A: if image processing program is then handled according to mode B;

Mode A:

A1) if command information is the FLASH load instructions, the FLASH that then moves loading procedure loads submodule and finishes the FLASH data loading operations;

The FLASH data loading operations is carried out as follows:

(a11) FLASH loads submodule and detects the FLASH type that DSP connects, and returns the ready for receiving information that includes the FLASH type to loading with proving installation;

(a12) load and to treat loading data with proving installation according to the FLASH type and encode, the packet that coding is obtained sends to FLASH and loads submodule;

(a13) FLASH loads submodule and receives packet, and to decoded packet data and do the correctness verification, check results is returned to load and proving installation, be correct as check results, enter step (a4), otherwise, end;

(a14) FLASH loads the FLASH sector that data that submodule obtains decoding write the appointment of FLASH load instructions;

(a15) FLASH loading submodule carries out the correctness verification to the data that write FLASH, if correct, then return FLASH and loads successful status information, otherwise finish;

A2) if command information is the program switching command, judge then whether self is target program, if, then move loading procedure as usual, return the status information that target program is moving to loading with proving installation, otherwise DSP resets, the changeover program submodule of operation loading procedure with target program from FLASH Bootstrap Loading to the DSP internal memory as new current working procedure, and to loading the status information of returning the target software handover success with proving installation;

A3) if command information is the i test instruction, i=1,2 ..., n then moves i test submodule of loading procedure and finishes corresponding test, and to loading the status information of returning the expression test result with proving installation;

A4) detect instruction if command information is a path, then move the path that the path detection sub-module of loading procedure finishes between loading and proving installation and DSP and detect, and return the status information of representing testing result to loading with proving installation;

Mode B:

B1) if command information is the data load instruction, then return the status information that the prompting user switches to loading procedure to loading with proving installation;

B2) if command information is the changeover program instruction, judge then whether self is target program, if, then move the present image handling procedure as usual, return the status information that target program is moving to loading with proving installation, otherwise DSP resets, before the operation changeover program submodule of image processing program with target program from FLASH Bootstrap Loading to the DSP internal memory as new current working procedure, and to loading the status information of returning the target software handover success with proving installation;

B3) if command information is the i test instruction, i=1,2 ..., n then returns the status information that prompting switches to loading procedure to loading with proving installation;

B4) detect instruction if command information is a path, then move the path that the path detection sub-module of present image handling procedure finishes between loading and proving installation and DSP and detect, and return the status information of representing testing result to loading with proving installation.

4, image processor data load according to claim 3 and proving installation is characterized in that, for read-write register of DSP peripheral hardware as the guiding selector switch; When DSP carries out the software switching, earlier the target software numbering is write the guiding selector switch, hot reset carries out the DSP reloading at last again; The reloading process is specially: DSP reads the numerical value of guiding selector switch storage, is written into internal memory with being stored in software corresponding with this numerical value among the FLASH.

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